Random forest anti-fact analysis method, system, medium and equipment
By using the counterfactual analysis method of random forest, the problem of insufficient interpretability of machine learning models is solved, and counterfactual analysis of machine learning models is realized, which improves the interpretability of the models and the reference value of treatment plans.
Patent Information
- Application Number
- CN202311568949.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-22
- Publication Date
- 2026-02-03
AI Technical Summary
Machine learning models lack interpretability and are difficult to understand their internal workings, especially in safety-sensitive fields such as medical diagnosis and treatment. There is an urgent need for a method to perform counterfactual analysis on machine learning models.
The random forest counterfactual analysis method is adopted. By collecting data, preprocessing, encoding sample data, and using a satisfiability modular theory solver for iterative calculation, counterfactual samples are generated and the globally optimal counterfactual samples are optimized.
It improves the interpretability of machine learning models, enabling the analysis of important features in disease diagnosis and treatment plans, and provides valuable references.
Smart Images
Figure CN121457570A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of machine learning technology, and more specifically, to a method, system, medium, and device for random forest counterfactual analysis. Background Technology
[0002] Machine learning is now widely used in fields with high security sensitivity, such as autonomous driving, healthcare, and smart government. However, machine learning models are still considered black boxes, and understanding their internal workings is extremely difficult, hindering their further development. Therefore, interpretability in machine learning is crucial. The following example illustrates this importance: Machine learning is frequently used in medical diagnosis. Machine learning models take various vital signs as input to make predictions, which serve as one reference for disease diagnosis. Doctors need to trust the model and understand its operating mechanism beforehand to use it effectively. Furthermore, when a patient is diagnosed with a disease, interpretable analysis can reveal crucial features in the model that play a decisive role in the diagnosis, such as blood pressure in heart disease and blood sugar in diabetes. Further, interpretable analysis can analyze how improving these key features can improve the condition, providing valuable insights for developing treatment plans.
[0003] The concept of counterfactual analysis aligns perfectly with this "treatment plan." It can be used to explain predictions for individual instances, where the "event" is the predicted outcome for a sample, and the "cause" is the specific feature value of that sample that is input into the model and "leads" to the prediction. When simulating counterfactual events in a machine learning model, the feature values need to be modified to observe how they change. The final result of counterfactual analysis describes the change in feature values when the prediction is changed to a predefined output. The sample with the smallest change is the most ideal counterfactual analysis result, i.e., the counterfactual sample. Therefore, a method for counterfactual analysis of machine learning models is urgently needed. Summary of the Invention
[0004] The main purpose of this invention is to propose a method for counterfactual analysis of machine learning models.
[0005] To achieve the above technical objectives, this disclosure provides a random forest counterfactual analysis method, the method comprising:
[0006] Collect data and preprocess the collected data to obtain sample data;
[0007] Based on the sample data input into the random forest model of machine learning, the sample data is encoded into a counterfactual sample generation formula;
[0008] Multiple iterations are performed, and the counterfactual sample generation formula is continuously calculated using the satisfiability modulus solver to delineate the counterfactual region.
[0009] Several candidate counterfactual samples are generated in the counterfactual region, and the candidate counterfactual samples are optimized by an algorithm to obtain the globally optimal counterfactual sample.
[0010] Furthermore, the process of collecting data and preprocessing the collected data to obtain sample data specifically includes:
[0011] Collect data, replace a feature containing m categories with m binary features, and use an m-bit register to record the state of the features, where m is an integer not less than 2;
[0012] In the m-bit register, the bit corresponding to the activated feature is displayed as 1, and the bits corresponding to the other features are displayed as 0;
[0013] Fill in the missing data, and assign a value of -1 to the corresponding bit of the missing data;
[0014] The features recorded in the m-bit register are encoded in an ordered numerical manner, and units are removed from numerical data containing units.
[0015] Furthermore, the step of encoding the sample data into a counterfactual sample generation formula based on the sample data input into the random forest model for machine learning specifically includes:
[0016] Encode a path in the decision tree as a first logical formula;
[0017] Encode a binary decision tree as a second logical formula;
[0018] The random forest classifier model is encoded as a third logic formula;
[0019] We use random forest to perform counterfactual analysis encoding on a single sample of data to generate a counterfactual sample generation formula.
[0020] Furthermore, the encoding of a path in the decision tree into a first logical formula specifically includes:
[0021] The decision tree is defined as a ternary array T =<Decide,Leaf,Value> ;
[0022] Where Decide = {n0, n1, ..., n} k} represents the set of decision nodes, where n0 represents the root node and k is an integer not less than 2;
[0023] Leaf = {l1, l2, ..., l j} represents the set of leaf nodes, where j is an integer not less than 2;
[0024] Value = {v l1 ,v l2 ,…,v lj} represents the set of leaf node values, which represents the value of the leaf node at its corresponding index;
[0025] Each path in a decision tree is encoded as a first logical formula. Each path consists of a leaf node l∈(0,k) and several decision nodes n∈N. l Composition; where N l This represents the set of nodes between the root node n0 and the leaf node l;
[0026] The first logical formula is expressed as:
[0027]
[0029] Where, N l This represents the set of nodes on path l that are neither the root node nor the leaf node.
[0030] n∈N l , represents a node;
[0031] When n is its predecessor node p n left child node Then its eigenvalue threshold expression satisfies
[0032] When n is its predecessor node p n right child node Then its eigenvalue threshold expression satisfies
[0033] w represents the probability of each predicted value occurring, which constrains the decision outcome for this path; v l This represents the set of probabilities of each category occurring.
[0034] The encoding formula π(l) for the path corresponding to leaf node l is expressed as the eigenvalue threshold formula for all nodes on the path and the conjunctive normal form of the decision result.
[0035] Furthermore, the second logical formula is expressed as:
[0036] Π(t)∷=∨ l∈L π(l)#(2);
[0038] Π(t) represents the disjunctive normal form of the decision tree for all paths π(l).
[0039] Furthermore, the third logical formula is expressed as:
[0040]
[0041] Where k represents the number of binary decision trees, and its value is an integer not less than 2; j is an integer representing the j-th binary decision tree;
[0042] Each decision tree outputs the leaf node value t(x) reached by the sample = v l =(p1,…,p n ), that is, the probability set of each class;
[0043] Let represent the probability of the i-th class output by the j-th tree, and satisfy . i is an integer.
[0044] Furthermore, the process of performing multiple iterations and continuously using the satisfiability modulus solver to calculate the counterfactual sample generation formula to delineate the counterfactual region specifically includes:
[0045] The formula for generating counterfactual samples is iteratively calculated using a satisfiability modular theory solver. The solution result of the current satisfiability modular theory solver is determined to be a satisfiable state. If the solution result of the current satisfiability modular theory solver is a satisfiable state, the iterative calculation is stopped.
[0046] If the solution result is a non-satisfied state, then set the DPLL engine of the constraint solver to track the inequalities in σ to extract a minimum non-satisfied kernel of the counterfactual sample calculation formula;
[0047] Analyze the features in the minimum non-satisfied kernel: if the feature is an immutable feature, then the σ corresponding to the immutable feature... i The value remains unchanged;
[0048] If the feature is a modifiable feature, then the σ of this feature... i The value increases once according to a predetermined step size, and the process of iteratively calculating the counterfactual sample generation formula using the satisfiability modular theory solver and determining whether the current solution result of the satisfiability modular theory solver is a satisfiable state is returned.
[0049] Generate counterfactual regions.
[0050] To achieve the above-mentioned technical objectives, this disclosure also provides a random forest counterfactual analysis system, including:
[0051] The counterfactual analysis encoding module is used to encode the sample data into a counterfactual sample generation formula based on the sample data input to the random forest model of machine learning.
[0052] The counterfact region module is used to perform multiple iterations, continuously using the satisfiability module theory solver to calculate the counterfact sample generation formula to divide the counterfact region;
[0053] The counterfact sample optimization module is used to generate several candidate counterfact samples in the counterfact region and use an algorithm to optimize the candidate counterfact samples to obtain the globally optimal counterfact sample.
[0054] To achieve the above-mentioned technical objectives, this disclosure also provides a computer storage medium storing a computer program thereon, which, when executed by a processor, is used to implement the steps of the above-described random forest counterfactual analysis method.
[0055] To achieve the above-mentioned technical objectives, this disclosure also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the above-mentioned random forest counterfactual analysis method.
[0056] The beneficial effects of this disclosure are:
[0057] This invention discloses that by utilizing relevant knowledge of satisfiability module theory to guide the generation of counterfactual samples, the efficiency of the algorithm can be improved. At the same time, the counterfactual sample generation algorithm proposed in this invention can be well applied in reality. Attached Figure Description
[0058] Figure 1 A flowchart illustrating the method of Embodiment 1 of this disclosure is shown;
[0059] Figure 2 A schematic diagram of the method of Embodiment 1 of this disclosure is shown;
[0060] Figure 3 A schematic diagram of the method of Embodiment 1 of this disclosure is shown;
[0061] Figure 4 A schematic diagram of the system structure of Embodiment 2 of this disclosure is shown;
[0062] Figure 5 A schematic diagram of the structure of Embodiment 4 of this disclosure is shown. Detailed Implementation
[0063] Embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.
[0064] The accompanying drawings illustrate various structural schematics according to embodiments of the present disclosure. These drawings are not to scale, and some details have been enlarged and may have been omitted for clarity. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.
[0065] Example 1:
[0066] like Figure 1 As shown:
[0067] This disclosure provides a counterfactual analysis method for random forests, the method comprising:
[0068] S101: Collect data and preprocess the collected data to obtain sample data;
[0069] S102: Based on the sample data in the random forest model input to machine learning, the sample data is encoded into a counterfactual sample generation formula;
[0070] S103: Perform multiple iterations and continuously use the satisfiability modulus solver to calculate the counterfactual sample generation formula to divide the counterfactual region;
[0071] S104: Generate several candidate counterfactual samples in the counterfactual region, and use an algorithm to optimize the candidate counterfactual samples to obtain the globally optimal counterfactual sample.
[0072] Furthermore, the process of collecting data and preprocessing the collected data to obtain sample data specifically includes:
[0073] Collect data, replace a feature containing m categories with m binary features, and use an m-bit register to record the state of the features, where m is an integer not less than 2;
[0074] In the m-bit register, the bit corresponding to the activated feature is displayed as 1, and the bits corresponding to the other features are displayed as 0;
[0075] Fill in the missing data, and assign a value of -1 to the corresponding bit of the missing data;
[0076] The features recorded in the m-bit register are encoded in an ordered numerical manner, and units are removed from numerical data containing units.
[0077] Furthermore, the step of encoding the sample data into a counterfactual sample generation formula based on the sample data input into the random forest model for machine learning specifically includes:
[0078] Encode a path in the decision tree as a first logical formula;
[0079] Encode a binary decision tree as a second logical formula;
[0080] The random forest classifier model is encoded as a third logic formula;
[0081] We use random forest to perform counterfactual analysis encoding on a single sample of data to generate a counterfactual sample generation formula.
[0082] Furthermore, the encoding of a path in the decision tree into a first logical formula specifically includes:
[0083] The decision tree is defined as a ternary array T =<Decide,Leaf,Value> ;
[0084] Where Decide = {n0, n1, ..., n} k} represents the set of decision nodes, where n0 represents the root node and k is an integer not less than 2;
[0085] Leaf = {l1, l2, ..., l j} represents the set of leaf nodes, where j is an integer not less than 2;
[0086] Value = {v l1 ,v l2 ,…,v lj} represents the set of leaf node values, which represents the value of the leaf node at its corresponding index;
[0087] Each path in a decision tree is encoded as a first logical formula. Each path consists of a leaf node l∈(0,k) and several decision nodes n∈N. l Composition; where N l This represents the set of nodes between the root node n0 and the leaf node l;
[0088] The first logical formula is expressed as:
[0089]
[0090] Where, N l This represents the set of nodes on path l that are neither the root node nor the leaf node.
[0091] n∈N l , represents a node;
[0092] When n is its predecessor node p n left child node Then its eigenvalue threshold expression satisfies
[0093] When n is its predecessor node p n right child node Then its eigenvalue threshold expression satisfies
[0094] w represents the probability of each predicted value occurring, which constrains the decision outcome of this path;
[0095] The encoding formula π(l) for the path corresponding to leaf node l is expressed as the eigenvalue threshold formula for all nodes on the path and the conjunctive normal form of the decision result.
[0096] Furthermore, the second logical formula is expressed as:
[0097] Π(t)∷=V l∈L π(l)#95);
[0099] Π(t) represents the disjunctive normal form of the decision tree for all paths π(l).
[0100] Furthermore, the third logical formula is expressed as:
[0101]
[0102] Where k represents the number of binary decision trees, and its value is an integer not less than 2; j is an integer representing the j-th binary decision tree;
[0103] Each decision tree outputs the leaf node value t(x) reached by the sample = v l =(p1,…,p n ), that is, the probability set of each class;
[0104] Let represent the probability of the i-th class output by the j-th tree, and satisfy . i is an integer.
[0105] Furthermore, the process of performing multiple iterations and continuously using the satisfiability modulus solver to calculate the counterfactual sample generation formula to delineate the counterfactual region specifically includes:
[0106] The formula for generating counterfactual samples is iteratively calculated using a satisfiability modular theory solver. The solution result of the current satisfiability modular theory solver is determined to be a satisfiable state. If the solution result of the current satisfiability modular theory solver is a satisfiable state, the iterative calculation is stopped.
[0107] If the solution result is a non-satisfied state, then set the DPLL engine of the constraint solver to track the inequalities in σ to extract a minimum non-satisfied kernel of the counterfactual sample calculation formula;
[0108] Analyze the features in the minimum non-satisfied kernel: if the feature is an immutable feature, then the σ corresponding to the immutable feature... i The value remains unchanged;
[0109] If the feature is a modifiable feature, then the σ of this feature... i The value increases once according to a predetermined step size, and the process of iteratively calculating the counterfactual sample generation formula using the satisfiability modular theory solver and determining whether the current solution result of the satisfiability modular theory solver is a satisfiable state is returned.
[0110] Generate counterfactual regions.
[0111] Furthermore, the step of generating several candidate counterfactual samples in the counterfactual region and optimizing the candidate counterfactual samples using an algorithm to obtain the globally optimal counterfactual sample specifically includes:
[0112] Several candidate counterfactual samples are generated within the counterfactual region. Since there are countless counterfactual samples within the divided counterfactual region, this invention aims to further obtain the counterfactual sample closest to the original sample, such as... Figure 3 As shown *x con These are all locally optimal counterfactual samples in each direction, while *x con For the final selected global counterfactual samples, an optimization objective function is constructed:
[0113] ;
[0115] in,
[0116] θ=x con -x org #(8);
[0118] θ represents the direction between a counterfactual sample and the original sample, and the optimization of the sample here becomes the optimization of θ. Given a direction θ, g(θ) obtains the counterfactual sample that is closest to the original sample in the direction θ, and...
[0119] min θ g(θ)#(9);
[0121] To obtain the globally optimal counterfactual sample that is closest to the original sample in all possible θ directions.
[0122] The fine-grained binary search algorithm is used to optimize all candidate counterfactual samples, as shown in the algorithm below. The counterfactual sample moves closer to the original sample one step at a predetermined step size along θ. The fine-grained algorithm stops when it falls within a predetermined interval that is close enough to the original sample.
[0123] Example 2:
[0124] like Figure 4 As shown:
[0125] To address the aforementioned technical problems, this disclosure also provides a random forest counterfactual analysis system, the system comprising:
[0126] The counterfactual analysis encoding module is used to encode the sample data into a counterfactual sample generation formula based on the sample data input to the random forest model of machine learning.
[0127] The counterfact region module is used to perform multiple iterations, continuously using the satisfiability module theory solver to calculate the counterfact sample generation formula to divide the counterfact region;
[0128] The counterfact sample optimization module is used to generate several candidate counterfact samples in the counterfact region and use an algorithm to optimize the candidate counterfact samples to obtain the globally optimal counterfact sample.
[0129] Example 3:
[0130] This disclosure also provides a computer storage medium storing a computer program thereon, which, when executed by a processor, is used to implement the steps of the above-described random forest counterfactual analysis method.
[0131] The computer storage medium disclosed herein can be implemented using semiconductor memory, magnetic core memory, magnetic drum memory, or disk memory.
[0132] Semiconductor memory, primarily used in computers, mainly consists of two types of semiconductor storage elements: MOSFETs and bipolar transistors. MOSFETs offer high integration density and simple manufacturing processes but are relatively slow. Bipolar transistors have complex manufacturing processes, high power consumption, and low integration density but are fast. The advent of NMOS and CMOS technologies led to MOSFETs becoming the dominant type of semiconductor memory. NMOS is fast; for example, Intel's 1K-bit static random access memory (SRAM) has an access time of 45ns. CMOS, on the other hand, consumes less power; a 4K-bit CMOS SRAM has an access time of 300ns. The semiconductor memories mentioned above are all random access memories (RAM), meaning they can be randomly read from and written to during operation. Semiconductor read-only memories (ROMs), however, can be randomly read from but not written to during operation; they are used to store pre-programmed programs and data. ROMs are further divided into two types: non-rewritable fuse-type ROMs (PROMs) and rewritable EPROMs (EPROMs).
[0133] Magnetic core memory is characterized by low cost and high reliability, and has over 20 years of practical application experience. Before the mid-1970s, magnetic core memory was widely used as main memory. Its storage capacity could reach 10 bits or more, with the fastest access time being 300 ns. Typical international magnetic core memory capacities ranged from 4 MS to 8 MB, with access cycles of 1.0 to 1.5 μs. Even after the rapid development of semiconductor memory replaced magnetic core memory as the main memory, magnetic core memory can still be used as a large-capacity expansion memory.
[0134] Magnetic drum memory is a type of external storage device that records magnetic data. Due to its fast data access speed and stable, reliable operation, although its capacity is relatively small and it is gradually being replaced by disk storage, it is still used as external storage for real-time process control computers and medium- to large-scale computers. To meet the needs of small and microcomputers, ultra-miniature magnetic drums have emerged, which are small in size, lightweight, highly reliable, and easy to use.
[0135] Disk storage is a type of external storage device that records magnetic data. It combines the advantages of magnetic drums and magnetic tapes: its storage capacity is larger than that of magnetic drums, its access speed is faster than that of magnetic tapes, and it can be stored offline. Therefore, disks are widely used as high-capacity external storage in various computer systems. Disks are generally divided into two main categories: hard disks and floppy disks.
[0136] There are many types of hard disk storage devices. Structurally, they are divided into two types: replaceable and fixed. Replaceable disks have interchangeable platters, while fixed disks have fixed platters. Both replaceable and fixed disks have multi-platter and single-platter structures, and can be further divided into fixed-head and movable-head types. Fixed-head disks have smaller capacities, lower recording densities, and higher access speeds, but are more expensive. Movable-head disks have higher recording densities (up to 1000-6250 bits / inch), resulting in larger capacities, but their access speeds are relatively lower than fixed-head disks. Disk products can have storage capacities of several hundred megabytes, with a bit density of 6250 bits / inch and a track density of 475 tracks / inch. Multi-platter replaceable disk storage devices, due to their replaceable platters, offer very large independent capacity, and with high speeds, can store large amounts of information and are widely used in online information retrieval systems and database management systems.
[0137] Example 4:
[0138] This disclosure also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the random forest counterfactual analysis method described above.
[0139] Figure 5 This is a schematic diagram of the internal structure of an electronic device in one embodiment. For example... Figure 5As shown, the electronic device includes a processor, storage medium, memory, and network interface connected via a system bus. The storage medium stores an operating system, a database, and computer-readable instructions. The database stores control information sequences. When executed by the processor, the computer-readable instructions enable the processor to implement a random forest counterfactual analysis method. The processor provides computational and control capabilities, supporting the operation of the entire computer device. The memory stores computer-readable instructions, which, when executed by the processor, enable the processor to perform a random forest counterfactual analysis method. The network interface of the computer device is used for communication with a terminal. Those skilled in the art will understand that… Figure 5 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.
[0140] This electronic device includes, but is not limited to, smartphones, computers, tablets, wearable smart devices, artificial intelligence devices, and power banks.
[0141] In some embodiments, the processor may be composed of integrated circuits, such as a single packaged integrated circuit or multiple integrated circuits packaged with the same or different functions, including combinations of one or more central processing units (CPUs), microprocessors, digital processing chips, graphics processors, and various control chips. The processor is the control unit of the electronic device, connecting various components of the entire electronic device through various interfaces and lines. It executes programs or modules stored in the memory (e.g., executing remote data read / write programs) and calls data stored in the memory to perform various functions of the electronic device and process data.
[0142] The bus can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This bus can be divided into an address bus, a data bus, a control bus, etc. The bus is configured to enable communication between the memory and at least one processor, etc.
[0143] Figure 5 Only electronic devices with components are shown; it will be understood by those skilled in the art that... Figure 5 The structure shown does not constitute a limitation on the electronic device and may include fewer or more components than shown, or combine certain components, or have different component arrangements.
[0144] For example, although not shown, the electronic device may also include a power supply (such as a battery) to power the various components. Preferably, the power supply can be logically connected to the at least one processor via a power management device, thereby enabling functions such as charging management, discharging management, and power consumption management. The power supply may also include one or more DC or AC power supplies, recharging devices, power fault detection circuits, power converters or inverters, power status indicators, and other arbitrary components. The electronic device may also include various sensors, Bluetooth modules, Wi-Fi modules, etc., which will not be elaborated further here.
[0145] Furthermore, the electronic device may also include a network interface. Optionally, the network interface may include a wired interface and / or a wireless interface (such as a Wi-Fi interface, a Bluetooth interface, etc.), which is typically used to establish communication connections between the electronic device and other electronic devices.
[0146] Optionally, the electronic device may further include a user interface, which may be a display, an input unit (such as a keyboard), and optionally, a standard wired interface or a wireless interface. Optionally, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, or an OLED (Organic Light-Emitting Diode) touchscreen, etc. The display may also be appropriately referred to as a screen or display unit, used to display information processed in the electronic device and to display a visual user interface.
[0147] Furthermore, the computer's usable storage medium may mainly include a program storage area and a data storage area, wherein the program storage area may store the operating system, applications required for at least one function, etc.; and the data storage area may store data created based on the use of blockchain nodes, etc.
[0148] In the several embodiments provided by this invention, it should be understood that the disclosed devices, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and other division methods may be used in actual implementation.
[0149] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.
[0150] Furthermore, the functional modules in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in the form of hardware plus software functional modules.
[0151] The embodiments of this disclosure have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of this disclosure. The scope of this disclosure is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this disclosure, and all such substitutions and modifications should fall within the scope of this disclosure.
Claims
1. A counterfactual analysis method for random forests, characterized in that, The method includes: Collect data and preprocess the collected data to obtain sample data; Based on the sample data input into the random forest model of machine learning, the sample data is encoded into a counterfactual sample generation formula; Multiple iterations are performed, and the counterfactual sample generation formula is continuously calculated using the satisfiability modulus solver to delineate the counterfactual region. Several candidate counterfactual samples are generated in the counterfactual region, and the candidate counterfactual samples are optimized by an algorithm to obtain the globally optimal counterfactual sample.
2. The method according to claim 1, characterized in that, The process of collecting data and preprocessing the collected data to obtain sample data specifically includes: Collect data, replace a feature containing m categories with m binary features, and use an m-bit register to record the state of the features, where m is an integer not less than 2; In the m-bit register, the bit corresponding to the activated feature is displayed as 1, and the bits corresponding to the other features are displayed as 0; Fill in the missing data, and assign a value of -1 to the corresponding bit of the missing data; The features recorded in the m-bit register are encoded in an ordered numerical manner, and units are removed from numerical data containing units.
3. The method according to claim 1, characterized in that, The step of encoding the sample data into a counterfactual sample generation formula based on the sample data input into the random forest model of machine learning specifically includes: Encode a path in the decision tree as a first logical formula; Encode a binary decision tree as a second logical formula; The random forest classifier model is encoded as a third logic formula; We use random forest to perform counterfactual analysis encoding on a single sample of data to generate a counterfactual sample generation formula.
4. The method according to claim 3, characterized in that, Encoding a path in the decision tree into a first logical formula specifically includes: The decision tree is defined as a ternary array T =<Decide,Leaf,Value> ; Where Decide = {n0, n1, ..., n} k } represents the set of decision nodes, where n0 represents the root node and k is an integer not less than 2; Leaf = {l1, l2, ..., l} j } represents the set of leaf nodes, where j is an integer not less than 2; Value = {v 11 v 12 , ..., v 1j } represents the set of leaf node values, which represents the value of the leaf node at its corresponding index; Each path in a decision tree is encoded as a first logical formula. Each path consists of a leaf node l∈(0,k) and several decision nodes n∈N. l Composition; where N l This represents the set of nodes between the root node n0 and the leaf node l; The first logical formula is expressed as: Where, N l This represents the set of nodes on path l that are neither the root node nor the leaf node. n∈N l , represents a node; When n is its predecessor node p n left child node Then its eigenvalue threshold expression satisfies When n is its predecessor node p n right child node Then its eigenvalue threshold expression satisfies w represents the probability of each predicted value occurring, which constrains the decision outcome for this path; v l This represents the set of probabilities of each category occurring. The encoding formula π(l) for the path corresponding to leaf node l is expressed as the eigenvalue threshold formula for all nodes on the path and the conjunctive normal form of the decision result.
5. The method according to claim 3, characterized in that, The second logical formula is expressed as: ； Π(t) represents the disjunctive normal form of the decision tree for all paths π(l).
6. The method according to claim 3, characterized in that, The third logical formula is expressed as follows: ； Where k represents the number of binary decision trees, and its value is an integer not less than 2; j is an integer representing the j-th binary decision tree; Each decision tree outputs the leaf node value t(x) reached by the sample = v l =(p1,…,p n ), that is, the probability set of each class; Let represent the probability of the i-th class output by the j-th tree, and satisfy . i is an integer.
7. The method according to claim 1, characterized in that, The process of performing multiple iterations and continuously using the satisfiability modulus solver to calculate the counterfactual sample generation formula to delineate the counterfactual region specifically includes: The formula for generating counterfactual samples is iteratively calculated using a satisfiability modular theory solver. The solution result of the current satisfiability modular theory solver is determined to be a satisfiable state. If the solution result of the current satisfiability modular theory solver is a satisfiable state, the iterative calculation is stopped. If the solution result is a non-satisfied state, then set the DPLL engine of the constraint solver to track the inequalities in σ to extract a minimum non-satisfied kernel of the counterfactual sample calculation formula; Analyze the features in the minimum non-satisfied kernel: if the feature is an immutable feature, then the σ corresponding to the immutable feature... i The value remains unchanged; If the feature is a modifiable feature, then the σ of this feature... i The value increases once according to a predetermined step size, and the process of iteratively calculating the counterfactual sample generation formula using the satisfiability modular theory solver and determining whether the current solution result of the satisfiability modular theory solver is a satisfiable state is returned. Generate counterfactual regions.
8. A random forest counterfactual analysis system, characterized in that, The system includes: The counterfactual analysis encoding module is used to encode the sample data into a counterfactual sample generation formula based on the sample data input to the random forest model of machine learning. The counterfact region module is used to perform multiple iterations, continuously using the satisfiability module theory solver to calculate the counterfact sample generation formula to divide the counterfact region; The counterfact sample optimization module is used to generate several candidate counterfact samples in the counterfact region and use an algorithm to optimize the candidate counterfact samples to obtain the globally optimal counterfact sample.
9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps corresponding to the random forest counterfactual analysis method described in any one of claims 1 to 7.
10. A computer storage medium storing computer program instructions thereon, characterized in that, When the program instructions are executed by the processor, they are used to implement the steps corresponding to the random forest counterfactual analysis method described in any one of claims 1 to 7.