LED driver system based on GaN sealing technology and automobile lamp

Abstract

The invention provides an LED driver system based on a GaN sealing technology and an automobile lamp, the LED driver system comprises a boost / SEPIC GaN FET converter chip and / or a buck GaN FET converter chip, and the boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip adopt the sealing technology to integrate a silicon-based control circuit and a GaN FET in the same package; the silicon-based control circuit comprises a digital circuit core, an analog circuit, a gate drive circuit and an EEPROM (Electrically Erasable Programmable Read-Only Memory), and realizes power supply, signal processing, PWM (Pulse Width Modulation) generation and drive control through internal connection The GaN FET is connected with an external inductor and an external capacitor through pins to form a corresponding DC-DC topology. The circuit supports high-frequency work, has the functions of multi-group power expansion, configurable constant voltage / constant current mode, complete circuit protection and SPI / UART communication, is suitable for an automobile lamp driving system, and achieves the design goals of high integration level, high efficiency and small size.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of vehicle lamp controller, in particular to an LED driver system based on GaN hybrid sealing technology and a vehicle lamp. BACKGROUND

[0002] The vehicle lamp controller module is used to provide stable power current output for the automobile LED lamp to meet the requirements of vehicle lamp related regulations. At present, the vehicle lamp controller module is mainly composed of a direct current conversion topology converter (DC-DC converter) and its application circuit, and the mainstream automobile lamp DC-DC converter generally adopts a silicon-based power metal oxide semiconductor field effect transistor (SiMOSFET). Limited by the physical properties of silicon material itself, such controller mainly faces the following bottlenecks when facing higher performance vehicle lamp applications: The contradiction between working frequency and volume makes the switching loss of silicon-based power devices sharply rise at high frequency, which limits the mainstream working frequency of the vehicle lamp application to about 400 kHz. Since the frequency cannot be effectively improved, the volume and weight of the passive components such as filter inductance, power inductance and energy storage capacitor cannot be further reduced, which restricts the miniaturization development of the vehicle lamp controller module.

[0003] The challenge of system efficiency and integration, the existing vehicle lamp controller adopts two-stage DC-DC conversion topology, and the typical system efficiency is about 80%, the electric energy conversion loss is large. The generated heat needs to rely on an additional radiator for management, and often has to be placed outside the vehicle lamp assembly to assist in heat dissipation by air flow. This external layout not only increases the system complexity, but also brings additional sealing design requirements and costs.

[0004] In recent years, the wide bandgap semiconductor power device technology represented by gallium nitride field effect transistor (GaN FET) is becoming mature. GaN devices have higher working frequency potential, almost negligible switching loss and better thermal performance. The application of GaN FET in vehicle lamp LED controller is expected to directly break through the above bottlenecks.

[0005] Patent application document CN110445394A discloses a high-efficiency GaN power module for LED vehicle lamp power supply, comprising an input filter module, a GaN PFC power factor correction module and a GaN half-bridge LLC converter module, the topology selection of the input filter+two-stage isolated DC-DC converter is more flexible, and higher performance can be realized; the high frequency of the power module is realized by adopting the LGA packaged GaN HEMT device; the reliability is improved by adopting the double-sided layout structure to optimize the design of the gate drive circuit, the HEMT device, the power bus and the heat dissipation layout, so that high-density power integration and high efficiency are realized. However, the patent application cannot completely solve the existing technical problems and cannot meet the needs of the present application. SUMMARY

[0006] In view of the defects in the prior art, the purpose of the present application is to provide a LED driver system and automobile vehicle lamp based on GaN hybrid packaging technology.

[0007] The LED driver system based on GaN hybrid packaging technology provided by the present application comprises a boost / SEPIC GaN FET converter chip and / or a buck GaN FET converter chip. The boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip both adopt hybrid packaging technology, integrating a silicon-based control circuit and a GaN FET in the same package. The silicon-based control circuit comprises a digital circuit core, an analog circuit, a gate drive circuit and an EEPROM. The VIN pin of the boost / SEPIC GaN FET converter chip receives an external input power supply, and the internal LDO module converts the VIN voltage into VCC and VDD; VCC is used to supply power to the analog circuit and the gate drive circuit, and VDD is used to supply power to the digital circuit core and the EEPROM; the digital circuit core is connected with an external controller through a serial communication bus to receive external instructions; the digital circuit core is connected with the analog circuit to convert the external instructions into control signals and send them to the analog circuit; the analog circuit generates PWM signals and sends them to the gate drive circuit; the gate drive circuit converts the PWM signals into drive voltage signals to control the conduction and turn-off of the GaN FET hybrid packaged in the chip; the GaN FET is connected with an external inductor and capacitor through the VOUT, SW1, SW2 and PGND pins to form a boost or SEPIC circuit topology. The VCC and VDD pins of the step-down GaN FET converter chip receive externally provided power supply; VCC supplies power to the analog circuit and gate drive circuit, and VDD supplies power to the digital circuit core and EEPROM; the digital circuit core is connected with an external controller through a serial communication bus to receive external instructions; the digital circuit core is connected with the analog circuit to convert the external instructions into control signals and send them to the analog circuit; the analog circuit generates PWM signals and sends them to the gate drive circuit; the gate drive circuit converts the PWM signals into driving voltage signals to control the conduction and shutdown of the GaN FET enclosed in the chip; the GaN FET is connected with an external inductor and capacitor through the VOUT, SW1, SW2 and PGND pins to form a step-down circuit topology.

[0008] Preferably, the analog circuit of the step-up / SEPIC GaN FET converter chip comprises a first feedback control network and a second feedback control network; The first feedback control network receives an output voltage feedback signal through the FB pin and connects the COMP pin to access an external compensation network to realize constant voltage control of the step-up circuit; The second feedback control network receives an output current feedback signal through the CSP and CSN pins and connects the COMP pin to access an external compensation network to realize constant current control of the SEPIC circuit.

[0009] Preferably, the analog circuit of the step-down GaN FET converter chip comprises a constant voltage control loop and a constant current control loop; The constant current control loop is connected to the CSP and CSN pins to perform current closed-loop control by detecting the voltage difference between the CSP and CSN pins; The constant voltage control loop is connected to the CSN pin to perform voltage closed-loop control by detecting the voltage of the CSN pin; The digital circuit core receives a mode switching instruction sent through a serial communication bus to control the constant voltage control loop and the constant current control loop to work alternatively, and the PWM signal output by the constant voltage control loop or the constant current control loop is sent to the gate drive circuit.

[0010] Preferably, the step-up / SEPIC GaN FET converter chip and the step-down GaN FET converter chip adopt a pinless package; The GaN FET is located above the silicon-based control circuit, and the two are electrically and mechanically connected through metal bumps to form a top heat dissipation structure.

[0011] Preferably, the GaN FETs, gate drive circuits and analog circuit modules integrated in the boost / SEPIC GaN FET converter chip and / or the buck GaN FET converter chip are multiple groups; In the boost / SEPIC GaN FET converter chip, multiple groups of circuits work in parallel to combine outputs; In the buck GaN FET converter chip, multiple groups of circuits independently drive multiple loads.

[0012] Preferably, the serial communication bus is an SPI bus or a UART bus; The SPI bus includes CS, CLK, MOSI / RX and MISO / TX pins; and the UART bus includes TX and RX pins.

[0013] Preferably, the analog circuit integrates a diagnosis and protection function, including: When the gate drive voltage is detected to be lower than a threshold value, the analog circuit stops outputting a PWM signal; When the digital circuit core detects, through the analog circuit, that the junction temperature of the GaN FET exceeds a first threshold value, an alarm flag is set; and when the junction temperature reaches a second threshold value, the analog circuit stops outputting a PWM signal; In the on-time of each switching cycle, the peak current of the GaN FET is detected, and when the peak current exceeds a set threshold value, the analog circuit controls the gate driver to immediately terminate the on-time of the current cycle.

[0014] Preferably, the EEPROM is connected to the digital circuit core through internal wiring; The EEPROM is used to store working frequency, over-temperature protection threshold value, over-current protection threshold value and part number information; After power-on, the digital circuit core loads the stored configuration information from the EEPROM to control the working of the analog circuit.

[0015] Preferably, the gate drive circuit is connected to the analog circuit, receives the PWM signal output by the analog circuit, and converts the PWM signal into a drive voltage signal and outputs the drive voltage signal to the gate of the GaN FET; The boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip set the working frequency based on the switching characteristics of the GaN FET.

[0016] According to the present application, the automobile lamp comprises the LED driver system based on the GaN sealing technology.

[0017] Compared with the prior art, the present application has the following beneficial effects: (1) By using GaN FET with faster switching speed to replace traditional Si MOSFET, and combining silicon-based control circuit with GaN FET, the driving circuit is greatly shortened, the parasitic inductance and gate ringing risk are reduced, and the DC-DC converter can work stably at MHz level switching frequency; The substantial increase in operating frequency enables the volume and weight of passive components such as filter inductors, power inductors, energy storage capacitors, etc. to be significantly reduced, thereby realizing the compactness of the overall size of the controller and effectively solving the bottleneck of traditional controllers in terms of volume and power density.

[0018] (2) GaN FET has lower on-resistance and almost negligible switching loss, combined with the optimization of magnetic components brought by high-frequency operation, making the system conversion efficiency of the boost, SEPIC and buck conversion topology constructed by the present application significantly higher than the traditional two-stage silicon-based scheme; High efficiency means less energy is converted into heat, thereby directly reducing the difficulty of system thermal management; At the same time, the top heat dissipation packaging technology used in the combination package further optimizes the heat conduction path, which makes it possible to integrate the controller module directly into the vehicle lamp assembly, eliminating the complex sealing structure, external heat sink and connection harness required by the traditional external controller, not only reducing system cost and complexity, but also improving overall reliability.

[0019] (3) The combination package architecture proposed by the present application integrates GaN FET, gate drive circuit, analog control circuit, digital core and EEPROM in a single chip package, this highly integrated design reduces the number of external discrete components and connection points on the PCB, simplifying the peripheral circuit layout; The integrated packaging of drive, protection and control circuits shortens the critical signal path and reduces the risk of failure caused by external interference or connection failure, thereby significantly improving the overall robustness and long-term working reliability of the system.

[0020] (4) The combination package chip integrates comprehensive diagnostic and protection circuits, including GaN FET overcurrent protection based on cycle-by-cycle peak current detection, programmable threshold over-temperature protection, and gate driver undervoltage protection, etc. These protection functions are realized by internal analog and digital circuits, with fast response speed, which can effectively prevent the device from being damaged under abnormal working conditions; In addition, the combination package design itself helps to achieve ±2kV HBM level electrostatic protection, protecting GaN FET from ESD damage, these inherent protection mechanisms enhance the anti-interference ability of the driver and the applicability in harsh automotive electronic environment.

[0021] (5) The converter chip defined in the application supports parameter configuration and mode control through a serial communication bus, thereby eliminating the configuration mode relying on a large number of external resistance and capacitance elements in the traditional scheme, increasing the flexibility of design; specifically, the buck converter chip internally integrates independent constant voltage and constant current control loops, which can be switched by instructions to adapt to different needs such as LED load or subsequent linear drive chip; the boost / SEPIC converter chip also supports two kinds of topology control; in addition, by expanding the power stage module into multiple groups, power merging output or multi-channel independent driving can be realized, thereby providing an efficient and simple solution for the diversified design of vehicle lamp systems. BRIEF DESCRIPTION OF DRAWINGS

[0022] Other features, objects, and advantages of the application will become more apparent from the following detailed description of non-limiting embodiments, read in conjunction with the accompanying drawings: Figure 1 Boost / SEPIC GaN FET converter hybrid chip block diagram; Figure 2 Buck GaN FET converter hybrid chip block diagram; Figure 3 Typical application system architecture 1 block diagram; Figure 4 Typical application system architecture 2 block diagram; Figure 5 Top heat dissipation technology GaN DC-DC converter packaging schematic diagram; Figure 6 Hybrid technology schematic diagram. DETAILED DESCRIPTION

[0023] The application will be described in detail below with specific embodiments. The following embodiments will help those skilled in the art to further understand the application, but do not limit the application in any form. It should be noted that for those skilled in the art, without departing from the concept of the application, a number of changes and improvements can be made. These all belong to the protection scope of the application.

[0024] The application provides an advanced design concept based on a silicon-based control circuit-GaN FET hybrid, a systematic DC-DC converter defined after combining the design requirements of vehicle lamp controllers, and an application system architecture, aiming to systematically solve the fundamental limitations of traditional vehicle lamp controllers in efficiency, power density, and integration.

[0025] There are generally two architectures for traditional LED control of vehicle lights. A two-stage topology architecture composed of a boost DC-DC conversion circuit and a buck DC-DC conversion circuit. A single-stage circuit directly drives the LED through the DC-DC conversion circuit (such as a single-ended primary inductance converter, SEPIC) to provide stable current output for the LED. The present application replaces the Si MOSFET in the traditional conversion circuit with a GaN FET, and encapsulates it inside the chip, defining a boost / SEPIC GaN FET converter and a buck GaN FET converter specifically for LED control of vehicle lights.

[0026] The boost / SEPIC GaN FET converter, as Figure 1 .

[0027] The system integrates GaN FET and its gate drive circuit responsible for boost / SEPIC DCDC conversion, analog circuit part responsible for controlling its work, digital circuit part responsible for analog circuit control and external digital communication. It constitutes a digital-analog and GaN technology hybrid converter chip.

[0028] The external power supply (after external filtering, the whole vehicle power supply input) is connected to the VIN chip pin for power supply input for the LDO module. The LDO module will reduce the voltage of the VIN voltage to stabilize and output 2 groups of low-voltage power supply 5V output VCC and VDD.

[0029] VDD further provides the required stable operating power supply for the Digital Core and EEPROM module to work normally. VCC further provides the required stable operating power supply for the Analog analog circuit and Gate Driver gate drive circuit.

[0030] The GaN FET is encapsulated inside the chip and connected to the external peripheral devices (inductors, capacitors, etc.) through the VOUT, SW1, SW2, PGND pins to work together to form a complete boost or SEPIC circuit.

[0031] The opening and closing of the GaN FET is realized by controlling the gate voltage through the Gate Driver gate driver. The gate driver receives the PWM signal from the analog circuit part. And amplify it enough to drive the GaN FET at high speed.

[0032] The analog circuit part receives the current feedback signal through the CSN, CSP pins or the voltage feedback signal through the VFB pin, and performs closed-loop control loop compensation through the COMP pin. Generate a PWM signal controlled by GaN FET to directly drive the gate driver in the next stage.

[0033] The digital circuit part is connected with an external controller through a serial communication bus (CS, CLK, MOSI / RX, MISO / TX), and the external controller sends boost / SEPIC related instructions to the converter chip through the bus. The internal integrated circuit is connected with the analog circuit part, and the related instructions obtained through communication are converted into analog circuit control to make the analog circuit part work according to the target requirements.

[0034] The EEPROM is connected with the digital circuit part through internal integrated circuit wiring. On the one hand, the digital circuit part can write information stored in the EEROM. On the other hand, the digital circuit can load the stored information written after power-on to work.

[0035] 1) VCC, low dropout linear controller LDO, which outputs a stable 5V voltage VCC, used to provide independent driving power for the Analog analog circuit and Gate Driver gate drive circuit, to ensure that the GaN FET can be quickly and powerfully switched on and off.

[0036] 2) VDD, low dropout linear controller LDO, which outputs a stable 5V voltage VDD, used to provide stable low-voltage power for the Digital Core and 4.EEPROM module.

[0037] 3) Digital Core, digital circuit core circuit, responsible for executing control logic (such as voltage setting), controlling the Analog analog circuit, processing protection logic, and communicating with the outside. For example, SPI communication, which is a commonly used internal communication method for vehicle light controllers, is achieved through the CS, CLK, MOSI, and MISO shown in the figure.

[0038] 4) EEPROM, electrically erasable programmable read-only memory, used to store user configuration information (such as output voltage setting value, overcurrent and overvoltage protection threshold, etc.) for the converter working parameters. After power-on, the digital circuit will load the EEPROM information to control the analog circuit to drive the GaN FET to quickly respond to switch-on instructions from SPI.

[0039] 5) Analog, analog circuit part, including two independent feedback control networks responsible for boost control and SEPIC control, receiving control requirements from the digital circuit, outputting switch PWM signals to the Gate Driver gate drive circuit to drive the GaN FET. It also includes a diagnostic and protection circuit part that returns some information such as diagnostic status of the analog circuit part to the digital circuit part (for example, overvoltage, overcurrent, and overtemperature alarm information).

[0040] 6) Gate Driver, the gate driver is connected with the Analog circuit, receiving the PWM signal of GaN control from the Analog circuit.

[0041] The Gate Driver converts the input PWM signal to the voltage signal which can drive the GaN FET, generally the maximum is 6.5V, used to drive the GaN FET.

[0042] 7) GaN FET, used to replace the traditional Si MOSFET, constituting the upper and lower tubes in the DC-DC boost or SEPIC circuit, using the high-speed switching characteristics of GaN FET, realizing the circuit of high efficiency to raise the input voltage to the target higher voltage (two-level topology application), or providing stable working current for LED (single-level topology application).

[0043] Buck GaN FET converter, such as Figure 2 .

[0044] The system integrates GaN FET and its Gate Driver responsible for the buck DCDC conversion, the Analog circuit part is responsible for the control of its work, and the Digital circuit part is responsible for the control of the Analog circuit and the digital communication to the outside. It constitutes a digital analog and GaN technology mixed converter chip.

[0045] The external 5V power supply is connected to the chip through the VCC and VDD pins, providing 2 sets of low-voltage power supply 5V output VCC and VDD.

[0046] VDD further provides the required stable working power supply for Digital Core and EEPROM module to make it work normally. VCC further provides the required stable working power supply for Analog circuit and Gate Driver.

[0047] GaN FET is integrated in the chip, connected with external peripheral devices (inductors, capacitors, etc.) through VOUT, SW1, SW2, PGND pins to work together to form a complete buck circuit.

[0048] The opening and closing of GaN FET work is realized by the control of gate voltage through Gate Driver. The Gate Driver receives the PWM signal from the Analog circuit part, and amplifies it enough to drive GaN FET at high speed.

[0049] The Analog circuit part receives the current feedback signal through the CSN, CSP pins or the voltage feedback signal through the CSN pin, and performs closed-loop control loop compensation through the COMP pin. The PWM signal of GaN FET control is generated to directly drive the Gate Driver in the rear stage.

[0050] Digital circuit part is connected with external controller through serial communication bus (CS, CLK, MOSI / RX, MISO / TX), and the external controller sends the voltage reduction related instructions to the converter chip through the bus. The related instructions obtained through communication are converted into the control of analog circuit through the internal integrated circuit wiring, so that the analog circuit part works according to the target requirements.

[0051] EEPROM is connected with digital circuit part through internal integrated circuit wiring, on the one hand, the digital circuit part can write the information stored in EEROM, on the other hand, the digital circuit can load the stored information written after power on to work.

[0052] 1) VCC, low dropout linear controller LDO, which outputs stable 5V voltage VCC, is used to provide independent driving power supply for Analog analog circuit and Gate Driver gate drive circuit, to ensure that GaN FET can be switched quickly and powerfully.

[0053] 2) VDD, low dropout linear controller LDO, which outputs stable 5V voltage VDD, is used to provide stable low voltage power supply for Digital Core and EEPROM module.

[0054] 3) Digital Core, digital circuit core circuit, responsible for executing control logic (such as current setting), controlling Analog analog circuit, processing protection logic, and communicating with the outside. For example, SPI communication, SPI communication is a commonly used internal communication method of vehicle lamp controller, which is realized through the diagram CS, CLK, MOSI and MISO.

[0055] 4) EEPROM, electrically erasable programmable read-only memory, used to store user configuration information (such as output current setting value, overcurrent and overvoltage protection threshold value) of the converter working parameters, after power on, the digital circuit will load the EEPROM information to control the analog circuit to drive GaN FET, to quickly respond to the switching requirement instructions from SPI.

[0056] 5) Analog, analog circuit part, including feedback voltage reduction control and diagnosis and protection two parts, receiving control requirements from digital circuit, and returning some information such as diagnosis state of analog circuit part to digital circuit part, on the other hand, outputting switching PWM signal to Gate Driver gate drive circuit to drive GaN FET.

[0057] 6) Gate Driver gate drive circuit, the gate drive circuit is connected with Analog analog circuit, and receives the PWM signal input by the analog circuit for GaN control.

[0058] The gate drive circuit converts the input PWM signal into a voltage signal that can drive the GaN FET, typically up to 6.5V, to drive the GaN FET.

[0059] 7) GaN FET, to replace the traditional Si MOSFET, to form the upper and lower tubes in the DC-DC step-down circuit, to realize power conversion, that is, to convert the high voltage from the step-up converter into a stable current output (such as an LED string) for the target load.

[0060] Key pins: COMP, FB, CSP, CSN are the core pins of the converter chip.

[0061] In the step-up / SEPIC converter chip, they are all connected independently with the analog circuit part inside the chip to provide independent function implementation. In the step-down converter chip, the CSN pin and the CSP pin are used in combination to realize the current sampling function, and the CSN pin can also be used independently to realize the voltage feedback function.

[0062] COMP is a compensation pin, which is externally connected with an RC network, used to stabilize the voltage / current feedback control loop, prevent system oscillation, and is the key to ensure output stability.

[0063] FB is a feedback voltage pin, which can be connected with an output voltage dividing resistor network to sample the output voltage. Or as Figure 1 Block diagram design, integrated resistor network in the converter, connected with the output to directly monitor the output voltage.

[0064] CSP, CSN are current sampling pins, which measure the voltage difference across the measuring resistor to detect the current flowing through the load in real time and accurately, to support current closed-loop control and realize stable load current output. In addition, the CSN pin can realize the function of the FB feedback voltage pin in constant voltage output application, to realize output voltage monitoring and support voltage closed-loop control to realize stable voltage output application.

[0065] The present application defines a hermetic DC-DC converter chip integrated with silicon-based control circuit and GaN FET applied to vehicle lamp control.

[0066] The package design is as shown in Figure 5 The GaN converter adopts a pinless package design (such as the industry standard square flat pinless package (QFN)) to minimize the lead inductance and chip size. Minimizing the lead inductance helps to reduce the ringing effect of GaN FET under high-speed switching, which is beneficial to the efficiency of the driver. Minimizing the chip size is conducive to further reducing the system size and cost.

[0067] Heat dissipation design, the GaN converter heat dissipation design priority to adopt the top heat dissipation package technology, the top heat dissipation can be through the high thermal conductivity of heat-conducting silica gel paste heat sink, has better heat dissipation performance.

[0068] External communication, GaN converter adopts SPI communication to realize the configuration of GaN converter, through the communication configuration mode, the traditional DCDC controller is saved when the function configuration needs to use a large number of interface pin foot connection external configuration passive device mode, reduces the size of the converter.

[0069] Communication mode, the communication mode can be serial peripheral interface SPI, through the diagram CS, CLK, MOSI, MISO pin implementation. Not limited to SPI communication mode, generally, universal asynchronous serial bus (UART) can also be applied in the converter design, through the diagram TX, RX pin implementation.

[0070] High frequency operating characteristics, thanks to the high-speed switching conduction delay performance of GaN, GaN converter will be designed to support working in 2MHz above switching frequency, which is 4 to 5 times of the traditional car lamp application DC-DC converter.

[0071] Multiple combination and output function, whether it is a boost or buck converter, as shown in the dashed box Block2, the integrated GaN FET, gate drive, analog circuit module can be expanded from a single group to multiple groups (for example, 2 groups). For boost converter, multiple GaN DC-DC circuits can work in parallel, and after merging output, higher power output capability can be achieved (for example, two groups can provide about twice the power). For buck converter, integrating multiple GaN FET tubes enables independent driving of multiple loads, typical applications include driving multiple strings of LEDs simultaneously, thus achieving more flexible system design.

[0072] Constant current drive (CC output) and constant voltage drive (CV output) switching. The buck converter internally designed integrated 2 sets of independent closed-loop detection and control circuit, respectively responsible for constant current output control and constant voltage output control. Users can select to work in CV or CC mode according to the system application requirements, according to the load type (for example, the load is LED, then it is CC drive, the load is linear LED drive chip, then it is CV drive). Users can send switching instructions to the chip internal digital circuit core part through the serial communication bus, and the digital circuit controls the 2 sets of control circuits integrated in the analog circuit part to switch, so as to realize the switching of CV and CC. The 2 sets of independent closed-loop detection circuit and control circuit are arranged in the analog circuit module inside the buck GaN FET converter, and they are connected to the CSP and CSN pins in parallel, and can be monitored by the pins. The PWM control signals generated by the control loop inside are output to the gate driver module, but under the control of the digital circuit core part, only one PWM signal will be output to the gate driver at the same time, that is, CV and CC do not work at the same time. For example Figure 3 The typical application system architecture is shown: when constant current output, the differential current of CSP and CSN is detected and fed back to the internal buck constant current control loop, and the stable current output is controlled to drive the load (such as LED). When constant voltage output, the voltage of CSP2 pin is fed back to the internal buck constant voltage control loop, and the stable voltage output is controlled to drive the load.

[0073] Multi-DC-DC topology support, boost / SEPIC GaN FET converter, internally designed integrated 2 sets of independent closed-loop detection and control circuit, respectively responsible for constant voltage output control and constant current output control, to adapt to different application systems. Figure 3 In the application, the feedback pin (VFB) detects and feeds back to the internal boost control loop, which is responsible for generating a stable primary voltage to the secondary buck converter. Figure 4 In the application, the differential current of CSP and CSN pins is detected and fed back to the internal SEPIC control loop, which controls the stable current output to drive the load (such as LED).

[0074] As shown in Figure 6 The GaN FET is placed above the silicon-based control circuit, and the electrical and mechanical connection between the two is realized through the metal column bump. Based on the mature sealing process design, the stability and reliability of the sealed chip are ensured.

[0075] The sealed GaN controller of the application will have the following characteristics: Maximize the reduction of gate drive circuit and parasitic inductance, ensure the stable and reliable work of GaN converter at MHz level switching frequency, and improve the switching immunity.

[0076] The encapsulated chip has 2kV HBM (human body model) electrostatic protection capability, effectively protecting the GaN FET tube from electrostatic ESD damage.

[0077] The upper and lower stacked encapsulation structure realizes the heat dissipation capability of the top of the GaN FET tube, and improves the power density and reliability.

[0078] The driving, protection and control circuit is integrally packaged, reducing the number of external components and connection points, and improving the overall reliability of the system.

[0079] After encapsulation, only a few peripheral components are required, greatly simplifying the GaN FET circuit layout requirements of the circuit board.

[0080] Working principle of the circuit: 1) Start and power supply, for boost / SEPIC GaN FET converter, after the external power supply is connected, VCC and VDD are powered on, VDD is used for digital circuit core start, and VCC is used for stable power supply of analog circuit and gate drive circuit. For the buck GaN FET converter, it is provided by the external module.

[0081] 2) Boost control, the output voltage is fed back to the 5.Analog circuit part through the FB feedback pin, and is compensated through the peripheral network of the COMP pin, ensuring that the entire control loop is both fast and stable. The digital core combines the input instruction transmission control signal of EEPROM configuration and external SPI communication to the analog circuit part, and finally generates a suitable duty cycle PWM control signal output to the later stage to realize stable boost control.

[0082] 3) Constant current control, the output current is fed back to the 10.Analog circuit part through the CSP, CSN feedback pin, and is compensated through the peripheral network of the COMP pin, ensuring that the entire control loop is both fast and stable. The digital core combines the input instruction transmission control signal of EEPROM configuration and external SPI communication to the analog circuit part, and finally generates a suitable duty cycle PWM control signal output to the later stage to realize stable constant current control.

[0083] 4) Diagnosis and protection, the gate driver and analog part will integrate a variety of diagnostic and protection functions, once a fault occurs, the control logic will immediately adjust or shut down the PWM output, implement protection, and ensure system safety.

[0084] Fault protection functions include: Gate driver undervoltage shutdown protection, when the gate drive voltage is too low, it may cause the GaN FET device not to be fully turned on, resulting in a large internal resistance of the GaN FET and overheating, which poses a risk of failure. When the gate driver detects that the voltage is too low, the analog circuit will stop PWM output to turn off the GaN FET to avoid damage. When the voltage returns to normal, the undervoltage shutdown protection function is reset, and the GaN FET works normally again.

[0085] GaN FET over-temperature protection, when the digital circuit part detects that the junction temperature of the GaN FET exceeds the target alarm threshold (the threshold can be defined by the user in combination with the actual application through EEPROM, and the digital circuit part reads it from EEPROM), the corresponding alarm flag bit will be set. The user can control the chip to reduce power output to reduce heat and avoid continuous temperature rise through the serial communication bus. Once the temperature continues to rise, the chip will stop PWM output to turn off the GaN FET to avoid damage when the maximum allowed junction temperature is reached (e.g. 150°C). When the junction temperature drops below the detection threshold, the over-temperature protection function is reset, and the GaN FET works normally again.

[0086] GaN FET tube overcurrent protection, when the GaN FET fails (e.g. short circuit) and the current suddenly increases, the analog circuit part will perform overcurrent detection cycle by cycle. Specifically, the peak current of the GaN FET is detected during the conduction time of each switching cycle. Once the threshold is exceeded, the analog circuit will control the gate driver to immediately terminate the conduction of this cycle, and the next cycle will start again, which can clamp the current peak value within a safe range.

[0087] 5) Gate driver, the gate driver is the guarantee of efficient and reliable operation of the GaN FET tube, which integrates the following functions: Dead time control, automatically generates and adjusts a short delay between the switching of the upper and lower tubes to prevent the upper and lower tubes from being directly connected, ensuring system safety.

[0088] Level conversion, converts low-voltage control signals into high-voltage (or negative voltage) signals suitable for GaN gate drive, ensuring accurate and fast switching action.

[0089] Charge pump function, used to generate stable high voltage for reliable conduction of the upper GaN FET.

[0090] 6) GaN FET, located at the end of the entire power link, responsible for implementing DC-DC boost / SEPIC circuit and DC-DC buck circuit functions, replacing traditional Si MOSFET.

[0091] 7) EEPROM, EEPROM is a kind of power-down information storage, which has the characteristics of repeated writing and power-down information not being lost. Therefore, the function of the converter chip integrated with it is to store information, which is convenient for reading after the chip is powered on again to obtain some parameters that have been fixed and determined in the design stage. For example: Circuit operating characteristic parameters of the boost / SEPIC or buck circuit, such as operating frequency.

[0092] Response strategies of chip fault protection functions, such as threshold setting of over-temperature protection.

[0093] Some user-specific information needs to be stored in the product, such as part number.

[0094] 8) Typical application system architecture of boost and buck converter, as shown in Figure 3 The boost GaN FET converter and the buck GaN FET converter work in cascade in actual application, and combined with the necessary surrounding devices of the DC-DC circuit, such as inductance, capacitance, feedback network, loop compensation capacitance resistance, etc., to form a GaN FET boost circuit and a GaN FET buck circuit.

[0095] 9) Typical application system architecture of single-ended primary inductance converter (SEPIC converter), as shown in Figure 4 The circuit is based on the principle of SEPIC DC-DC conversion, combined with the necessary surrounding devices such as coupling inductance, capacitance, feedback network, loop compensation capacitance resistance, etc., to form a SEPIC converter. This application architecture can directly convert the wide input voltage range (9~16V) voltage from the whole vehicle into a stable current output (such as LED string) of the target load.

[0096] In the description of the present application, it should be understood that the orientations or positional relationships indicated by the terms "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0097] Those skilled in the art know that, in addition to implementing the system, device and each module thereof provided by the present application in the form of pure computer readable program code, the same program can also be implemented in the form of logic gate, switch, special integrated circuit, programmable logic controller and embedded microcontroller, etc. by logically programming the method steps. Therefore, the system, device and each module thereof provided by the present application can be considered as a hardware component, and the modules included therein for implementing various programs can also be considered as structures in the hardware component; the modules for implementing various functions can also be considered as both software programs for implementing methods and structures in the hardware component.

[0098] The specific embodiments of the present application are described above. It needs to be understood that the present application is not limited to the specific embodiments described above, and various changes or modifications can be made by those skilled in the art within the scope of the claims, which does not affect the essential content of the present application. The embodiments of the present application and the features in the embodiments can be combined with each other arbitrarily without conflict.

Claims

1. A LED driver system based on GaN potted technology, characterized in that, The boost / SEPIC GaN FET converter chip and / or the buck GaN FET converter chip; The boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip both adopt the sealing technology to integrate the silicon-based control circuit and the GaN FET in the same package; The silicon-based control circuit includes a digital circuit core, an analog circuit, a gate drive circuit and an EEPROM; The VIN pin of the boost / SEPIC GaN FET converter chip receives an external input power supply, and the internal LDO module converts the VIN voltage into VCC and VDD; VCC is used to power the analog circuit and the gate drive circuit, and VDD is used to power the digital circuit core and the EEPROM; the digital circuit core is connected with an external controller through a serial communication bus to receive external instructions; the digital circuit core is connected with the analog circuit to convert the external instructions into control signals and send them to the analog circuit; the analog circuit generates PWM signals and sends them to the gate drive circuit; the gate drive circuit converts the PWM signals into driving voltage signals to control the conduction and shutdown of the GaN FET sealed in the chip; the GaN FET is connected with an external inductor and capacitor through the VOUT, SW1, SW2 and PGND pins to form a boost or SEPIC circuit topology; The VCC and VDD pins of the buck GaN FET converter chip receive an externally provided power supply; VCC is used to power the analog circuit and the gate drive circuit, and VDD is used to power the digital circuit core and the EEPROM; the digital circuit core is connected with an external controller through a serial communication bus to receive external instructions; the digital circuit core is connected with the analog circuit to convert the external instructions into control signals and send them to the analog circuit; the analog circuit generates PWM signals and sends them to the gate drive circuit; the gate drive circuit converts the PWM signals into driving voltage signals to control the conduction and shutdown of the GaN FET sealed in the chip; the GaN FET is connected with an external inductor and capacitor through the VOUT, SW1, SW2 and PGND pins to form a buck circuit topology.

2. The GaN-based encapsulation technology based LED driver system according to claim 1, wherein, The analog circuit of the boost / SEPIC GaN FET converter chip includes a first feedback control network and a second feedback control network; The first feedback control network receives an output voltage feedback signal through the FB pin and connects the COMP pin to access an external compensation network to realize constant voltage control of the boost circuit; The second feedback control network receives an output current feedback signal through the CSP and CSN pins and connects the COMP pin to access an external compensation network to realize constant current control of the SEPIC circuit.

3. The GaN-based encapsulation technology based LED driver system of claim 1, wherein, The analog circuit of the buck GaN FET converter chip includes a constant voltage control loop and a constant current control loop; The constant current control loop is connected to the CSP and CSN pins to perform current closed-loop control by detecting the voltage difference between the CSP and CSN pins; The constant voltage control circuit is connected to a CSN pin, and voltage closed-loop control is performed by detecting the voltage of the CSN pin; The digital circuit core receives a mode switching instruction sent through a serial communication bus, and controls the constant voltage control circuit and the constant current control circuit to work alternatively, and the output PWM signal is sent to the gate drive circuit.

4. The GaN-based encapsulation technology based LED driver system of claim 1, wherein, The boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip adopt a leadless package; The GaN FET is located above the silicon-based control circuit, and the two are electrically and mechanically connected through metal bumps to form a top heat dissipation structure.

5. The GaN-based encapsulation technology based LED driver system of claim 1, wherein, The boost / SEPIC GaN FET converter chip and / or the GaN FET, gate drive circuit and analog circuit module integrated in the buck GaN FET converter chip are multiple groups; In the boost / SEPIC GaN FET converter chip, multiple groups of circuits work in parallel to merge the output; In the buck GaN FET converter chip, multiple groups of circuits independently drive multiple loads.

6. The GaN-based encapsulation technology based LED driver system of claim 1, wherein, The serial communication bus is an SPI bus or a UART bus; The SPI bus includes CS, CLK, MOSI / RX and MISO / TX pins; and the UART bus includes TX and RX pins.

7. The GaN-based technology based LED driver system according to claim 1, wherein, The analog circuit integrates a diagnosis and protection function, including: When the gate drive voltage is detected to be lower than a threshold value, the analog circuit stops outputting the PWM signal; When the digital circuit core detects through the analog circuit that the junction temperature of the GaN FET exceeds a first threshold value, an alarm flag is set; and when the junction temperature reaches a second threshold value, the analog circuit stops outputting the PWM signal; The peak current of the GaN FET is detected within the on-time of each switching cycle, and when the peak current exceeds a set threshold value, the analog circuit controls the gate driver to immediately terminate the on-time of the current cycle.

8. The GaN-based technology based LED driver system according to claim 1, wherein, The EEPROM is connected to the digital circuit core through internal wiring; The EEPROM is used to store working frequency, over-temperature protection threshold value, over-current protection threshold value and part number information; After power-on, the digital circuit core loads the stored configuration information from the EEPROM to control the working of the analog circuit.

9. The GaN-based technology based LED driver system according to claim 1, wherein, The gate drive circuit is connected to the analog circuit, receives the PWM signal output by the analog circuit, and converts the PWM signal into a drive voltage signal output to the gate of the GaN FET; The boost / SEPIC GaN FET converter chip and the buck GaN FET converter chip set the working frequency based on the switching characteristics of the GaN FET.

10. An automotive vehicle lamp characterized by An LED driver system based on the GaN hybrid packaging technology of any one of claims 1 to 9. An LED driver system based on the GaN hybrid packaging technology of any one of claims 1 to 9.

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