Display panel, display device and manufacturing method of display panel

Abstract

The invention relates to a display panel, a display device and a manufacturing method of the display panel. The display panel comprises an array substrate and a first light-emitting unit, the first light-emitting unit comprises a first sub-pixel and a second sub-pixel, and the first sub-pixel and the second sub-pixel are arranged on the array substrate in a stacked mode in the direction away from the array substrate. The array substrate comprises a first driving circuit, first sub-pixels and second sub-pixels are electrically connected with the first driving circuit, and the first driving circuit is used for driving the first sub-pixels and the second sub-pixels to emit light. Compared with a single-layer sub-pixel, the display panel has the advantages that the brightness of superposition of the first sub-pixel and the corresponding second sub-pixel can be improved by about two times, and the light-emitting brightness and the display effect of the display panel can be effectively improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel, a display device and a manufacturing method of the display panel. BACKGROUND

[0002] OLED (Organic Light Emitting Diode) display panel is one of the hotspots in the field of display panel research at present. The OLED display panel has the advantages of low energy consumption, low cost, self-luminous, wide viewing angle and fast response speed. In the related art, if the luminous intensity is low, the display effect of the display panel will also be affected. Therefore, improving the luminous intensity of the display panel is one of the future development trends of the OLED display panel. SUMMARY

[0003] Therefore, it is necessary to provide a display panel, a display device and a manufacturing method of the display panel for improving the luminous intensity of the display panel.

[0004] According to a first aspect of the present application, a display panel is provided, comprising:

[0005] an array substrate; and

[0006] a first light emitting unit comprising a first sub-pixel and a second sub-pixel, the first sub-pixel and the second sub-pixel being stacked on the array substrate in a direction away from the array substrate;

[0007] wherein the array substrate comprises a first driving circuit, the first sub-pixel and the second sub-pixel are electrically connected to the first driving circuit, and the first driving circuit is configured to drive the first sub-pixel and the second sub-pixel to emit light, respectively.

[0008] In one embodiment, the display panel further comprises an isolation structure disposed on the array substrate, and the first light emitting unit is disposed in a first isolation opening of the isolation structure.

[0009] Optionally, a top surface of the isolation structure has an outer contour of a projection on the array substrate, which is located at the periphery of a bottom surface of the isolation structure.

[0010] In one embodiment, the first sub-pixel comprises a first electrode, a first light emitting layer and a second electrode stacked on each other.

[0011] The second sub-pixel comprises a third electrode, a second light-emitting layer and a fourth electrode which are arranged in a stack; the first driving circuit comprises a first power signal line; the isolation structure comprises a plurality of first isolation portions which are arranged in a spaced manner, and the first isolation portions are electrically connected with the first power signal line; and a first isolation opening is arranged on the first isolation portion.

[0012] The second electrode of the first sub-pixel and the fourth electrode of the corresponding second sub-pixel are electrically connected with the first isolation portion.

[0013] In one of the embodiments, the first isolation portion comprises a first sub-isolation portion and a second sub-isolation portion which are arranged in a spaced manner, and a first direction is parallel to a radial direction of the first isolation opening, and the first sub-isolation portion and the second sub-isolation portion are arranged in a spaced manner along the first direction.

[0014] One of the second electrode and the fourth electrode is electrically connected with the first sub-isolation portion, and the other of the second electrode and the fourth electrode is electrically connected with the second sub-isolation portion.

[0015] Optionally, the first sub-isolation portion and the second sub-isolation portion are connected in parallel to the first power signal line; or, the first driving circuit comprises two first power signal lines, and the first sub-isolation portion and the second sub-isolation portion are electrically connected to different first power signal lines, respectively.

[0016] Optionally, the first sub-isolation portion comprises a first side wall surface, and the second sub-isolation portion comprises a second side wall surface which is arranged opposite to the first side wall surface.

[0017] One of the second electrode and the fourth electrode is electrically connected with the first side wall surface, and the other of the second electrode and the fourth electrode is electrically connected with the second side wall surface.

[0018] Optionally, the first sub-pixel is arranged in a spaced manner with the second sub-isolation portion, and the second sub-pixel is arranged in a spaced manner with the first sub-isolation portion.

[0019] In one of the embodiments, the display panel further comprises a pixel definition layer arranged on the array substrate, and the isolation structure is arranged on a side of the pixel definition layer which is away from the array substrate.

[0020] The first sub-isolation portion and the second sub-isolation portion are arranged in a spaced manner through a part of structure of the pixel definition layer.

[0021] Optionally, the pixel definition layer comprises a first part arranged on the array substrate, and a second part arranged on a side of the first part which is away from the array substrate.

[0022] The second portion is located between the first sub-isolation portion and the second sub-isolation portion.

[0023] Optionally, a first pixel opening is arranged on the pixel definition layer, and the first pixel opening is in communication with the corresponding first isolation opening.

[0024] Optionally, the first pixel opening and the first isolation opening correspond to each other.

[0025] In one of the embodiments, a first via hole for exposing the first electrode is arranged on the pixel definition layer, a first via hole connecting structure is arranged in the first via hole, and the third electrode is electrically connected to the first electrode through the first via hole connecting structure.

[0026] In one of the embodiments, the first driving circuit further includes a second power signal line different from the first power signal line, and the first electrode of the first sub-pixel and the third electrode of the corresponding second sub-pixel are connected in parallel to the second power signal line.

[0027] Optionally, the second power signal line is located below the first light emitting unit, and the display panel further includes a first switching portion arranged in the same layer as the first electrode, and the first switching portion is electrically connected to the second power signal line.

[0028] A second via hole for exposing the first switching portion is arranged on the pixel definition layer, a second via hole connecting structure is arranged in the second via hole, and the third electrode is electrically connected to the first switching portion through the second via hole connecting structure.

[0029] In one of the embodiments, the second electrode of the first sub-pixel and the fourth electrode of the corresponding second sub-pixel are connected in parallel to the same first isolation portion.

[0030] Optionally, the first driving circuit includes a first power signal line and a second power signal line different in signal, and the first electrode of the first sub-pixel and the third electrode of the corresponding second sub-pixel are connected in parallel to the second power signal line.

[0031] Optionally, the second power signal line is located below the first light emitting unit, and the display panel further includes a first switching portion arranged in the same layer as the first electrode, and the first switching portion is electrically connected to the second power signal line.

[0032] The display panel further includes a pixel definition layer arranged on the array substrate, and the isolation structure is arranged on a side of the pixel definition layer away from the array substrate.

[0033] The pixel definition layer is provided with a second via hole for exposing the first adapter, and the second via hole is provided with a second via hole connection structure, and the third electrode is electrically connected with the first adapter through the second via hole connection structure.

[0034] In one of the embodiments, the first sub-pixel and the second sub-pixel are connected in parallel to the first driving circuit.

[0035] Optionally, the first sub-pixel comprises a first electrode, a first light-emitting layer and a second electrode which are arranged in a stack.

[0036] The second sub-pixel comprises a third electrode, a second light-emitting layer and a fourth electrode which are arranged in a stack.

[0037] The first driving circuit comprises a first power signal line and a second power signal line which are different in signal, the second electrode of the first sub-pixel and the fourth electrode of the corresponding second sub-pixel are connected in parallel to the first power signal line; and / or, the first electrode of the first sub-pixel and the third electrode of the corresponding second sub-pixel are connected in parallel to the second power signal line.

[0038] Optionally, the first power signal line is a VSS signal line, and the second power signal line is a VDD signal line.

[0039] Optionally, the second electrode, the third electrode and the fourth electrode all comprise a transparent conductive material.

[0040] Optionally, the first sub-pixel and the corresponding second sub-pixel have the same light-emitting color.

[0041] Optionally, the first sub-pixel and the corresponding second sub-pixel are arranged at intervals.

[0042] Optionally, a first insulating layer is arranged between the first sub-pixel and the corresponding second sub-pixel, and the material of the first insulating layer comprises a light-transmitting material.

[0043] In one of the embodiments, the display panel further comprises:

[0044] A second light-emitting unit comprises a third sub-pixel and a fourth sub-pixel, the third sub-pixel and the fourth sub-pixel are arranged in a stack on the array substrate in a direction away from the array substrate; wherein the array substrate further comprises a second driving circuit, the third sub-pixel and the fourth sub-pixel are both electrically connected to the second driving circuit, and the second driving circuit is used for driving the third sub-pixel and the fourth sub-pixel to emit light respectively.

[0045] Optionally, the third sub-pixel and the fourth sub-pixel are connected in parallel to the second driving circuit.

[0046] Optionally, the third sub-pixel comprises a fifth electrode, a third light-emitting layer and a sixth electrode which are stacked;

[0047] The fourth sub-pixel comprises a seventh electrode, a fourth light-emitting layer and an eighth electrode which are stacked;

[0048] The second driving circuit comprises a third power signal line and a fourth power signal line which are different in signal, the sixth electrode of the third sub-pixel and the eighth electrode of the corresponding fourth sub-pixel are connected in parallel to the third power signal line; and / or, the fifth electrode of the third sub-pixel and the seventh electrode of the corresponding fourth sub-pixel are connected in parallel to the fourth power signal line;

[0049] Optionally, the sixth electrode, the seventh electrode and the eighth electrode each comprise a transparent conductive material;

[0050] Optionally, the third sub-pixel and the corresponding fourth sub-pixel are the same in light-emitting color;

[0051] Optionally, the third sub-pixel and the corresponding fourth sub-pixel are arranged at intervals from each other;

[0052] Optionally, a second insulating layer is arranged between the third sub-pixel and the corresponding fourth sub-pixel; the material of the second insulating layer comprises a light-transmitting material;

[0053] Optionally, the third power signal line is a VSS signal line, and the fourth power signal line is a VDD signal line.

[0054] In one of the embodiments, the display panel further comprises:

[0055] The third light-emitting unit comprises a fifth sub-pixel and a sixth sub-pixel, the fifth sub-pixel and the sixth sub-pixel are stacked on the array substrate in a direction away from the array substrate; wherein the array substrate further comprises a third driving circuit, the fifth sub-pixel and the sixth sub-pixel are electrically connected to the third driving circuit, and the third driving circuit is used for driving the fifth sub-pixel and the sixth sub-pixel to emit light respectively;

[0056] Optionally, the fifth sub-pixel and the sixth sub-pixel are connected in parallel to the third driving circuit;

[0057] Optionally, the fifth sub-pixel comprises a ninth electrode, a fifth light-emitting layer and a tenth electrode which are stacked;

[0058] The sixth sub-pixel comprises an eleventh electrode, a sixth light-emitting layer and a twelfth electrode which are stacked;

[0059] The third driving circuit includes a fifth power signal line and a sixth power signal line with different signals, and the tenth electrode of the fifth sub-pixel and the twelfth electrode of the corresponding sixth sub-pixel are connected in parallel to the fifth power signal line; and / or, the ninth electrode of the fifth sub-pixel and the eleventh electrode of the corresponding sixth sub-pixel are connected in parallel to the sixth power signal line.

[0060] Optionally, the tenth electrode, the eleventh electrode and the twelfth electrode each include a transparent conductive material.

[0061] Optionally, the fifth sub-pixel and the corresponding sixth sub-pixel have the same light-emitting color.

[0062] Optionally, the fifth sub-pixel and the corresponding sixth sub-pixel are arranged at intervals.

[0063] Optionally, a third insulating layer is arranged between the fifth sub-pixel and the corresponding sixth sub-pixel; and the material of the third insulating layer includes a light-transmitting material.

[0064] Optionally, the fifth power signal line is a VSS signal line, and the sixth power signal line is a VDD signal line.

[0065] According to a second aspect of the present application, a display panel is provided, including: an array substrate;

[0066] a plurality of first light-emitting units, at least one of the first light-emitting units including a first sub-pixel and a second sub-pixel, the first sub-pixel and the second sub-pixel being arranged in a stacked manner on the array substrate in a direction away from the array substrate; and

[0067] an isolation structure, the isolation structure being provided with a first isolation opening, and the first light-emitting unit being located in the first isolation opening.

[0068] The first sub-pixel includes a first electrode, a first light-emitting layer and a second electrode arranged in a stacked manner.

[0069] The second sub-pixel includes a third electrode, a second light-emitting layer and a fourth electrode arranged in a stacked manner.

[0070] The second electrode of the first sub-pixel and the fourth electrode of the corresponding second sub-pixel are respectively electrically connected to the isolation structure.

[0071] In one of the embodiments, the isolation structure includes a plurality of first isolation portions corresponding to the plurality of first light-emitting units, and the first isolation portions are provided with the first isolation openings.

[0072] The first isolation portion includes a first sub-isolation portion and a second sub-isolation portion arranged apart from each other, and a first direction is a radial direction parallel to the first isolation opening;

[0073] One of the second electrode and the fourth electrode is electrically connected to the first sub-isolation portion, and the other of the second electrode and the fourth electrode is electrically connected to the second sub-isolation portion;

[0074] Optionally, the array substrate includes a first power supply signal line; the first sub-isolation portion and the second sub-isolation portion are connected in parallel to the first power supply signal line, or a plurality of first power supply signal lines are provided on the array substrate, and the first sub-isolation portion and the second sub-isolation portion are electrically connected to different first power supply signal lines, respectively;

[0075] Optionally, the first power supply signal line is a VSS signal line.

[0076] In one of the embodiments, the display panel further includes a pixel definition layer provided on the array substrate, and the isolation structure is provided on a side of the pixel definition layer away from the array substrate;

[0077] The first sub-isolation portion and the second sub-isolation portion are arranged apart from each other through a part of the pixel definition layer;

[0078] Optionally, the pixel definition layer includes a first part provided on the array substrate, and a second part provided on a side of the first part away from the array substrate;

[0079] The second part is located between the first sub-isolation portion and the second sub-isolation portion;

[0080] Optionally, a first pixel opening is provided on the pixel definition layer, and the first pixel opening is in communication with a corresponding first isolation opening;

[0081] Optionally, the first pixel opening and the first isolation opening are in one-to-one correspondence.

[0082] In one of the embodiments, a first via hole for exposing the first electrode is provided on the pixel definition layer, a first via hole connecting structure is provided in the first via hole, and the third electrode is electrically connected to the first electrode through the first via hole connecting structure.

[0083] In one of the embodiments, the array substrate further includes a second power supply signal line different from the first power supply signal line, and the first electrode of the first sub-pixel and the third electrode of a corresponding second sub-pixel are connected in parallel to the second power supply signal line;

[0084] Optionally, the second power signal line is located below the first light emitting unit, and the display panel further comprises a first adapter disposed in the same layer as the first electrode, and the first adapter is electrically connected with the second power signal line.

[0085] The pixel definition layer is provided with a second via hole for exposing the first adapter, and the second via hole is provided with a second via hole connection structure, and the third electrode is electrically connected with the first adapter through the second via hole connection structure.

[0086] Optionally, the second power signal line is a VDD signal line.

[0087] According to a third aspect of the present application, a display device is provided, comprising the display panel of any of the above embodiments.

[0088] According to a fourth aspect of the present application, a manufacturing method of a display panel is provided, comprising:

[0089] providing an array substrate;

[0090] forming a pixel definition layer on the array substrate, and the pixel definition layer is provided with a pixel opening;

[0091] forming a first sub-isolation portion and a second sub-isolation portion on a side of the pixel definition layer away from the array substrate; the first sub-isolation portion and the second sub-isolation portion are disposed apart from each other and surround a separate opening in communication with the pixel opening; and

[0092] forming a light emitting unit on the array substrate, and the light emitting unit is located in the pixel opening and the separate opening;

[0093] wherein the light emitting unit comprises two sub-pixels stacked in a direction away from the array substrate;

[0094] of the light emitting unit, one of the sub-pixels is electrically connected with the first sub-isolation portion, and the other sub-pixel is electrically connected with the second sub-isolation portion.

[0095] In one embodiment, the forming a pixel definition layer on the array substrate specifically comprises:

[0096] forming a first portion on the array substrate;

[0097] forming a plurality of second portions disposed apart from each other on a side of the first portion away from the array substrate;

[0098] wherein the second portion is located between the first sub-isolation portion and the second sub-isolation portion.

[0099] In one of the embodiments, the plurality of second portions are formed on the side of the first portion away from the array substrate, and specifically include:

[0100] The plurality of second portions, the plurality of third portions and the plurality of fourth portions are formed on the side of the first portion away from the array substrate.

[0101] The second portion corresponds to the third portion and the fourth portion one by one.

[0102] The second portion and the corresponding fourth portion are located between the first sub-isolation portion and the second sub-isolation portion, and the side of the second portion away from the array substrate is farther away from the array substrate than the side of the fourth portion away from the array substrate.

[0103] The plurality of fourth portions and the first portion define the plurality of pixel openings.

[0104] The first sub-isolation portion and the second sub-isolation portion are defined as a first isolation portion, and the third portion is arranged around the first isolation portion.

[0105] In the technical solution of the present application, since the first sub-pixel and the second sub-pixel have the same light-emitting color, and the first driving circuit is used to drive the first sub-pixel and the second sub-pixel to emit light respectively, compared with the series arrangement of the stacked sub-pixels, in the case that the overall light-emitting brightness of the first sub-pixel and the second sub-pixel is unchanged, the current density of the first sub-pixel and the second sub-pixel arranged in a stacked manner in the present application is halved respectively, and the first sub-pixel and the second sub-pixel are driven to emit light in a double driving mode, which can effectively reduce the cross voltage of the stacked light-emitting device, and also can improve the life of the first sub-pixel and the second sub-pixel by about 2 times, and is also beneficial to reduce the power consumption of the display panel. In other words, under the same driving voltage, compared with the single-layer sub-pixel, the brightness of the first sub-pixel and the corresponding second sub-pixel in the display panel of the present application can be improved by about 2 times, thereby effectively improving the light-emitting brightness and display effect of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0106] Figure 1 A partial structure schematic diagram of a display panel in an embodiment of the present application is shown.

[0107] Figure 2 A circuit block diagram of a first driving circuit in an embodiment of the present application is shown.

[0108] Figure 3 A structure schematic diagram of a first light-emitting unit, a second light-emitting unit and a third light-emitting unit in an embodiment of the present application is shown.

[0109] Figure 4A circuit block diagram of the first driving circuit in another embodiment of the present application is shown.

[0110] Figure 5 A partial top view of the first isolation portion, the second isolation portion, the third isolation portion and the pixel definition layer in an embodiment of the present application is shown.

[0111] Figure 6 A partial structure schematic diagram of the display panel in another embodiment of the present application is shown.

[0112] Figure 7 A structure schematic diagram of the display panel in an embodiment of the present application is shown.

[0113] Figure 8 A structure schematic diagram of the display panel in another embodiment of the present application is shown.

[0114] Figure 9 A structure schematic diagram of the display device in an embodiment of the present application is shown.

[0115] Figure 10 A partial structure schematic diagram of the display panel in yet another embodiment of the present application is shown.

[0116] Reference signs: 1, display device; 10, display panel; 100, array substrate; 200a, first light emitting unit; 210, first sub-pixel; 211, first electrode; 212, first light emitting layer; 213, second electrode; 214, first hole injection layer; 215, first hole transport layer; 216, first hole blocking layer; 217, first electron transport layer; 220, second sub-pixel; 221, third electrode; 222, second light emitting layer; 223, fourth electrode; 224, second hole injection layer; 225, second hole transport layer; 226, second hole blocking layer; 227, second electron transport layer; 200b, second light emitting unit; 230, third sub-pixel; 231, fifth electrode; 232, third light emitting layer; 233, sixth electrode; 240, fourth sub-pixel; 241, seventh electrode; 242, fourth light emitting layer; 243, eighth electrode; 200c, third light emitting unit; 250, fifth sub-pixel; 251, ninth electrode; 252, fifth light emitting layer; 253, tenth electrode; 260, sixth sub-pixel; 261, eleventh electrode; 262, sixth light emitting layer; 263, twelfth electrode; 300, first driving circuit; 310, first power signal line; 320, second power signal line; 330, first conductive line; 340, second conductive line; 350, third conductive line; 360, fourth conductive line; 301, second driving circuit; 302, third driving circuit; 410, first insulating layer; 420, second insulating layer; 430, third insulating layer; 440, light extraction layer; 500, isolation structure; 510, first isolation part; 511, first sub-isolation part; 5111, first side wall surface; 512, second sub-isolation part; 5121, second side wall surface; 520, second isolation part; 530, third isolation part; 540, blocking part; 5001, first isolation opening; 5002, second isolation opening; 5003, third isolation opening; 500a, isolation opening; 600, pixel definition layer; 610, first part; 620, second part; 630, third part; 640, fourth part; 641, first sub-part; 642, second sub-part; 621, third sub-part; K1, first pixel opening; K2, second pixel opening; K3, third pixel opening; K, pixel opening; 710, first via connection structure; 720, second via connection structure; 730, third via connection structure; 740, fourth via connection structure; 750, fifth via connection structure; 760, sixth via connection structure; 810, first relay part; 910, first packaging layer; 911, first packaging unit; 912, second packaging unit; 913, third packaging unit; 920, second packaging layer; 930, third packaging layer; C, capacitor; M1, first transistor; M2, second transistor; M3, third transistor; M4, fourth transistor; M5, fifth transistor; M6, sixth transistor; M7, seventh transistor. DETAILED DESCRIPTION

[0117] In order to make the above objectives, features and advantages of the present application more clear and comprehensible, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, the present application can be practiced in a number of different ways beyond the specific embodiments described herein and by one of ordinary skill in the art without departing from the spirit and scope of the present application, and it is therefore intended that all such variations be considered as falling within the scope of the present application. It should be understood that the use of the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", and the like, used in this description and the appended claims, merely describe the orientation in use and do not limit the present application to any particular position of use. Unless otherwise defined, all terms used herein have the same meaning as they would to one of ordinary skill in the art.

[0118] In the description of the present application, it should be understood that, if these terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", and the like, appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0119] In addition, if these terms "first", "second" appear, these terms are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features referred to. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, if the term "a plurality of" appears, the meaning of "a plurality of" is at least two, for example, two, three, etc., unless otherwise explicitly specified and limited.

[0120] In the present application, unless otherwise explicitly specified and limited, if the terms "mounting", "connecting", "connection", "fixing" and the like appear, these terms should be interpreted broadly. For example, it can be fixedly connected, or detachably connected, or integrated; it can be mechanically connected, or electrically connected; it can be directly connected, or indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise explicitly limited. For those of ordinary skill in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0121] In the present application, unless specifically defined and limited otherwise, if there is a description of a first feature "on" or "under" a second feature, etc., it can mean that the first and second features are in direct contact, or the first and second features are indirectly in contact through an intermediate medium. Moreover, the first feature "over", "above" and "on" the second feature can be that the first feature is directly above or obliquely above the second feature, or only indicates that the horizontal height of the first feature is higher than that of the second feature. The first feature "under", "below" and "under" the second feature can be that the first feature is directly below or obliquely below the second feature, or only indicates that the horizontal height of the first feature is less than that of the second feature.

[0122] It should be noted that if an element is referred to as "fixed to" or "disposed on" another element, it can be directly on the other element or there can be a middle element. If an element is considered to be "connected" to another element, it can be directly connected to the other element or there can be a middle element. If present, the terms "vertical", "horizontal", "up", "down", "left", "right" and similar expressions used in the present application are only for illustrative purposes and do not represent the only implementation.

[0123] In the related art, if the luminous brightness is low, the display effect of the display panel will also be affected, therefore, improving the luminous brightness of the display panel is one of the future development trends of OLED display panels.

[0124] In order to solve the problem of how to improve the luminous brightness of the display panel, the present application designs a display panel to improve the luminous brightness of the display panel.

[0125] Figure 1 A partial structure schematic diagram of a display panel 10 in an embodiment of the present application is shown.

[0126] Please refer to Figure 1 According to a first aspect of the present application, an embodiment of the present application provides a display panel 10, comprising an array substrate 100 and a first light emitting unit 200a.

[0127] The first light emitting unit 200a comprises a first sub-pixel 210 and a second sub-pixel 220, and the first sub-pixel 210 and the second sub-pixel 220 are stacked on the array substrate 100 in a direction away from the array substrate 100.

[0128] Optionally, the first sub-pixel 210 and the corresponding second sub-pixel 220 have the same light emitting color. The array substrate 100 comprises a first driving circuit 300, the first sub-pixel 210 and the second sub-pixel 220 are electrically connected with the first driving circuit 300, and the first driving circuit 300 is used to drive the first sub-pixel 210 and the second sub-pixel 220 to emit light respectively.

[0129] The first driving circuit 300 can be an entirety, and the first sub-pixel 210 and the second sub-pixel 220 are electrically connected with the first driving circuit 300. Alternatively, the first driving circuit 300 includes two sub-driving circuits, and the first sub-pixel 210 and the second sub-pixel 220 are electrically connected with the corresponding sub-driving circuit respectively to drive the first sub-pixel 210 and the second sub-pixel 220 to emit light respectively.

[0130] Since the first sub-pixel 210 and the second sub-pixel 220 have the same light-emitting color, and the first driving circuit 300 is used to drive the first sub-pixel 210 and the second sub-pixel 220 to emit light respectively, in the case that the overall light-emitting brightness of the first sub-pixel 210 and the second sub-pixel 220 is unchanged, compared with the stacked sub-pixels arranged in series, the current density of the first sub-pixel 210 and the second sub-pixel 220 arranged in the stack in the present application is halved respectively, and the first sub-pixel 210 and the second sub-pixel 220 are driven to emit light in the double driving mode, which can effectively reduce the cross voltage of the stacked light-emitting device, and can also improve the life of the first sub-pixel 210 and the second sub-pixel 220 by about 2 times, and is also beneficial to reduce the screen power consumption of the display panel 10. In other words, under the same driving voltage, compared with the single-layer sub-pixel, the brightness of the first sub-pixel 210 and the second sub-pixel 220 in the display panel 10 in the present application can be improved by about 2 times, and thus the light-emitting brightness and display effect of the display panel 10 can be effectively improved.

[0131] In some embodiments, as shown in FIG. 2, the first sub-pixel 210 and the second sub-pixel 220 are connected in parallel to the first driving circuit 300. Figure 2

[0132] In this way, the first driving circuit 300 can drive the first sub-pixel 210 and the second sub-pixel 220 to emit light respectively, and under the same driving voltage, compared with the single-layer sub-pixel, the brightness of the first sub-pixel 210 and the second sub-pixel 220 in the display panel 10 in the present application can be improved by about 2 times, and thus the light-emitting brightness and display effect of the display panel 10 can be effectively improved. In addition, in the case that the overall light-emitting brightness of the first sub-pixel 210 and the second sub-pixel 220 is unchanged, compared with the stacked sub-pixels arranged in series, the current density of the first sub-pixel 210 and the second sub-pixel 220 arranged in the stack in the present application is halved respectively, and the first sub-pixel 210 and the second sub-pixel 220 are driven to emit light in the double driving mode, which can effectively reduce the cross voltage of the stacked light-emitting device, and can also improve the life of the first sub-pixel 210 and the second sub-pixel 220 by about 2 times, and is also beneficial to reduce the screen power consumption of the display panel 10.

[0133] ​In some embodiments, the first sub-pixel 210 includes a first electrode 211, a first light-emitting layer 212, and a second electrode 213 stacked together; the second sub-pixel 220 includes a third electrode 221, a second light-emitting layer 222, and a fourth electrode 223 stacked together; the first driving circuit 300 includes a first power signal line 310 and a second power signal line 320 with different signals; the second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the corresponding second sub-pixel 220 are connected in parallel to the first power signal line 310.

[0134] Optionally, the first power signal line 310 is a VSS signal line, and the second power signal line 320 is a VDD signal line.

[0135] Specifically, the first electrode 211 is the first anode, the second electrode 213 is the first cathode, the third electrode 221 is the second anode, and the fourth electrode 223 is the second cathode.

[0136] Optionally, such as Figure 3 As shown, a first hole injection layer 214 and a first hole transport layer 215 may also be disposed between the first electrode 211 and the first light-emitting layer 212, stacked in a direction away from the array substrate 100.

[0137] Optionally, such as Figure 3 As shown, a first hole blocking layer 216 and a first electron transport layer 217 may also be disposed between the first light-emitting layer 212 and the second electrode 213 in a direction away from the array substrate 100.

[0138] Optionally, such as Figure 3 As shown, a second hole injection layer 224 and a second hole transport layer 225 may also be stacked between the third electrode 221 and the second light-emitting layer 222 in a direction away from the array substrate 100.

[0139] Optionally, such as Figure 3 As shown, a second hole blocking layer 226 and a second electron transport layer 227 may also be disposed between the second light-emitting layer 222 and the fourth electrode 223 in a direction away from the array substrate 100.

[0140] In this way, the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the corresponding second sub-pixel 220 are connected in parallel to the second power signal line 320, so that the overall luminous brightness of the first sub-pixel 210 and the second sub-pixel 220 formed by the first sub-pixel 210 and the second sub-pixel 220 is unchanged, and compared with the stacked sub-pixel arranged in series, the display panel 10 in the present application can effectively reduce the cross voltage of the stacked light-emitting device, and the service life of the first sub-pixel 210 and the second sub-pixel 220 can be increased by about 2 times, which is also beneficial to reduce the power consumption of the display panel 10. In other words, under the same driving voltage, compared with the single-layer sub-pixel, the luminance of the first sub-pixel 210 and the second sub-pixel 220 arranged in parallel in the display panel 10 in the present application can be increased by about 2 times, and the luminous brightness and display effect of the display panel 10 can be effectively improved.

[0141] In some embodiments, the first sub-pixel 210 includes the first electrode 211, the first light-emitting layer 212, and the second electrode 213 arranged in layers, the second sub-pixel 220 includes the third electrode 221, the second light-emitting layer 222, and the fourth electrode 223 arranged in layers, and the first driving circuit 300 includes the first power signal line 310 and the second power signal line 320 with different signals.

[0142] Optionally, the first power signal line 310 is a VSS signal line, and the second power signal line 320 is a VDD signal line.

[0143] Since the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the corresponding second sub-pixel 220 are connected in parallel to the second power signal line 320, the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the corresponding second sub-pixel 220 can be respectively provided with a high-level voltage signal, and the second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the corresponding second sub-pixel 220 can be provided with a low-level voltage signal in combination with the first power signal line 310, so that the overall luminous brightness formed by the first sub-pixel 210 and the second sub-pixel 220 can be unchanged, and compared with the stacked sub-pixel arranged in series, the display panel 10 in the application can effectively reduce the cross voltage of the stacked light-emitting device, and the service life of the first sub-pixel 210 and the second sub-pixel 220 can be increased by about 2 times, and the power consumption of the display panel 10 can also be reduced. In other words, under the same driving voltage, compared with the single-layer sub-pixel, the luminance of the first sub-pixel 210 and the second sub-pixel 220 arranged in parallel in the display panel 10 in the application can be increased by about 2 times, and the luminous brightness and display effect of the display panel 10 can be effectively improved.

[0144] In some embodiments, the first sub-pixel 210 includes the first electrode 211, the first light-emitting layer 212 and the second electrode 213 arranged in layers, the second sub-pixel 220 includes the third electrode 221, the second light-emitting layer 222 and the fourth electrode 223 arranged in layers, the first driving circuit 300 includes the first power signal line 310 and the second power signal line 320 with different signals, the second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the corresponding second sub-pixel 220 are connected in parallel to the first power signal line 310, and the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the corresponding second sub-pixel 220 are connected in parallel to the second power signal line 320.

[0145] In this way, the overall luminous brightness formed by the first sub-pixel 210 and the second sub-pixel 220 can be unchanged, and compared with the stacked sub-pixel arranged in series, the display panel 10 in the application can effectively reduce the cross voltage of the stacked light-emitting device, and the service life of the first sub-pixel 210 and the second sub-pixel 220 can be increased by about 2 times, and the power consumption of the display panel 10 can also be reduced. In other words, under the same driving voltage, compared with the single-layer sub-pixel, the luminance of the first sub-pixel 210 and the second sub-pixel 220 arranged in parallel in the display panel 10 in the application can be increased by about 2 times, and the luminous brightness and display effect of the display panel 10 can be effectively improved.

[0146] In some embodiments, the second electrode 213, the third electrode 221 and the fourth electrode 223 each include a transparent conductive material.

[0147] The transparent conductive material can be indium tin oxide (ITO), a transparent conductive oxide (TCO), or aluminum zinc oxide (AZO), etc.

[0148] Since the second electrode 213, the third electrode 221, and the fourth electrode 223 are all arranged on the side of the first light-emitting layer 212 away from the array substrate 100, the second electrode 213, the third electrode 221, and the fourth electrode 223 are set as a transparent conductive material, which can improve the transmittance of the display panel 10 and improve the display effect of the display panel 10.

[0149] In some embodiments, the first sub-pixel 210 and the corresponding second sub-pixel 220 are optionally arranged apart from each other.

[0150] Specifically, a first insulating layer 410 is arranged between the first sub-pixel 210 and the corresponding second sub-pixel 220; the material of the first insulating layer 410 includes a light-transmitting material.

[0151] The material of the first insulating layer 410 can be the same as the material of the light extraction layer (CPL), such as triarylamine, cyclic urea, acyl structure, dibenzothiophene, dibenzofuran, or carbazole, etc.

[0152] In this way, the first sub-pixel 210 and the second sub-pixel 220 are spaced apart by the first insulating layer 410, which improves the reliability of the parallel arrangement of the first sub-pixel 210 and the second sub-pixel 220, and is also conducive to improving the transmittance of the display panel 10, thereby improving the display effect of the display panel 10.

[0153] In some embodiments, a light extraction layer 440 is arranged on the side of the second sub-pixel 220 away from the first sub-pixel 210; the material of the light extraction layer can be triarylamine, cyclic urea, acyl structure, dibenzothiophene, dibenzofuran, or carbazole, etc.

[0154] In some embodiments, the display panel 10 further includes an isolation structure 500 arranged on the array substrate 100, the isolation structure 500 is provided with a first isolation opening 5001, and the first light-emitting unit 200a is arranged in the first isolation opening 5001. The related technical solutions of the isolation structure are described in patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, and PCT / CN2024 / 099072, the contents of which are incorporated herein by reference.

[0155] In this way, the first sub-pixel 210 and the second sub-pixel 220 of the first light emitting unit 200a can be spaced apart from the pixel material of the remaining sub-pixels by the isolation structure 500, and the expensive fine metal mask (FMM) can be abandoned in the process of forming the first light emitting unit 200a, thereby reducing the manufacturing cost of the first light emitting unit 200a and the manufacturing cost of the display panel 10.

[0156] In some embodiments, the first sub-pixel 210 includes a first electrode 211, a first light emitting layer 212 and a second electrode 213 arranged in a stack, the second sub-pixel 220 includes a third electrode 221, a second light emitting layer 222 and a fourth electrode 223 arranged in a stack, and the isolation structure 500 includes a plurality of first isolation portions 510 arranged in a space, and a first isolation opening 5001 is arranged on the first isolation portion 510. The first driving circuit 300 includes a first power signal line 310, the first isolation portion 510 is electrically connected to the first power signal line 310, and the second electrode 213 of the first sub-pixel 210 and the fourth electrode 224 of the corresponding second sub-pixel are both electrically connected to the first isolation portion 510.

[0157] The first sub-pixel 210 and the second sub-pixel 220 are conveniently provided with corresponding low-level voltage signals through the first isolation portion 510, the cathode wire is conveniently arranged, the manufacturing cost of the display panel 10 is reduced, and the first sub-pixel 210 and the second sub-pixel 220 are conveniently driven to emit light by the first driving circuit 300.

[0158] In some embodiments, the first isolation portion 510 includes a first sub-isolation portion 511 and a second sub-isolation portion 512 arranged in a space, and a first direction F1 is parallel to the radial direction of the first isolation opening 5001, and the first sub-isolation portion 511 and the second sub-isolation portion 512 are arranged in a space along the first direction F1. One of the second electrode 213 and the fourth electrode 223 is electrically connected to the first sub-isolation portion 511, and the other of the second electrode 213 and the fourth electrode 223 is electrically connected to the second sub-isolation portion 512.

[0159] The second electrode 213 can be electrically connected to the first sub-isolation portion 511, and the fourth electrode 223 can be electrically connected to the second sub-isolation portion 512; or the fourth electrode 223 can be electrically connected to the first sub-isolation portion 511, and the second electrode 213 can be electrically connected to the second sub-isolation portion 512; and the specific limitation is not made herein.

[0160] In this way, the first sub-pixel 210 and the second sub-pixel 220 of the first light emitting unit 200a can be spaced apart from the pixel material of the remaining sub-pixels by the isolation structure 500, and the plurality of first light emitting units 200a can be manufactured simultaneously. In addition, the first sub-pixel 210 and the second sub-pixel 220 can be provided with corresponding low-level voltage signals by the first isolation portion 510, and the cathode wiring is facilitated. In addition, the first sub-pixel 210 and the second sub-pixel 220 can be driven to emit light by the first driving circuit 300.

[0161] In some embodiments, the first sub-isolation portion 511 and the second sub-isolation portion 512 are connected in parallel to the first power signal line 310 (as shown in FIG. 13). Figure 4

[0162] In other embodiments, the first driving circuit 300 includes two first power signal lines 310, and the first sub-isolation portion 511 and the second sub-isolation portion 512 are respectively electrically connected to different first power signal lines 310 (as shown in FIG. 14). Figure 1 Figure 2

[0163] In this way, one of the second electrode 213 and the fourth electrode 223 is electrically connected to one of the first power signal lines 310 (VSS1) through the first sub-isolation portion 511, and the other of the second electrode 213 and the fourth electrode 223 is electrically connected to the other of the first power signal lines 310 (VSS2) through the second sub-isolation portion 512. In this way, the second electrode 213 and the fourth electrode 223 are respectively provided with corresponding low-level voltage signals through the two different first power signal lines 310, so that the first sub-pixel 210 and the second sub-pixel 220 are driven to emit light by the first driving circuit 300.

[0164] In some embodiments, the first sub-isolation portion 511 includes a first side wall surface 5111, and the second sub-isolation portion 512 includes a second side wall surface 5121 disposed opposite the first side wall surface 5111 in the first direction F1, the first direction F1 being parallel to the radial direction of the first isolation opening 5001. One of the second electrode 213 and the fourth electrode 223 is electrically connected to the first side wall surface 5111, and the other of the second electrode 213 and the fourth electrode 223 is electrically connected to the second side wall surface 5121.

[0165] ​​​In this way, one of the second electrode 213 and the fourth electrode 223 can be formed on the first side wall surface 5111 by evaporation at different evaporation angles, and the other one of the second electrode 213 and the fourth electrode 223 can be formed on the second side wall surface 5121 by evaporation at different evaporation angles, which are connected in parallel to the first power signal line 310 in combination with the first sub-isolation part 511 and the second sub-isolation part 512. In this way, the first sub-pixel 210 and the second sub-pixel 220 of the first light emitting unit 200a are facilitated to be manufactured, and the cathode wiring of the first sub-pixel 210 and the second sub-pixel 220 of the first light emitting unit 200a is facilitated, and the first sub-pixel 210 and the second sub-pixel 220 of each first light emitting unit 200a can be arranged in parallel through the corresponding first isolation part 510, so as to improve the luminous brightness and display effect of the display panel 10, and the cross voltage of the stacked light emitting device can be effectively reduced, and the service life of the first sub-pixel 210 and the second sub-pixel 220 can be improved by about 2 times, and the power consumption of the display panel 10 can be reduced.

[0166] Optionally, the first sub-pixel 210 is spaced apart from the second sub-isolation part 512, and the second sub-pixel 220 is spaced apart from the first sub-isolation part 511.

[0167] Optionally, the first light emitting layer 212 of the first sub-pixel 210 and the second light emitting layer 222 of the second sub-pixel 220 are both spaced apart from the isolation structure 500, that is, the first light emitting layer 212 of the first sub-pixel 210 and the second light emitting layer 222 of the second sub-pixel 220 are both not in contact with the isolation structure 500.

[0168] The first sub-pixel 210 can be spaced apart from the second sub-isolation part 512, and the second sub-pixel 220 can be spaced apart from the first sub-isolation part 511 by adjusting the evaporation direction (for details, refer to the manufacturing method of the display panel 10 described below), so as to facilitate the first sub-pixel 210 and the second sub-pixel 220 to be provided with corresponding low-level voltage signals, respectively.

[0169] In some embodiments, the first sub-isolation part 511 and the second sub-isolation part 512 are spaced apart along a first direction F1. The first isolation opening 5001 has a ring structure, and the first direction F1 is parallel to the radial direction of the first isolation opening 5001.

[0170] In this way, the first sub-isolation part 511 and the second sub-isolation part 512 can be spaced apart by an insulating material, and the reliability of the first sub-isolation part 511 and the second sub-isolation part 512 connected in parallel to the first power signal line 310 can be improved.

[0171] In some embodiments, the display panel 10 further comprises a pixel definition layer 600 disposed on the array substrate 100, and the isolation structure 500 is disposed on a side of the pixel definition layer 600 away from the array substrate 100. The first sub-isolation portion 511 and the second sub-isolation portion 512 are spaced apart by a partial structure of the pixel definition layer 600.

[0172] Optionally, in combination with reference to Figure 1 and Figure 5 the pixel definition layer 600 comprises a first portion 610 disposed on the array substrate 100, and a second portion 620 disposed on a side of the first portion 610 away from the array substrate 100. The second portion 620 is located between the first sub-isolation portion 511 and the second sub-isolation portion 512, i.e., the first sub-isolation portion 511 and the second sub-isolation portion 512 are spaced apart by a second portion 620.

[0173] In this way, the pixel definition layer 600 can be manufactured first, and then the isolation structure 500 is formed. In this way, the first sub-isolation portion 511 and the second sub-isolation portion 512 can be spaced apart by the second portion 620, and the first sub-isolation portion 511 and the second sub-isolation portion 512 can be respectively provided with corresponding cathode wires.

[0174] In some embodiments, the pixel definition layer 600 is provided with a first pixel opening K1 for at least partially exposing the first electrode 211. The first pixel opening K1 is in communication with the corresponding first isolation opening 5001.

[0175] Optionally, the first pixel opening K1 is in one-to-one correspondence with the first isolation opening 5001.

[0176] In this way, the pixel material in the first light emitting unit 200a, except for the first electrode 211, can be formed by evaporation through the first isolation opening 5001 and the corresponding first pixel opening K1. Due to the provision of the isolation structure 500, the expensive fine metal mask (FMM) can be abandoned, the manufacturing cost of the first light emitting unit 200a is reduced, and the manufacturing cost of the display panel 10 is further reduced.

[0177] In some embodiments, the first isolation portion 510 comprises the first sub-isolation portion 511 and the second sub-isolation portion 512 which are spaced apart from each other. The first driving circuit 300 comprises two first power signal lines 310, and the first sub-isolation portion 511 and the second sub-isolation portion 512 are connected in parallel to the same first power signal line 310. The pixel definition layer 600 is provided with a first via for exposing the first electrode 211. The first via is provided with a first via connection structure 710, and the third electrode 221 of the second sub-pixel 220 is electrically connected to the first electrode 211 of the corresponding first sub-pixel 210 through the first via connection structure 710.

[0178] In this way, on the one hand, the second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the second sub-pixel 220 can be respectively provided with corresponding low-level voltage signals through the first power signal line 310; on the other hand, the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the second sub-pixel 220 can be provided with corresponding high-level voltage signals through the second power signal line 320, so that the first sub-pixel 210 and the second sub-pixel 220 can be arranged in parallel, and the first sub-pixel 210 and the second sub-pixel 220 can be respectively driven to emit light by the first driving circuit 300.

[0179] In some other embodiments, the isolation structure 500 includes a first isolation part 510, and the first isolation part 510 is provided with a first isolation opening 5001. The first isolation part 510 includes a first sub-isolation part 511 and a second sub-isolation part 512 arranged apart from each other, and the first driving circuit 300 includes two first power signal lines 310. The first sub-isolation part 511 and the second sub-isolation part 512 are respectively electrically connected to different first power signal lines 310. The third electrode 221 of the second sub-pixel 220 is electrically connected to the first electrode 211 of the corresponding first sub-pixel 210 through the first via connection structure 710.

[0180] In this way, the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the second sub-pixel 220 can be provided with corresponding high-level voltage signals, and the second electrode 213 and the fourth electrode 223 can be respectively provided with corresponding low-level voltage signals through two different first power signal lines 310. The first sub-pixel 210 and the second sub-pixel 220 can be driven to emit light by the first driving circuit 300 at the same time, and the voltage drop of the second electrode 213 and the fourth electrode 223 can be effectively reduced.

[0181] In some other embodiments, the isolation structure 500 includes a first isolation part 510, and the first isolation part 510 is provided with a first isolation opening 5001. The first isolation part 510 includes a first sub-isolation part 511 and a second sub-isolation part 512 arranged apart from each other, and the first driving circuit 300 includes a first power signal line 310. The first sub-isolation part 511 and the second sub-isolation part 512 are connected in parallel to the first power signal line 310. The first driving circuit 300 further includes a second power signal line 320 different from the first power signal line 310 in signal. The first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the corresponding second sub-pixel 220 are connected in parallel to the second power signal line 320.

[0182] In this way, the second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the corresponding second sub-pixel 220 are connected in parallel to the first power signal line 310, and the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the corresponding second sub-pixel 220 are connected in parallel to the second power signal line 320. Compared with a single-layer sub-pixel, the luminance of the first sub-pixel 210 and the second sub-pixel 220 arranged in parallel can be increased by about 2 times, thereby effectively improving the luminance and display effect of the display panel 10. In addition, compared with the stacked sub-pixels arranged in series, the display panel 10 in the present application can effectively reduce the cross voltage of the stacked light-emitting device, and can also increase the service life of the first sub-pixel 210 and the second sub-pixel 220 by about 2 times, which is also conducive to reducing the power consumption of the display panel 10.

[0183] Optionally, referring to Figure 6 The second power signal line 320 is located below the first light-emitting unit 200a, and the display panel 10 further includes a first switching part 810 arranged in the same layer as the first electrode 211, and the first switching part 810 is electrically connected with the second power signal line 320. The pixel definition layer 600 is provided with a second via hole for exposing the first switching part 810, and the second via hole is provided with a second via hole connection structure 720, and the third electrode 221 is electrically connected with the first switching part 810 through the second via hole connection structure 720.

[0184] The first switching part 810 is arranged in the same layer as the first electrode 211, so that the first switching part 810 and the first electrode 211 can be formed in the same manufacturing process, which is conducive to reducing the manufacturing process time of the display panel 10, thereby improving the manufacturing efficiency of the display panel 10.

[0185] In some other embodiments, the isolation structure 500 includes a first isolation part 510, and the first isolation part 510 is provided with a first isolation opening 5001. The first isolation part 510 is provided with a first isolation opening 5001. Each first isolation part 510 includes a first sub-isolation part 511 and a second sub-isolation part 512 arranged apart from each other, and the first driving circuit 300 includes two first power signal lines 310, and the first sub-isolation part 511 and the second sub-isolation part 512 are respectively electrically connected to different first power signal lines 310. The first driving circuit 300 further includes a second power signal line 320 different from the first power signal line 310, and the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the corresponding second sub-pixel 220 are connected in parallel to the second power signal line 320.

[0186] Thus, the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the corresponding second sub-pixel 220 are connected in parallel to the second power signal line 320, and the second electrode 213 and the fourth electrode 223 can be respectively provided with corresponding low-level voltage signals through two different first power signal lines 310, so as to facilitate the first driving circuit 300 to drive the first sub-pixel 210 and the second sub-pixel 220 to emit light respectively.

[0187] In some embodiments, the first driving circuit 300 further comprises a first conductive line 330 capable of being electrically connected to the second power signal line 320, and the first electrode 211 of the first sub-pixel 210 is electrically connected to the first conductive line 330 through a third via connection structure 730, that is, one end of the third via connection structure 730 is electrically connected to the first electrode 211, and the other end of the third via connection structure 730 is electrically connected to the first conductive line 330.

[0188] Thus, the first electrode 211 of the first sub-pixel 210 can be wired downward through the third via connection structure 730, so as to provide the first electrode 211 of the first sub-pixel 210 with a corresponding high-level voltage signal through the corresponding first driving circuit 300.

[0189] In the present embodiment, the first driving circuit 300 further comprises a second conductive line 340, and the first conductive line 330 and the second conductive line 340 are capable of being connected in parallel to the second power signal line 320, and the third electrode 221 of the second sub-pixel 220 is electrically connected to the second conductive line 340 through a fourth via connection structure 740, that is, one end of the fourth via connection structure 740 is electrically connected to the third electrode 221, and the other end of the third via connection structure 730 is electrically connected to the second conductive line 340.

[0190] Thus, the third electrode 221 of the second sub-pixel 220 can be wired downward through the second via connection structure 720 and the fourth via connection structure 740, so as to provide the third electrode 221 of the corresponding second sub-pixel 220 with a corresponding high-level voltage signal.

[0191] In some embodiments, the first sub-isolation part 511 and the second sub-isolation part 512 are connected in parallel to the first power signal line 310.

[0192] The first sub-isolation part 511 is electrically connected with the second electrode 213 of the first sub-pixel 210, and the second sub-isolation part 512 is electrically connected with the fourth electrode 223 of the second sub-pixel 220. For example, the first driving circuit 300 further includes a third conductive wire 350 and a fourth conductive wire 360. The first sub-isolation part 511 is electrically connected with the third conductive wire 350 through a fifth via connection structure 750, and the second sub-isolation part 512 is electrically connected with the fourth conductive wire 360 through a sixth via connection structure 760 (that is, one end of the fifth via connection structure 750 is electrically connected with the first sub-isolation part 511, the other end of the fifth via connection structure 750 is electrically connected with the third conductive wire 350, one end of the sixth via connection structure 760 is electrically connected with the second sub-isolation part 512, and the other end of the sixth via connection structure 760 is electrically connected with the fourth conductive wire 360). The third conductive wire 350 and the fourth conductive wire 360 are connected in parallel to the same first power signal line 310.

[0193] In this way, the corresponding low-level voltage signals can be conveniently provided for the second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the second sub-pixel 220, and the first sub-pixel 210 and the second sub-pixel 220 can be conveniently driven to emit light, so that the luminance and display effect of the display panel 10 can be improved, and the cross voltage of the stacked light-emitting device can be effectively reduced.

[0194] In some other embodiments, the first sub-isolation part 511 and the second sub-isolation part 512 are electrically connected to different first power signal lines 310, respectively.

[0195] The first sub-isolation part 511 is electrically connected with the second electrode 213 of the first sub-pixel 210, and the second sub-isolation part 512 is electrically connected with the fourth electrode 223 of the second sub-pixel 220. For example, the first driving circuit 300 further includes a third conductive wire 350 and a fourth conductive wire 360. The first sub-isolation part 511 is electrically connected with the third conductive wire 350 through a fifth via connection structure 750, and the second sub-isolation part 512 is electrically connected with the fourth conductive wire 360 through a sixth via connection structure 760 (that is, one end of the fifth via connection structure 750 is electrically connected with the first sub-isolation part 511, the other end of the fifth via connection structure 750 is electrically connected with the third conductive wire 350, one end of the sixth via connection structure 760 is electrically connected with the second sub-isolation part 512, and the other end of the sixth via connection structure 760 is electrically connected with the fourth conductive wire 360). The third conductive wire 350 and the fourth conductive wire 360 are connected in parallel to the same first power signal line 310.

[0196] In this way, the corresponding low-level voltage signals can be conveniently provided for the second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the second sub-pixel 220, and the first sub-pixel 210 and the second sub-pixel 220 can be conveniently driven to emit light, so that the luminance and display effect of the display panel 10 can be improved, and the cross voltage of the stacked light-emitting device can be effectively reduced.

[0197] In some embodiments, the first conductive line 330 and the second conductive line 340 are connected in parallel to form a parallel circuit, and the parallel circuit is electrically connected to the second power signal line 320 through at least one transistor.

[0198] The first driving circuit 300 can be a 3T1C circuit, a 5T1C circuit or a 7T1C circuit, which is equivalent to arranging the first sub-pixel 210 and the second sub-pixel 220 in parallel on the basis of the existing 3T1C circuit, 5T1C circuit or 7T1C circuit.

[0199] Taking the first driving circuit 300 as a 7T1C circuit as an example, the first driving circuit 300 includes seven transistors and one capacitor C, and the seven transistors are respectively a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6 and a seventh transistor M7.

[0200] The parallel circuit formed by the first conductive line 330 and the second conductive line 340 is connected in parallel to the second power signal line 320 through the first transistor M1, the second transistor M2 and the third transistor M3.

[0201] In this way, whether the second power signal line 320 provides the corresponding high-level voltage signal (VDD) to the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the second sub-pixel 220 can be controlled through at least one transistor, and then the first sub-pixel 210 and the second sub-pixel 220 of the first light-emitting unit 200a can be made to emit light at the same time, thereby being conducive to improving the luminous brightness and display effect of the display panel 10, and also effectively reducing the cross voltage of the stacked light-emitting device.

[0202] The working principles of the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7 and the capacitor C can be understood with reference to the existing 7T1C circuit, and will not be described in detail here.

[0203] In some other embodiments, the isolation structure 500 includes a first isolation part 510 electrically connected to the first power signal line 310, and the first isolation part 510 is provided with a first isolation opening 5001, and the second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the corresponding second sub-pixel 220 are connected in parallel to the same first isolation part 510.

[0204] Specifically, the first driving circuit 300 includes the first power signal line 310 and the second power signal line 320 which are different in signal, and the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the corresponding second sub-pixel 220 are connected in parallel to the second power signal line 320.

[0205] In this way, on the one hand, the wiring of the cathode can be realized through the same first isolation portion 510, and the first power supply signal line 310 can be used to provide the corresponding low-level voltage signal (VSS) to the second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the corresponding second sub-pixel 220; on the other hand, the first driving circuit 300 can be used to provide the corresponding high-level voltage signal (VDD) to the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the second sub-pixel 220, respectively, so as to drive the first sub-pixel 210 and the second sub-pixel 220 of the first light-emitting unit 200a to emit light at the same time, thereby facilitating the improvement of the luminous brightness and display effect of the display panel 10, and effectively reducing the cross voltage of the stacked light-emitting device.

[0206] In the embodiment, the second power supply signal line 320 is located below the first light-emitting unit 200a, and the display panel 10 further includes a first switching portion 810 disposed in the same layer as the first electrode 211, and the first switching portion 810 is electrically connected with the second power supply signal line 320. The pixel definition layer 600 is provided with a second via hole for exposing the first switching portion 810, and the second via hole is provided with a second via hole connection structure 720, and the third electrode 221 is electrically connected with the first switching portion 810 through the second via hole connection structure 720.

[0207] In the embodiment, the display panel 10 includes a plurality of first light-emitting units 200a, and the isolation structure 500 includes a plurality of first isolation portions 510 corresponding to the plurality of first light-emitting units 200a, and each first isolation portion 510 is provided with a first isolation opening 5001.

[0208] Optionally, the first isolation portion 510 corresponds to the first light-emitting unit 200a one by one.

[0209] In some embodiments, the display panel 10 further includes a second light-emitting unit 200b, and the second light-emitting unit 200b includes a third sub-pixel 230 and a fourth sub-pixel 240, and the third sub-pixel 230 and the fourth sub-pixel 240 are stacked on the array substrate 100 in a direction away from the array substrate 100. The array substrate 100 further includes a second driving circuit 301, and the third sub-pixel 230 and the fourth sub-pixel 240 are electrically connected to the second driving circuit 301, and the second driving circuit 301 is used to drive the third sub-pixel 230 and the fourth sub-pixel 240 to emit light, respectively.

[0210] Optionally, the third sub-pixel 230 and the corresponding fourth sub-pixel 240 have the same color of light emission.

[0211] Optionally, the third sub-pixel 230 and the corresponding fourth sub-pixel 240 are arranged apart from each other.

[0212] Optionally, the third sub-pixel 230 and the fourth sub-pixel 240 are connected in parallel to the second driving circuit 301.

[0213] Optionally, the second light-emitting unit 200b has a different light-emitting color from the first light-emitting unit 200a.

[0214] Since the third sub-pixel 230 and the fourth sub-pixel 240 have the same light-emitting color, and the third sub-pixel 230 and the fourth sub-pixel 240 are connected in parallel to the second driving circuit 301, the second driving circuit 301 is used to drive the third sub-pixel 230 and the fourth sub-pixel 240 to emit light, respectively. Thus, in the case that the overall light-emitting brightness of the third sub-pixel 230 and the fourth sub-pixel 240 is unchanged, compared with the stacked sub-pixels arranged in series, the current density of the third sub-pixel 230 and the fourth sub-pixel 240 arranged in the stack in the present application is halved, respectively, and the third sub-pixel 230 and the fourth sub-pixel 240 are driven to emit light in a double driving mode, which can effectively reduce the cross voltage of the stacked light-emitting device, and can also improve the life of the third sub-pixel 230 and the fourth sub-pixel 240 by about 2 times, and is also conducive to reducing the power consumption of the display panel 10. In other words, under the same driving voltage, compared with the single-layer sub-pixel, the brightness of the third sub-pixel 230 and the fourth sub-pixel 240 arranged in parallel in the display panel 10 in the present application can be improved by about 2 times, and thus the light-emitting brightness and display effect of the display panel 10 can be effectively improved.

[0215] In some embodiments, the third sub-pixel 230 includes a fifth electrode 231, a third light-emitting layer 232, and a sixth electrode 233 arranged in a stack, and the fourth sub-pixel 240 includes a seventh electrode 241, a fourth light-emitting layer 242, and an eighth electrode 243 arranged in a stack. The second driving circuit 301 includes a third power signal line (not shown in the figure, which can be understood in correspondence with the first driving circuit 300) and a fourth power signal line (not shown in the figure, which can be understood in correspondence with the first driving circuit 300) having different signals, the sixth electrode 233 of the third sub-pixel 230 and the eighth electrode 243 of the corresponding fourth sub-pixel 240 are connected in parallel to the third power signal line; and / or, the fifth electrode 231 of the third sub-pixel 230 and the seventh electrode 241 of the corresponding fourth sub-pixel 240 are connected in parallel to the fourth power signal line.

[0216] Optionally, the third power signal line is a VSS signal line, and the fourth power signal line is a VDD signal line.

[0217] The circuit structure of the second driving circuit 301 is similar to that of the first driving circuit 300, which will not be described here. The electrical connection relationship between the second driving circuit 301 and the second light-emitting unit 200b is also correspondingly arranged, which will not be described here.

[0218] In the case that the overall luminous brightness formed by the third sub-pixel 230 and the fourth sub-pixel 240 is unchanged, compared with the stacked sub-pixels arranged in series, the current density of the third sub-pixel 230 and the fourth sub-pixel 240 arranged in the application is halved, and the third sub-pixel 230 and the fourth sub-pixel 240 are driven in a double-drive manner to emit light, which can effectively reduce the cross voltage of the stacked light-emitting device, and can also improve the service life of the third sub-pixel 230 and the fourth sub-pixel 240 by about 2 times, and is also conducive to reducing the power consumption of the display panel 10. In other words, under the same driving voltage, compared with the single-layer sub-pixel, the brightness of the third sub-pixel 230 and the fourth sub-pixel 240 arranged in parallel in the display panel 10 in the application can be improved by about 2 times, thereby effectively improving the luminous brightness and display effect of the display panel 10.

[0219] Optionally, the sixth electrode 233, the seventh electrode 241, and the eighth electrode 243 each comprise a transparent conductive material.

[0220] Since the sixth electrode 233, the seventh electrode 241, and the eighth electrode 243 are arranged on the side of the third light-emitting layer 232 away from the array substrate 100, the sixth electrode 233, the seventh electrode 241, and the eighth electrode 243 are arranged as transparent conductive materials, which can improve the transmittance of the display panel 10 and improve the display effect of the display panel 10.

[0221] Optionally, a second insulating layer 420 is arranged between the third sub-pixel 230 and the corresponding fourth sub-pixel 240, and the material of the second insulating layer 420 comprises a light-transmitting material.

[0222] The material of the second insulating layer 420 can be the same as the material of the light extraction layer (CPL), such as triarylamine, cyclic urea, acyl structure, diphenyl thiophene, diphenyl furan, or carbazole.

[0223] In this way, the third sub-pixel 230 and the corresponding fourth sub-pixel 240 are spaced apart by the second insulating layer 420, which improves the reliability of the parallel arrangement of the third sub-pixel 230 and the corresponding fourth sub-pixel 240, and is also conducive to improving the transmittance of the display panel 10, thereby improving the display effect of the display panel 10.

[0224] In some embodiments, the display panel 10 further comprises a third light emitting unit 200c, the third light emitting unit 200c comprises a fifth sub-pixel 250 and a sixth sub-pixel 260, the fifth sub-pixel 250 and the sixth sub-pixel 260 are arranged on the array substrate 100 in a direction away from the array substrate 100 and are spaced apart from each other. Wherein, the array substrate 100 further comprises a third driving circuit 302, the fifth sub-pixel 250 and the sixth sub-pixel 260 are electrically connected to the third driving circuit 302, and the third driving circuit 302 is used for driving the fifth sub-pixel 250 and the sixth sub-pixel 260 to emit light respectively.

[0225] Optionally, the fifth sub-pixel 250 and the corresponding sixth sub-pixel 260 have the same light emitting color.

[0226] Optionally, the fifth sub-pixel 250 and the corresponding sixth sub-pixel 260 are arranged in a direction away from the array substrate 100.

[0227] Optionally, the fifth sub-pixel 250 and the sixth sub-pixel 260 are connected in parallel to the third driving circuit 302.

[0228] Optionally, the third light emitting unit 200c has a different light emitting color from the first light emitting unit 200a.

[0229] Since the fifth sub-pixel 250 and the sixth sub-pixel 260 have the same light emitting color, and the fifth sub-pixel 250 and the sixth sub-pixel 260 are connected in parallel to the third driving circuit 302, the third driving circuit 302 is used for driving the fifth sub-pixel 250 and the sixth sub-pixel 260 to emit light respectively, so that in the case that the overall light emitting brightness formed by the fifth sub-pixel 250 and the sixth sub-pixel 260 does not change, compared with the series-arranged stacked sub-pixels, the current density of the fifth sub-pixel 250 and the sixth sub-pixel 260 arranged in a stacked manner in the present application is halved respectively, and the fifth sub-pixel 250 and the sixth sub-pixel 260 are driven in a double driving manner to emit light, which can effectively reduce the cross voltage of the stacked light emitting device, and also can improve the service life of the fifth sub-pixel 250 and the sixth sub-pixel 260 by about 2 times, and is also beneficial to reduce the power consumption of the display panel 10. In other words, under the same driving voltage, compared with the single-layer sub-pixel, the brightness of the fifth sub-pixel 250 and the sixth sub-pixel 260 arranged in parallel in the display panel 10 of the present application can be improved by about 2 times, thereby effectively improving the light emitting brightness and display effect of the display panel 10.

[0230] In some embodiments, the fifth sub-pixel 250 includes a ninth electrode 251, a fifth light-emitting layer 252 and a tenth electrode 253 which are arranged in a stack, the sixth sub-pixel 260 includes an eleventh electrode 261, a sixth light-emitting layer 262 and a twelfth electrode 263 which are arranged in a stack, the third driving circuit 302 includes a fifth power signal line (not shown in the figure, which can be understood in correspondence with the first driving circuit 300) and a sixth power signal line (not shown in the figure, which can be understood in correspondence with the first driving circuit 300) which are different in signal, and the tenth electrode 253 of the fifth sub-pixel 250 and the twelfth electrode 263 of the corresponding sixth sub-pixel 260 are connected in parallel to the fifth power signal line; and / or, the ninth electrode 251 of the fifth sub-pixel 250 and the eleventh electrode 261 of the corresponding sixth sub-pixel 260 are connected in parallel to the sixth power signal line.

[0231] Optionally, the fifth power signal line is a VSS signal line, and the sixth power signal line is a VDD signal line.

[0232] The circuit structure of the third driving circuit 302 is similar to that of the first driving circuit 300, and will not be described here. The electrical connection relationship between the third driving circuit 302 and the third light-emitting unit 200c is also correspondingly arranged, and will not be described here.

[0233] In the case that the overall light-emitting brightness of the fifth sub-pixel 250 and the sixth sub-pixel 260 is unchanged, compared with the stacked sub-pixel arranged in series, the current density of the fifth sub-pixel 250 and the sixth sub-pixel 260 arranged in a stack in the present application is halved respectively, and the fifth sub-pixel 250 and the sixth sub-pixel 260 are driven in a double-drive manner to emit light, which can effectively reduce the cross voltage of the stacked light-emitting device, and also can make the service life of the fifth sub-pixel 250 and the sixth sub-pixel 260 be improved by about 2 times, and is also beneficial to reduce the power consumption of the display panel 10. In other words, under the same driving voltage, compared with the single-layer sub-pixel, the brightness of the fifth sub-pixel 250 and the sixth sub-pixel 260 arranged in parallel in the display panel 10 in the present application can be improved by about 2 times, and thus the light-emitting brightness and display effect of the display panel 10 can be effectively improved.

[0234] Optionally, the tenth electrode 253, the eleventh electrode 261 and the twelfth electrode 263 each include a transparent conductive material.

[0235] Since the tenth electrode 253, the eleventh electrode 261 and the twelfth electrode 263 are each arranged on the side of the fifth light-emitting layer 252 away from the array substrate 100, the tenth electrode 253, the eleventh electrode 261 and the twelfth electrode 263 are arranged as a transparent conductive material, which can improve the transmittance of the display panel 10 and also can improve the display effect of the display panel 10.

[0236] Optionally, a third insulating layer 430 is arranged between the fifth sub-pixel 250 and the corresponding sixth sub-pixel 260, and the material of the third insulating layer 430 comprises a light-transmitting material.

[0237] The material of the third insulating layer 430 can be the same as the material of the light extraction layer (CPL), such as triarylamine, cyclic urea, acyl structure, dibenzothiophene, dibenzofuran, or carbazole.

[0238] In this way, the fifth sub-pixel 250 and the corresponding sixth sub-pixel 260 are spaced apart by the third insulating layer 430, which improves the reliability of the parallel arrangement of the fifth sub-pixel 250 and the corresponding sixth sub-pixel 260, and is also conducive to improving the transmittance of the display panel 10, thereby improving the display effect of the display panel 10.

[0239] In some embodiments, the light-emitting colors of the first light-emitting unit 200a, the second light-emitting unit 200b, and the third light-emitting unit 200c are different from each other.

[0240] Optionally, the light-emitting color of the first light-emitting unit 200a is one of red, blue, and green, the light-emitting color of the second light-emitting unit 200b is another of red, blue, and green, and the light-emitting color of the third light-emitting unit 200c is still another of red, blue, and green. For example, the light-emitting color of the first light-emitting unit 200a is red, the light-emitting color of the second light-emitting unit 200b is green, and the light-emitting color of the third light-emitting unit 200c is blue.

[0241] In this way, the first light-emitting unit 200a, the second light-emitting unit 200b, and the third light-emitting unit 200c can realize color display.

[0242] In some embodiments, the display panel 10 comprises a plurality of second light-emitting units 200b, and the isolation structure 500 comprises a plurality of second isolation portions 520 corresponding to the plurality of second light-emitting units 200b, and each second isolation portion 520 is provided with a second isolation opening 5002.

[0243] Optionally, the second isolation portion 520 corresponds to the second light-emitting unit 200b one by one.

[0244] Optionally, the structure of the second isolation portion 520 is the same as that of the first isolation portion 510, and the second isolation portion 520 also comprises a first sub-isolation portion 511 and a second sub-isolation portion 512 arranged at intervals, which will not be described here.

[0245] Thus, the third sub-pixel 230 and the fourth sub-pixel 240 of the second light emitting unit 200b can be spaced apart from the pixel material of the remaining sub-pixels by the second isolation portion 520, and the expensive fine metal mask (FMM) can be abandoned in the process of forming the second light emitting unit 200b, the manufacturing cost of the second light emitting unit 200b is reduced, and the manufacturing cost of the display panel 10 is further reduced.

[0246] In some embodiments, the pixel definition layer 600 is provided with a plurality of second pixel openings K2 for at least partially exposing the fifth electrode 231, and the second pixel openings K2 are in communication with the corresponding second isolation openings 5002.

[0247] Optionally, the second pixel openings K2 are in one-to-one correspondence with the second isolation openings 5002.

[0248] Thus, the pixel material of the second light emitting unit 200b except the fifth electrode 231 can be formed by evaporation through the second isolation openings 5002 and the corresponding second pixel openings K2, and due to the provision of the second isolation portion 520, the expensive fine metal mask (FMM) can be abandoned, the manufacturing cost of the second light emitting unit 200b is reduced, and the manufacturing cost of the display panel 10 is further reduced.

[0249] In some embodiments, the display panel 10 includes a plurality of third light emitting units 200c, and the isolation structure 500 includes a plurality of third isolation portions 530 corresponding to the plurality of third light emitting units 200c, and each third isolation portion 530 is provided with a third isolation opening 5003.

[0250] Optionally, the third isolation portion 530 is in one-to-one correspondence with the third light emitting unit 200c.

[0251] Optionally, the structure of the third isolation portion 530 is the same as that of the first isolation portion 510, and the third isolation portion 530 also includes the first sub-isolation portion 511 and the second sub-isolation portion 512 arranged at intervals, which will not be described here.

[0252] Thus, the fifth sub-pixel 250 and the sixth sub-pixel 260 of the third light emitting unit 200c can be spaced apart from the pixel material of the remaining sub-pixels by the third isolation portion 530, and the expensive fine metal mask (FMM) can be abandoned in the process of forming the third light emitting unit 200c, the manufacturing cost of the third light emitting unit 200c is reduced, and the manufacturing cost of the display panel 10 is further reduced.

[0253] In some embodiments, the pixel definition layer 600 is provided with a plurality of third pixel openings K3 for at least partially exposing the ninth electrode 251, and the third pixel openings K3 are in communication with the corresponding third isolation openings 5003.

[0254] Optionally, the third pixel opening K3 is in one-to-one correspondence with the third isolation opening 5003.

[0255] In this way, the pixel material in the third light emitting unit 200c except for the ninth electrode 251 can be formed by evaporation through the third isolation opening 5003 and the corresponding third pixel opening K3, and due to the arrangement of the third isolation portion 530, the expensive fine metal mask (FMM) can be abandoned, the manufacturing cost of the third light emitting unit 200c is reduced, and the manufacturing cost of the display panel 10 is further reduced.

[0256] In some embodiments, the pixel definition layer 600 further comprises a plurality of third portions 630 arranged on the side of the first portion 610 away from the array substrate 100, and the third portion 630 is connected to the adjacent second portion 620. Two adjacent ones of the first isolation portion 510, the second isolation portion 520 and the third isolation portion 530 are arranged with a third portion 630 therebetween.

[0257] In this way, the first light emitting unit 200a, the second light emitting unit 200b and the third light emitting unit 200c can be driven to emit light respectively.

[0258] In some embodiments, the outer contour of the top surface of the isolation structure 500 on the array substrate 100 is located at the periphery of the outer contour of the bottom surface of the isolation structure 500 on the array substrate 100.

[0259] Specifically, the isolation structure 500 further comprises a blocking portion 540 arranged on the side of the first isolation portion 510 away from the array substrate 100; the outer contour of the blocking portion 540 on the array substrate 100 is located at the periphery of the outer contour of the corresponding first sub-isolation portion 511 or the corresponding second sub-isolation portion 512 on the array substrate 100.

[0260] In this way, when the display panel 10 is manufactured, the isolation structure 500 can better isolate the pixel material corresponding to the two adjacent ones of the first light emitting unit 200a, the second light emitting unit 200b and the third light emitting unit 200c, and due to the relatively wide width of the blocking portion 540, the resistance of the isolation structure 500 can be reduced, the difference in voltage drop at different positions can be improved, and at the same time, the packaging unit capable of independently packaging the first light emitting unit 200a, the second light emitting unit 200b and the third light emitting unit 200c can be formed.

[0261] It should be noted that the plurality of first sub-pixels 210, the plurality of third sub-pixels 230 and the plurality of fifth sub-pixels 250 are located on the same layer and constitute a first pixel layer, and the pixel materials corresponding to any two adjacent ones of the first sub-pixels 210, the third sub-pixels 230 and the fifth sub-pixels 250 are spaced apart by the isolation structure 500. The plurality of second sub-pixels 220, the plurality of fourth sub-pixels 240 and the plurality of sixth sub-pixels 260 are located on the same layer and constitute a second pixel layer, and the pixel materials corresponding to any two adjacent ones of the second sub-pixels 220, the fourth sub-pixels 240 and the sixth sub-pixels 260 are spaced apart by the isolation structure 500.

[0262] In some embodiments, referring to Figure 7 and Figure 8 , the display panel 10 further comprises a first encapsulation layer 910, the first encapsulation layer 910 comprising a plurality of first encapsulation units 911 corresponding to the plurality of first isolation openings 5001, a plurality of second encapsulation units 912 corresponding to the plurality of second isolation openings 5002, and a plurality of third encapsulation units 913 corresponding to the plurality of third isolation openings 5003. The first encapsulation units 911 are arranged in the corresponding first isolation openings 5001 and cover the first light-emitting units 200a, the second encapsulation units 912 are arranged in the corresponding second isolation openings 5002 and cover the second light-emitting units 200b, and the third encapsulation units 913 are arranged in the corresponding third isolation openings 5003 and cover the third light-emitting units 200c.

[0263] In this way, the first light-emitting units 200a, the second light-emitting units 200b and the third light-emitting units 200c can be independently encapsulated, respectively, to prevent the invasion of water vapor, thereby improving the display effect of the display panel 10.

[0264] In some embodiments, referring to Figure 7 and Figure 8 , the display panel 10 further comprises a second encapsulation layer 920 and a third encapsulation layer 930 which are arranged on the first encapsulation layer 910 in a stacked manner.

[0265] One of the second encapsulation layer 920 and the third encapsulation layer 930 comprises an organic material, and the other of the second encapsulation layer 920 and the third encapsulation layer 930 comprises an inorganic material.

[0266] The second encapsulation layer 920 and the third encapsulation layer 930 in combination with the first encapsulation layer 910 have the effect of multiple encapsulation on the first light-emitting units 200a, the second light-emitting units 200b and the third light-emitting units 200c, thereby improving the water vapor blocking capability and the reliability of the display panel 10.

[0267] According to a second aspect of the present application, a display panel 10 is provided, comprising an array substrate 100, a plurality of first light emitting units 200a and a separation structure 500.

[0268] The at least one first light emitting unit 200a comprises a first sub-pixel 210 and a second sub-pixel 220, which are arranged in a stacked manner on the array substrate 100 in a direction away from the array substrate 100. The separation structure 500 is provided with a first separation opening 5001 corresponding to the first light emitting unit 200a, and the first sub-pixel 210 and the corresponding second sub-pixel 220 are arranged in a stacked manner in the corresponding same first separation opening 5001.

[0269] The first sub-pixel 210 comprises a first electrode 211, a first light emitting layer 212 and a second electrode 213 arranged in a stacked manner, and the second sub-pixel 220 comprises a third electrode 221, a second light emitting layer 222 and a fourth electrode 223 arranged in a stacked manner. The second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the corresponding second sub-pixel 220 are electrically connected to the separation structure 500.

[0270] In this way, on the one hand, the first sub-pixel 210 and the second sub-pixel 220 of the first light emitting unit 200a can be separated from the pixel materials of the remaining sub-pixels through the separation structure 500, and the expensive fine metal mask (FMM) can be abandoned in the process of forming the first light emitting unit 200a, thereby reducing the manufacturing cost of the first light emitting unit 200a and further reducing the manufacturing cost of the display panel 10. On the other hand, it is convenient to provide the first sub-pixel 210 and the second sub-pixel 220 arranged in a stacked manner with corresponding low-level voltage signals through the separation structure 500. In addition, the brightness of the first sub-pixel 210 and the second sub-pixel 220 stacked together can be increased by about 2 times, thereby effectively improving the light emitting brightness and display effect of the display panel 10.

[0271] Optionally, the display panel 10 further comprises a second light emitting unit 200b and a third light emitting unit 200c, and the specific structure of the second light emitting unit 200b and the third light emitting unit 200c is the same as that in the above-mentioned first aspect, which will not be described here.

[0272] Optionally, the display panel 10 comprises a plurality of first light emitting units 200a, and the separation structure 500 comprises a plurality of first separation portions 510 corresponding to the plurality of first light emitting units 200a, and each first separation portion 510 is provided with a first separation opening 5001. The second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the corresponding second sub-pixel 220 are electrically connected to the same first separation portion 510.

[0273] Optionally, the display panel 10 includes a plurality of second light emitting units 200b, and the isolation structure 500 includes a plurality of second isolation portions 520 corresponding to the plurality of second light emitting units 200b, each of the second isolation portions 520 is provided with a second isolation opening 5002.

[0274] Optionally, the display panel 10 includes a plurality of third light emitting units 200c, and the isolation structure 500 includes a plurality of third isolation portions 530 corresponding to the plurality of third light emitting units 200c, each of the third isolation portions 530 is provided with a third isolation opening 5003.

[0275] In some embodiments, each of the first isolation portions 510 includes a first sub-isolation portion 511 and a second sub-isolation portion 512 arranged apart from each other, the array substrate 100 includes a first power signal line 310, and the first sub-isolation portion 511 and the second sub-isolation portion 512 are connected in parallel to the first power signal line 310. One of the second electrode 213 and the fourth electrode 223 is electrically connected to the first sub-isolation portion 511, and the other of the second electrode 213 and the fourth electrode 223 is electrically connected to the second sub-isolation portion 512.

[0276] Optionally, the first power signal line 310 is a VSS signal line.

[0277] In this way, the isolation structure 500 can be used to separate the first sub-pixel 210 and the second sub-pixel 220 of the first light emitting unit 200a from the pixel materials of the remaining sub-pixels, while facilitating the manufacture of a plurality of first light emitting units 200a. In addition, the first sub-pixel 210 and the second sub-pixel 220 of each first light emitting unit 200a can be arranged in parallel through the corresponding first isolation portion 510, which facilitates the cathode wiring and also reduces the manufacturing cost of the display panel 10.

[0278] In other embodiments, each of the first isolation portions 510 includes a first sub-isolation portion 511 and a second sub-isolation portion 512 arranged apart from each other, the array substrate 100 includes a first power signal line 310, and the array substrate 100 is provided with a plurality of first power signal lines 310. The first sub-isolation portion 511 and the second sub-isolation portion 512 are respectively electrically connected to different first power signal lines 310. One of the second electrode 213 and the fourth electrode 223 is electrically connected to the first sub-isolation portion 511, and the other of the second electrode 213 and the fourth electrode 223 is electrically connected to the second sub-isolation portion 512.

[0279] In this way, the second electrode 213 of the first sub-pixel 210 and the fourth electrode 223 of the second sub-pixel 220 can be respectively provided with corresponding low-level voltage signals (VSS1 and VSS2 respectively), so as to facilitate driving the first sub-pixel 210 and the second sub-pixel 220 to emit light respectively, thereby improving the luminance and display effect of the display panel 10, and effectively reducing the cross voltage of the stacked light-emitting device.

[0280] Optionally, the first power signal line 310 is a VSS signal line.

[0281] In some embodiments, the first electrode 211 of the first sub-pixel 210 is electrically connected to the third electrode 221 of the corresponding second sub-pixel 220 through the first via connection structure 710.

[0282] In this way, the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the second sub-pixel 220 can be provided with corresponding high-level voltage signals through the second power signal line 320.

[0283] In some embodiments, the array substrate 100 further includes a second power signal line 320 different from the first power signal line 310, and the first electrode 211 of the first sub-pixel 210 and the third electrode 221 of the corresponding second sub-pixel 220 are connected in parallel to the second power signal line 320.

[0284] Optionally, the second power signal line 320 is a VDD signal line.

[0285] Compared with a single-layer sub-pixel, the luminance of the first sub-pixel 210 and the second sub-pixel 220 arranged in parallel can be increased by about 2 times, thereby effectively improving the luminance and display effect of the display panel 10. In addition, compared with the stacked sub-pixels arranged in series, the display panel 10 in the present application can effectively reduce the cross voltage of the stacked light-emitting device, and the service life of the first sub-pixel 210 and the second sub-pixel 220 can be increased by about 2 times, which is also conducive to reducing the power consumption of the display panel 10.

[0286] Optionally, the display panel 10 further includes a first adapter 810 electrically connected to the second power signal line 320, the first adapter 810 is electrically connected to the third electrode 221 through the second via connection structure 720, and the first adapter 810 is arranged in the same layer as the first electrode 211.

[0287] The first adapter 810 is arranged in the same layer as the first electrode 211, so that the first adapter 810 and the first electrode 211 can be formed in the same manufacturing process, which is conducive to reducing the manufacturing process time of the display panel 10, thereby improving the manufacturing efficiency of the display panel 10.

[0288] The array substrate 100 further has a second driving circuit 301, which has a circuit structure similar to that of the first driving circuit 300 and will not be described here. The second driving circuit 301 is also correspondingly provided in an electrically connected relationship with the second light-emitting unit 200b, which will not be described here.

[0289] The array substrate 100 further has a third driving circuit 302, which has a circuit structure similar to that of the first driving circuit 300 and will not be described here. The third driving circuit 302 is also correspondingly provided in an electrically connected relationship with the third light-emitting unit 200c, which will not be described here.

[0290] Referring to Figure 9 According to a third aspect of the present application, a display device 1 is provided, which comprises the display panel 10 of any of the above embodiments.

[0291] In this way, the light-emitting brightness and display effect of the display device can be effectively improved, and the cross voltage of the stacked light-emitting device can be effectively reduced.

[0292] Referring to Figure 5 and Figure 10 According to a fourth aspect of the present application, a manufacturing method of a display panel 10 is provided, which comprises the following steps:

[0293] S10, providing an array substrate 100.

[0294] S20, forming a pixel definition layer 600 on the array substrate 100, the pixel definition layer 600 being provided with a pixel opening K. For example, the pixel opening K can be a first pixel opening K1, a second pixel opening K2, or a third pixel opening K3.

[0295] S30, forming a first sub-isolation portion 511 and a second sub-isolation portion 512 on a side of the pixel definition layer 600 away from the array substrate 100, the first sub-isolation portion 511 and the second sub-isolation portion 512 being arranged apart from each other and surrounding a separation opening 500a in communication with the pixel opening K. The separation opening 500a can be a first separation opening 5001, a second separation opening 5002, or a third separation opening 5003.

[0296] S40, forming a light-emitting unit on the array substrate 100, the light-emitting unit being located within the pixel opening K and the separation opening 500a.

[0297] The light-emitting unit comprises two sub-pixels stacked in a direction away from the array substrate 100, one of the two sub-pixels being electrically connected to the first sub-isolation portion 511, and the other sub-pixel being electrically connected to the second sub-isolation portion 512.

[0298] The light emitting unit can be the first light emitting unit 200a, the two sub-pixels can be the first sub-pixel 210 and the second sub-pixel 220 respectively, and the pixel opening can be the first pixel opening and the isolation opening can be the first isolation opening. The first sub-pixel 210 includes the first electrode 211, the first light emitting layer 212 and the second electrode 213 which are stacked, the second sub-pixel 220 includes the third electrode 221, the second light emitting layer 222 and the fourth electrode 223 which are stacked, one of the second electrode 213 and the fourth electrode 223 is electrically connected to the first sub-isolation part 511, and the other of the second electrode 213 and the fourth electrode 223 is electrically connected to the second sub-isolation part 512.

[0299] The light emitting unit can also be the second light emitting unit 200b, the two sub-pixels can be the third sub-pixel 230 and the fourth sub-pixel 240 respectively, the third sub-pixel 230 includes the fifth electrode 231, the third light emitting layer 232 and the sixth electrode 233 which are stacked, the fourth sub-pixel 240 includes the seventh electrode 241, the fourth light emitting layer 242 and the eighth electrode 243 which are stacked, one of the sixth electrode 233 and the eighth electrode 243 is electrically connected to the first sub-isolation part 511, and the other of the sixth electrode 233 and the eighth electrode 243 is electrically connected to the second sub-isolation part 512.

[0300] The light emitting unit can also be the third light emitting unit 200c, the two sub-pixels can be the fifth sub-pixel 250 and the sixth sub-pixel 260 respectively, the fifth sub-pixel 250 includes the ninth electrode 251, the fifth light emitting layer 252 and the tenth electrode 253 which are stacked, the sixth sub-pixel 260 includes the eleventh electrode 261, the sixth light emitting layer 262 and the twelfth electrode 263 which are stacked, one of the tenth electrode 253 and the twelfth electrode 263 is electrically connected to the first sub-isolation part 511, and the other of the tenth electrode 253 and the twelfth electrode 263 is electrically connected to the second sub-isolation part 512.

[0301] In this way, the first sub-isolation part 511 and the second sub-isolation part 512 which are arranged at intervals can respectively provide the two sub-pixels which are stacked with corresponding low-level voltage signals, and the two sub-pixels which are stacked can be driven in a double-drive manner, the cross voltage of the stacked light emitting device can be effectively reduced, the service life of the two sub-pixels can be increased by about 2 times, and the power consumption of the display panel 10 can be reduced. In other words, under the same driving voltage, compared with a single-layer sub-pixel, the brightness of the two sub-pixels which are stacked in the display panel 10 can be increased by about 2 times, and the luminous brightness and display effect of the display panel 10 can be effectively improved.

[0302] The following describes the specific forming process of the display panel 10 at the region where the first light emitting unit 200a is located, taking the first light emitting unit 200a as an example.

[0303] The manufacturing method of the display panel 10 includes the following steps.

[0304] S100, providing an array substrate 100, and the array substrate 100 is provided with a plurality of first electrodes 211 arranged at intervals.

[0305] S200, forming a pixel definition layer 600 on the array substrate 100, and the pixel definition layer 600 is provided with a pixel opening K for at least partially exposing the first electrode 211.

[0306] Optionally, the pixel definition layer 600 includes a plurality of first portions 610, a plurality of second portions 620, a plurality of third portions 630, and a plurality of fourth portions 640. Forming the pixel definition layer 600 on the array substrate 100 specifically includes:

[0307] S210, forming the first portion 610 on the array substrate 100.

[0308] S220, forming a plurality of second portions 620, a plurality of third portions 630, and a plurality of fourth portions 640 on the side of the first portion 610 away from the array substrate 100.

[0309] The second portion 620 corresponds to the third portion 630 and the fourth portion 640 one by one, respectively, and the second portion 620 and the corresponding fourth portion 640 are both located between the first sub-isolation portion 511 and the second sub-isolation portion 512. The plurality of fourth portions 640 and the first portion 610 define a plurality of pixel openings K. The first sub-isolation portion 511 and the second sub-isolation portion 512 are defined as a first isolation portion 510, and the third portion 630 is arranged around the first isolation portion 510.

[0310] Compared with the side of the fourth portion 640 away from the array substrate 100, the side of the second portion 620 and the third portion 630 away from the array substrate 100 is farther away from the array substrate 100.

[0311] Optionally, the fourth portion 640 is provided with a first via hole penetrating to the first portion 610 and used for exposing the first electrode 211, and the first via hole is provided with a first via hole connection structure 710 electrically connected with the first electrode 211.

[0312] Optionally, the second portion 620 includes two third sub-portions 621, and the fourth portion 640 is located between the two third sub-portions 621 of the corresponding second portion 620.

[0313] Optionally, two adjacent ones of the plurality of first isolation portions 510, the plurality of second isolation portions 520, and the plurality of third isolation portions 530 are spaced apart by a third portion 630.

[0314] Optionally, a normal projection of the third portion 630 on the array substrate 100 is a square, and two adjacent third portions 630 are arranged to share a side.

[0315] S300, forming a first sub-isolation portion 511 and a second sub-isolation portion 512 on a side of the pixel definition layer 600 away from the array substrate 100, the first sub-isolation portion 511 and the second sub-isolation portion 512 are arranged to be spaced apart from each other, and surround a separate opening 500a in communication with the pixel opening K.

[0316] S400, forming a first light emitting unit 200a on the array substrate 100, the first light emitting unit 200a is located in the first pixel opening K1 and the first separate opening 5001.

[0317] Optionally, the two sub-pixels are a first sub-pixel 210 and a second sub-pixel 220, and forming the first light emitting unit 200a on the array substrate 100 specifically includes:

[0318] S410, forming the first light emitting unit 200a on the array substrate 100 in a first evaporation direction F 蒸镀1 forming a first light emitting layer 212 and a second electrode 213 on the array substrate 100 in sequence to cover the first electrode 211, so as to form the first sub-pixel 210 arranged to be spaced apart from the second sub-isolation portion 512, and keep the first via connection structure 710 exposed, wherein the first evaporation direction F 蒸镀1 is arranged towards the first sub-isolation portion 511, and an evaporation angle when the second electrode 213 is formed by evaporation is greater than an evaporation angle when the first light emitting layer 212 is formed by evaporation, so that the second electrode 213 is in electrical contact with the first sub-isolation portion 511.

[0319] S410, forming the first light emitting unit 200a on the array substrate 100 in a second evaporation direction F 蒸镀2 forming a third electrode 221, a second light emitting layer 222, and a fourth electrode 223 on the array substrate 100 in sequence to cover the first sub-pixel 210, so as to form the second sub-pixel 220 arranged to be spaced apart from the first sub-isolation portion 511, and the third electrode 221 is electrically connected with the first electrode 211 through the exposed first via connection structure 710. Wherein the second evaporation direction F 蒸镀2 is arranged towards the second sub-isolation portion 512, and is different from the first evaporation direction F 蒸镀1 is arranged at an angle, and an evaporation angle when the fourth electrode 223 is formed by evaporation is greater than an evaporation angle when the second light emitting layer 222 is formed by evaporation, so that the fourth electrode 223 is in electrical contact with the second sub-isolation portion 512.

[0320] It should be noted that after the electrode material layer corresponding to the first sub-pixel 210 and the third electrode 221 is formed on the array substrate 100, the electrode material layer can be etched to form the third electrode 221 spaced apart from the second sub-isolation portion 512, thereby reducing the short circuit of the second sub-pixel 220.

[0321] Of course, the present application is not limited to this, and the first insulating layer 410 can be formed on the side of the first sub-pixel 210 away from the array substrate 100, and then the second sub-pixel 220 is formed on the side of the first insulating layer 410 away from the array substrate 100. The first insulating layer 410 is spaced apart from the second sub-isolation portion 512, and the first via connection structure 710 is exposed so that the third electrode 221 is electrically connected to the first electrode 211 through the first via connection structure 710 (which can be combined with Figure 1 understanding).

[0322] Similarly, the manufacturing method of the display panel 10 further includes:

[0323] The second light emitting unit 200b is formed on the array substrate 100 and located in the second pixel opening K2 and the second isolation opening 5002.

[0324] The third light emitting unit 200c is formed on the array substrate 100 and located in the third pixel opening K3 and the third isolation opening 5003.

[0325] The manufacturing process of the second light emitting unit 200b and the third light emitting unit 200c can refer to the manufacturing process of the first light emitting unit 200a, which will not be described in detail here.

[0326] The manufacturing method of the display panel 10 further includes the manufacturing process of the first encapsulation layer 910, the second encapsulation layer 920 and the third encapsulation layer 930, which will not be described one by one here.

[0327] The technical features of the above-mentioned embodiments can be combined in any way. In order to make the description simple, not all possible combinations of the technical features in the above-mentioned embodiments are described, but as long as the combinations of the technical features do not exist contradictory, they should be considered as the scope of the present application.

[0328] The above-mentioned embodiments only express several implementation ways of the present application, and the description is more specific and detailed, but it should not be understood as a limitation on the patent scope of the application. It should be noted that for ordinary skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are within the scope of the present application. Therefore, the patent protection scope of the present application should be subject to the appended claims.

Claims

1. A display panel, characterized in that, include: Array substrate; and The first light-emitting unit includes a first sub-pixel and a second sub-pixel, and the first sub-pixel and the second sub-pixel are stacked on the array substrate along a direction away from the array substrate; The array substrate includes a first driving circuit, and the first sub-pixel and the second sub-pixel are both electrically connected to the first driving circuit. The first driving circuit is used to drive the first sub-pixel and the second sub-pixel to emit light, respectively.

2. The display panel according to claim 1, characterized in that, The display panel further includes an isolation structure disposed on the array substrate; the isolation structure is provided with a first isolation opening, and the first light-emitting unit is disposed in the first isolation opening; Optionally, the outer contour of the top surface of the isolation structure projected onto the array substrate is located outside the outer contour of the bottom surface of the isolation structure projected onto the array substrate.

3. The display panel according to claim 2, characterized in that, The first sub-pixel includes a first electrode, a first light-emitting layer, and a second electrode stacked together; The second sub-pixel includes a third electrode, a second light-emitting layer, and a fourth electrode stacked together; the first driving circuit includes a first power signal line; the isolation structure includes a plurality of first isolation portions spaced apart, the first isolation portions being electrically connected to the first power signal line; and a first isolation opening is provided on the first isolation portion. The second electrode of the first sub-pixel and the fourth electrode of the corresponding second sub-pixel are both electrically connected to the first isolation portion.

4. The display panel according to claim 3, characterized in that, The first isolation portion includes a first sub-isolation portion and a second sub-isolation portion that are spaced apart from each other. The radial direction parallel to the first isolation opening is the first direction, and the first sub-isolation portion and the second sub-isolation portion are spaced apart along the first direction. One of the second electrode and the fourth electrode is electrically connected to the first sub-isolation section, and the other of the second electrode and the fourth electrode is electrically connected to the second sub-isolation section; Optionally, the first sub-isolation section and the second sub-isolation section are connected in parallel to the first power signal line; or, the first driving circuit includes two first power signal lines, and the first sub-isolation section and the second sub-isolation section are electrically connected to different first power signal lines respectively. Optionally, the first sub-isolation portion includes a first side wall, and the second sub-isolation portion includes a second side wall disposed opposite to the first side wall; One of the second electrode and the fourth electrode is electrically connected to the first sidewall, and the other of the second electrode and the fourth electrode is electrically connected to the second sidewall. Optionally, the first sub-pixel and the second sub-isolation portion are spaced apart, and the second sub-pixel and the first sub-isolation portion are spaced apart.

5. The display panel according to claim 4, characterized in that, The display panel further includes a pixel definition layer disposed on the array substrate, and the isolation structure is disposed on the side of the pixel definition layer opposite to the array substrate; The first sub-isolation section and the second sub-isolation section are spaced apart by a portion of the structure of the pixel definition layer; Optionally, the pixel definition layer includes a first portion disposed on the array substrate, and a second portion disposed on the side of the first portion facing away from the array substrate; The second part is located between the first sub-isolation section and the second sub-isolation section; Optionally, the pixel definition layer is provided with a first pixel opening, and the first pixel opening is connected to the corresponding first isolation opening; Optionally, the first pixel opening corresponds one-to-one with the first isolation opening.

6. The display panel according to claim 5, characterized in that, The pixel definition layer is provided with a first via for exposing the first electrode, and a first via connection structure is provided in the first via. The third electrode is electrically connected to the first electrode through the first via connection structure.

7. The display panel according to claim 5, characterized in that, The first driving circuit further includes a second power signal line that is different from the first power signal line signal, and the first electrode of the first sub-pixel and the third electrode of the corresponding second sub-pixel are connected in parallel to the second power signal line. Optionally, the second power signal line is located below the first light-emitting unit, and the display panel further includes a first adapter portion disposed on the same layer as the first electrode, the first adapter portion being electrically connected to the second power signal line; The pixel definition layer is provided with a second via for exposing the first adapter portion. The second via is provided with a second via connection structure, and the third electrode is electrically connected to the first adapter portion through the second via connection structure.

8. The display panel according to claim 3, characterized in that, The second electrode of the first sub-pixel and the fourth electrode of the corresponding second sub-pixel are connected in parallel to the same first isolation part for electrical connection; Optionally, the first driving circuit includes a first power signal line and a second power signal line with different signals, and the first electrode of the first sub-pixel and the third electrode of the corresponding second sub-pixel are connected in parallel to the second power signal line. Optionally, the second power signal line is located below the first light-emitting unit, and the display panel further includes a first adapter portion disposed on the same layer as the first electrode, the first adapter portion being electrically connected to the second power signal line; The display panel further includes a pixel definition layer disposed on the array substrate, and the isolation structure is disposed on the side of the pixel definition layer opposite to the array substrate; The pixel definition layer is provided with a second via for exposing the first adapter portion. The second via is provided with a second via connection structure. The third electrode is electrically connected to the first adapter portion through the second via connection structure.

9. The display panel according to claim 1, characterized in that, The first sub-pixel and the second sub-pixel are connected in parallel to the first driving circuit: Optionally, the first sub-pixel includes a first electrode, a first light-emitting layer, and a second electrode stacked together; The second sub-pixel includes a third electrode, a second light-emitting layer, and a fourth electrode stacked together; The first driving circuit includes a first power signal line and a second power signal line with different signals. The second electrode of the first sub-pixel and the fourth electrode of the corresponding second sub-pixel are connected in parallel to the first power signal line; and / or, the first electrode of the first sub-pixel and the third electrode of the corresponding second sub-pixel are connected in parallel to the second power signal line. Optionally, the first power signal line is a VSS signal line, and the second power signal line is a VDD signal line; Optionally, the second electrode, the third electrode, and the fourth electrode all comprise a transparent conductive material; Optionally, the first sub-pixel and the corresponding second sub-pixel have the same emission color; Optionally, the first sub-pixel and the corresponding second sub-pixel are spaced apart from each other; Optionally, a first insulating layer is provided between the first sub-pixel and the corresponding second sub-pixel; the material of the first insulating layer includes a light-transmitting material.

10. The display panel according to claim 1, characterized in that, The display panel also includes: The second light-emitting unit includes a third sub-pixel and a fourth sub-pixel, which are stacked on the array substrate along a direction away from the array substrate; wherein, the array substrate further includes a second driving circuit, and the third sub-pixel and the fourth sub-pixel are electrically connected to the second driving circuit, which is used to drive the third sub-pixel and the fourth sub-pixel to emit light respectively. Optionally, the third sub-pixel and the fourth sub-pixel are connected in parallel to the second driving circuit; Optionally, the third sub-pixel includes a fifth electrode, a third light-emitting layer, and a sixth electrode stacked together; The fourth sub-pixel includes a seventh electrode, a fourth light-emitting layer, and an eighth electrode stacked together. The second driving circuit includes a third power signal line and a fourth power signal line with different signals. The sixth electrode of the third sub-pixel and the eighth electrode of the corresponding fourth sub-pixel are connected in parallel to the third power signal line; and / or, the fifth electrode of the third sub-pixel and the seventh electrode of the corresponding fourth sub-pixel are connected in parallel to the fourth power signal line. Optionally, the sixth electrode, the seventh electrode, and the eighth electrode all comprise a transparent conductive material; Optionally, the third sub-pixel and the corresponding fourth sub-pixel have the same emission color; Optionally, the third sub-pixel and the corresponding fourth sub-pixel are spaced apart from each other; Optionally, a second insulating layer is provided between the third sub-pixel and the corresponding fourth sub-pixel; the material of the second insulating layer includes a light-transmitting material. Optionally, the third power signal line is a VSS signal line, and the fourth power signal line is a VDD signal line.

11. The display panel according to claim 1 or 10, characterized in that, The display panel also includes: The third light-emitting unit includes a fifth sub-pixel and a sixth sub-pixel, which are stacked on the array substrate along a direction away from the array substrate; wherein, the array substrate further includes a third driving circuit, and the fifth sub-pixel and the sixth sub-pixel are electrically connected to the third driving circuit, which is used to drive the fifth sub-pixel and the sixth sub-pixel to emit light respectively; Optionally, the fifth sub-pixel and the sixth sub-pixel are connected in parallel to the third driving circuit; Optionally, the fifth sub-pixel includes a ninth electrode, a fifth light-emitting layer, and a tenth electrode stacked together; The sixth sub-pixel includes an eleventh electrode, a sixth light-emitting layer, and a twelfth electrode stacked together; The third driving circuit includes a fifth power signal line and a sixth power signal line with different signals. The tenth electrode of the fifth sub-pixel and the twelfth electrode of the corresponding sixth sub-pixel are connected in parallel to the fifth power signal line; and / or, the ninth electrode of the fifth sub-pixel and the eleventh electrode of the corresponding sixth sub-pixel are connected in parallel to the sixth power signal line. Optionally, the tenth electrode, the eleventh electrode, and the twelfth electrode all comprise a transparent conductive material; Optionally, the fifth sub-pixel and the corresponding sixth sub-pixel have the same emission color; Optionally, the fifth sub-pixel and the corresponding sixth sub-pixel are spaced apart from each other; Optionally, a third insulating layer is provided between the fifth sub-pixel and the corresponding sixth sub-pixel; the material of the third insulating layer includes a light-transmitting material; Optionally, the fifth power signal line is a VSS signal line, and the sixth power signal line is a VDD signal line.

12. A display panel, characterized in that, include: Array substrate; Multiple first light-emitting units, at least one of the first light-emitting units includes a first sub-pixel and a second sub-pixel, the first sub-pixel and the second sub-pixel are stacked on the array substrate along a direction away from the array substrate; and An isolation structure is provided with a first isolation opening, and the first light-emitting unit is located inside the first isolation opening; The first sub-pixel includes a first electrode, a first light-emitting layer, and a second electrode stacked together. The second sub-pixel includes a third electrode, a second light-emitting layer, and a fourth electrode stacked together; The second electrode of the first sub-pixel and the fourth electrode of the corresponding second sub-pixel are respectively electrically connected to the isolation structure.

13. The display panel according to claim 12, characterized in that, The isolation structure includes a plurality of first isolation portions corresponding to a plurality of first light-emitting units, and the first isolation portions are provided with the first isolation openings; The first isolation portion includes a first sub-isolation portion and a second sub-isolation portion that are spaced apart from each other. The radial direction parallel to the first isolation opening is the first direction, and the first sub-isolation portion and the second sub-isolation portion are spaced apart along the first direction. One of the second electrode and the fourth electrode is electrically connected to the first sub-isolation section, and the other of the second electrode and the fourth electrode is electrically connected to the second sub-isolation section; Optionally, the array substrate includes a first power signal line; the first sub-isolation portion and the second sub-isolation portion are connected in parallel to the first power signal line; or, the array substrate is provided with a plurality of first power signal lines, and the first sub-isolation portion and the second sub-isolation portion are electrically connected to different first power signal lines respectively. Optionally, the first power signal line is a VSS signal line.

14. The display panel according to claim 13, characterized in that, The display panel further includes a pixel definition layer disposed on the array substrate, and the isolation structure is disposed on the side of the pixel definition layer opposite to the array substrate; The first sub-isolation section and the second sub-isolation section are spaced apart by a portion of the structure of the pixel definition layer; Optionally, the pixel definition layer includes a first portion disposed on the array substrate, and a second portion disposed on the side of the first portion facing away from the array substrate; The second part is located between the first sub-isolation section and the second sub-isolation section; Optionally, the pixel definition layer is provided with a first pixel opening, and the first pixel opening is connected to the corresponding first isolation opening; Optionally, the first pixel opening corresponds one-to-one with the first isolation opening.

15. The display panel according to claim 14, characterized in that, The pixel definition layer is provided with a first via for exposing the first electrode, and a first via connection structure is provided in the first via. The third electrode is electrically connected to the first electrode through the first via connection structure.

16. The display panel according to claim 14, characterized in that, The array substrate also includes a second power signal line with a different signal from the first power signal line, and the first electrode of the first sub-pixel and the third electrode of the corresponding second sub-pixel are connected in parallel to the second power signal line. Optionally, the second power signal line is located below the first light-emitting unit, and the display panel further includes a first adapter portion disposed on the same layer as the first electrode, the first adapter portion being electrically connected to the second power signal line; The pixel definition layer is provided with a second via for exposing the first adapter portion. The second via is provided with a second via connection structure, and the third electrode is electrically connected to the first adapter portion through the second via connection structure. Optionally, the second power signal line is a VDD signal line.

17. A display device, characterized in that, Includes the display panel as described in any one of claims 1-16.

18. A method for manufacturing a display panel, characterized in that, include: Provide array substrate; A pixel definition layer is formed on the array substrate, and the pixel definition layer is provided with pixel openings; A first sub-isolation portion and a second sub-isolation portion are formed on the side of the pixel definition layer away from the array substrate; the first sub-isolation portion and the second sub-isolation portion are spaced apart from each other and form an isolation opening that communicates with the pixel opening; as well as A light-emitting unit is formed on the array substrate, and the light-emitting unit is located within the pixel opening and the isolation opening; The light-emitting unit includes two sub-pixels stacked along a direction away from the array substrate; In the light-emitting unit, one of the sub-pixels is electrically connected to the first sub-isolation portion, and the other sub-pixel is electrically connected to the second sub-isolation portion.

19. The method for manufacturing a display panel according to claim 18, characterized in that, The process of forming a pixel definition layer on the array substrate specifically includes: A first portion is formed on the array substrate; A plurality of second portions are formed at intervals on the side of the first portion away from the array substrate; The second part is located between the first sub-isolation section and the second sub-isolation section.

20. The method for manufacturing a display panel according to claim 19, characterized in that, The provision of a plurality of second portions spaced apart on the side of the first portion away from the array substrate specifically includes: A plurality of second portions, a plurality of third portions, and a plurality of fourth portions are formed on the side of the first portion away from the array substrate; The second part corresponds one-to-one with the third part and the fourth part, respectively; The second part and the corresponding fourth part are both located between the first sub-isolation part and the second sub-isolation part; compared to the side of the fourth part that is away from the array substrate, the side of the second part that is away from the array substrate is further away from the array substrate. The plurality of fourth portions and the first portion define the plurality of pixel openings; The first sub-isolation section and the second sub-isolation section are defined as a first isolation section, and the third part is arranged around the first isolation section.

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