Display panel, preparation method thereof and display device

Abstract

The embodiment of the invention provides a display panel, a preparation method thereof and a display device, relates to the technical field of display, and is used for improving the product yield of the display panel. The display panel comprises a substrate, an isolation structure and a light-emitting device, the isolation structure defines a first opening; the isolation structure comprises two isolation parts, and each isolation part comprises a first film layer, a second film layer and a third film layer which are stacked in the direction away from the substrate; in the two isolation parts, the third film layer comprises a first edge and a second edge, the first edge is close to the first opening relative to the second film layer, the second edge is far away from the first opening relative to the second film layer, and the size of the first edge in the first direction is smaller than that of the second edge in the first direction; the light-emitting device comprises a first electrode, a light-emitting layer and a second electrode which are stacked in the direction away from the substrate, and the edge of the second electrode makes contact with and is electrically connected with the side face, close to the first opening, of the isolation part. The display panel is used for displaying images.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a display panel, a method for manufacturing the same, and a display device. Background Technology

[0002] Organic light-emitting diode (OLED) display panels have gradually become one of the mainstream products in the display field due to their excellent performance, such as self-illumination, high contrast, thinness, wide viewing angle, fast response speed, applicability to flexible panels, wide operating temperature range, and relatively simple structure and manufacturing process.

[0003] OLED display panels are widely used in terminal products such as smartphones, tablets, televisions, and wearable devices (such as watches). Improving the yield rate of display panels is a critical technical issue that urgently needs to be addressed. Summary of the Invention

[0004] The purpose of the embodiments of this disclosure is to provide a display panel and a method for manufacturing the same, as well as a display device, for improving the product yield of the display panel.

[0005] To achieve the above objectives, the embodiments of this disclosure provide the following technical solutions:

[0006] On one hand, a display panel is provided. The display panel includes a substrate, an isolation structure, and a light-emitting device. The isolation structure is disposed on the substrate; the isolation structure defines a first opening; the isolation structure includes two isolation portions, each isolation portion including a first film layer, a second film layer, and a third film layer stacked along a direction away from the substrate; in the two isolation portions, there is a spacing between the two second film layers and between the two third film layers in a first direction, the first direction being parallel to the direction of the line connecting the centers of adjacent first openings; the third film layer includes a first edge and a second edge, the first edge being closer to the first opening relative to the second film layer, and the second edge being farther away from the first opening relative to the second film layer, the dimension of the first edge in the first direction being smaller than the dimension of the second edge in the first direction; the light-emitting device includes a first electrode, a light-emitting layer, and a second electrode stacked along a direction away from the substrate, the edge of the second electrode contacting and electrically connecting to the side of the isolation portion near the first opening.

[0007] In the aforementioned display panel, since the isolation structure includes two isolation portions, the second edge of the third film layer of the isolation portion extends outward relative to the second film layer by a larger dimension than the first edge of the third film layer. Therefore, the second edge can effectively isolate the light-emitting layer of the light-emitting device. Conversely, the first edge extends outward relative to the second film layer by a smaller dimension, ensuring that the second electrode of the light-emitting device contacts and is electrically connected to the side of the isolation portion. This allows for effective overlap between the second electrode and the side of the isolation portion, meaning the edge of the second electrode contacts and is electrically connected to the side of the isolation portion near the first opening. This facilitates the transmission of VSS voltage signals to the second electrodes of multiple light-emitting devices through the isolation structure. For example, the second electrodes of multiple light-emitting devices can be electrically connected through the isolation structure, allowing the VSS voltage signal to be transmitted to the second electrode of each light-emitting device, ensuring normal light emission. In cases where the third film layer of the isolation structure extends outward more than the second film layer, preventing the second electrode from effectively overlapping the side of the isolation structure, the technical solution provided by the embodiments of this disclosure not only ensures effective isolation of the light-emitting layer of the light-emitting device but also guarantees the overlap effect between the second electrode and the isolation portion. In summary, the display panel provided in this embodiment has a high product yield.

[0008] Furthermore, since the isolation structure defines the first opening, and the light-emitting device is located within the first opening, the isolation structure can separate the various light-emitting devices in the display panel from each other. This not only avoids crosstalk between the light emitted by different light-emitting devices, but also ensures that the arrangement density of each light-emitting device is not limited by the size of the FMM during the manufacturing process of the display panel. This is beneficial to improving the pixel density of the display panel, and since the FMM is not required, problems such as inaccurate alignment are avoided.

[0009] In some embodiments, the first film layers of the two isolation portions have a spacing in the first direction; the display panel further includes: a pixel defining layer and a transition pattern; the pixel defining layer is located between the isolation structure and the substrate, and the pixel defining layer has a via; the first film layer of at least one of the two isolation portions is connected to the transition pattern through the via.

[0010] In some embodiments, the two first membrane layers in the two isolation portions are connected to the transition pattern through the same via.

[0011] In some embodiments, the number of vias is multiple, and the two first film layers in the two isolation portions are respectively connected to the transition pattern through different vias.

[0012] In some embodiments, of the two isolation portions, the first film layer of one isolation portion is connected to the transition pattern through the via, and the first film layer of the other isolation portion is located on the surface of the pixel defining layer away from the substrate.

[0013] In some embodiments, the distance from the surface of the isolation portion connected by the transition pattern to the substrate is less than the distance from the surface of the isolation portion located on the surface of the pixel defining layer away from the substrate to the substrate.

[0014] In some embodiments, the light-emitting device is surrounded by an isolation portion, and at least one location in a first film layer surrounding the isolation portion is connected to the transition pattern via the via.

[0015] In some embodiments, the number of vias in the pixel defining layer surrounding the light-emitting device is multiple, and the multiple vias are arranged at intervals.

[0016] In some embodiments, the first membrane layers of the two isolation portions are directly electrically connected.

[0017] In some embodiments, the method further includes: a pixel defining layer located between the isolation structure and the substrate; both of the first film layers in the two isolation portions are located on the surface of the pixel defining layer away from the substrate.

[0018] In some embodiments, the method further includes: a pixel defining layer and a transition pattern; the pixel defining layer is located between the isolation structure and the substrate, and the pixel defining layer has a via; the two first film layers in the two isolation portions are connected to form an integral structural film layer, and the integral structural film layer is connected to the transition pattern through the via.

[0019] In some embodiments, the device further includes: a VSS signal line disposed in the display area of ​​the display panel and located between the substrate and the pixel defining layer; the adapter pattern is electrically connected to the VSS signal line.

[0020] In some embodiments, the plurality of light-emitting devices include a first light-emitting device and a second light-emitting device; the isolation portion surrounding the first light-emitting device is a first isolation portion, and the isolation portion surrounding the second light-emitting device is a second isolation portion; the transition pattern includes a first transition pattern and a second transition pattern, the pixel defining layer is provided with a first via and a second via, the first film layer of the first isolation portion is electrically connected to the first transition pattern through the first via, and the first film layer of the second isolation portion is electrically connected to the second transition pattern through the second via; the display panel further includes: a first VSS signal line and a second VSS signal line, disposed in the display area of ​​the display panel and located between the substrate and the pixel defining layer; the first transition pattern is electrically connected to the first VSS signal line, and the second transition pattern is electrically connected to the second VSS signal line.

[0021] In some embodiments, the first light-emitting device and the second light-emitting device emit different colors, and the first VSS signal line and the second VSS signal line are configured to transmit VSS signals with different voltage values.

[0022] In some embodiments, the plurality of light-emitting devices further includes a third light-emitting device, wherein the first light-emitting device, the second light-emitting device, and the third light-emitting device emit different colors; the isolation portion surrounding the third light-emitting device is a third isolation portion; the display panel further includes a third transition pattern; the pixel defining layer is further provided with a third via; the first film layer of the third isolation portion is electrically connected to the third transition pattern through the third via; the display panel further includes a third VSS signal line, disposed in the display area of ​​the display panel and located between the substrate and the pixel defining layer; the third transition pattern is electrically connected to the third VSS signal line.

[0023] In some embodiments, it further includes: a VSS bus disposed in the bezel area of ​​the display panel; the adapter pattern is electrically connected to the VSS bus.

[0024] In some embodiments, the device further includes: a VSS bus disposed in the bezel area of ​​the display panel; the first film layer in the isolation portion is electrically connected to the VSS bus.

[0025] In some embodiments, the display panel further includes a first VSS bus and a second VSS bus, located in the bezel area of ​​the display panel; the first VSS bus is electrically connected to the first VSS signal line, and the second VSS bus is electrically connected to the second VSS signal line.

[0026] In some embodiments, the transition pattern is the same as the first electrode material and is disposed in the same layer.

[0027] In some embodiments, the second film layer of the isolation portion includes a first side surface, a second side surface, a first end surface, and a second end surface. The first side surface and the second side surface are disposed opposite to each other in the first direction, and the first side surface is closer to the light-emitting device than the second side surface. The first end surface and the second end surface are disposed opposite to each other in a direction perpendicular to the substrate, and the first end surface is closer to the substrate than the second end surface.

[0028] The angle between the first side surface and the first end surface is greater than the angle between the second side surface and the first end surface; the angle between the first side surface and the second end surface is less than the angle between the second side surface and the second end surface.

[0029] On the other hand, a method for fabricating a display panel is provided, comprising: forming a first electrode on a substrate; forming an isolation film stack on the substrate on which the first electrode is formed; the isolation film stack comprising a first film, a second film, and a third film sequentially stacked along a direction away from the substrate; etching the isolation film stack to form an isolation structure; the isolation structure defining a first opening, wherein the orthographic projection of the first electrode on the substrate at least partially overlaps the orthographic projection of the first opening on the substrate; the isolation structure comprising two isolation portions, each isolation portion comprising a first film layer, a second film layer, and a third film layer stacked along a direction away from the substrate; wherein, in the two isolation portions, two of the first film layers are etched to form an isolation structure. The second film layers and the two third film layers are spaced apart in a first direction, which is parallel to the direction of the line connecting the centers of adjacent first openings; the third film layer includes a first edge and a second edge, the first edge being closer to the first opening relative to the second film layer, and the second edge being farther away from the first opening relative to the second film layer, the dimension of the first edge in the first direction being smaller than the dimension of the second edge in the first direction; a light-emitting layer and a second electrode are sequentially formed in the first opening, the light-emitting layer, the second electrode and the first electrode forming a light-emitting device, and the edge of the second electrode is in contact with and electrically connected to the side of the isolation portion near the first opening.

[0030] On the other hand, a display device is provided. The display device includes: a display panel as described in any of the above embodiments, and a cover plate disposed on the light-emitting side of the display panel.

[0031] The above-described display device has the same structure and beneficial technical effects as the display panel provided in some of the above embodiments, and will not be described again here. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0033] Figure 1 This is a structural diagram of a display device according to some embodiments;

[0034] Figure 2 for Figure 1 A cross-sectional view of the display device along the AA direction;

[0035] Figure 3This is a structural diagram of a display panel according to some embodiments;

[0036] Figure 4 for Figure 3 A top view of the isolation structure in the display panel;

[0037] Figure 5 This is a structural diagram of a display panel according to some other embodiments;

[0038] Figure 6 for Figure 5 A top view of the isolation structure in the display panel;

[0039] Figure 7 for Figure 5 An enlarged view of the display panel at the dotted circle S;

[0040] Figure 8 for Figure 7 An enlarged view of the display panel at the dotted circle P;

[0041] Figure 9 This is a structural diagram of a display panel according to some other embodiments;

[0042] Figure 10 This is a structural diagram of a display panel according to some other embodiments;

[0043] Figure 11 This is a structural diagram of a display panel according to some other embodiments;

[0044] Figure 12 This is a structural diagram of a display panel according to some other embodiments;

[0045] Figure 13 This is a structural diagram of a display panel according to some other embodiments;

[0046] Figure 14 This is a structural diagram of a display panel according to some other embodiments;

[0047] Figure 15 This is a structural diagram of a display panel according to some other embodiments;

[0048] Figure 16 This is a structural diagram of a display panel according to some other embodiments;

[0049] Figure 17 This is a structural diagram of a display panel according to some other embodiments;

[0050] Figure 18 This is a structural diagram of a display panel according to some other embodiments;

[0051] Figure 19 This is a top view of a pixel-defining layer according to some other embodiments;

[0052] Figure 20 This is a top view of a pixel-defining layer according to some other embodiments;

[0053] Figure 21 This is a structural diagram of a display panel according to some other embodiments;

[0054] Figure 22 This is a structural diagram of a display panel according to some other embodiments;

[0055] Figure 23 A flowchart illustrating a method for fabricating a display panel according to some embodiments of this disclosure;

[0056] Figures 24-28 This is a structural diagram corresponding to each step in the manufacturing method of a display panel provided according to some embodiments. Detailed Implementation

[0057] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0058] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiment," "example," or "some examples" are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0059] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0060] In describing some embodiments, the term "connection" and its derivative expressions may be used. The term "connection" should be interpreted broadly; for example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection through an intermediate medium. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0061] "At least one of A, B and C" has the same meaning as "at least one of A, B or C", both including the following combinations of A, B and C: only A, only B, only C, combinations of A and B, combinations of A and C, combinations of B and C, and combinations of A, B and C.

[0062] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0063] The use of “applies to” or “configured to” in this article implies an open and inclusive language that does not preclude applicability to or configuration to devices that perform additional tasks or steps.

[0064] In addition, the use of “based on” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” one or more of the stated conditions or values ​​may in practice be based on additional conditions or values ​​beyond those stated.

[0065] As used herein, “parallel,” “perpendicular,” and “equal” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable range of deviation for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable range of deviation for approximate perpendicularity may also be, for example, within 5°; “equal” includes absolute equality and approximate equality, where an acceptable range of deviation for approximate equality may be, for example, a difference between the two equals being less than or equal to 5% of either one.

[0066] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate.

[0067] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched areas shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0068] like Figure 1 As shown, embodiments of this disclosure provide a display device 1000, which is a product with image display functionality. Exemplarily, the display device 1000 can be any device that displays either moving (e.g., video) or fixed (e.g., still image) content, and whether it is text or an image.

[0069] For example, the display device 1000 can be any product or component with display functionality, such as a television, laptop, tablet, personal digital assistant (PDA), mobile phone, watch, clock, calculator, GPS receiver / navigator, camera, camera view display (e.g., a rearview camera display in a vehicle), wearable device, augmented reality (AR) device, virtual reality (VR) device, in-vehicle display, or flight display. Figure 1 As shown, the display device 1000 can be a mobile phone.

[0070] From the perspective of the light emission type of the display device 1000, the display device 1000 can be an OLED display device or a quantum dot light-emitting diode (QLED) display device. From the perspective of the form of the display device 1000, the display device 1000 can be a flat display device, a curved display device, or a foldable display device, etc. From the perspective of the shape of the display device 1000, the display device 1000 can be rectangular or circular, etc. The embodiments of this disclosure do not specifically limit this. The following uses a rectangular and flat organic light-emitting diode display device 1000 as an example to illustrate some embodiments of this disclosure. However, the implementation of this disclosure is not limited to this, and any other display device can be considered as long as the same technical concept is applied.

[0071] refer to Figure 2 The display device 1000 includes a display panel 1001 and a cover plate 1002 disposed on the light-emitting side of the display panel 1001. When the display device 1000 is an OLED display device, the display panel 1001 is an OLED display panel. The cover plate 1002 provides support and protection for the display panel 1001 and ensures that the display panel 1001 maintains good display performance even when subjected to impact or scratches.

[0072] For example, cover plate 1002 may include glass cover plate, ceramic cover plate, plastic cover plate and optical composite material cover plate.

[0073] The structure of the display panel 1001 will be described in detail below.

[0074] refer to Figure 3 The display panel 1001 includes a substrate 100, a pixel circuit layer 200 and a light-emitting device 300 stacked together.

[0075] The substrate 100 is made of a transparent material. For example, the substrate 100 can be a transparent flexible substrate; or it can be a transparent rigid substrate, such as glass or ultrathin glass.

[0076] The pixel circuit layer 200 includes multiple pixel circuits configured to drive the light-emitting device 300 to emit light.

[0077] The light-emitting device 300 includes a first electrode 301, a light-emitting layer 302, and a second electrode 303 stacked along a direction away from the substrate 100. The display panel 1001 may also include a pixel defining layer PDL, which is disposed on the side of the first electrode 301 away from the substrate 100, and defines a plurality of pixel openings h, with at least a portion of the light-emitting layer 302 located within one pixel opening h.

[0078] In some embodiments, the first electrode 301 is configured as the anode of the light-emitting device 300, and the second electrode 303 is configured as the cathode of the light-emitting device 300. The display panel 1001 also includes a VDD signal line (not shown) and a VSS signal line (not shown), wherein the VDD signal line is used to input a high-voltage signal, and the VSS signal line is used to input a low-voltage signal. In this case, the first electrode 301 of the light-emitting device 300 is electrically connected to the VDD signal line (not shown), and the second electrode 303 of the light-emitting device 300 is electrically connected to the VSS signal line (not shown), thereby forming a voltage between the first electrode 301 and the second electrode 303, causing holes from the first electrode 301 and electrons from the second electrode 303 to recombine in the light-emitting layer 302, thereby exciting light.

[0079] In other embodiments, the first electrode 301 is configured as the cathode of the light-emitting device 300, and correspondingly, the second electrode 303 is configured as the anode of the light-emitting device 300.

[0080] The light-emitting layer 302 includes an organic light-emitting layer. In the case of a WOLED light-emitting device 300, the organic light-emitting layer is formed of a light-emitting material capable of emitting white light. The light-emitting layer 302 may also include at least one of a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer, and an electron injection layer.

[0081] The light-emitting layer 302 in the light-emitting device 300 can be fabricated using a vapor deposition process. A high-precision fine metal mask (FMM) is used for the entire layer vapor deposition to form the light-emitting layer 302. However, this method requires alignment between the display panel 1001 to be vapor-deposited and the FMM. When the pixel density of the display panel 1001 is high, the alignment between the display panel 1001 and the FMM is difficult to guarantee, resulting in high fabrication difficulty. Furthermore, the pixel aperture ratio of the display panel 1001 is limited by the size of the FMM, which is not conducive to fabricating a high-pixel-density display panel 1001 and to saving fabrication costs.

[0082] Based on this, and in conjunction with references Figure 3 and Figure 4 The display panel 1001 provided in this embodiment further includes: an isolation structure 400 disposed on the substrate 100; the isolation structure 400 is provided with a plurality of first openings k, and a light-emitting device 300 is disposed in one of the first openings k; the isolation structure 400 between adjacent first openings k includes an isolation portion T, the isolation portion T including a first film layer T1, a second film layer T2 and a third film layer T3 stacked in a direction away from the substrate; the third film layer T3 extends outward relative to the second film layer T2 in a first direction X, the first direction X being perpendicular to the extension direction of the isolation structure 400 between adjacent first openings k.

[0083] In some embodiments, the first film layer T1 is made of titanium, the second film layer T2 is made of aluminum, and the third film layer T3 is made of titanium. In other embodiments, the materials of the first film layer T1, the second film layer T2, and the third film layer T3 may also include other conductive materials, such as other metallic materials or alloy materials.

[0084] In this configuration, the third film layer T3 extends outward in the first direction X relative to the second film layer T2. Ideally, during the fabrication of the light-emitting layer 302, when a whole-layer evaporation process is used, the third film layer T3 can not only effectively isolate the light-emitting materials of the light-emitting layers 302 of adjacent light-emitting devices 300, but also ensure that the edge of the second electrode 303 is in contact with and electrically connected to the side of the isolation portion T near the first opening k, so that the second electrode 303 in the light-emitting device 300 can effectively form a continuous conductive path with the second electrodes 303 in the surrounding light-emitting devices 300.

[0085] The inventors discovered that, in order to ensure the blocking effect of the isolation portion T on the light-emitting material of the light-emitting layer 302, the third film layer T3 in the isolation portion T extends outward in the first direction X, which is larger than that of the second film layer T2. Based on this, in the actual process of forming the second electrode 303, the overlap between the second electrode 303 and the isolation portion T is uncontrollable. There are cases where the isolation portion T and the second electrode 303 cannot form an effective overlap, which can easily lead to the second electrode 303 in the light-emitting device 300 not effectively forming a continuous conductive path with the second electrodes 303 in surrounding light-emitting devices 300. This affects the connection of the VSS signal line to the second electrode 303, causing display abnormalities and resulting in a low product yield of the display panel 1001.

[0086] To address the aforementioned technical problems, embodiments of this disclosure provide a display panel 1001, in conjunction with reference to [reference needed]. Figure 5 , Figure 6 and Figure 7 The display panel 1001 includes: a substrate 100, an isolation structure 400, and a light-emitting device 300.

[0087] An isolation structure 400 is disposed on a substrate 100; the isolation structure 400 defines a first opening k, and a light-emitting device 300 is disposed within the first opening k.

[0088] The isolation structure 400 includes two isolation portions T, each isolation portion T including a first film layer T1, a second film layer T2, and a third film layer T3 stacked along a direction away from the substrate 100. The two isolation portions T have a spacing between the two second film layers T2 and between the two third film layers T3 in a first direction X, which is parallel to the direction of the line connecting the centers of adjacent first openings k.

[0089] The third film layer T3 includes a first edge L1 and a second edge L2. The first edge L1 extends relative to the second film layer T2 in a direction closer to the first opening k; the second edge L2 extends relative to the second film layer T2 in a direction away from the first opening k. The dimension of the first edge L1 in the first direction X is smaller than the dimension of the second edge L2 in the first direction X, that is, the extension dimension of the first edge L1 on the side of the isolation portion T closer to the first opening k is smaller than the extension dimension of the second edge L2 on the side of the isolation portion T away from the first opening k.

[0090] The light-emitting device 300 includes a first electrode 301, a light-emitting layer 302, and a second electrode 303 stacked in a direction away from the substrate 100. The edge of the second electrode 303 is in contact with and electrically connected to the side of the isolation portion T near the first opening k.

[0091] The display panel 1001 provided in this embodiment has an isolation structure 400 that includes two isolation portions T. The second edge L2 of the third film layer T3 of the isolation portion T extends outward relative to the second film layer T2 by a larger dimension than the first edge L1 of the third film layer T3 extends outward relative to the second film layer T2. Therefore, the second edge L2 can effectively isolate the light-emitting layer 302 of the light-emitting device 300. On the other hand, the first edge L1 extends outward relative to the second film layer T2 by a smaller dimension. Therefore, the first edge L1 can ensure that the second electrode 303 of the light-emitting device 300 is isolated from the isolation portion T. The second electrode 303 is electrically connected to the side of the isolation portion T, allowing effective overlap between the second electrode 303 and the side of the isolation portion T near the first opening k. This enables the transmission of VSS voltage signals to the second electrodes 303 of multiple light-emitting devices 300 through the isolation structure 400. For example, the second electrodes 303 of multiple light-emitting devices 300 can be electrically connected through the isolation structure 400, allowing the VSS voltage signal to be transmitted to the second electrode 303 of each light-emitting device 300, ensuring normal light emission from the light-emitting device 300. In cases where the edge of the third film layer T3 of the isolation structure 400 is larger than that of the second film layer T2, preventing the second electrode 303 from effectively overlapping the side of the isolation structure 400, the technical solution provided by the embodiments of this disclosure not only ensures effective isolation of the light-emitting layer 302 of the light-emitting device 300 but also guarantees the overlap effect between the second electrode 303 and the isolation portion T. In summary, the display panel 1001 provided by this embodiment has a high product yield.

[0092] Furthermore, since the isolation structure 400 defines the first opening k, and the light-emitting device 300 is disposed within the first opening k, the isolation structure 400 can separate each light-emitting device 300 in the display panel 1001 from each other. This not only avoids crosstalk between the light emitted by different light-emitting devices 300, but also ensures that the arrangement density of each light-emitting device 300 is not limited by the size of the FMM during the manufacturing process of the display panel 1001. This is beneficial to improving the pixel density of the display panel 1001, and eliminates the need for an FMM, thus avoiding problems such as inaccurate alignment.

[0093] In some embodiments, reference Figure 8 The second film layer T2 of the isolation portion T includes a first side surface C1, a second side surface C2, a first end surface D1, and a second end surface D2. The first side surface C1 and the second side surface C2 are disposed opposite to each other in a first direction X, and the first side surface C1 is closer to the light-emitting device 300 than the second side surface C2. The first end surface D1 and the second end surface D2 are disposed opposite to each other in a direction perpendicular to the substrate 100, and the first end surface D1 is closer to the substrate 100 than the second end surface D2.

[0094] It is understood that the above-mentioned "first side surface C1 and second side surface C2 are arranged opposite to each other in the first direction X" means that the projections of the first side surface C1 and the second side surface C2 in the first direction X at least partially overlap; "first end surface D1 and second end surface D2 are arranged opposite to each other in the direction perpendicular to the substrate 100" means that the first end surface D1 and the second end surface D2 at least partially overlap in the direction perpendicular to the substrate 100.

[0095] Among them, the angle α1 between the first side surface C1 and the first end surface D1 is greater than the angle α2 between the second side surface C2 and the first end surface D1; the angle β1 between the first side surface C1 and the second end surface D2 is less than the angle β2 between the second side surface C2 and the second end surface D2, which is beneficial to ensure that the light-emitting layer 302 of the light-emitting device 300 is effectively isolated at the second edge L2.

[0096] Specifically, the cross-sectional structure of the isolation section T can be I-shaped. (See further reference.) Figure 7 The isolation layer T can be formed using a wet etching process. Since the etching rate of the etching solution on the second film layer T2 (which can be made of aluminum) is greater than that on the first film layer T1 (which can be made of titanium), and also greater than that on the third film layer T3 (which can also be made of titanium), the formed isolation structure T extends outwards relative to the second film layer T2 along the first direction X. Similarly, the two sides of the third film layer T3 and the first film layer T1 also extend outwards relative to the second film layer T2. This facilitates the separation of the light-emitting layer 302 at the edges of the first film layer T1 during the formation of the light-emitting layer 302.

[0097] In some embodiments, the size of the first edge L1 in the first direction X can be 0.2μm to 0.3μm, for example 0.2μm, 0.23μm, 0.25μm, 0.26μm, 0.28μm, or 0.3μm; the size of the second edge L2 in the first direction X can be 0.5μm to 0.7μm, for example 0.5μm, 0.53μm, 0.55μm, 0.6μm, 0.65μm, or 0.7μm.

[0098] In some embodiments, continue to refer to Figure 5 The display panel 1001 also includes a pixel defining layer (PDL) located between the isolation structure 400 and the substrate 100. The pixel defining layer (PDL) defines a pixel opening (h), and a light-emitting device (300) is disposed within a pixel opening (h). In this way, the pixel defining layer (PDL) can be used to define the light-emitting device (300), so that the light emitted by the light-emitting device (300) is emitted from its corresponding pixel opening (h), thus avoiding color crosstalk between adjacent light-emitting devices (300).

[0099] In some embodiments, the first membrane layers T1 of the two isolation sections T are directly electrically connected.

[0100] For example, refer to Figure 5 Both first film layers T1 in the two isolation portions T are located on the surface of the pixel defining layer PDL away from the substrate 100. The two first film layers T1 are directly connected on the surface of the pixel defining layer PDL away from the substrate 100. Since the second electrode 303 of the light-emitting device 300 is connected to the first film layer T1 of the adjacent isolation portion T, and the two first film layers T1 in the two isolation portions T between adjacent light-emitting devices 300 are directly connected, a conductive path is formed between the second electrodes 303 of adjacent light-emitting devices 300.

[0101] Here, since the two first film layers T1 are directly connected, there is no need to add an extra process step to connect the two first film layers, which simplifies the process.

[0102] exist Figure 5 Based on the display panel 1001 shown, refer to Figure 9The display panel 1001 also includes a VSS bus M, disposed in the bezel area of ​​the display panel 1001; and a first film layer T1 in the isolation portion T is electrically connected to the VSS bus M. With this configuration, since the second electrodes 303 of the multiple light-emitting devices 300 are all in contact with the sides surrounding their respective isolation portions T, and the two isolation portions T located between adjacent light-emitting devices 300 are electrically connected through the first film layer T1, the second electrodes 303 of the multiple light-emitting devices 300 are electrically connected through the isolation structure 400, and then directly connected to the VSS bus M disposed in the bezel area of ​​the display panel 1001. This reduces wiring complexity, simplifies the process, and saves manufacturing costs.

[0103] For ease of understanding, Figure 9 The diagram only shows the projection relationship between the first film layer T1 and the second electrode 303 on the substrate 100.

[0104] The first membrane layer T1 of the two isolation sections T can be directly electrically connected, or it can be: (Refer to...) Figure 10 The display panel 1001 also includes: a transition pattern Q; a via g in the pixel defining layer PDL; and two first film layers T1 in the two isolation portions T connected to form an integral structure film layer T11, the integral structure film layer T11 being connected to the transition pattern Q through the via g.

[0105] Here, since the second electrode 303 of the light-emitting device 300 is connected to the first film layer T1 of the adjacent isolation portion T, and the two first film layers T1 of the two isolation portions T between adjacent light-emitting devices 300 are connected to form an integral structure film layer T11, which is also connected to the transition pattern Q, an interconnected conductive path is formed between the second electrodes 303 of adjacent light-emitting devices 300.

[0106] In this embodiment, the display panel 1001 can not only directly use the VSS bus located in the border area of ​​the display panel 1001 to input VSS signals to the second electrodes 303 of multiple light-emitting devices 300 through the adapter pattern Q, but also set VSS signal lines in the display area of ​​the display panel 1001 to input VSS signals to the second electrodes 303 of the light-emitting devices 300 through the adapter pattern Q.

[0107] Therefore, in Figure 10Based on the display panel 1001 shown, the display panel 1001 further includes: a VSS bus (not shown), disposed in the border area of ​​the display panel 1001; and a transition pattern Q electrically connected to the VSS bus. With this configuration, since the second electrodes 303 of multiple light-emitting devices 300 are all in contact with the sides surrounding their respective isolation portions T, and the two isolation portions T located between adjacent light-emitting devices 300 are electrically connected through a first film layer T1, the second electrodes 303 of the multiple light-emitting devices 300 are electrically connected through the isolation structure 400 and the transition pattern Q. Afterwards, they are directly connected to the VSS bus disposed in the border area of ​​the display panel 1001, which can reduce wiring difficulty, simplify the process, and save manufacturing costs.

[0108] exist Figure 10 Based on the display panel 1001 shown, and in conjunction with the reference Figure 11 and Figure 12 The display panel 1001 may further include: a VSS signal line J, disposed in the display area of ​​the display panel 1001 and located between the substrate 100 and the pixel defining layer PDL; and a transition pattern Q electrically connected to the VSS signal line J. Since the VSS signal line is disposed in the display area of ​​the display panel 1001 and the transition pattern Q is electrically connected to the VSS signal line J, the voltage supplied to the second electrode 303 by the transition pattern Q can reduce the voltage drop generated on the VSS signal line J.

[0109] In some embodiments, Figure 11 Based on the display panel 1001 shown, refer to Figure 12 The display panel 1001 also includes: a VSS bus M, located in the bezel area of ​​the display panel 1001; and a VSS signal line J connected to the VSS bus M.

[0110] In some embodiments, reference Figure 13 The first film layers T1 of the two isolation portions T have a spacing L in the first direction X; in addition, the display panel 1001 further includes: a transition pattern Q; a via g is provided in the pixel defining layer PDL; and the first film layer T1 of at least one of the two isolation portions T is connected to the transition pattern Q through the via g.

[0111] For example, the first membrane layer T1 in both isolation sections T is connected to the transition pattern Q through a via g. This configuration allows the transition pattern Q to electrically connect the two first membrane layers T1.

[0112] For example, refer to Figure 13The two first films T1 in the two isolation portions T are connected to the transition pattern Q through the same via g. Since the second electrode 303 of the light-emitting device 300 is connected to the first film T1 of the adjacent isolation portion T, and the two first films T1 in the two isolation portions T are connected to the transition pattern Q through the same via g between adjacent light-emitting devices 300, a conductive path is formed between the second electrodes 303 of adjacent light-emitting devices 300.

[0113] exist Figure 13 Based on the display panel 1001 shown, the display panel 1001 further includes: a VSS bus (not shown), located in the border area of ​​the display panel 1001; and a transition pattern Q electrically connected to the VSS bus.

[0114] exist Figure 13 Based on the display panel 1001 shown, refer to Figure 14 The display panel 1001 may further include: a VSS signal line J, disposed in the display area of ​​the display panel 1001 and located between the substrate 100 and the pixel defining layer PDL; and a transition pattern Q electrically connected to the VSS signal line J.

[0115] In some embodiments, in conjunction with reference Figure 14 and Figure 15 The display panel 1001 also includes: a VSS bus M, located in the bezel area of ​​the display panel 1001; and a VSS signal line J connected to the VSS bus M.

[0116] In some embodiments, reference Figure 16 In the pixel defining layer PDL, there are multiple vias g, and the two first film layers T1 in the two isolation sections T are connected to the transition pattern Q through different vias g. Figure 16 In the illustration, two vias g are used. In other embodiments, the number of vias g can be 3, 4, or 5, and is not limited. Multiple vias g are present in the pixel defining layer (PDL). Since the second electrode 303 of the light-emitting device 300 is connected to the first film layer T1 of the adjacent isolation portion T, and between adjacent light-emitting devices 300, the two first film layers T1 in the two isolation portions T are respectively connected to the transition pattern Q through different vias g, thus forming interconnected conductive paths between the second electrodes 303 of adjacent light-emitting devices 300.

[0117] exist Figure 16 Based on the display panel 1001 shown, the display panel 1001 further includes: a VSS bus (not shown), located in the border area of ​​the display panel 1001; and a transition pattern Q electrically connected to the VSS bus.

[0118] exist Figure 16Based on the display panel 1001 shown, refer to Figure 17 The display panel 1001 may further include: a VSS signal line J, disposed in the display area of ​​the display panel 1001 and located between the substrate 100 and the pixel defining layer PDL; and a transition pattern Q electrically connected to the VSS signal line.

[0119] The first film layers T1 of the two isolation portions T have a spacing L in the first direction X; the first film layer T1 of at least one of the two isolation portions T is connected to the transition pattern Q through a via g. Alternatively, the first film layer T1 of one of the two isolation portions T can be connected to the transition pattern Q through a via g.

[0120] For example, refer to Figure 18 In the two isolation sections T, the first film layer T1 of one isolation section T is connected to the transition pattern Q through the via g, and the first film layer T1 of the other isolation section T is located on the surface of the pixel defining layer PDL away from the substrate 100.

[0121] In some embodiments, continue to refer to Figure 17 The distance from the surface of the isolation portion T connected to the transition pattern Q to the substrate 100 is less than the distance from the surface of the isolation portion on the surface of the pixel defining layer PDL away from the substrate 100 to the substrate 100. This facilitates the connection between the first film layer T1 and the transition pattern Q.

[0122] In some embodiments, each light-emitting device 300 is surrounded by an isolation portion T, and at least one location in the first film layer T1 surrounding the isolation portion T of the light-emitting device 300 is connected to the transition pattern Q through a via g. Since the second electrode 303 of each light-emitting device 300 can be connected to the transition pattern Q through the isolation portion T, it can be ensured that the VSS signal can be input to the second electrode 303 of each light-emitting device 300 through the transition pattern Q.

[0123] For example, refer to Figure 19 In the pixel delimiting layer (PDL) surrounding the light-emitting device 300, there is one via g, and all via g are located on the same side of the light-emitting device 300. This improves the uniformity of the VSS signals input to multiple light-emitting devices 300.

[0124] For example, refer to Figure 20 In the pixel defining layer (PDL) surrounding the light-emitting device 300, there are multiple vias g, which are arranged at intervals. For example, refer to... Figure 20 Multiple vias g are spaced apart and evenly arranged. This improves the uniformity of the VSS signal input to the multiple light-emitting devices 300.

[0125] Since each light-emitting device 300 is surrounded by an isolation section T, for ease of understanding, in Figure 19 and Figure 20 In the diagram, the pixel definition layer (PDL) can be viewed as a film layer consisting of pixel definition parts (PL) surrounding multiple pixel openings (h), with adjacent pixel definition parts connected to each other. The white dashed lines in the diagram are auxiliary lines used to define the pixel definition parts (PL).

[0126] Continue to refer to Figure 18 The display panel 1001 further includes: a VSS signal line J, disposed in the display area of ​​the display panel 1001 and located between the substrate 100 and the pixel defining layer PDL; and a transition pattern Q electrically connected to the VSS signal line J. Since the VSS signal line is disposed in the display area of ​​the display panel 1001 and the transition pattern Q is electrically connected to the VSS signal line J, the voltage supplied to the second electrode 303 by the transition pattern Q can reduce the voltage drop generated on the VSS signal line J.

[0127] In other embodiments, reference is made to Figure 21 The plurality of light-emitting devices 300 include a first light-emitting device 31 and a second light-emitting device 32, wherein the first light-emitting device 31 and the second light-emitting device 32 emit the same or different colors; the isolation portion T surrounding the first light-emitting device 31 is the first isolation portion T(A), and the isolation portion T surrounding the second light-emitting device 32 is the second isolation portion T(B); the transition pattern Q includes a first transition pattern Q1 and a second transition pattern Q2, the pixel defining layer PDL is provided with a first via g1 and a second via g2, the first film layer T1 of the first isolation portion T(A) is electrically connected to the first transition pattern Q1 through the first via g1, and the first film layer T1 of the second isolation portion T(B) is electrically connected to the second transition pattern Q2 through the second via g2.

[0128] Continue to refer to Figure 21 The display panel 1001 further includes: a first VSS signal line J1 and a second VSS signal line J2, which are disposed in the display area of ​​the display panel 1001 and located between the substrate 100 and the pixel defining layer PDL; a first transition pattern Q1 is electrically connected to the first VSS signal line J1, and a second transition pattern Q2 is electrically connected to the second VSS signal line J2.

[0129] In some embodiments, the first light-emitting device 31 and the second light-emitting device 32 emit different colors, and the first VSS signal line J1 and the second VSS signal line J2 are configured to transmit VSS signals with different voltage values. Since the organic light-emitting materials in the light-emitting layers 302 of the first light-emitting device 31 and the second light-emitting device 32 are different, the maximum voltage required for each of the first light-emitting device 31 and the second light-emitting device 32 to achieve maximum luminous efficiency will be different. Therefore, by setting different VSS signal lines, voltage signals matching the actual voltage requirements of the first light-emitting device 31 and the second light-emitting device 32 can be input, thereby reducing the power consumption of the display panel 1001.

[0130] In some embodiments, in conjunction with reference Figure 21 and Figure 22 The display panel 1001 also includes: a first VSS bus M1 and a second VSS bus M2, which are located in the bezel area of ​​the display panel 1001; the first VSS bus M1 is electrically connected to the first VSS signal line J1, and the second VSS bus M2 is electrically connected to the second VSS signal line J2.

[0131] Further reference Figure 16 The multiple light-emitting devices 300 also include a third light-emitting device 33, and the first light-emitting device 31, the second light-emitting device 32 and the third light-emitting device 33 emit different colors; the isolation part T surrounding the third light-emitting device 33 is the third isolation part T(C).

[0132] The first light-emitting device 31, the second light-emitting device 32, and the third light-emitting device 33 emit different colors of light, which allows the multiple light-emitting devices 300 in the display panel 1001 to emit light of different colors, ensuring that the display panel 1001 can display an image. For example, the first light-emitting device 31 is a red light-emitting device, the second light-emitting device 32 is a green light-emitting device, and the third light-emitting device 33 is a blue light-emitting device.

[0133] Continue to refer to Figure 21 In the case where multiple light-emitting devices 300 also include a third light-emitting device 33, the display panel 1001 further includes a third transition pattern Q3 and a third VSS signal line J3. The pixel defining layer PDL also has a third via g3. The first film layer T1 of the third isolation portion T(C) is electrically connected to the third transition pattern Q3 through the third via g3. The third VSS signal line J3 is located in the display area of ​​the display panel 1001 and is situated between the substrate 100 and the pixel defining layer PDL; the third transition pattern Q3 is electrically connected to the third VSS signal line J3. That is, according to the actual needs of the first light-emitting device 31, the second light-emitting device 32, and the third light-emitting device 33, signals matching their respective light-emitting devices are input to reduce the power consumption of the display panel 1001.

[0134] Among them, the first VSS signal line, the second VSS signal line, and the third VSS signal line J3 can be configured to transmit VSS signals with different voltage values.

[0135] In some embodiments, reference Figure 22 In the case where the multiple light-emitting devices 300 also include a third light-emitting device 33, the display panel 1001 further includes: a third VSS bus M3, which is located in the bezel area of ​​the display panel 1001; the third VSS bus M3 is electrically connected to the third VSS signal line J3.

[0136] In some embodiments, the transition pattern Q is made of the same material as the first electrode 301 and is disposed in the same layer. In this way, the transition pattern Q and the first electrode 301 can be fabricated using the same etching process and the same mask, thereby reducing the number of fabrication steps. Therefore, this arrangement not only simplifies the fabrication process but also reduces the fabrication cost of the display panel 1001.

[0137] This embodiment also provides a method for manufacturing a display panel, referencing... Figure 23 This includes the following steps:

[0138] Step S1: Refer to Figure 24 A pixel circuit layer 200 is formed on the substrate 100.

[0139] Here, the pixel circuit layer 200 includes a source-drain conductive layer. During the formation of the pixel circuit layer 200, a VSS bus can be formed in the border area of ​​the pixel circuit layer 200. The VSS bus and the source-drain conductive layer are made of the same material and are set in the same layer. In this way, the VSS bus and the source-drain conductive layer can be fabricated using the same etching process and the same mask, so as to reduce the fabrication steps and simplify the process.

[0140] Furthermore, during the formation of the pixel circuit layer 200, a VSS signal line J can also be formed in the display area of ​​the pixel circuit layer 200. The VSS signal line J is made of the same material as the source / drain conductive layer and is disposed in the same layer. In this way, the VSS signal line J and the source / drain conductive layer can be fabricated using the same etching process and the same mask, thereby reducing the fabrication steps and simplifying the process.

[0141] Step S2: Continue to refer to Figure 24 A first electrode 301 is formed on the substrate 100. Specifically, the first electrode 301 is formed on the side of the pixel circuit layer 200 away from the substrate 100.

[0142] Here, when the display area of ​​the pixel circuit layer 200 is provided with a VSS signal line J, a transition pattern Q can also be formed during the formation of the first electrode 301. The transition pattern Q is electrically connected to the VSS signal line J, and the transition pattern Q is made of the same material as the first electrode 301 and is disposed in the same layer.

[0143] Step S3: Reference Figure 24 This forms the initial pixel boundary layer PDL1.

[0144] Here, in the presence of the transition pattern Q, a via g may be provided in the initial pixel defining layer PDL1, exposing the transition pattern Q. The initial pixel defining layer PDL1 is located on the substrate 100 on which the first electrode 301 is formed.

[0145] Step S4: Refer to the reference Figure 24 , Figure 25 , Figure 26 and Figure 27 An isolation film stack 40 is formed on a substrate 100 on which the first electrode 301 is formed. The isolation film stack 40 includes a first film T100, a second film T200, and a third film T300 sequentially stacked in a direction away from the substrate 100. For details, please refer to... Figure 25 The isolation film stack 40 is located on the side of the initial pixel defining layer PDL1 away from the substrate 100.

[0146] Here, the material of the first thin film T100 includes titanium, the material of the second thin film T200 includes aluminum, and the material of the third thin film T300 includes titanium.

[0147] In the case of a transition pattern Q, the first thin film T100 is connected to the transition pattern Q through the via g.

[0148] Step S5: Etch the isolation film stack 40 to form an isolation structure 400.

[0149] Step S5: Includes step S51: Reference Figure 26 In the isolation film stack 40 between adjacent first electrodes 301, a plurality of trenches G are formed; and step S52: refer to Figure 27 A first opening K is formed in the isolation film stack 40.

[0150] In step S51, the process of forming the trench G includes an etching process, such as wet etching, and the etching solution used includes a ferric chloride solution. Since the etching rate of the ferric chloride solution on the second thin film T200 is greater than that on the first thin film T100, the final morphology of the trench G is such that the third thin film T300 extends outward relative to the second thin film T200 in the first direction X.

[0151] Here, in the step of forming multiple trenches G, etching can be stopped at the first thin film T100, that is, only the second thin film T200 and the third thin film T300 are etched, thus forming... Figure 5 The display panel 1001 is shown in the image. Alternatively, a portion of the first thin film T100 can be etched to form a corresponding structure. Figure 10 or Figure 11 The display panel 1001 is shown in the image. Alternatively, the first thin film T100 can be completely etched, thus forming a corresponding display panel 1001. Figure 13 , Figure 16 , Figure 17 , Figure 18 or Figure 21 The display panel 1001 in the middle.

[0152] In step S52, the isolation structure 400 defines a first opening K, and the orthographic projection of the first electrode 301 on the substrate 100 at least partially overlaps with the orthographic projection of the first opening K on the substrate. The isolation structure 400 includes two isolation portions T, each isolation portion T including a first film layer T1, a second film layer T2, and a third film layer T3 stacked along a direction away from the substrate 100. In the two isolation portions T, there is a spacing between the two second film layers T2 and between the two third film layers T3 in a first direction X, the first direction X being parallel to the direction of the line connecting the centers of adjacent first openings K. The third film layer T3 includes a first edge L1 and a second edge L2, the first edge L1 being closer to the first opening K relative to the second film layer T2, and the second edge L2 being farther away from the first opening K relative to the second film layer T2. The size of the first edge L1 in the first direction X is smaller than the size of the second edge L2 in the first direction X.

[0153] It is understood that the first film layer T1 is the first thin film T100 after etching, the second film layer T2 is the second thin film T200 after etching, and the third film layer T3 is the third thin film T300 after etching.

[0154] Here, while forming the first opening K, a pixel opening h is also formed in the initial pixel boundary layer PDL1. (See reference...) Figure 27 The pixel opening h is connected to the first opening k. After the pixel opening h is formed, the initial pixel boundary layer PDL1 is formed into the pixel boundary layer PDL.

[0155] In some embodiments, the etching of pixel opening h and first opening k can be carried out using the same etching process and prepared using the same mask, so as to simplify the preparation process.

[0156] Here, the process for forming the first opening k includes an etching process, such as wet etching, and the etching solution used includes a ferric chloride solution. Since the etching rate of the ferric chloride solution on the second thin film T200 is greater than that on the first thin film T100, the final morphology of the first opening k is such that the third film layer T3 extends outward relative to the second film layer T in the first direction X.

[0157] It should be noted that the concentration of the etching solution used to form the trench G is greater than the concentration of the etching solution used to form the first opening k, and the etching time for forming the trench G is greater than the etching time for forming the first opening k. Thus, the angle α1 between the first side surface C1 and the first end surface D1 of the isolation portion T is greater than the angle α2 between the second side surface C2 and the first end surface D1, and the angle β1 between the first side surface C1 and the second end surface D2 is smaller than the angle β2 between the second side surface C2 and the second end surface D2. (Refer to...) Figure 8 .

[0158] In some embodiments, α1 can be equal to β1. For example, α1 = β1 = 90°. This gives the first side surface C1 a high degree of perpendicularity, ensuring that in subsequent display panel fabrication steps, the second electrode of the light-emitting device is in contact with and electrically connected to the side surface of the isolation portion T, thus achieving effective overlap between the second electrode and the side surface of the isolation portion.

[0159] In some embodiments, the sum of α2 and β2 can be 180°. For example, α2 = 60°, β2 = 120°. In this way, the second side surface C2 is an inclined side surface in the direction perpendicular to the substrate 100, which can ensure effective isolation of the light-emitting layer of the light-emitting device in subsequent display panel fabrication steps.

[0160] Step S6: Reference Figure 28 A light-emitting layer 302 and a second electrode 303 are sequentially formed in the first opening K. The light-emitting layer 302, the second electrode 303 and the first electrode 301 form a light-emitting device 300. The edge of the second electrode 303 is in contact with and electrically connected to the side of the isolation portion T near the first opening K.

[0161] In step S6, specifically, the pixel opening h of the display panel may include: a first pixel opening, a second pixel opening, and a third pixel opening. A first light-emitting material, a second electrode material, and an inorganic encapsulation layer are vapor-deposited across the entire display area of ​​the display panel 1001. The first light-emitting material, second electrode material, and inorganic encapsulation layer are removed except for the first pixel opening, to form a first light-emitting layer and a second electrode within the first pixel opening. A second light-emitting material, second electrode material, and inorganic encapsulation layer are vapor-deposited across the entire display area of ​​the display panel 1001. The second light-emitting material, second electrode material, and inorganic encapsulation layer are removed except for the second pixel opening, to form a second light-emitting layer and a second electrode within the second pixel opening. A third light-emitting material, second electrode material, and inorganic encapsulation layer are vapor-deposited across the entire display area of ​​the display panel 1001. The third light-emitting material, second electrode material, and inorganic encapsulation layer are removed except for the third pixel opening, to form a third light-emitting layer and a second electrode within the third pixel opening. This allows a light-emitting layer 302 of the corresponding light-emitting color to be formed in the corresponding pixel opening.

[0162] In some embodiments, the processes for removing the first light-emitting material, the second electrode material, and the inorganic encapsulation layer outside the first pixel opening, removing the second light-emitting material, the second electrode material, and the inorganic encapsulation layer outside the second pixel opening, and removing the third light-emitting material, the second electrode material, and the inorganic encapsulation layer outside the third pixel opening may all include an etching process.

[0163] In some embodiments, the first luminescent material may include one or more layers. When the first luminescent material includes one layer, the luminescent material is an organic luminescent material. When the first luminescent material is a multilayer luminescent material, the first luminescent material includes one layer of organic luminescent material and at least one common material, which may be at least one of the following: a hole injection layer, a hole transport layer, an electron blocking layer, an electron transport layer, and an electron injection layer. The second and third luminescent materials may also include one or more layers, as detailed in the first luminescent material description, and will not be elaborated further here.

[0164] In the process of forming the light-emitting layer 302, the inorganic encapsulation layer can encapsulate and protect the light-emitting layer 302, preventing external water and oxygen from corroding the light-emitting layer 302.

[0165] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A display panel, characterized by, The display panel comprises: a substrate; an isolation structure disposed on the substrate, the isolation structure defining a first opening; the isolation structure comprises two isolation portions, each of the isolation portions comprises a first film layer, a second film layer and a third film layer stacked in a direction away from the substrate, between the two second film layers and between the two third film layers in the two isolation portions, there is a spacing in a first direction, the first direction is parallel to the direction of the center line of the adjacent first opening, the third film layer comprises a first edge and a second edge, the first edge is closer to the first opening relative to the second film layer, the second edge is away from the first opening relative to the second film layer, the size of the first edge in the first direction is smaller than the size of the second edge in the first direction; a light emitting device, the light emitting device comprises a first electrode, a light emitting layer and a second electrode stacked in a direction away from the substrate, the edge of the second electrode is in contact with and electrically connected to the side of the isolation portion close to the first opening.

2. The display panel of claim 1, wherein, The first film layers of the two isolation portions have a spacing in the first direction. The display panel further comprises a pixel definition layer and a transfer pattern. The pixel definition layer is located between the isolation structure and the substrate, and the pixel definition layer is provided with a via hole. The first film layer of at least one of the two isolation portions is connected to the transfer pattern through the via hole.

3. The display panel of claim 2, wherein, The two first film layers of the two isolation portions are connected to the transfer pattern through the same via hole.

4. The display panel of claim 2, wherein, The number of via holes is multiple, and the two first film layers of the two isolation portions are respectively connected to the transfer pattern through different via holes.

5. The display panel of claim 2, wherein, The first film layer of one of the two isolation portions is connected to the transfer pattern through the via hole, and the first film layer of the other isolation portion is located on the surface of the pixel definition layer away from the substrate.

6. The display panel of claim 5, wherein, The distance from the surface of the isolation portion close to the substrate to the substrate is smaller than the distance from the surface of the isolation portion located on the surface of the pixel definition layer away from the substrate to the substrate.

7. The display panel of claim 5, wherein, The light emitting device is surrounded by one of the isolation portions, and the first film layer of the isolation portion surrounding the light emitting device is connected to the transfer pattern through the via hole at least at one position.

8. The display panel of claim 7, wherein, The number of via holes in the pixel definition layer surrounding the light emitting device is multiple, and the multiple via holes are arranged at intervals.

9. The display panel of claim 1, wherein, The first film layers of the two isolation portions are directly electrically connected.

10. The display panel of claim 9, wherein, Further comprising: a pixel definition layer located between the isolation structure and the substrate; The two first film layers of the two isolation portions are located on the surface of the pixel definition layer away from the substrate.

11. The display panel of claim 9, wherein, Further comprising: a pixel definition layer and a transfer pattern; The pixel definition layer is located between the isolation structure and the substrate, and the pixel definition layer is provided with a via hole; The two first film layers of the two isolation portions are connected to form an integrated structure film layer, and the integrated structure film layer is connected to the transfer pattern through the via hole.

12. The display panel according to any one of claims 3 to 8, 11, wherein, Further comprising: A VSS signal line is arranged in a display area of the display panel and between the substrate and the pixel definition layer; The transfer pattern is electrically connected with the VSS signal line.

13. The display panel of claim 5, wherein, The plurality of light emitting devices includes a first light emitting device and a second light emitting device; The isolation portion surrounding the first light emitting device is a first isolation portion, and the isolation portion surrounding the second light emitting device is a second isolation portion; the transfer pattern includes a first transfer pattern and a second transfer pattern, the pixel definition layer is provided with a first via hole and a second via hole, a first film layer of the first isolation portion is electrically connected with the first transfer pattern through the first via hole, and a first film layer of the second isolation portion is electrically connected with the second transfer pattern through the second via hole; The display panel further includes a first VSS signal line and a second VSS signal line arranged in a display area of the display panel and between the substrate and the pixel definition layer; The first transfer pattern is electrically connected with the first VSS signal line, and the second transfer pattern is electrically connected with the second VSS signal line.

14. The display panel of claim 13, wherein, The first light emitting device and the second light emitting device have different light emitting colors, and the first VSS signal line and the second VSS signal line are configured to transmit VSS signals with different voltage values.

15. The display panel of claim 13, wherein, The plurality of light emitting devices further includes a third light emitting device, and the first light emitting device, the second light emitting device and the third light emitting device have different light emitting colors; The isolation portion surrounding the third light emitting device is a third isolation portion, the display panel further includes a third transfer pattern, and the pixel definition layer is further provided with a third via hole; a first film layer of the third isolation portion is electrically connected with the third transfer pattern through the third via hole; The display panel further includes a third VSS signal line arranged in a display area of the display panel and between the substrate and the pixel definition layer; The third transfer pattern is electrically connected with the third VSS signal line.

16. The display panel of any one of claims 3, 4, 11, wherein, Further comprising: A VSS bus is arranged in a frame area of the display panel; The transfer pattern is electrically connected with the VSS bus.

17. The display panel of claim 10, wherein, Further comprising: A VSS bus is arranged in a frame area of the display panel; the first film layer in the isolation portion is electrically connected with the VSS bus.

18. The display panel of claim 14, wherein, Further comprising: A first VSS bus and a second VSS bus are arranged in a frame area of the display panel; the first VSS bus is electrically connected with the first VSS signal line, and the second VSS bus is electrically connected with the second VSS signal line.

19. The display panel according to any one of claims 2 to 8, 11 to 16, wherein, The transfer pattern is the same as and arranged in the same layer as the first electrode material.

20. The display panel of any one of claims 1-11, wherein, The second film layer of the isolation portion includes a first side surface, a second side surface, a first end surface and a second end surface; the first side surface and the second side surface are oppositely arranged in the first direction, and the first side surface is closer to the light emitting device than the second side surface; the first end surface and the second end surface are oppositely arranged in a direction perpendicular to the substrate, and the first end surface is closer to the substrate than the second end surface; The first side surface and the first end surface form an angle greater than the angle formed by the second side surface and the first end surface; the first side surface and the second end surface form an angle smaller than the angle formed by the second side surface and the second end surface.

21. A method for manufacturing a display panel, characterized by, The application comprises: forming a first electrode on a substrate; forming an isolation thin film stack on the substrate on which the first electrode is formed; the isolation thin film stack comprises a first thin film, a second thin film and a third thin film which are sequentially stacked in a direction away from the substrate; etching the isolation thin film stack to form an isolation structure; the isolation structure defines a first opening, and a projection of the first electrode on the substrate at least partially overlaps with a projection of the first opening on the substrate; the isolation structure comprises two isolation portions, each of which comprises a first film layer, a second film layer and a third film layer which are sequentially stacked in a direction away from the substrate; among the two isolation portions, the two second film layers and the two third film layers have a spacing in a first direction, and the first direction is parallel to the direction of the center line of the adjacent first opening; the third film layer comprises a first edge and a second edge, the first edge is closer to the first opening relative to the second film layer, and the second edge is farther away from the first opening relative to the second film layer, and the size of the first edge in the first direction is smaller than the size of the second edge in the first direction; forming a light-emitting layer and a second electrode in the first opening in sequence, the light-emitting layer, the second electrode and the first electrode form a light-emitting device, and the edge of the second electrode is in contact with and electrically connected to the side surface of the isolation portion close to the first opening.

22. A display device comprising: The application comprises: the display panel of any one of claims 1-20; and a cover plate arranged on the light-emitting side of the display panel.

Images