Display panel and display device

Abstract

The invention provides a display panel and a display device. The display panel comprises a substrate, a passivation layer, a pixel defining layer and a protective layer. The passivation layer is arranged on one side of the substrate, and air holes are formed in the passivation layer and penetrate through the passivation layer. The pixel limiting layer is arranged on the side, away from the substrate, of the passivation layer and extends into the air holes. The protection layer is arranged on the side, away from the substrate, of the pixel limiting layer, and at least part of the orthographic projection of the air holes on the substrate is located in the orthographic projection range of the protection layer on the substrate. The protection layer is arranged at the air hole to protect the pixel limiting layer in the air hole, so that the over-etching phenomenon of the pixel limiting layer in the air hole is prevented.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0002] Organic Light Emitting Diode (OLED) display technology is considered as the most potential new display technology of the next generation. Compared with liquid crystal display technology, OLED display technology has the advantages of low energy consumption, low cost, self-luminous, wide viewing angle and fast response speed.

[0003] In the preparation process of a conventional OLED display panel, a fine metal mask (FMM) is usually used to realize the patterning of light-emitting pixels. FMM technology is mature and has rich mass production experience. However, FMM technology also has the problems of limited precision and high cost. Fine metal mask-free technology eliminates the limitations of display screen size, resolution and other screen performance in the conventional OLED process, and has the advantages of high performance, full-size and agile delivery. The patents CN118251982A, CN116648095A, CN117062489A, CN118742138A, CN118678783A, CN118660598A, CN118675450A, CN118824188A, CN118781966A disclose the related content of fine metal mask-free technology, for reference.

[0004] However, the display effect of the current OLED display panel is still not ideal. SUMMARY

[0005] The purpose of the present application is to provide a display panel and a display device to solve the problem of poor display effect in related display technology.

[0006] To achieve the above purpose, the present application provides a display panel, which comprises a substrate, a passivation layer, a pixel definition layer and a protection layer. The passivation layer is arranged on one side of the substrate, and the passivation layer is provided with a gas permeable hole, which penetrates through the passivation layer. The pixel definition layer is arranged on the side of the passivation layer away from the substrate and extends into the gas permeable hole. The protection layer is arranged on the side of the pixel definition layer away from the substrate, and the orthographic projection of the gas permeable hole on the substrate is at least partially located in the orthographic projection range of the protection layer on the substrate.

[0007] Further, the display panel further comprises a first electrode layer, the first electrode layer is arranged on a side of the passivation layer away from the substrate, the first electrode layer comprises a plurality of first electrodes arranged at intervals, and a projection of the air hole on the substrate is located outside a projection range of the first electrode on the substrate. Preferably, the substrate is provided with a plurality of thin film transistors, and the first electrode is electrically connected with the corresponding thin film transistor.

[0008] Further, the material of the protective layer comprises a metal material. Preferably, the material of the protective layer comprises at least one of molybdenum, titanium, molybdenum-tungsten alloy or molybdenum-niobium alloy.

[0009] Further, the protective layer comprises a main body part and a recessed part. The main body part is arranged on a side of the pixel defining layer away from the substrate, and a projection of the passivation layer on the substrate is located within a projection range of the main body part on the substrate. The recessed part is connected with the main body part, and a projection of the recessed part on the substrate is located within a projection range of the air hole on the substrate. A first groove is formed at the air hole on a surface of the recessed part away from the substrate, and an included angle between a side wall of the first groove and a bottom surface of the first groove is 130°-140°. Preferably, the included angle between the side wall of the first groove and the bottom surface of the first groove is 135°.

[0010] Further, a second groove is formed at the air hole on a surface of the pixel defining layer away from the substrate, and the recessed part is located in the second groove. The recessed part comprises a first sub-part and a second sub-part. The first sub-part is arranged on a bottom surface of the second groove, and a surface of the first sub-part away from the substrate is the bottom surface of the first groove. The second sub-part is arranged on a side of the first sub-part away from the substrate, and a surface of the second sub-part facing the first groove is the side wall of the first groove. In a direction perpendicular to a plane in which the substrate is located, a film thickness of the first sub-part of the protective layer is 100-300 angstroms. Preferably, in the direction perpendicular to the plane in which the substrate is located, the film thickness of the first sub-part of the protective layer is 200 angstroms.

[0011] Further, the pixel defining layer comprises a pixel defining part and a plurality of pixel openings formed by the pixel defining part, the pixel openings are arranged correspondingly to the first electrodes, and at least part of the first electrodes is exposed in the corresponding pixel openings.

[0012] Preferably, the display panel further comprises a light-emitting layer, an isolation structure, and a second electrode layer. The light-emitting layer is disposed on a side of the first electrode layer away from the substrate. The isolation structure is disposed on a side of the pixel defining portion away from the substrate. The second electrode layer is disposed on a side of the light-emitting layer away from the substrate and is electrically connected with the isolation structure.

[0013] Further, the isolation structure comprises a plurality of sub-isolation portions arranged at intervals, and the sub-isolation portions enclose an isolation opening, which is in communication with the corresponding pixel opening. Preferably, the gas-permeable hole is located outside the projection range of the sub-isolation portion on the substrate and between the projections of the adjacent two sub-isolation portions on the substrate.

[0014] Further, the light-emitting layer comprises a plurality of light-emitting units at least partially located in the corresponding pixel opening, and the light-emitting unit covers the exposed surface of the first electrode in the corresponding pixel opening and extends to the surface of the pixel defining portion away from the substrate. Preferably, the second electrode layer comprises a plurality of second electrodes, and the second electrode is disposed on a side of the corresponding light-emitting unit away from the substrate and is electrically connected with the isolation structure. Preferably, the projection of the light-emitting unit on the substrate is located within the projection range of the corresponding second electrode on the substrate.

[0015] Further, the isolation structure comprises a support layer and a barrier layer. The support layer is disposed on a side of the pixel defining portion away from the substrate. The barrier layer is disposed on a side of the support layer away from the substrate. The isolation opening penetrates the support layer and the barrier layer, and at least part of the second electrode is disposed in the corresponding isolation opening and is electrically connected with the isolation opening. Preferably, the projection of the support layer on the substrate is located within the projection range of the barrier layer on the substrate. Preferably, the material of the support layer comprises conductive material. Preferably, the material of the barrier layer comprises metal material.

[0016] Further, the isolation structure further comprises a base layer, and the base layer is disposed on a side of the support layer facing the substrate. Preferably, the projection of the support layer on the substrate is located within the projection of the base layer on the substrate. Preferably, the material of the base layer comprises conductive material. Preferably, the material of the base layer is at least partially the same as the material of the protective layer.

[0017] Further, the base layer and the protective layer are disposed in the same layer and are made of the same material. Preferably, the base layer is connected with the protective layer.

[0018] Further, the display panel further comprises an encapsulation film set arranged on a side of the second electrode layer away from the substrate. Preferably, the encapsulation film set comprises a first encapsulation layer, a second encapsulation layer and a third encapsulation layer. The first encapsulation layer is arranged on a side of the second electrode layer away from the substrate and extends to a side of the isolation structure away from the substrate. The second encapsulation layer is arranged on a side of the first encapsulation layer away from the substrate. The third encapsulation layer is arranged on a side of the second encapsulation layer away from the substrate. Preferably, the material of the encapsulation film set comprises at least one of inorganic material and organic material.

[0019] Further, the second encapsulation layer covers the surface of the protective layer away from the substrate. Preferably, the material of the second encapsulation layer comprises organic material.

[0020] Further, the substrate comprises a substrate layer, a pixel circuit layer and a planarization layer. The pixel circuit layer is arranged on a side of the substrate layer, and thin film transistors are located in the pixel circuit layer. The planarization layer is arranged on a side of the pixel circuit layer away from the substrate layer. Preferably, part of the surface of the planarization layer away from the pixel circuit layer is exposed in the gas permeable hole.

[0021] The present application also provides a display device comprising the display panel as described above.

[0022] The advantages of the present application are that, in the display panel and the display device of the present application, the protective layer is arranged at the gas permeable hole to protect the pixel definition layer located in the gas permeable hole, so as to prevent the pixel definition layer in the gas permeable hole from being over-etched, prevent the surface of the substrate from being exposed in the pixel definition layer, and further prevent the water vapor released by the organic film layer in the substrate from corroding the luminescent material through the pixel definition layer, so as to prevent black spots from appearing on the display screen of the display panel and prolong the service life of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the following embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort.

[0024] Figure 1 The figure is a partition diagram of the display panel in an embodiment of the present application;

[0025] Figure 2 The figure is a partition diagram of the display panel in an embodiment of the present application; Figure 1 The figure is a cross-sectional structure diagram of the display panel in an embodiment of the present application at AA' line;

[0026] Figure 3A schematic view of a layer structure of a sub-pixel in an embodiment of the present application;

[0027] Figure 4 A schematic view of a layer structure of a sub-pixel in an embodiment of the present application;

[0028] Figure 5 A circuit diagram of a 2T1C type pixel circuit in an embodiment of the present application;

[0029] Figure 6 A schematic view of a layer structure of a pixel defining layer in an embodiment of the present application;

[0030] Figure 7 A schematic view of a layer structure of a light emitting unit in an embodiment of the present application;

[0031] Figure 8 A schematic view of a layer structure of a light emitting unit in an embodiment of the present application; Figure 2 An enlarged schematic view of a structure of the display panel in the dotted line frame;

[0032] Figure 9 A schematic view of a connection structure between a protective layer and a base portion in another embodiment of the present application;

[0033] Figure 10 A schematic view of a layer structure of a display panel in an embodiment of the present application;

[0034] Figure 11 A flowchart of a display panel preparation method in an embodiment of the present application;

[0035] Figure 12 A schematic view of a three-dimensional structure of a display device in an embodiment of the present application.

[0036] The components in the figures are as follows:

[0037] Display device 1; display panel 10;

[0038] Display region AA; non-display region NA;

[0039] Pixel unit PX; sub-pixel SPX;

[0040] First sub-pixel SPX1; second sub-pixel SPX1;

[0041] Third sub-pixel SPX1; light emitting device OL;

[0042] First light emitting device OL1; second light emitting device OL2;

[0043] Third light emitting device OL3; substrate 110;

[0044] Substrate layer 111; pixel circuit layer 112;

[0045] Thin-film transistor, TFT; Insulating layer 1121;

[0046] Planarization layer 113; Passivation layer 120;

[0047] Vents 121; First electrode layer 130;

[0048] First electrode 131; Pixel definition layer 140;

[0049] Pixel definition portion 141; First sub-layer 1411;

[0050] Second sub-layer 1412; Pixel opening 142;

[0051] Second groove 143; Isolation structure 150;

[0052] Sub-isolation portion 151; Isolation opening 152;

[0053] Support layer 152; Barrier layer 153;

[0054] Base layer 154; Light-emitting layer 160;

[0055] Light-emitting unit 161;

[0056] Second electrode layer 170; Second electrode 171;

[0057] Protection layer 180; Main body portion 181;

[0058] Recess portion 182; First sub-portion 1821;

[0059] Second sub-portion 1822; First groove 183;

[0060] Encapsulation film group 190; First encapsulation layer 191;

[0061] Sub-encapsulation portion 1911; Second encapsulation layer 192;

[0062] Third encapsulation layer 193; Touch control module 200;

[0063] Polarizer / color filter 210; Protection cover plate 220;

[0064] Adhesion layer 230. DETAILED DESCRIPTION

[0065] For the convenience of understanding the present application, the present application will be described more fully below with reference to the accompanying drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present application can be more thoroughly and completely understood.

[0066] It is noted that when a layer is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers can also be present. In addition, it is to be understood that when a layer is referred to as being "on" another layer, it can be directly on the other layer, or intervening layers can also be present. In addition, it is to be understood that the use of the term 'on' includes the layers being directly on each other, with no intervening layers between them, and that the use of the term 'under' includes the layers being directly under each other, with no intervening layers between them.

[0067] In the present document, spatially relative terms such as "beneath", "below", "lower", "above", "upper", and the like can be used for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. For example, if the device described is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0068] In the drawings, the size of layers and regions can be exaggerated for clarity. It will be understood that when a layer or element is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers can also be present. Furthermore, it will be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers can also be present. In addition, like reference numerals are intended to denote like elements throughout the specification.

[0069] In the following description, although the terms such as "first", "second", etc., can be used to describe various components, these components must not be limited to the above terms. The above terms are used only to distinguish one component from another. It will also be understood that the expressions used in the singular form include expressions in the plural form, unless the expressions in the singular form have obviously different meanings from the expressions in the plural form in the context. Furthermore, in the following embodiments, it will also be understood that the terms "include" and / or "have" used herein indicate that there is presence of stated features or components, but do not exclude the presence or addition of one or more other features or components.

[0070] In the following embodiments, when a layer, region, or element is "connected", it can be interpreted that the layer, region, or element is connected not only directly but also through another constituent element interposed therebetween. For example, when a layer, region, element, etc. is described as being connected or electrically connected, the layer, region, element, etc. can be connected or electrically connected not only directly but also through another layer, region, element, etc. interposed therebetween.

[0071] As used in the specification, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of," when preceding the

[0072] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0073] It will be further understood that the terms "comprises" and / or "comprising," or "includes" and / or "including" when used in this specification, specify the presence of stated features, integers, steps, operations, elements, or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or groups thereof.

[0074] It will be further understood that, when interpreting references to elements, although not explicitly described, the elements are interpreted to include an error range that is acceptable within a range of deviation from a particular value that would be determined by one of ordinary skill in the art. For example, "about," "approximately," or "substantially" can mean within one or more standard deviations, without limitation.

[0075] Furthermore, in the specification, the phrase "plan view schematic diagram" refers to a drawing when the target portion is viewed from above, and the phrase "cross-sectional schematic diagram" refers to a drawing when a section is taken by cutting the target portion vertically and the section is viewed from the side.

[0076] Furthermore, the drawings are not drawn to scale 1:1, and the relative sizes of the elements are drawn in the drawings only by way of example, not necessarily in true proportions.

[0077] The preparation process of a display panel usually has a high-temperature process, however, the organic film layer in the display panel is extremely easy to release trace amounts of water vapor due to changes in material properties in a continuous high-temperature environment. If these water vapors are trapped between the film layers, they will generate swelling pressure with temperature cycling, gradually destroying the bonding force between different film layers, eventually causing structural defects such as bulging and delamination, directly affecting the mechanical stability and optical performance of the display panel. Therefore, in related display technologies, to solve the problems of bulging and delamination, a design scheme of opening a gas permeable hole on one side of the organic film layer is used, through which the water vapor generated in the high-temperature environment is discharged outside the panel in a timely manner, reducing the risk of film layer peeling from the source.

[0078] However, at the gas permeable hole, due to the thin film layer, over-etching phenomenon is prone to occur, resulting in that the bottom organic film layer is directly exposed in the gas permeable hole, and the light emitting material deposited in the subsequent preparation of the light emitting layer will be in contact with the exposed organic film layer in the gas permeable hole. The water vapor continuously released by the exposed organic film layer will be absorbed by the light emitting material adjacent thereto, causing irreversible chemical degradation of the light emitting material, resulting in black spots in the display picture. This phenomenon of generating black spots is called GDS (Growing Dark Spot) defect phenomenon, and the defect phenomenon has a spreading nature - the black spots will continuously expand over time, eventually leading to failure of the entire display area, seriously affecting the service life of the display panel.

[0079] Based on the technical problems proposed in the related display technology, a display panel 10 is proposed in the embodiment of the present application, which comprises a substrate 110, a passivation layer 120, a first electrode layer 130, a pixel definition layer 140 and a protective layer 180 arranged in sequence. The passivation layer 120 is arranged on one side of the substrate 110, and the passivation layer 120 is provided with a gas permeable hole 121 which penetrates the passivation layer 120, and part of the surface of the substrate 110 is exposed in the gas permeable hole 121. The water vapor generated by the film layer in the substrate 110 in the subsequent high-temperature process environment can be discharged through the gas permeable hole 121. The pixel definition layer 140 is arranged on the side of the first electrode layer 130 away from the substrate 110 and extends into the gas permeable hole 121 to cover the exposed surface of the substrate 110 in the gas permeable hole 121. The protective layer 180 is arranged on the side of the pixel definition layer 140 away from the substrate 110 and covers the pixel definition layer 140 in the gas permeable hole 121, thereby protecting the pixel definition layer 140 in the gas permeable hole 121, preventing over-etching phenomenon of the pixel definition layer 140 at the gas permeable hole 121, and further preventing the water vapor released by the organic film layer in the substrate 110 from entering the light emitting material through the gas permeable hole 121.

[0080] As shown in Figure 1 The display panel 10 can be one of an organic light emitting diode display panel 10 (Organic Light Emitting Diode, abbreviated as OLED), a quantum dot electroluminescent display panel 10 (Quantum Dot Light Emitting Diodes, abbreviated as QLED) or an active matrix organic light emitting diode display panel 10 (Active Matrix Organic Light Emitting Diode, abbreviated as AMOLED).

[0081] As shown in Figure 1As shown in FIG. 1, the display panel 10 includes a display region AA having a display function and a non-display region NA disposed around the display region AA. The display region AA of the display panel 10 can have a rectangular shape, or can have a square shape, a circular shape, or another shape such as an elliptical shape.

[0082] The display region AA includes a plurality of pixel units PX arranged in a first direction X and a second direction Y, and the pixel unit PX includes a plurality of sub-pixels SPX displaying different colors. In some embodiments, the pixel unit PX includes a first sub-pixel SPX1, a second sub-pixel SPX1, and a third sub-pixel SPX1, such as the first sub-pixel SPX1 being a sub-pixel SPX capable of emitting red light, the second sub-pixel SPX1 being a sub-pixel SPX capable of emitting green light, and the third sub-pixel SPX1 being a sub-pixel SPX capable of emitting blue light. In some embodiments, the pixel unit PX includes a sub-pixel SPX capable of emitting white light or other color light in addition to the sub-pixels SPX.

[0083] The sub-pixel SPX includes a pixel circuit and a light emitting device OL driven by the pixel circuit to emit light of a corresponding color. The first sub-pixel SPX1 includes a first light emitting device OL1, the second sub-pixel SPX1 includes a second light emitting device OL2, and the third sub-pixel SPX1 includes a third light emitting device OL3. One pixel circuit drives at least one light emitting device OL to emit light. For example, the display region AA includes a normal display region AA and a light-transmitting display region AA, the light-transmitting display region AA being a display region AA corresponding to a sensor and having a light-transmitting property, and the normal display region AA being a display region AA not corresponding to a sensor, one pixel circuit driving one light emitting device OL to emit light in the normal display region AA, and one pixel circuit driving one or more light emitting devices OL to emit light in the light-transmitting display region AA.

[0084] In one embodiment, as shown in FIG. 1, the display panel 10 includes a substrate 110, a passivation layer 120, a first electrode layer 130, and a pixel definition layer 140. Figure 2

[0085] As shown in FIG. 1, the substrate 110 includes a substrate layer 111, a pixel circuit layer 112, and a planarization layer 113. Figure 2 Figure 3 As shown in FIG. 1, the substrate 110 includes a substrate layer 111, a pixel circuit layer 112, and a planarization layer 113.

[0086] ​​The substrate layer 111 can be selected as a hard substrate or a flexible substrate according to requirements. The materials of the hard substrate include glass, quartz, etc. The hard substrate can better support the display panel 10 when selected as the substrate layer 111. When applied to large-size display devices such as televisions and displays, the hard substrate can effectively resist external physical impact, prevent internal structure damage caused by collision and extrusion, and ensure the reliability of picture display. The materials of the flexible substrate include polyimide (PI). The flexible substrate can make the display panel 10 have a flexible feature, and make the display panel 10 be able to realize special display technologies such as folding display, curved display, and rolling display. The flexible substrate not only expands the use scenarios of the display device, but also meets the needs of consumers for portability and personalized display.

[0087] The pixel circuit layer 112 is arranged on one side of the substrate layer 111. The pixel circuit includes a plurality of arrayed thin film transistors TFT and a plurality of signal lines electrically connected to the corresponding thin film transistors TFT. The thin film transistors TFT and the signal lines form a pixel circuit, the light emitting device OL is electrically connected to the corresponding pixel circuit, and emits light under the driving of the corresponding pixel circuit. In addition, the pixel circuit layer 112 further includes at least one insulating layer 1121, which can include at least one inorganic layer having inorganic material. The inorganic layer having inorganic material has good insulation performance and good water and oxygen isolation performance, thereby achieving the effect of insulating and protecting the conductive structure in the pixel circuit layer 112, to prolong the service life of the display panel 10. Preferably, the inorganic material can be selected from at least one of inorganic materials such as silicon oxide (SiOx) and silicon nitride (SiNx). In addition, the substrate 110 further includes a plurality of signal lines for transmitting display signals to the pixel circuit, such as a scanning signal line for transmitting a scanning signal Scan, a data signal line for transmitting a data signal Data, and a light emitting signal line for transmitting a light emitting signal EM.

[0088] A planarization layer 113 covers the surface of the pixel circuit layer 112 facing away from the substrate layer 111. This planarization layer 113 is used to planarize the surface of the pixel circuit layer 112 facing away from the substrate layer 111, so as to facilitate the subsequent fabrication of the light-emitting device OL. This prevents problems such as uneven deposition of organic light-emitting materials and abnormal device structure in the light-emitting device OL due to uneven fabrication surface, thereby reducing the production defect rate of the light-emitting device OL and improving the product quality of the display panel 10. At the same time, improving the flatness of the substrate 110 surface can also improve the flatness of the metal reflective surface (i.e., the reflective surface of the metal electrode in the light-emitting device OL) in the light-emitting device OL, reducing light scattering and loss, thereby improving the display brightness of the display panel 10 at the front viewing angle. Optionally, the material of the planarization layer 113 includes organic materials. Organic materials have good fluidity and flexibility, which can better adhere to the surface of the pixel circuit layer 112 and achieve a better planarization effect.

[0089] like Figure 2 and Figure 8 As shown, the passivation layer 120 is disposed on the side of the planarization layer 113 in the substrate 110 opposite to the substrate layer 111, and is used to passivate and protect the conductive material in the first electrode layer 130, preventing the conductive material in the first electrode layer 130 from being corroded and oxidized by moisture released from the planarization layer 113, thereby improving the service life of the first electrode layer 130. The passivation layer 120 has multiple vent holes 121 that penetrate the passivation layer 120, allowing moisture released from the planarization layer 113 in subsequent processes to be discharged to the outside of the panel through the vent holes 121. This prevents bulging and film separation between the planarization layer 113 and other film layers stacked on top of it, thereby improving the adhesion between the planarization layer 113 and other film layers stacked on top of it, and improving the structural stability of the display panel 10.

[0090] In the non-display region NA, the display panel 10 further comprises a driving device, which can be selected from electronic devices such as a flexible printed circuit (FPC), a driving chip (IC), etc. The driving device can send display signals to the display region AA through signal lines according to display requirements, so that the display region AA can light up the corresponding light emitting device OL according to the display signals, thereby realizing the control of the displayed picture. Specifically, the driving device can be bound with the substrate 110 in the non-display region NA through a COF (Chip On Film) process or a FOP (FPC On Panel) process, so as to electrically connect the driving device with one end of the signal lines in the pixel circuit layer 112. The signal lines extend from the non-display region NA to the display region AA, and the other end thereof is electrically connected with the thin film transistor TFT in the display region AA. The driving device transmits the display signals to the corresponding thin film transistor TFT through the signal lines, the thin film transistor TFT is turned on according to the display signals and lights up the corresponding light emitting device OL, so as to make the light emitting device OL at the corresponding position emit light, thereby constituting an image picture. At the same time, the driving chip can also realize the change of the display picture by transmitting different display signals.

[0091] As shown in Figure 5 , the pixel circuit comprises a driving transistor T1 and a data transistor T2. The source of the data transistor T2 is connected with a data signal line for transmitting a data signal Data, the gate of the data transistor T2 is connected with a scanning signal line for transmitting a scanning signal Scan, the drain of the data transistor T2 is connected with the gate of the driving transistor T1, the two ends of a storage capacitor C1 are respectively connected with the gate and the source of the driving transistor T1, and the drain of the driving transistor T1 is connected with the light emitting device OL. Figure 5 is one embodiment of the pixel circuit, and the pixel circuit of the present application is not limited to Figure 5 the 2T1C pixel circuit shown in , but can also be other pixel circuits, such as 7T1C, 8T1C pixel circuits, etc.

[0092] Figure 2 and Figure 3As shown, the first electrode layer 130 is disposed on the side opposite to the passivation layer 120, and includes a first electrode 131 disposed at intervals. Through-holes are provided in the passivation layer 120 and the planarization layer 113. The first electrode 131 can be electrically connected to the corresponding thin-film transistor (TFT) in the pixel circuit layer 112 through the corresponding through-holes. Furthermore, the orthogonal projection of the first electrode 131 onto the substrate 110 is within the orthogonal projection range of the passivation layer 120 onto the substrate 110, and the orthogonal projection of the vent hole 121 onto the substrate 110 is outside the orthogonal projection range of the first electrode 131 onto the substrate 110. This prevents the first electrode 131 from extending into the vent hole 121, thereby preventing moisture released through the vent hole 121 from corroding the first electrode 131 and extending the service life of the first electrode layer 130.

[0093] Optionally, the first electrode 131 may include a multilayer structure. For example, the first electrode 131 may include a reflective layer and a pair of conductive oxide layers respectively covering the upper and lower surfaces of the reflective layer. The reflective layer can be formed, for example, using silver, a metal material with excellent light reflectivity. Each conductive oxide layer can be formed, for example, from a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO).

[0094] A pixel defining layer 140 is disposed on the side of the first electrode layer 130 facing away from the substrate 110 and extends into the vent hole 121, covering the exposed surface of the planarization layer 113 in the vent hole 121. The pixel defining layer 140 includes a pixel defining portion 141 and a plurality of pixel openings 142 formed by the pixel defining portion 141. Each pixel opening 142 is correspondingly disposed with a first electrode 131, and at least a portion of the first electrode 131 is exposed in the corresponding pixel opening 142. Optionally, the pixel defining layer 140 is made of an inorganic material. For example, the pixel defining layer 140 can be formed using at least one inorganic insulating material selected from silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxide nitride (SiON).

[0095] In one implementation, such as Figure 6 As shown, the pixel defining layer 140 includes multiple sub-layers, including a first sub-layer 1411 and a second sub-layer 1412 stacked sequentially along the direction away from the substrate 110 (i.e., the third direction Z), that is, the pixel defining layer 140 can adopt a double-layer design.

[0096] Exemplarily, the film-forming property of the first sub-layer 1411 is better than that of the second sub-layer 1412. That is, under the condition of equal thickness, the first sub-layer 1411 can better cover the step structure formed by the first electrode 131 than the second sub-layer 1412, and no crack is generated. Conversely, to obtain the same step coverage effect, the thickness of the first sub-layer 1411 is required to be thinner than that of the second sub-layer 1412, that is, the thickness requirement of the first sub-layer 1411 is relatively low, which is beneficial to product thinning, and further, the good film-forming property means that the formed film has good coverage and is more compact, which is more conducive to water vapor isolation.

[0097] Exemplarily, the etching resistance of the second sub-layer 1412 is better than that of the first sub-layer 1411. Since the pixel definition layer 140 deviates from the array substrate side and will be etched during the preparation of the display panel 10, by selecting a material with better etching resistance as the second sub-layer 1412, the etching resistance of the pixel definition layer 140 can be improved, and the reliability of the display panel 10 is further improved.

[0098] Exemplarily, the materials of the first sub-layer 1411 and the second sub-layer 1412 are different. For example, the material of the first sub-layer 1411 includes silicon nitride, and the material of the second sub-layer 1412 includes silicon oxide.

[0099] Exemplarily, the thickness of the first sub-layer 1411 is greater than or equal to 1000 microns and less than or equal to 5000 microns. For example, the thickness of the first sub-layer 1411 is 1000 microns, 2000 microns, 3000 microns, 4000 microns, 5000 microns, etc.

[0100] Exemplarily, the thickness of the second sub-layer 1412 is greater than or equal to 500 microns and less than or equal to 3000 microns. For example, the thickness of the second sub-layer 1412 is 500 microns, 1000 microns, 2000 microns, 3000 microns, etc.

[0101] Further, as shown in FIG. 1B, the display panel 10 further includes a separation structure 150, a light-emitting layer 160, and a second electrode layer 170. Figure 2 Figure 3 Further, as shown in FIG. 1B, the display panel 10 further includes a separation structure 150, a light-emitting layer 160, and a second electrode layer 170.

[0102] ​The isolation structure 150 is disposed on the side of the pixel defining layer 140 away from the substrate 110, and the orthogonal projection of the isolation structure 150 on the substrate 110 is within the orthogonal projection range of the pixel defining layer 140 on the substrate 110. The isolation structure 150 includes a plurality of sub-isolation portions 151 arranged at intervals, and each sub-isolation portion 151 encloses a plurality of isolation openings 152, which are in communication with the corresponding pixel openings 142. The gas permeable hole 121 is outside the orthogonal projection range of the sub-isolation portion 151 on the substrate 110, and the orthogonal projection of the gas permeable hole 121 on the substrate 110 is between the orthogonal projections of two adjacent sub-isolation portions 151 on the substrate 110. The isolation structure 150 is used to block the materials of the light-emitting layer 160 and the second electrode layer 170, and disconnect the materials of the light-emitting layer 160 and the second electrode layer 170 in adjacent isolation openings 152, thereby isolating different light-emitting devices OL. Further, the orthogonal projection of the isolation opening 152 and the corresponding pixel opening 142 on the substrate 110 can be the same or different. Generally, the area of the orthogonal projection of the isolation opening 152 on the substrate 110 is greater than the area of the orthogonal projection of the pixel opening 142 on the substrate 110, and the orthogonal projection of the pixel opening 142 of the light-emitting device OL on the substrate 110 overlaps with the orthogonal projection of the isolation opening 152 on the substrate 110, i.e., the orthogonal projection of the pixel opening 142 on the substrate 110 is within the orthogonal projection range of the corresponding isolation opening 152 on the substrate 110.

[0103] It can be understood that in other embodiments of the present application, the isolation structure 150 can be disposed in the groove of the pixel defining layer 140. Alternatively, the display panel 10 can also not be provided with the pixel defining layer 140, and the isolation structure 150 is disposed on the side of the substrate 110 and in contact with the side of the substrate 110.

[0104] The light-emitting layer 160 is disposed on the side of the first electrode layer 130 away from the substrate 110, and the light-emitting layer 160 includes a plurality of light-emitting units 161, each of which is partially located in the corresponding pixel opening 142, covers the exposed surface of the first electrode 131 in the corresponding pixel opening 142, and extends from the exposed surface of the first electrode 131 to the side of the pixel defining layer 141 away from the substrate 110.

[0105] Specifically, as Figure 7As shown in FIG. 1, each light emitting unit 161 includes a hole functional layer, an emitting layer (EML) and an electron functional layer which are sequentially stacked in the third direction Z. The hole functional layer is disposed on the surface of the first electrode 131 facing away from the substrate 110, the emitting layer is disposed on the surface of the hole functional layer facing away from the substrate 110, and the electron functional layer is disposed on the surface of the emitting layer facing away from the substrate 110. Further, the hole functional layer includes a hole injection layer (HIL) and a hole transport layer (HTL) which are sequentially stacked in the third direction Z. The hole functional layer is used to transition the potential barrier difference between the first electrode 131 and the emitting layer, so that more holes can smoothly cross the potential barrier difference to reach the emitting layer. The electron functional layer includes an electron transport layer (ETL) and an electron injection layer (EIL) which are sequentially stacked in the third direction Z. The electron functional layer is used to transition the potential barrier difference between the second electrode 171 and the emitting layer, so that more electrons can smoothly cross the potential barrier difference to reach the emitting layer. The material of the emitting layer includes an organic fluorescent material. Holes and electrons meet and combine in the emitting layer to excite the organic fluorescent material in the emitting layer to produce light radiation, thereby realizing light emitting display.

[0106] Optionally, the light emitting unit 161 can further include a hole blocking layer (HBL) and an electron blocking layer (EBL). The hole blocking layer is disposed on the side of the emitting layer facing away from the hole functional layer. The hole blocking layer is used to block the excitons in the emitting layer from scattering out at the electron functional layer, thereby improving the mobility of the electrons. The electron blocking layer is disposed on the side of the emitting layer facing away from the electron functional layer. The electron blocking layer is used to block the excitons in the emitting layer from scattering out at the hole functional layer, thereby providing the mobility of the holes.

[0107] It can be understood that in other embodiments of the present application, the hole functional layer can only include one of the hole injection layer or the hole transport layer, and the electron functional layer can only include one of the electron transport layer or the electron injection layer.

[0108] As Figure 2 and Figure 3As shown in the figure, the second electrode layer 170 is arranged on the side of the light-emitting layer 160 away from the substrate 110, and the second electrode layer 170 includes a plurality of second electrodes 171, one second electrode 171 is arranged on each light-emitting unit 161, and the orthographic projection of the light-emitting unit 161 on the substrate 110 is located in the orthographic projection range of the second electrode 171 on the substrate 110, that is, the second electrode 171 covers the surface of the light-emitting unit 161 away from the substrate 110 and extends to the sidewall of the isolation structure 150 to be electrically connected with the isolation structure 150. Optionally, the material of the second electrode 171 includes metal, for example, the second electrode layer 170 can be formed of metal materials such as magnesium-silver alloy (MgAg).

[0109] The pixel definition layer 140 defines the size and position of each light-emitting unit 161 in the light-emitting layer 160 by opening pixel openings 142 of corresponding sizes, ensures that each light-emitting device OL is arranged in the display panel 10 in an orderly and uniform manner, thereby ensuring that the picture displayed by the display panel 10 is bright and uniform in color, and improving the display effect of the display panel 10. The light-emitting layer 160 and the second electrode layer 170 are isolated by the isolation structure 150 to form a plurality of light-emitting units 161 and second electrodes 171 at least partially located in the corresponding isolation openings 152 and the corresponding pixel openings 142, and the light-emitting unit 161 is electrically connected with the corresponding first electrode 131 and the corresponding second electrode 171 and is combined to form a light-emitting device OL.

[0110] The first electrode 131 can be an anode, and the second electrode 171 can be a cathode. The first electrode 131 of each light emitting device OL can be electrically connected to a corresponding thin film transistor TFT in the substrate 110 through a via, so as to be connected to a pixel circuit connected to the thin film transistor TFT, so that the pixel circuit drives the light emitting device OL to emit light. The second electrode 171 can obtain a power supply signal by being electrically connected to the isolation structure 150. The pixel circuit electrically turns on the corresponding light emitting device OL according to the corresponding display signal. The first electrode 131 and the second electrode 171 of the light emitting device OL transmit electrons and holes to the light emitting unit 161, respectively, after being electrically turned on. The electrons and holes combine to form excitons in the light emitting unit 161, thereby converting electrical energy into light energy, prompting the light emitting functional layer in the light emitting unit 161 to emit light, lighting the corresponding light emitting device OL, and forming a display image. Specifically, in order to enable the light emitting unit 161 to emit light, a pixel voltage is provided to the first electrode 131 and a common voltage is provided to the second electrode 171, and a potential difference is formed between the first electrode 131 and the second electrode 171, so that the light emitting unit 161 arranged between the first electrode 131 and the second electrode 171 emits light. In an embodiment, if a potential difference is formed between the first electrode 131 and the second electrode 171 of the first light emitting device OL1, the light emitting functional layer of the light emitting unit 161 in the light emitting device OL emits red light; if a potential difference is formed between the first electrode 131 and the second electrode 171 of the second light emitting device OL2, the light emitting functional layer of the light emitting unit 161 in the second light emitting device OL2 emits green light; and if a potential difference is formed between the first electrode 131 and the second electrode 171 of the third light emitting device OL3, the light emitting functional layer of the light emitting unit 161 in the third light emitting device OL3 emits blue light. The display of a color image can be realized by uniformly distributing these light emitting devices OL capable of emitting light of different colors.

[0111] It can be understood that in the light emitting devices OL capable of emitting light of different colors, the light emitting materials used in the light emitting functional layer of the light emitting unit 161 are also different, and the light emitting efficiency and service life of the light emitting devices OL of different colors also have differences due to the different light emitting materials used. Therefore, in other embodiments of the present application, the light emitting efficiency and service life of light emitting devices OL of different colors can be balanced by setting different sizes of pixel openings 142, for example, the orthographic projection area of the pixel opening 142 provided with the first light emitting device OL1 on the substrate 110 is smaller than the orthographic projection area of the pixel opening 142 provided with the second light emitting device OL2 on the substrate 110, and the orthographic projection area of the pixel opening 142 provided with the second light emitting device OL2 on the substrate 110 is smaller than the orthographic projection area of the pixel opening 142 provided with the third light emitting device OL3 on the substrate 110, so as to ensure that the light emitting efficiency and service life of light emitting devices OL of different colors are similar.

[0112] Further, as shown in Figure 2 the plurality of isolation openings 152 include a plurality of first isolation openings 1521, a plurality of second isolation openings 1522 and a plurality of third isolation openings 1523, the first light emitting device OL1 is disposed corresponding to the first isolation openings 1521, the second light emitting device OL2 is disposed corresponding to the second isolation openings 1522, and the third light emitting device OL3 is disposed corresponding to the third isolation openings 1523. In an embodiment of the present application, one light emitting device OL is disposed corresponding to one isolation opening 152, for example, the first light emitting device OL1 is disposed one-to-one corresponding to the first isolation openings 1521, the second light emitting device OL2 is disposed one-to-one corresponding to the second isolation openings 1522, and the third light emitting device OL3 is disposed one-to-one corresponding to the third isolation openings 1523. At least part of the first light emitting device OL1 is disposed in the corresponding first isolation openings 1521, at least part of the second light emitting device OL2 is disposed in the corresponding second isolation openings 1522, and at least part of the third light emitting device OL3 is disposed in the corresponding third isolation openings 1523. In another embodiment of the present application, a plurality of light emitting devices OL are disposed corresponding to one isolation opening 152, for example, a plurality of light emitting devices OL of the same color are disposed corresponding to one isolation opening 152.

[0113] In one example, as shown in Figure 2 and Figure 3As shown in the figure, the isolation structure 150 includes a support layer 152 and a barrier layer 153 which are stacked in a direction away from the substrate 110 (i.e. the third direction Z), and the support layer 152 and the barrier layer 153 enclose the isolation opening 152. The support layer 152 is disposed on the side of the pixel defining portion 141 away from the substrate 110, and the barrier layer 153 is stacked on the side of the support layer 152 away from the substrate 110. The width of the barrier layer 153 in the first direction X is greater than the width of the support layer 152 in the first direction X, so that the two end portions of the barrier layer 153 are protrudingly disposed compared with the side surface of the support layer 152, and this shape of the isolation structure 150 is also called overhanging shape. The orthogonal projection of the barrier layer 153 on the substrate 110 covers the orthogonal projection of the support layer 152 on the substrate 110, and the area of the orthogonal projection of the barrier layer 153 on the substrate 110 is greater than the area of the orthogonal projection of the support layer 152 on the substrate 110, so that the barrier layer 153 can completely shield the support layer 152, and then when the light emitting unit 161 is prepared, the material of the light emitting unit 161 can be prevented from being prepared on the support layer 152, and when the second electrode 171 is prepared, the coverage area of the second electrode 171 can be made greater than the coverage area of the light emitting layer 160 by adjusting the evaporation angle of the material of the second electrode 171, so as to form the light emitting unit 161 and the second electrode 171 with different coverage areas, thereby improving the bonding yield between the second electrode 171 and the isolation structure 150. The materials of the support layer 152 and the barrier layer 153 are different, and the etching rate of the barrier layer 153 is less than the etching rate of the support layer 152. Specifically, the material of the support layer 152 includes a conductive material; optionally, the material of the support layer 152 includes at least one of aluminum (Al) and aluminum alloy, and the aluminum alloy can include at least one of aluminum-neodymium alloy (AlNd), aluminum-yttrium alloy (AlY) or aluminum-silicon alloy (AlSi). The barrier layer 153 can be a single-layer structure or a multi-layer structure. When the barrier layer 153 is a single-layer structure, the material of the barrier layer 153 can include at least one of titanium (Ti), titanium nitride (TiN), molybdenum (Mo), tungsten (W), molybdenum-tungsten alloy (WMo) or molybdenum-niobium alloy (WNb). When the barrier layer 153 is a multi-layer structure, one of the materials of the barrier layer 153 includes at least one of titanium (Ti), titanium nitride (TiN), molybdenum (Mo), tungsten (W), molybdenum-tungsten alloy (WMo) or molybdenum-niobium alloy (WNb), and the other material of the barrier layer 153 can include a conductive oxide or an inorganic insulating material, and the conductive oxide is, for example, indium tin oxide (ITO) or indium zinc oxide (IZO).

[0114] In some embodiments, the isolation structure 150 can further include a base layer 154 disposed on the side of the support layer 152 facing the substrate 110, the base layer 154 having a width in the first direction X greater than the width of the support layer 152 in the first direction X, i.e. the base layer 154 is convexly disposed relative to the support layer 152 in the direction facing the isolation opening 152, and the orthographic projection of the support layer 152 on the substrate 110 is within the orthographic projection of the base layer 154 on the substrate 110. The material of the base layer 154 includes a conductive material, and optionally, the material of the base layer 154 can include at least one of molybdenum (Mo), titanium (Ti), titanium nitride (TiN), molybdenum tungsten alloy (MoW), or molybdenum niobium alloy (MoNb).

[0115] The second electrode 171 is connected to the support layer 152 of the isolation structure 150, and / or the second electrode 171 is connected to the base layer 154 of the isolation structure 150. Specifically, when the isolation structure 150 includes a three-layer structure of the barrier layer 153, the support layer 152, and the base layer 154, the second electrode 171 can extend to the side surface of the base layer 154 facing away from the array substrate to be connected to the base layer 154, at this time, the second electrode 171 can be connected to the support layer 152 or not. Figure 4 As shown in FIG. 1C, when the second electrode 171 is not connected to the support layer 152, the orthographic projection of the light emitting unit 161 on the substrate 110 has a gap with the orthographic projection of the base layer 154 on the substrate 110, the second electrode 171 fills the gap and extends to the surface of the base layer 154, so as to facilitate the electrical connection between the second electrode 171 and the base layer 154, and at this time, the orthographic projection of the second electrode 171 on the substrate 110 is outside the orthographic projection of the support layer 152 on the substrate 110, and the second electrode 171 can be indirectly connected to the support layer 152 through the base layer 154. Figure 3 As shown in FIG. 1D, when the second electrode 171 is connected to the support layer 152, the orthographic projection of the light emitting unit 161 on the substrate 110 has a gap with the orthographic projection of the support layer 152 on the substrate 110, the second electrode 171 fills the gap, covers the exposed surface of the base layer 154 in the gap, and extends to the sidewall of the support layer 152, so as to facilitate the direct electrical connection between the second electrode 171 and the support layer 152. In this case, the cross-sectional shape of the support layer 152 in the third direction Z between two adjacent isolation openings 152 is trapezoidal, and the width of the support layer 152 close to the barrier layer 153 is smaller than the width of the support layer 152 close to the substrate 110, so as to facilitate the climbing of the second electrode 171 and reduce the difficulty of the lap joint between the second electrode 171 and the support layer 152.

[0116] As shown in FIG. 1E, the second electrode 171 can be connected to the support layer 152 and the base layer 154 at the same time, and the orthographic projection of the second electrode 171 on the substrate 110 is within the orthographic projection of the support layer 152 on the substrate 110. Figure 2 and Figure 8As shown in FIG. 1, to prevent the pixel definition layer 140 in the air vent hole 121 from being exposed to the surface of the planarization layer 113 due to over-etching, a protective layer 180 is arranged on the side of the pixel definition layer 140 away from the substrate 110. The protective layer 180 is located between two adjacent sub-isolation portions 151, and covers the pixel definition layer 140 in the air vent hole 121, i.e., the orthographic projection of the air vent hole 121 on the substrate 110 is located within the orthographic projection range of the protective layer 180 on the substrate 110, so as to protect the pixel definition layer 140 in the through hole by the protective layer 180, prevent the pixel definition layer 140 from being over-etched, solve a series of problems caused by the over-etching of the pixel definition layer 140, prevent the degradation of the light-emitting material due to the absorption of the planarization layer 113, and further solve the problem of GDS black spot defect in the display picture, thereby prolonging the service life of the display panel 10.

[0117] Specifically, the protective layer 180 is located between two adjacent sub-isolation portions 151, and includes a main body portion 181 and a recessed portion 182. The main body portion 181 is arranged on the surface of the pixel definition portion 141 away from the substrate 110, and the orthographic projection of the passivation layer 120 on the substrate 110 is located within the orthographic projection range of the main body portion 181 on the substrate 110. The recessed portion 182 is connected to the main body portion 181, and the orthographic projection of the recessed portion 182 on the substrate 110 is located within the orthographic projection range of the air vent hole 121 on the substrate 110. The surface of the pixel definition portion 141 in the air vent hole 121 away from the substrate 110 forms a second groove 143 with the recessed structure between the air vent hole 121 and the passivation layer 120, and the protective layer 180 covers the sidewall and bottom surface of the second groove 143, so as to cause the recessed portion 182 of the protective layer 180 to be located in the second groove 143, and form a first groove 183 with the surface of the recessed portion 182 away from the substrate 110 corresponding to the air vent hole 121. The sidewall of the first groove 183 and the bottom surface of the first groove 183 have an included angle a. Optionally, the angle of the included angle a can be 130°-140°, which can ensure that the recessed portion 182 completely covers each corner in the second groove 143, prevents the pixel definition portion 141 corresponding to the second groove 143 from being exposed, and also provides excellent step coverage for subsequent film attachment. For example, the included angle a between the sidewall of the groove and the bottom surface of the groove can be one of 131°, 133°, 135°, 137°, and 139°. Preferably, the angle of the included angle between the sidewall of the groove and the bottom surface of the groove is 135°.

[0118] Further, the recess 182 located in the second groove 143 includes a first sub-portion 1821 and a second sub-portion 1822. The first sub-portion 1821 is disposed on the bottom surface of the second groove 143, and the bottom surface of the first groove 183 is the surface of the first sub-portion 1821 facing away from the substrate 110. The second sub-portion 1822 is disposed on the side of the first sub-portion 1821 facing away from the substrate 110, and the sidewall of the first groove 183 is the surface of the second sub-portion 1822 facing the first groove 183. Optionally, in the direction perpendicular to the plane on which the substrate 110 is located, the film thickness of the first sub-portion 1811 is 100-300 angstroms, which can effectively reduce the risk of over-etching and provide excellent step coverage for subsequent thin film attachment. For example, the film thickness of the first sub-portion 1811 can be one of 120 angstroms, 150 angstroms, 180 angstroms, 200 angstroms, 230 angstroms, 260 angstroms, or 290 angstroms.

[0119] Optionally, the material of the protective layer 180 includes a metal material. In an embodiment of the present application, the protective layer 180 is disposed in the same layer and of the same material as the base layer 154 in the isolation structure 150, i.e., the protective layer 180 can be prepared simultaneously with the base layer 154 in the isolation structure in the same process, i.e., the material of the protective layer 180 is at least partially the same as the material of the base layer 154 in the isolation structure 150. Further optionally, the material of the protective layer 180 can include at least one of molybdenum (Mo), titanium (Ti), molybdenum-tungsten alloy (MoW), or molybdenum-niobium alloy (MoNb). Preferably, the material of the protective layer 180 includes molybdenum (Mo).

[0120] In an embodiment of the present application, as shown in Figure 8 the protective layer 180 has a gap between the two adjacent sub-isolation portions 151 on the two sides, i.e., the protective layer 180 is disconnected between the two adjacent base layers 154 on the two sides, thereby preventing the conductive structure (in this embodiment, the conductive structure is the protective layer 180) between the two adjacent sub-pixels SPX from affecting the light-emitting efficiency of the sub-pixels SPX and reducing the impact of the conductive structure between the two adjacent sub-pixels SPX on the resistance value of the pixel circuit in the adjacent sub-pixels SPX. The structure of the protective layer 180 can be formed by retaining part of the conductive material between the two adjacent base layers 154 during the patterning process (such as etching process) of the base layer 154, without the need for additional process, which does not increase the production cost of the display panel 10 and also does not affect the production efficiency of the display panel 10.

[0121] Further, in another embodiment of the present application, as shown in Figure 9As shown in the figure, the two sides of the protective layer 180 can be connected with the base layer 154 in the adjacent sub-isolation part 151 respectively, that is, there is no gap between the protective layer 180 and the base layer 154 in the adjacent sub-isolation part, so that the precision requirement of the base layer 154 when being patterned can be reduced, the preparation difficulty of the base layer 154 is reduced, and the structural stability of the isolation part is improved. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative labor fall within the scope of the present application.

[0122] As Figure 10As shown in FIG. 1, the display panel 10 further comprises an encapsulation film set 190 arranged on the side of the second electrode layer 170 away from the substrate 110. Specifically, the encapsulation film set 190 comprises a first encapsulation layer 191, a second encapsulation layer 192 and a third encapsulation layer 193 arranged in sequence. The second encapsulation layer 192 and the third encapsulation layer 193 are continuously arranged at least on the display area AA as a whole, and a part of them is also arranged on the non-display area NA. The first encapsulation layer 191 comprises a plurality of sub-encapsulation portions 1911 arranged on the side of the light-emitting device OL away from the substrate 110, and at least one sub-encapsulation portion 1911 is arranged in each isolation opening 152. The sub-encapsulation portion 1911 extends from the surface of the second electrode 171 away from the substrate 110, through the sidewall of the isolation structure 150, to the surface of the isolation structure 150 away from the substrate 110. The second encapsulation layer 192 is arranged on the side of the first encapsulation layer 191 away from the substrate 110, and fills the gap between the isolation opening 152 and the sub-encapsulation portion 1911. That is, the second encapsulation layer 192 also covers the surface of the protective layer 180 between the two adjacent sub-isolation portions 151 away from the substrate 110, thereby improving the flatness of the surface of the panel. The third encapsulation layer 193 is arranged on the side of the second encapsulation layer 192 away from the substrate 110. The encapsulation film set 190 is used to encapsulate and protect the display device in the display panel 10, and can be prepared by a thin film encapsulation (TFE) process. The material of the encapsulation film set 190 comprises at least one of an inorganic material and an organic material. Specifically, the material of the first encapsulation layer 191 and the third encapsulation layer 193 can comprise an inorganic material, and can be prepared by a chemical vapor deposition (CVD) process. The material of the second encapsulation layer 192 can comprise an organic insulating material, and can be prepared by a coating process or an inkjet printing (IJP) process. Optionally, the inorganic material of the first encapsulation layer 191 and the third encapsulation layer 193 can be at least one of silicon oxide (SiOx) and silicon nitride (SiNx), and the organic insulating material of the second encapsulation layer 192 can be at least one of an epoxy resin and an acrylic resin.

[0123] For example, the sub-encapsulation portion 1911 comprises a first segment and a second segment connected to each other. The first segment is arranged in the isolation opening 152 and on the side of the second electrode 171 away from the substrate 110. The second segment is arranged on the side of the isolation structure 150 facing the isolation opening 152. The surface of the first segment away from the substrate 110 and the surface of the second segment away from the isolation structure 150 are at least partially connected to each other to enclose a gap space.

[0124] For example, the first segment can not be connected to the side surface of the substrate 110, and the second segment can not be connected to the side surface of the isolation structure 150.

[0125] Further, in order to realize more functions and guarantee the overall performance of the display panel 10, a series of other important components are integrated in the display panel 10. Specifically, the display panel 10 can further include a touch module 200, a polarizer 210, and a protective cover 220 which are sequentially arranged on the side of the encapsulation module away from the substrate 110.

[0126] The touch module 200 is provided with a plurality of touch wires. The touch wires can recognize the position of a finger touch by sensing the change of capacitance, so that the display panel 10 can realize a touch control function, thereby improving the interaction experience between the user and the display panel 10. Optionally, the touch module 200 can be prepared on the surface of the encapsulation module away from the substrate 110 by a touch integration technology (Touch On Encapsulation, TOE for short).

[0127] The polarizer 210 (POL for short) is used to modulate the light emitted by the display panel 10 into polarized light, so that the light has a specific polarization direction during propagation, effectively improving the contrast and color saturation of the display image. At the same time, the polarizer 210 is also used to prevent ambient light from entering the inside of the display panel 10, thereby avoiding the interference of ambient light with display light, ensuring that the display light can stably exit, thereby improving the display effect of the display panel 10 and bringing an excellent visual experience to the user. Optionally, in other embodiments of the present application, the polarizer 210 can be replaced by a color filter 210 (CF for short), thereby thinning the overall thickness of the display panel 10 while filtering light to achieve lightness. The color filter 210 can be prepared on the side of the touch module 200 away from the substrate 110 by a color film integration technology (Color Filter on Encapsulation, COE for short).

[0128] The protective cover 220 is arranged on the side of the polarizer 210 or the color filter 210 away from the substrate 110. The protective cover 220 can be made of ultra-thin flexible glass (UTG for short), thereby protecting the surface of the display panel 10 without affecting the flexibility of the display panel 10, improving the surface friction resistance and impact resistance of the display panel 10, and thereby improving the service life of the display panel 10.

[0129] Further, the display panel 10 can further include a plurality of adhesive layers 230 for improving the bonding strength between two adjacent film layers in the display panel 10, preventing the film layers in the display panel 10 from bulging, peeling off, and the like. Specifically, as shown in Figure 10 The polarizer 210 can be bonded to the side of the touch module 200 away from the substrate 110 through an adhesive layer 230, and the protective cover plate 220 can be bonded to the side of the polarizer 210 away from the substrate 110 through an adhesive layer 230. Optionally, the material of the adhesive layer 230 includes at least one of an optically clear adhesive (OCA) and a pressure sensitive adhesive (PSA), for example, the adhesive layer 230 between the polarizer 210 and the protective cover plate 220 can adopt an optically clear adhesive, and the adhesive layer 230 between the touch module 200 and the polarizer 210 can adopt a pressure sensitive adhesive.

[0130] The manufacturing method of the display panel 10 in an embodiment of the present application will be described below.

[0131] As shown in Figure 11 The manufacturing method of the display panel 10 includes:

[0132] Step S11) providing a substrate 110:

[0133] The substrate 110 includes a substrate layer 111, a pixel circuit layer 112, and a planarization layer 113 arranged in sequence.

[0134] Step S12) forming a passivation layer 120 and a gas permeable hole 121 on one side of the substrate 110:

[0135] An inorganic material layer is prepared on the side of the planarization layer 113 away from the substrate layer 111 through a deposition process to form a passivation layer 120. The passivation layer 120 is patterned through an etching process to form a gas permeable hole 121 in the passivation layer 120.

[0136] Step S13) forming a first electrode layer 130 and a pixel defining layer 140 on the side of the passivation layer 120 away from the substrate 110:

[0137] A layer of conductive material is deposited on the surface of the substrate 110 to form a first electrode layer 130; the first electrode layer 130 is patterned by an etching process to form a plurality of first electrodes 131 arranged at intervals in the first electrode layer 130. A layer of inorganic insulating material is deposited on the substrate 110 to form a pixel defining material layer; the pixel defining material layer is patterned by an etching process on the side away from the first electrode layer 130 to form a pixel defining portion 141 and a pixel opening 142; the pixel defining portion 141 and the pixel opening 142 combine to form a pixel defining layer 140.

[0138] Step S14) Forming an isolation structure 150 and a protective layer 180 on the side of the pixel defining layer 140 away from the substrate 110:

[0139] A layer of conductive material is deposited on the surface of the pixel defining layer 140 away from the substrate 110 to form a base material layer; a layer of conductive material is deposited on the surface of the base material layer away from the substrate 110 to form a support material layer; a layer of metal material is deposited on the surface of the support material layer away from the substrate 110 to form a barrier material layer; the barrier material layer, the support material layer and the base material layer are sequentially patterned to form a plurality of isolation openings 152 penetrating the barrier material layer, the support material layer and the base material layer, and the remaining barrier material layer, support material layer and base material layer form a barrier layer 153, a support layer 152, a base layer 154 and a protective layer 180.

[0140] Step S15) Making a light emitting unit 161, a second electrode 171 and a sub-package portion 1911 on the first light emitting device OL1 of the first light emitting device OL1:

[0141] The light emitting unit 161 of the first light emitting device OL1 is formed on the side of the first electrode layer 130 away from the substrate 110 by an inkjet printing process; the second electrode 171 of the first light emitting device OL1 is formed on the side of the light emitting unit 161 of the first light emitting device OL1 away from the substrate 110 by a deposition process; and the first encapsulation layer 191 is formed on the side of the second electrode 171 of the first light emitting device OL1 away from the substrate 110 by a deposition process, the first encapsulation layer 191 being separated into a plurality of sub-encapsulation portions 1911 by the isolation structure 150. Since the light emitting unit 161, the second electrode 171 and the sub-encapsulation portion 1911 of the first light emitting device OL1 are all formed in a whole layer, the positions of the plurality of first isolation openings 1521, the plurality of second isolation openings 1522 and the plurality of third isolation openings 1523 are all provided with the light emitting unit 161, the second electrode 171 and the first encapsulation layer 191 of the first light emitting device OL1. The light emitting unit 161, the second electrode 171 and the first encapsulation layer 191 of the first light emitting device OL1 at the positions of the plurality of first isolation openings 1521 and the plurality of third isolation openings 1523 are removed by an etching process, so that the light emitting unit 161 and the second electrode 171 of the first light emitting device OL1 and the sub-encapsulation portion 1911 on the first light emitting device OL1 are only formed at the positions of the plurality of second isolation openings 1522.

[0142] Step S16) forming the light emitting unit 161, the second electrode 171 of the second light emitting device OL2 and the sub-encapsulation portion 1911 on the second light emitting device OL2:

[0143] The light emitting unit 161 of the second light emitting device OL2 is formed on the side of the first electrode layer 130 away from the substrate 110 by an inkjet printing process; the second electrode 171 of the second light emitting device OL2 is formed on the side of the light emitting unit 161 of the second light emitting device OL2 away from the substrate 110 by a deposition process; and the first encapsulation layer 191 is formed on the side of the second electrode 171 of the second light emitting device OL2 away from the substrate 110 by a deposition process, the first encapsulation layer 191 being separated into a plurality of sub-encapsulation portions 1911 by the isolation structure 150. Since the light emitting unit 161, the second electrode 171 and the sub-encapsulation portion 1911 of the second light emitting device OL2 are all formed in a whole layer, the positions of the plurality of first isolation openings 1521, the plurality of second isolation openings 1522 and the plurality of third isolation openings 1523 are all provided with the light emitting unit 161, the second electrode 171 and the first encapsulation layer 191 of the second light emitting device OL2. The light emitting unit 161, the second electrode 171 and the first encapsulation layer 191 of the second light emitting device OL2 at the positions of the plurality of first isolation openings 1521 and the plurality of third isolation openings 1523 are removed by an etching process, so that the light emitting unit 161 and the second electrode 171 of the second light emitting device OL2 and the sub-encapsulation portion 1911 on the second light emitting device OL2 are only formed at the positions of the plurality of second isolation openings 1522.

[0144] Step S17) forming the light emitting unit 161 of the third light emitting device OL3, the second electrode 171 and the sub-encapsulation part 1911 on the second light emitting device OL2:

[0145] The light emitting unit 161 of the third light emitting device OL3 is formed on the side of the first electrode layer 130 away from the substrate 110 by an inkjet printing process; the second electrode 171 of the third light emitting device OL3 is formed on the side of the light emitting unit 161 of the third light emitting device OL3 away from the substrate 110 by a deposition process; the first encapsulation layer 191 is formed on the side of the second electrode 171 of the third light emitting device OL3 away from the substrate 110 by a deposition process, and the first encapsulation layer 191 is divided into a plurality of sub-encapsulation parts 1911 by the isolation structure 150; since the light emitting unit 161 of the third light emitting device OL3, the second electrode 171 and the sub-encapsulation part 1911 are all prepared in an integral layer, the positions of the plurality of first isolation openings 1521, the plurality of second isolation openings 1522 and the plurality of third isolation openings 1523 are all occupied by the light emitting unit 161 of the third light emitting device OL3, the second electrode 171 and the first encapsulation layer 191; the light emitting unit 161 of the third light emitting device OL3, the second electrode 171 and the first encapsulation layer 191 at the positions of the plurality of first isolation openings 1521 and the plurality of second isolation openings 1522 are removed by an etching process, so that the light emitting unit 161 of the third light emitting device OL3 and the second electrode 171 and the sub-encapsulation part 1911 on the third light emitting device OL3 are only formed at the positions of the plurality of third isolation openings 1523.

[0146] Step S18) forming the second encapsulation layer 192 and the third encapsulation layer 193 on the side of the first encapsulation layer 191 away from the substrate 110:

[0147] An organic insulating material is prepared on the side of the first encapsulation layer 191 away from the substrate 110 by a coating process or an inkjet printing process to form the second encapsulation layer 192; an inorganic material is prepared on the side of the second encapsulation layer 192 away from the substrate 110 by a deposition process to form the third encapsulation layer 193.

[0148] In some possible implementation manners, as shown in Figure 12 The display device 1 can include a device with image processing capability, for example, a mobile phone, a desktop computer, a notebook computer, a tablet computer, a vehicle display, a wearable device, etc. Since the display device 1 includes the display panel 10 in the application, the reliability of the electronic device is higher.

[0149] Although the present disclosure has been described in connection with certain embodiments, numerous modifications, alterations, and permutations of the described embodiments are possible and within the scope of the disclosure, as would be appreciated by those of ordinary skill in the art.

[0150] It is intended that all such alternatives, modifications, and variations be included within the scope of the present disclosure as defined by the following claims.

[0151] It is noted that some embodiments of the disclosure have been described above. Other embodiments within the scope of the following claims will be apparent to those of ordinary skill in the art from this description. In the description, reference has been made to certain examples of the disclosure. These examples are indicative of the variety of embodiments to which the principles of the present disclosure can be applied. Other embodiments can incorporate additional or alternative features. In some instances, well-known structures and techniques have not been described in order to not unnecessarily obscure aspects of the present disclosure. The use of the terms "embodiment" or "the embodiment" does not necessarily indicate that a single feature is being described, but rather that features that can be combined with each other are being described. Furthermore, the terms "comprise", "comprising", "include", "including", and the like used in this description are preferably used in the sense of "including but not limited to". Additionally, the words "example" and "exemplary" are used herein to mean serving as an example, instance, or illustration. Any implementation described herein as exemplary is not necessarily to be construed as preferred or advantageous over other implementations. The disclosure should not be construed as limited to the embodiments set forth herein as those skilled in the art will appreciate that many modifications and variations are possible in light of the teaching provided. The use of any factor set forth in any claim to limit its use in any claim is not intended. Other examples of implementations will be apparent to an ordinarily skilled artisan from the description and figures.

Claims

1. A display panel, characterized in that, include: Substrate: A passivation layer is disposed on one side of the substrate, and the passivation layer has vent holes that penetrate the passivation layer. A pixel defining layer is disposed on the side of the passivation layer opposite to the substrate and extends into the vent hole; A protective layer is disposed on the side of the pixel defining layer opposite to the substrate, and the orthographic projection of the vent hole on the substrate is at least partially located within the orthographic projection range of the protective layer on the substrate.

2. The display panel as described in claim 1, characterized in that, Also includes: A first electrode layer is disposed on the side of the passivation layer away from the substrate. The first electrode layer includes a plurality of spaced first electrodes. The orthogonal projection of the vent hole on the substrate is located outside the orthogonal projection range of the first electrode on the substrate. Preferably, the substrate is provided with a plurality of thin-film transistors, and the first electrode is electrically connected to the corresponding thin-film transistor.

3. The display panel as described in claim 1, characterized in that, The protective layer is made of metallic materials; Preferably, the material of the protective layer includes at least one of molybdenum, titanium, molybdenum-tungsten alloy, or molybdenum-niobium alloy.

4. The display panel as described in claim 1, characterized in that, The protective layer includes: The main body is disposed on the side of the pixel defining layer opposite to the substrate, and the orthographic projection of the passivation layer on the substrate is located within the orthographic projection range of the main body on the substrate; A recessed portion is connected to the main body portion, and the orthographic projection of the recessed portion on the substrate is located within the orthographic projection range of the vent hole on the substrate; The recessed portion forms a first groove on the surface opposite to the substrate at the vent hole. The sidewall of the first groove and the bottom surface of the first groove have an included angle of 130°-140°. Preferably, the angle between the sidewall of the first groove and the bottom surface of the first groove is 135°.

5. The display panel as described in claim 4, characterized in that, The pixel defining layer forms a second groove on the surface opposite to the substrate at the location of the vent hole, and the recessed portion is located in the second groove; The recess includes: The first sub-part is disposed on the bottom surface of the second groove, and the bottom surface of the first groove is the surface of the first sub-part that faces away from the substrate; The second sub-part is disposed on the side of the first sub-part away from the substrate, and the sidewall of the first groove is the surface of the second sub-part facing the first groove; In a direction perpendicular to the plane of the substrate, the film thickness of the first sub-part is 100-300 angstroms; Preferably, the thickness of the first sub-part is 200 angstroms in a direction perpendicular to the plane of the substrate.

6. The display panel as described in claim 2, characterized in that, The pixel defining layer includes a pixel defining portion and a plurality of pixel openings formed by the pixel defining portion. The pixel openings are correspondingly disposed with the corresponding first electrodes, and at least a portion of the first electrodes are exposed in the corresponding pixel openings. Preferably, the display panel further includes: A light-emitting layer is disposed on the side of the first electrode layer opposite to the substrate; An isolation structure is provided on the side of the pixel defining portion opposite to the substrate; The second electrode layer is disposed on the side of the light-emitting layer opposite to the substrate and is electrically connected to the isolation structure.

7. The display panel as described in claim 6, characterized in that, The isolation structure includes: Multiple spaced sub-isolation portions are provided, which enclose an isolation opening, and the isolation opening is connected to the corresponding pixel opening; Preferably, the orthographic projection of the vent hole on the substrate is located outside the orthographic projection range of the sub-isolation portion on the substrate, and is located between the orthographic projections of two adjacent sub-isolation portions on the substrate.

8. The display panel as described in claim 7, characterized in that, The light-emitting layer includes a plurality of light-emitting units located at least partially in the corresponding pixel openings, the light-emitting units covering the exposed surface of the first electrode in the corresponding pixel openings and extending to the surface of the pixel defining portion away from the substrate; Preferably, the second electrode layer includes a plurality of second electrodes, which are disposed on the side of the corresponding light-emitting unit away from the substrate and electrically connected to the isolation structure; Preferably, the orthographic projection of the light-emitting unit on the substrate is located within the orthographic projection range of the corresponding second electrode on the substrate.

9. The display panel as described in claim 7, characterized in that, The isolation structure includes: A support layer is disposed on the side of the pixel defining portion opposite to the substrate; A barrier layer is disposed on the side of the support layer opposite to the substrate; The isolation opening penetrates the support layer and the barrier layer, and at least a portion of the second electrode is disposed in the corresponding isolation opening and is electrically connected to the isolation opening; Preferably, the orthographic projection of the support layer on the substrate is located within the orthographic projection range of the barrier layer on the substrate; Preferably, the material of the support layer includes a conductive material; Preferably, the material of the barrier layer includes a metallic material.

10. The display panel as claimed in claim 9, characterized in that, The isolation structure also includes: A base layer is disposed on the side of the support layer facing the substrate; Preferably, the orthographic projection of the support layer on the substrate is located within the orthographic projection range of the base layer on the substrate; Preferably, the substrate layer comprises a conductive material; Preferably, the material of the base layer is at least partially the same as the material of the protective layer.

11. The display panel as claimed in claim 10, characterized in that, The base layer and the protective layer are made of the same layer and the same material; Preferably, the base layer is connected to the protective layer.

12. The display panel as claimed in claim 6, characterized in that, Also includes: An encapsulation film assembly is disposed on the side of the second electrode layer opposite to the substrate; Preferably, the encapsulation film assembly comprises: A first encapsulation layer is disposed on the side of the second electrode layer opposite to the substrate and extends to the side of the isolation structure opposite to the substrate. The second encapsulation layer is disposed on the side of the first encapsulation layer that is away from the substrate; The third encapsulation layer is disposed on the side of the second encapsulation layer that is away from the substrate; Preferably, the material of the encapsulation film assembly includes at least one of inorganic and organic materials.

13. The display panel as claimed in claim 12, characterized in that, The second encapsulation layer covers the surface of the protective layer that is away from the substrate; Preferably, the material of the second encapsulation layer includes organic materials.

14. The display panel as claimed in claim 1, characterized in that, The substrate includes: Substrate layer; A pixel circuit layer is disposed on one side of the substrate layer, and thin-film transistors are located in the pixel circuit layer; A planarization layer is disposed on the side of the pixel circuit layer opposite to the substrate layer; Preferably, a portion of the planarization layer's surface facing away from the pixel circuit layer is exposed within the vent holes.

15. A display device, characterized in that, Includes the display panel as described in any one of claims 1-14.

Images