Display panel, display device and preparation method of display panel

Abstract

The invention discloses a display panel, a display device and a preparation method of the display panel, the display panel comprises a substrate, a pixel definition layer and a light emitting device layer, the pixel definition layer is arranged on one side of the substrate, and the pixel definition layer comprises a pixel limiting part and a plurality of pixel openings formed in the pixel limiting part; the light-emitting device layer comprises a plurality of first carrier structures, a plurality of light-emitting structures and a second carrier layer, the first carrier structures and the light-emitting structures are located at the positions of the corresponding pixel openings, and the light-emitting structures are located on the sides, away from the substrate, of the corresponding first carrier structures; the second carrier layer continuously covers the pixel defining portion and the plurality of light emitting structures. The second carrier layer cannot be eroded by water and oxygen in the atmosphere, the transmission performance of the second carrier layer is guaranteed, and the use performance of the display panel is improved.

Description

Technical Field

[0001] This application belongs to the field of display technology, and in particular relates to a display panel, a display device, and a method for manufacturing the display panel. Background Technology

[0002] Organic light-emitting diode (OLED) and flat panel display devices based on light-emitting diode (LED) technologies are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body and wide range of applications, becoming the mainstream of display devices.

[0003] However, the performance of current OLED display products needs to be improved. Summary of the Invention

[0004] The purpose of this application is to provide a display panel, a display device, and a method for manufacturing the display panel, which can improve the performance of the display panel.

[0005] The first aspect of this application provides a display panel, which includes a substrate, a pixel definition layer, and a light-emitting device layer. The pixel definition layer is disposed on one side of the substrate and includes a pixel defining portion and a plurality of pixel openings formed in the pixel defining portion. The light-emitting device layer includes a plurality of first carrier structures, a plurality of light-emitting structures, and a second carrier layer. The first carrier structures and light-emitting structures are located at the positions of corresponding pixel openings, and the light-emitting structures are located on the side of the corresponding first carrier structures away from the substrate. The second carrier layer continuously covers the pixel defining portion and the plurality of light-emitting structures.

[0006] In some embodiments, the second carrier layer includes a first transport layer, and the light-emitting device layer further includes a first electrode layer, the first electrode layer being located on the side of the second carrier layer away from the substrate.

[0007] Preferably, the orthographic projection of the pixel defining portion and the plurality of light-emitting structures onto the substrate is located within the orthographic projection of the first electrode layer onto the substrate.

[0008] Preferably, the first transport layer is an electronic transport layer;

[0009] Preferably, the first electrode layer is a cathode layer.

[0010] In some embodiments, the light-emitting device layer further includes at least one first blocking structure, which is located between the second carrier layer and the corresponding light-emitting structure.

[0011] Preferably, at least one first blocking structure includes a plurality of first blocking structures that correspond one-to-one with the plurality of light-emitting structures;

[0012] Preferably, the first blocking structure is a hole blocking structure.

[0013] In some embodiments, the second carrier layer further includes a first blocking layer, which is located between the first transport layer and the plurality of light-emitting structures;

[0014] Preferably, the first blocking layer continuously covers the pixel defining portion and multiple light-emitting structures;

[0015] Preferably, the first blocking layer is a hole blocking layer.

[0016] In some embodiments, at least one of the plurality of light-emitting structures includes a first substructure and a second substructure, wherein:

[0017] The first substructure is located on the side of the corresponding first current-carrying substructure away from the substrate, and the first substructure includes a host material and a doped material;

[0018] The second substructure is located between the first substructure and the second charge carrier layer, and the second substructure includes the main material;

[0019] Preferably, the second substructure does not include doped materials;

[0020] Preferably, the plurality of light-emitting structures include a blue light-emitting structure, and the blue light-emitting structure includes a first substructure and a second substructure;

[0021] Preferably, the plurality of light-emitting structures further includes a red light-emitting structure and / or a green light-emitting structure, wherein the red light-emitting structure includes a first substructure and a second substructure, and / or the green light-emitting structure includes a first substructure and a second substructure;

[0022] Preferably, the second carrier layer further includes a first blocking layer, which is located between the first transport layer and the plurality of light-emitting structures;

[0023] Preferably, the first blocking layer continuously covers the pixel defining portion and multiple light-emitting structures;

[0024] Preferably, the first blocking layer is a hole blocking layer;

[0025] Preferably, the thickness of the second substructure is D1, where D1 satisfies: 20nm≤D1≤50nm.

[0026] In some embodiments, the light-emitting device layer further includes at least one first blocking structure, the first blocking structure being located between the second sub-carrier layer and the corresponding light-emitting structure, the second sub-carrier layer further including the first blocking layer, the first blocking layer continuously covering the pixel defining portion, the plurality of light-emitting structures and at least one first blocking structure;

[0027] Preferably, the thickness of the first barrier structure is greater than the thickness of the first barrier layer;

[0028] Preferably, at least one first blocking structure includes a plurality of first blocking structures corresponding one-to-one with a plurality of light-emitting structures, and the first blocking layer continuously covers the pixel defining portion and the plurality of first blocking structures;

[0029] Preferably, the first blocking structure is a hole blocking structure;

[0030] Preferably, the first blocking layer is a hole blocking layer;

[0031] Preferably, the thickness of the first barrier structure is D2, where D2 satisfies: 23 angstroms ≤ D1 ≤ 40 angstroms;

[0032] Preferably, the thickness of the first barrier layer is D3, and D3 satisfies: 10 angstroms ≤ D2 ≤ 25 angstroms.

[0033] In some embodiments, the light-emitting device layer further includes a plurality of second electrodes, which are located between the substrate and the corresponding first charge carrier structure and are partially covered by the pixel defining portion;

[0034] Preferably, the second carrier layer further includes a first injection layer, which is located between the first transport layer and the first electrode layer;

[0035] Preferably, the first injection layer is an electron injection layer;

[0036] Preferably, at least one of the plurality of first charge carrier structures includes a second blocking structure, wherein the second blocking structure is an electron blocking structure;

[0037] Preferably, at least one of the plurality of first carrier substructures includes a second transmission structure, wherein the second transmission structure is a hole transmission structure;

[0038] Preferably, at least one of the plurality of first carrier structures includes a second injection structure, wherein the second injection structure is a hole injection structure.

[0039] Secondly, embodiments of this application also provide a method for manufacturing a display panel, the method comprising:

[0040] A pixel definition layer is formed on one side of the substrate. The pixel definition layer includes a pixel defining portion and a plurality of pixel openings formed in the pixel defining portion.

[0041] Multiple first charge carrier structures, multiple light-emitting structures, multiple sacrificial structures, and multiple occlusion structures are sequentially formed at the corresponding pixel opening positions;

[0042] Remove multiple occluding structures and multiple sacrificial structures in sequence;

[0043] A second carrier layer is formed that continuously covers the pixel definition and multiple light-emitting structures.

[0044] In some embodiments, the second carrier sublayer includes a first transport layer, and after the step of forming the second carrier sublayer that continuously covers the pixel definition portion and the plurality of light-emitting structures, it further includes:

[0045] A first electrode layer is formed on the side of the second carrier layer that faces away from the substrate;

[0046] Preferably, the first transport layer is an electron transport layer, and / or the first electrode layer is a cathode layer;

[0047] Preferably, the sacrificial structure includes a first sub-sacrificial structure and a second sub-sacrificial structure arranged sequentially in a direction away from the substrate. The material of the first sub-sacrificial structure includes a water-soluble resin, and the material of the second sub-sacrificial structure includes an inorganic material.

[0048] In some embodiments, the plurality of pixel openings include a first pixel opening and a second pixel opening. The step of sequentially forming a plurality of first charge carrier structures, a plurality of light-emitting structures, a plurality of sacrificial structures, and a plurality of blocking structures located at the corresponding pixel opening positions includes:

[0049] A first carrier material layer, a first light-emitting material layer, and a sacrificial material layer are sequentially formed along a direction away from the substrate;

[0050] A shielding structure is formed on the side of the sacrificial material layer facing away from the substrate, and the orthogonal projection of the shielding structure on the substrate covers the orthogonal projection of the first pixel opening on the substrate.

[0051] Using the shielding structure as a mask, the sacrificial material layer, the first light-emitting material layer, and the first charge carrier material layer located inside the second pixel opening and on the side of the pixel limiting portion away from the substrate are removed to obtain the first charge carrier structure, the first light-emitting structure, and the sacrificial structure located at the first pixel opening position.

[0052] A first carrier structure, a second light-emitting structure, and a sacrificial structure are formed at the opening position of the second pixel.

[0053] In some embodiments, the step of sequentially forming a first carrier material layer, a first light-emitting material layer, and a sacrificial material layer along a direction away from the substrate includes: sequentially forming a first carrier material layer, a first light-emitting material layer, a first barrier material layer, and a sacrificial material layer along a direction away from the substrate;

[0054] The steps of obtaining the first carrier structure, the first light-emitting structure and the sacrificial structure located at the first pixel opening position include: using the shielding structure as a mask, removing the sacrificial material layer, the first light-emitting material layer, the first blocking material layer and the first carrier material layer located inside the second pixel opening and on the side of the pixel limiting portion away from the substrate, to obtain the first carrier structure, the first light-emitting structure, the first blocking structure and the sacrificial structure located at the first pixel opening position;

[0055] Preferably, the first blocking structure is a hole blocking structure.

[0056] In some embodiments, the step of forming a second carrier sublayer that continuously covers the pixel definition portion and the plurality of light-emitting structures includes:

[0057] A first blocking layer and a first transmission layer are sequentially formed, which continuously cover the pixel limiting part, the first light-emitting structure, and the second light-emitting structure;

[0058] Preferably, the first blocking layer is a hole blocking layer, and / or the first transport layer is an electron transport layer.

[0059] In some embodiments, the first light-emitting material layer includes a first sub-material layer and a second sub-material layer sequentially stacked along a direction away from the substrate, forming a first carrier structure, a first light-emitting structure, and a sacrificial structure located at the first pixel opening position, comprising:

[0060] Using the shielding structure as a mask, the sacrificial material layer, the second sub-material layer, the first sub-material layer, and the first carrier material layer located inside the second pixel opening and on the side of the pixel limiting portion away from the substrate are removed to obtain the first carrier structure, the first light-emitting structure, and the sacrificial structure located at the first pixel opening position.

[0061] The first light-emitting structure includes a first substructure and a second substructure stacked sequentially along the direction away from the substrate. The first substructure includes a host material and a doped material, and the second substructure includes the host material.

[0062] Preferably, the second substructure does not include doped materials;

[0063] Preferably, the first light-emitting structure is a blue light-emitting structure.

[0064] In some embodiments, the step of sequentially forming a first carrier material layer, a first light-emitting material layer, and a sacrificial material layer along a direction away from the substrate includes: sequentially forming a first carrier material layer, a first light-emitting material layer, a first barrier material layer, and a sacrificial material layer along a direction away from the substrate;

[0065] The steps of obtaining the first carrier structure, the first light-emitting structure and the sacrificial structure located at the first pixel opening position include: using the shielding structure as a mask, removing the sacrificial material layer, the first light-emitting material layer, the first blocking material layer and the first carrier material layer located inside the second pixel opening and on the side of the pixel limiting portion away from the substrate, to obtain the first carrier structure, the first light-emitting structure, the first blocking structure and the sacrificial structure located at the first pixel opening position;

[0066] The step of forming a second carrier sublayer that continuously covers the pixel defining portion and multiple light-emitting structures includes: sequentially forming a first blocking layer and a first transmission layer that continuously covers the pixel defining portion, the first light-emitting structure, and the second light-emitting structure;

[0067] Preferably, the first blocking structure is a hole blocking structure, and / or the first blocking layer is a hole blocking layer, and / or the first transport layer is an electron transport layer.

[0068] Thirdly, this application also provides a display device, including the above-described display panel, or a display panel prepared by any of the above-described preparation methods.

[0069] This application provides a display panel, a display device, and a method for fabricating the display panel. The display panel includes a substrate, a pixel definition layer, and a light-emitting device layer. The pixel definition layer is disposed on one side of the substrate and includes a pixel defining portion and multiple pixel openings formed in the pixel defining portion. The light-emitting device layer includes multiple first carrier structures, multiple light-emitting structures, and a second carrier layer. The first carrier structures and light-emitting structures are located at the positions of corresponding pixel openings, and the light-emitting structures are located on the side of the corresponding first carrier structures facing away from the substrate. The second carrier layer continuously covers the pixel defining portion and the multiple light-emitting structures. When fabricating the display panel, the first carrier structures and light-emitting structures can be fabricated first using sacrificial structures and shielding structures, and then the second carrier layer can be formed by vapor deposition over the entire surface. The second carrier layer is not corroded by water and oxygen in the atmosphere, ensuring the transmission performance of the second carrier layer and improving the performance of the display panel. Attached Figure Description

[0070] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0071] Figure 1 A cross-sectional schematic diagram of a display panel provided in some embodiments of this application;

[0072] Figure 2A cross-sectional schematic diagram of a display panel provided for other embodiments of this application;

[0073] Figure 3 A cross-sectional schematic diagram of a display panel provided for some embodiments of this application;

[0074] Figure 4 This is a partial cross-sectional schematic diagram of a display panel provided in some embodiments of this application;

[0075] Figure 5 A cross-sectional schematic diagram of a display panel provided for some embodiments of this application;

[0076] Figure 6 A cross-sectional schematic diagram of a display panel provided in some embodiments of this application;

[0077] Figure 7 A cross-sectional schematic diagram of a display panel provided in some embodiments of this application;

[0078] Figure 8 A cross-sectional schematic diagram of a display panel provided in some embodiments of this application;

[0079] Figure 9 A schematic flowchart illustrating a display panel fabrication method provided in some embodiments of this application;

[0080] Figure 10 A schematic diagram of step S10 of the display panel manufacturing method provided in some embodiments of this application;

[0081] Figure 11 This is a schematic diagram of step S20 of the display panel manufacturing method provided in some embodiments of this application;

[0082] Figure 12 A schematic diagram of step S30 of the display panel manufacturing method provided in some embodiments of this application;

[0083] Figure 13 A schematic diagram of step S40 of the display panel manufacturing method provided in some embodiments of this application;

[0084] Figure 14 This is a partial process diagram of a display panel manufacturing method provided in some embodiments of this application;

[0085] Figures 15a-15k This is a schematic diagram illustrating the manufacturing process of a display panel provided in some embodiments of this application.

[0086] Explanation of reference numerals in the attached figures:

[0087] 100. Display panel; 10. Substrate; 20. Pixel definition layer; 21. Pixel limiting portion; 22. Pixel opening; 221. First pixel opening; 222. Second pixel opening; 223. Third pixel opening; 30. Light-emitting device layer; 31. Second electrode; 32. First carrier structure; 321. Second injection structure; 322. Second transport structure; 323. First carrier material layer; 33. Light-emitting structure; 331. First substructure; 332. Second substructure; 333. First light-emitting structure; 334. Second light-emitting structure. Light structure; 335, third light-emitting structure; 336, first light-emitting material layer; 337, second light-emitting material layer; 338, third light-emitting material layer; 34, second carrier layer; 341, second injection layer; 342, first transport layer; 35, first electrode layer; 36, second barrier structure; 37, first barrier structure; 371, first barrier material layer; 38, first barrier layer; 40, sacrificial structure; 41, first sub-sacrificial structure; 42, second sub-sacrificial structure; 43, sacrificial material layer; 50, shielding structure; 51, barrier material layer. Detailed Implementation

[0088] The embodiments of this application will be described in further detail below with reference to the accompanying drawings and examples. The detailed description of the following embodiments and the accompanying drawings are used to illustrate the principles of this application by way of example, but should not be used to limit the scope of this application, that is, this application is not limited to the described embodiments.

[0089] This application provides a display panel, which may be an organic light-emitting diode (OLED) display panel, or other types of display panels, such as micro light-emitting diode (Micro-LED) or quantum light-emitting diode (QLED) display panels.

[0090] like Figure 1 As shown, the first aspect of this application provides a display panel 100, which includes a substrate 10, a pixel definition layer 20, and a light-emitting device layer 30. The pixel definition layer 20 is disposed on one side of the substrate 10 and includes a pixel defining portion 21 and a plurality of pixel openings 22 formed in the pixel defining portion 21. The light-emitting device layer 30 includes a plurality of first carrier structures 32, light-emitting structures 33, and a second carrier layer 34. The first carrier structures 32 and the light-emitting structures 33 are located at the positions of the corresponding pixel openings 22, and the light-emitting structures 33 are located on the side of the corresponding first carrier structures 32 away from the substrate 10. The second carrier layer 34 continuously covers the pixel defining portion 21 and the plurality of light-emitting structures 33.

[0091] The substrate 10 includes a substrate and an array layer disposed on the substrate. The substrate can be a rigid substrate made of materials such as glass or plastic, or a flexible substrate made of materials such as polyethersulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI), polycarbonate (PC), or cellulose acetate propionate (CAP). The array layer contains a driving circuit for controlling the light emission of the light-emitting unit 30. The array layer is generally composed of inorganic film layers such as a metal layer, a semiconductor layer (active layer), and an insulating layer. By patterning these inorganic film layers, a driving circuit for controlling the light emission of the light-emitting unit can be formed. There are various ways to implement the specific circuit structure, which will not be elaborated here.

[0092] The pixel limiting portion 21 can cover the edge of the second electrode 31 to increase the area of ​​the sub-pixel. The pixel limiting portion 21 can reduce crosstalk between the first current-carrying substructure 32 and the light-emitting structure 33 of each sub-pixel, thereby improving the display effect of the display panel 100.

[0093] When fabricating the display panel 100, a masking structure 50 is required when patterning the light-emitting structure 33 of each sub-pixel. Since the masking structure 50 contains solvent, if the masking structure 50 is directly fabricated on the light-emitting structure 33, the solvent in the masking structure 50 will dissolve the underlying film layer. Therefore, a sacrificial material layer 43 is fabricated first, and then the masking structure 50 is fabricated on the sacrificial material layer 43. The first charge carrier material layer 323, the first light-emitting material layer 336, the sacrificial material layer 43, and the masking material layer 51 of the first sub-pixel can be deposited sequentially over the entire surface. The masking material layer 51 is then processed by an exposure and development process to form the masking structure 50 corresponding to the first pixel opening 221. Then, using the masking structure 50 as a mask, the sacrificial material layer 43, the first light-emitting material layer 336, and the first charge carrier material layer 323 outside the first pixel opening 221 are removed to obtain the first charge carrier structure 32, the first light-emitting structure 333, and the sacrificial structure 40 located at the first pixel opening 221. Then, the first carrier material layer 323, the second doped material layer 337, the sacrificial material layer 43, and the masking material layer 51 of the second sub-pixel are deposited on the entire surface by vapor deposition. The masking material layer 51 is processed by exposure and development process to form the masking structure 50 corresponding to the second pixel opening 222. Then, using the masking structure 50 as a mask, the sacrificial material layer 43, the second doped material layer 337, and the second carrier material layer other than the second pixel opening 222 are removed to obtain the first carrier structure 32, the second light-emitting structure 334, and the sacrificial structure 40 located at the position of the second pixel opening 222. Finally, the first carrier material layer 323, the third doped material layer 338, the sacrificial material layer 43, and the masking material layer 51 of the third sub-pixel can be vapor-deposited across the entire surface. The masking material layer 51 is then processed using an exposure and development process to form a masking structure 50 corresponding to the opening 223 of the third pixel. Using this masking structure 50 as a mask, the sacrificial material layer 43, the third doped layer 338, and the second carrier material layer outside the opening 223 of the third pixel are removed, resulting in the first carrier structure 32, the third light-emitting structure 335, and the sacrificial structure 40 located at the opening 223 of the third pixel. Then, the masking structures 50 and sacrificial structures 40 of the first, second, and third sub-pixels are stripped off, and the second carrier layer 34 and the first electrode layer 35 are vapor-deposited across the entire surface.

[0094] The first carrier structure 32 and the light-emitting structure 33 are located at the pixel opening 22, that is, a portion of the first carrier structure 32 and the light-emitting structure 33 may be located within the pixel opening 22, and the other portion may be located on the side of the pixel limiting portion 21 facing away from the substrate 10. Since the second carrier layer 34 and the first electrode layer 35 are not patterned, but formed by a whole-surface vapor deposition process, the second carrier layer 34 and the first electrode layer 35 are a continuous whole-layer design.

[0095] The second charge carrier layer 34 has a certain degree of hydrophilicity and poor resistance to water, oxygen, and organic solvents. In this embodiment, after the light-emitting structure 33 of each sub-pixel is patterned, the second charge carrier layer 34 is formed by vapor deposition across the entire surface. The light-emitting structure 33 has a certain degree of hydrophobicity, which can prevent some water vapor from penetrating into the film layer. Therefore, the second charge carrier layer 34 will not be eroded by water and oxygen in the atmosphere, ensuring the transmission performance of the second charge carrier layer 34 and improving the performance of the display panel 100. Moreover, when patterning is performed using the sacrificial structure 40, the sacrificial structure 40 is usually a water-soluble resin. The second charge carrier layer 34, which itself has a certain degree of hydrophilicity, is formed only after the sacrificial structure 40 is removed. Therefore, water vapor from the sacrificial structure 40 will not penetrate into the film layer, further improving the performance of the display panel 100.

[0096] In some embodiments, the second carrier layer 34 includes a first transport layer 342, and the light-emitting device layer 30 further includes a first electrode layer 35, which is located on the side of the second carrier layer 34 away from the substrate 10.

[0097] In some embodiments, the light-emitting device layer 30 further includes a plurality of second electrodes 31, which are located between the substrate 10 and the corresponding first charge carrier structure 32 and are partially covered by the pixel defining portion 21.

[0098] One of the second electrode 31 and the first electrode layer 35 can serve as the anode of the sub-pixel, and the other as the cathode. This embodiment uses the second electrode 31 as the anode and the first electrode layer 35 as the cathode for illustration. When the second electrode 31 is the anode and the first electrode layer 35 is the cathode, the first carrier structure 32 includes a hole transport structure, and the second carrier layer 34 includes an electron transport layer. When the second electrode 31 and the first electrode layer 35 are energized, electrons and holes migrate from the electron transport layer and the hole transport structure to the light-emitting structure 33, respectively, and meet in the light-emitting structure 33 to form excitons that excite the light-emitting molecules, thereby generating visible light for display purposes.

[0099] Preferably, the orthographic projection of the pixel defining portion 21 and the plurality of light-emitting structures 33 onto the substrate 10 is located within the orthographic projection of the first electrode layer 35 onto the substrate 10.

[0100] The first electrode layer 35 covers the pixel limiting part 21 and the light-emitting structure 33, so that the light-emitting structure 33 of each sub-pixel can receive a uniform current supply, thereby ensuring the brightness of the entire display panel is consistent and avoiding uneven brightness or local bright spots.

[0101] Preferably, the first transport layer 342 is an electron transport layer. The main function of the first transport layer 342 is to efficiently transport the injected electrons, enabling them to smoothly reach the light-emitting structure 33. The first transport layer 342 has a high electron mobility, allowing electrons to be transported quickly and efficiently.

[0102] Preferably, it is a cathode layer.

[0103] In other words, the display panel in this application embodiment has a top-emitting structure, which can reduce the absorption inside the doped material, improve the overall light output efficiency, and better control the direction and wavelength of light, thereby improving color purity and contrast.

[0104] In some embodiments, a portion of the second carrier layer 34 is located within the pixel opening 22, and another portion is located on the side of the pixel limiting portion 21 facing away from the substrate 10.

[0105] The surface of the pixel limiting portion 21 facing away from the substrate 10 is higher than the surface of the light-emitting structure 33. Therefore, when the second carrier layer 34 is deposited across the entire surface, part of the material of the second carrier layer 34 is deposited inside the pixel opening 22, located on the side of the light-emitting structure 33 facing away from the substrate 10; the other part is deposited outside the pixel opening 22, located on the side of the pixel limiting portion 21 facing away from the substrate 10. The second carrier layer 34 does not need to be patterned, and the first electrode layer 35 can be directly fabricated on the second carrier layer 34. This avoids the second carrier layer 34 coming into contact with moisture and solvents in the sacrificial structure 40, improves the problem of electron injection difficulties caused by damage to the second carrier layer 34, and reduces the device voltage.

[0106] In some embodiments, the portion of the second carrier layer 34 located within the pixel opening 22 contacts the inner wall of the pixel defining portion 21 toward the pixel opening 22.

[0107] The second carrier layer 34 is a single layer, covering not only the side of the first light-emitting structure 33 facing away from the substrate 10, but also the inner wall of the pixel defining portion 21 facing the pixel opening 22, and climbing up the inner wall of the pixel defining portion 21 to the upper surface of the pixel defining portion 21. Using the second carrier layer 34 as an insertion layer, the first electrode layer 35 and the second electrode 31 are completely separated, preventing short circuits caused by side contact between the first electrode layer 35 and the second electrode 31.

[0108] like Figure 2 As shown, in some embodiments, the display panel 100 further includes at least one first blocking structure 37 disposed between the light-emitting structure 33 and the second carrier layer 34.

[0109] The first blocking structure 37 can block the charge carriers from the second electrode 31 at the interface of the light-emitting structure 33, thereby increasing the concentration of charge carriers at the interface of the light-emitting structure 33.

[0110] Preferably, at least one first blocking structure 37 includes a plurality of first blocking structures 37 corresponding one-to-one with a plurality of light-emitting structures 33.

[0111] In other words, each light-emitting structure 33 is provided with a first blocking structure 37, and the orthographic projection of each first blocking structure 37 on the substrate 10 at least partially overlaps with the orthographic projection of the light-emitting structure 33 below it on the substrate 10.

[0112] A portion of the first blocking structure 37 may be located within the pixel opening 22, and another portion may be located on the side of the pixel limiting portion 21 away from the substrate 10.

[0113] First, the first charge carrier material layer 323, the first light-emitting material layer 336, the first blocking material layer 371, the sacrificial material layer 43, and the masking material layer 51 of the first sub-pixel can be deposited sequentially. The masking material layer 51 is then processed by an exposure and development process to form a masking structure 50 corresponding to the opening 221 of the first pixel. Then, using the masking structure 50 as a mask, the sacrificial material layer 43, the first blocking material layer 371, the first light-emitting material layer 336, and the first charge carrier material layer 323 outside the opening 221 of the first pixel are removed to obtain the first charge carrier structure 32, the first light-emitting structure 333, the first blocking structure 37, and the sacrificial structure 40 located at the opening 221 of the first pixel. Then, the first carrier material layer 323, the second doped material layer 337, the first blocking material layer 371, the sacrificial material layer 43, and the masking material layer 51 of the second sub-pixel are deposited on the entire surface by vapor deposition. The masking material layer 51 is processed by exposure and development process to form the masking structure 50 corresponding to the second pixel opening 222. Then, using the masking structure 50 as a mask, the sacrificial material layer 43, the first blocking material layer 371, the second doped material layer 337, and the second carrier material layer other than the second pixel opening 222 are removed to obtain the first carrier structure 32, the second light-emitting structure 334, the first blocking structure 37, and the sacrificial structure 40 located at the position of the second pixel opening 222. Finally, the first carrier material layer 323, the third doped material layer 338, the first blocking material layer 371, the sacrificial material layer 43, and the masking material layer 51 of the third sub-pixel can be vapor-deposited across the entire surface. The masking material layer 51 is then processed using an exposure and development process to form a masking structure 50 corresponding to the opening 223 of the third pixel. Using this masking structure 50 as a mask, the sacrificial material layer 43, the first blocking material layer 371, the third doped layer 338, and the second carrier material layer, excluding the opening 223 of the third pixel, are removed to obtain the first carrier structure 32, the third light-emitting structure 335, the first blocking structure 37, and the sacrificial structure 40 located at the opening 223 of the third pixel. Then, the masking structures 50 and sacrificial structures 40 of the first, second, and third sub-pixels are stripped off, and the second carrier layer 34 and the first electrode layer 35 are vapor-deposited across the entire surface.

[0114] In this embodiment, the sacrificial structure 40 is prepared on the first barrier structure 37. Since the first barrier structure 37 has a certain degree of hydrophobicity, it can block some water vapor from penetrating into the membrane layer, thereby reducing the erosion of the lower membrane layer by water vapor in the atmosphere and solvent in the sacrificial structure 40.

[0115] Preferably, the first blocking structure 37 is a hole blocking structure.

[0116] The first blocking structure 37 can block the holes from the second electrode 31 at the interface of the light-emitting structure 33, thereby increasing the hole concentration at the interface of the light-emitting structure 33.

[0117] like Figure 3 As shown, in some other embodiments, the second carrier layer 34 further includes a first blocking layer 38, which is located between the first transport layer 342 and the plurality of light-emitting structures 33.

[0118] After the sacrificial structure 40 and the blocking structure 50 are patterned on the light-emitting structure 33, the first blocking layer 38 and the second charge-carrying sublayer 34 are then fabricated. When patterning each sub-pixel, the first blocking layer 38 does not need to be removed by an etching process, reducing the complexity of the fabrication process.

[0119] Preferably, the first barrier layer 38 continuously covers the pixel defining portion 21 and the plurality of light-emitting structures 33. The first barrier layer 38 is a whole layer formed by vapor deposition, covering the pixel defining portion 21, which can more comprehensively block the charge carriers from the second electrode 31 at the interface of the light-emitting structures 33.

[0120] Preferably, the first blocking layer 38 is a hole blocking layer.

[0121] like Figure 4 As shown, in some embodiments, at least one of the plurality of light-emitting structures 33 includes a first substructure 331 and a second substructure 332, wherein: the first substructure 331 is located on the side of the corresponding first charge carrier structure 32 away from the substrate 10, the first substructure 331 includes a host material and a doped material, the second substructure 332 is located between the first substructure 331 and the second charge carrier layer 34, and the second substructure 332 includes a host material.

[0122] All light-emitting structures 33 can be configured to include the first substructure 331 and the second substructure 332, or only some light-emitting structures 33 can be configured to include the first structure 331 and the second substructure 332.

[0123] The host material primarily serves to support the doped material and facilitate efficient carrier transport and energy transfer. The host material itself does not emit light; its role is to provide a suitable environment for the doped material to function efficiently. Host materials can include small molecule organic compounds, polymer materials, etc., such as CBP (4,4'-bis(N-carbazolyl)biphenyl), TCTA (tris(4-aminophenyl)amine), mCP (1,3-bis(N-carbazolyl)benzene), TAD (4,4'-bis(9H-carbazol-9-yl)benzophenone), PVK (poly(N-vinylcarbazole)), PFO (poly(9,9-dioctylfluorene)), etc.

[0124] Doped materials are responsible for the recombination of charge carriers, emitting visible light. These materials directly determine the emission color and efficiency of sub-pixels, and mainly include two categories: fluorescent and phosphorescent materials.

[0125] In this embodiment, a first substructure 331 is first prepared, containing both the host material and the dopant material; then a second substructure 332 is prepared, which may contain only the host material without the dopant material, or it may contain both the host material and the dopant material. After etching and patterning, a first barrier structure 37 and a second charge carrier layer 34 are deposited by vapor deposition. Although the dopant material is susceptible to corrosion by water and oxygen, the second substructure 332 protects the dopant material in the first substructure 331, preventing the dopant material from being corroded and interfered with, thereby improving the luminous efficiency of the light-emitting structure 33.

[0126] Preferably, the second substructure 332 does not include doped materials, thereby simplifying the preparation of the second substructure 332.

[0127] Preferably, the plurality of light-emitting structures 33 include a blue light-emitting structure, which includes a first substructure 331 and a second substructure 332. Since the blue light-emitting structure is poorly resistant to moisture and is relatively sensitive, this design is particularly effective for the blue light-emitting structure.

[0128] Preferably, the plurality of light-emitting structures 33 further include a red light-emitting structure and / or a green light-emitting structure, wherein the red light-emitting structure includes a first substructure 331 and a second substructure 332, and / or the green light-emitting structure includes a first substructure 331 and a second substructure 332.

[0129] The second substructure 332 of the red luminescent structure protects the doped material in its first substructure 331, and / or the second substructure 332 of the green luminescent structure protects the doped material in its first substructure 331, further improving the luminous efficiency of more luminescent structures 33.

[0130] like Figure 5As shown, preferably, the second charge carrier layer 34 further includes a first blocking layer 38, which is located between the first transport layer 342 and the plurality of light-emitting structures 33. Specifically, the first blocking layer 38 is located between the second substructure 332 and the first transport layer 342.

[0131] Preferably, the first blocking layer 38 continuously covers the pixel defining portion 21 and the plurality of light-emitting structures 33.

[0132] Preferably, the first blocking layer 38 is a hole blocking layer.

[0133] In some embodiments, the thickness of the second substructure 332 is D1, where D1 satisfies: 20nm ≤ D1 ≤ 50nm.

[0134] D1 can be any value between 20nm and 50nm. For example, D1 can be 20nm, 25nm, 30nm, 40nm, 45nm, or 50nm, as long as it is within the range of 20nm to 50nm.

[0135] In this embodiment, the thickness of the second substructure 332 is moderate, which can reduce the impact of water, oxygen and solvent erosion on the doped material in the first substructure 331, without affecting the setting of other film layers.

[0136] like Figure 6 As shown, the light-emitting device layer 30 further includes at least one first blocking structure 37, which is located between the second carrier layer 34 and the corresponding light-emitting structure 33. The second carrier layer 33 further includes a first blocking layer 38, which continuously covers the pixel defining portion 21, the plurality of light-emitting structures 33 and at least one first blocking structure 37.

[0137] The device performance varies greatly due to the coating of the sacrificial structure 40 on different film layers of the display panel 100. If the sacrificial structure 40 is coated after the first barrier structure 37 is deposited, the interface of the first barrier structure 37 will be damaged after photolithography patterning. The damaged interface is located at the interface between the first barrier structure 37 and the second carrier layer 34, which increases the difficulty of carrier transport from the second carrier layer 34 to the first barrier structure 37, resulting in a significant increase in device voltage and severe performance degradation. In the embodiments of this application, a first barrier layer 38 is prepared on the first barrier structure 37. When patterning each sub-pixel, the sacrificial structure 40 is located on the first barrier structure 37. Finally, after removing the shielding structure 50 and the sacrificial structure 40, the first barrier layer 38 is formed by vapor deposition over the entire surface. The damaged interface is located at the interface between the first barrier structure 37 and the first barrier layer 38, which is located within the same material. The interface between different materials is not damaged, and the impact on carrier transport is minimal.

[0138] In some embodiments, the thickness of the first barrier structure 37 is greater than the thickness of the first barrier layer 38 in a direction perpendicular to the substrate 10.

[0139] By making the first blocking structure 37 thicker, it is possible to ensure that even if the first blocking structure 37 is damaged by the sacrificial structure 40, it will not affect the underlying membrane layer.

[0140] Preferably, at least one first blocking structure 37 includes a plurality of first blocking structures 37 corresponding one-to-one with a plurality of light-emitting structures 33, and the first blocking layer 38 continuously covers the pixel defining portion 21 and the plurality of first blocking structures 37.

[0141] In some embodiments, the thickness of the first blocking structure 37 in the direction perpendicular to the substrate 10 is D2, where D2 satisfies: 23 angstroms ≤ D1 ≤ 40 angstroms.

[0142] D2 can be any value between 23 angstroms and 40 angstroms. For example, D1 can be 23 angstroms, 25 angstroms, 30 angstroms, 35 angstroms, 38 angstroms, or 40 angstroms, as long as it is within the range of 23 angstroms to 40 angstroms.

[0143] The thickness of the first blocking structure 37 in this embodiment is moderate, which can protect the underlying membrane layer from damage without occupying the space of other membrane layers.

[0144] In some embodiments, the thickness of the first barrier layer 38 is D3 in a direction perpendicular to the substrate 10, where D3 satisfies: 10 angstroms ≤ D2 ≤ 25 angstroms.

[0145] D3 can be any value between 10 angstroms and 25 angstroms. For example, D3 can be 10 angstroms, 15 angstroms, 18 angstroms, 20 angstroms, 23 angstroms, or 25 angstroms, as long as it is within the range of 23 angstroms to 40 angstroms.

[0146] The thickness of the first barrier layer 38 in this embodiment is moderate, which can block electrons or holes without occupying the space of other film layers.

[0147] In some embodiments, the second carrier layer 34 further includes a first injection layer 341, which is disposed between the first transport layer 342 and the first electrode layer 35.

[0148] like Figure 7As shown, the first injection layer 341 can reduce the energy barrier between the first electrode layer 35 and the first transport layer 342, and improve the interface matching between the first electrode layer 35 and the light-emitting structure 33, thereby making it easier for charge carriers to be injected from the first electrode layer 35 into the light-emitting structure 33. By optimizing the interface, the first injection layer 341 improves the efficiency of charge carrier injection from the first electrode layer 35 into the light-emitting structure 33, thereby improving the luminous efficiency of the display panel 100. In addition, the first injection layer 341 can also improve the interface stability between the first electrode layer 35 and the light-emitting structure 33, reduce interface reactions and degradation, and thus improve the lifespan of the display panel 100.

[0149] Preferably, the first injection layer 341 is an electron injection layer.

[0150] like Figure 8 As shown, in some embodiments, at least one of the plurality of first charge carrier structures 32 includes a second blocking structure 36, which is an electron blocking structure.

[0151] The second blocking structure 36 can block electrons from the first electrode layer 35 at the interface of the light-emitting structure 33, thereby increasing the electron concentration at the interface of the light-emitting structure 33.

[0152] Preferably, at least one of the plurality of first carrier structures 32 includes a second transmission structure 322, wherein the second transmission structure 322 is a hole transmission structure.

[0153] The function of the second transmission structure 322 is to transmit holes, enabling them to move efficiently to the light-emitting structure 33. The second transmission structure 322 has a high hole mobility, allowing for efficient hole transmission. By providing a good conductive path, the second transmission structure 322 enables holes to move quickly to the light-emitting structure 33, thereby improving the hole transmission efficiency and reducing the energy lost during transmission.

[0154] At least one of the plurality of first carrier structures 32 includes a second injection structure 321, which is a hole injection structure. The second injection structure 321 is disposed on the side of the second electrode 31 away from the substrate 10, and the second transport structure 322 is disposed between the second injection structure 321 and the light-emitting structure 33.

[0155] The second injection structure 321 reduces the energy level matching barrier between the second electrode 31 and the second transport structure 322. By optimizing the interface between the second electrode 31 and the light-emitting structure 33, it makes it easier for holes to be injected from the second electrode 31 into the light-emitting structure 33. By reducing the barrier, the second injection structure 321 improves the efficiency of hole injection from the second electrode 31 into the light-emitting structure 33, thereby allowing more holes to effectively enter the light-emitting structure 33.

[0156] In some embodiments, the display panel 100 further includes an encapsulation layer disposed on the side of the first electrode layer 35 away from the substrate 10, and the encapsulation layer covers the pixel defining portion 21.

[0157] The encapsulation layer generally includes an inorganic encapsulation layer, an organic encapsulation layer, and another inorganic encapsulation layer sequentially disposed from the display panel 100 in a direction away from the substrate 10. The first inorganic encapsulation layer is typically dense and rigid, effectively blocking gases and moisture and preventing the penetration of external environmental factors such as water vapor and oxygen. The organic encapsulation layer is relatively soft and elastic, providing a certain degree of cushioning. The second inorganic encapsulation layer is similar to the first inorganic encapsulation layer, further enhancing the protective properties of the encapsulation layer.

[0158] like Figure 9 As shown, in a third aspect, embodiments of this application also provide a method for manufacturing a display panel 100, comprising the following steps:

[0159] like Figure 10 As shown, in step S10, a pixel definition layer 20 is formed on one side of the substrate 10.

[0160] A second electrode 31 can be formed on one side of the substrate 10. Adjacent second electrodes 31 are spaced apart. The material for the second electrodes 31 can be deposited over the entire surface by vapor deposition, and then the spaced-apart second electrodes 31 can be formed by etching. A pixel definition layer 20 is then formed on the side of the substrate 10 with the second electrodes 31. The pixel definition layer 20 includes a pixel defining portion 21 and a pixel opening 22 formed in the pixel defining portion 21, with at least a portion of the second electrode 31 exposed through the pixel opening 22. The pixel defining portion 21 can cover the edge of the second electrode 31 to increase the area of ​​the sub-pixel. The pixel defining portion 21 can reduce crosstalk between the first current-carrying substructure 32 and the light-emitting structure 33 of each sub-pixel, improving the display effect of the display panel 100.

[0161] like Figure 11 As shown, in S20, multiple first charge carrier structures 32, multiple light-emitting structures 33, multiple sacrificial structures 40 and multiple blocking structures 50 are sequentially formed at the corresponding pixel openings 22.

[0162] like Figure 12 As shown, in step S30, multiple occlusion structures 50 and multiple sacrificial structures 40 are removed sequentially;

[0163] like Figure 13 As shown, S40, a second carrier layer 34 is formed to continuously cover the pixel limiting portion 21 and the plurality of light-emitting structures 33.

[0164] After patterning the light-emitting structure 33 of each sub-pixel, the second charge carrier layer 34 is formed by vapor deposition on the entire surface. The light-emitting structure 33 has a certain degree of hydrophobicity, which can block some water vapor from penetrating into the film layer. Therefore, the second charge carrier layer 34 will not be eroded by water and oxygen in the atmosphere, ensuring the transmission performance of the second charge carrier layer 34 and improving the performance of the display panel 100.

[0165] In some embodiments, the second carrier layer 34 includes a first transport layer 342, and after step S40 of forming the second carrier layer 34 that continuously covers the pixel definition portion 21 and the plurality of light-emitting structures 33, it further includes:

[0166] S50, a first electrode layer 35 is formed on the side of the second carrier layer 342 away from the substrate 10.

[0167] Preferably, the first transport layer 342 is an electron transport layer, and / or the first electrode layer 35 is a cathode layer;

[0168] like Figure 14 As shown, preferably, the sacrificial structure 40 includes a first sub-sacrificial structure 41 and a second sub-sacrificial structure 42 arranged sequentially in a direction away from the substrate 10. The material of the first sub-sacrificial structure 41 includes a water-soluble resin, and the material of the second sub-sacrificial structure 42 includes an inorganic material.

[0169] If the second sub-sacrificial structure 42, which includes inorganic materials, is directly disposed on the light-emitting structure 33, the inorganic materials are difficult to remove and require dry etching, which can easily damage the underlying film layer. In this embodiment, the sacrificial structure 40 is divided into a first sub-sacrificial structure 41 and a second sub-sacrificial structure 42. The second sub-sacrificial structure 42 is an inorganic film layer that can block moisture intrusion from the front. The second sub-sacrificial structure 42 includes a water-soluble resin, such as an alcohol-containing resin, which is easily removed and will not damage the underlying film layer when removed.

[0170] In some embodiments, the plurality of pixel openings 22 include a first pixel opening 221 and a second pixel opening 222. The step S20, which sequentially forms a plurality of first charge carrier structures 32, a plurality of light-emitting structures 33, a plurality of sacrificial structures 40 and a plurality of blocking structures 50 located at the corresponding pixel openings 22, includes:

[0171] like Figure 15a As shown, in S21, a first carrier material layer 323, a first light-emitting material layer 336, and a sacrificial material layer 43 are sequentially formed along a direction away from the substrate 10;

[0172] like Figure 15bAs shown, in step S22, a shielding structure 50 is formed on the side of the sacrificial material layer 43 facing away from the substrate 10. The projection of the shielding structure 50 onto the substrate 10 covers the projection of the first pixel opening 221 onto the substrate 10.

[0173] Can Figure 15a The process involves first preparing a masking material layer 51 across the entire surface, and then processing the masking material layer 51 through an exposure and development process to form a masking structure 50 corresponding to the first pixel opening 221. The width of the masking structure 50 can be set according to requirements, but it can cover the first pixel opening 221 to protect the light-emitting structure 33 at the location of the first pixel opening 221.

[0174] like Figure 15c As shown, in step S23, using the masking structure 50 as a mask, the sacrificial material layer 43, the first light-emitting material layer 336, and the first charge carrier material layer 323 located inside the second pixel opening 222 and on the side of the pixel limiting portion 21 away from the substrate 10 are removed to obtain the first charge carrier structure 32, the first light-emitting structure 333, and the sacrificial structure 40 located at the position of the first pixel opening 221.

[0175] The first carrier structure 32, the first light-emitting structure 333, and the sacrificial structure 40 of the first pixel opening 221, which are blocked by the blocking structure 50, are retained. A portion of them are located inside the first pixel opening 221, and another portion is located on the side of the pixel limiting portion 21 away from the substrate 10.

[0176] S24, forming a first carrier structure 32, a second light-emitting structure 334 and a sacrificial structure 40 located at the second pixel opening 222.

[0177] Step S24 can be performed using the same method as S21, S22, and S23, such as... Figure 15d As shown, a first carrier material layer 323, a second luminescent material layer 337, and a sacrificial material layer 43 are formed sequentially.

[0178] like Figure 15e As shown, a shielding structure 50 is then formed on the side of the sacrificial material layer 43 facing away from the substrate 10. The orthogonal projection of the shielding structure 50 on the substrate 10 covers the orthogonal projection of the second pixel opening 222 on the substrate 10.

[0179] like Figure 15f As shown, then using the masking structure 50 as a mask, the sacrificial material layer 43, the second light-emitting material layer 337, and the first charge carrier material layer 323 located in the first pixel opening 221 and the third pixel opening 223 and on the side of the pixel limiting portion 21 away from the substrate 10 are removed, resulting in the first charge carrier structure 32, the second light-emitting structure 334, and the sacrificial structure 40 located at the position of the second pixel opening 222.

[0180] Similarly, a first carrier structure 32, a third light-emitting structure 335, and a sacrificial structure 40 can be formed at the location of the third pixel opening 223.

[0181] like Figure 15g As shown, the first carrier material layer 323, the third luminescent material layer 338, and the sacrificial material layer 43 are formed sequentially.

[0182] like Figure 15h As shown, a shielding structure 50 is then formed on the side of the sacrificial material layer 43 facing away from the substrate 10. The orthogonal projection of the shielding structure 50 on the substrate 10 covers the orthogonal projection of the third pixel opening 223 on the substrate 10.

[0183] like Figure 15i As shown, then using the masking structure 50 as a mask, the sacrificial material layer 43, the third light-emitting material layer 338, and the first charge carrier material layer 323 located in the first pixel opening 221, the second pixel opening 222, and on the side of the pixel limiting portion 21 away from the substrate 10 are removed, resulting in the first charge carrier structure 32, the third light-emitting structure 335, and the sacrificial structure 40 located at the position of the third pixel opening 223.

[0184] like Figure 15j As shown, multiple occlusion structures 50 and multiple sacrificial structures 40 are removed sequentially;

[0185] like Figure 15k As shown, a second carrier layer 34 is formed that continuously covers the pixel definition portion 21 and multiple light-emitting structures 33.

[0186] In some embodiments, the step of sequentially forming a first carrier material layer 323, a first light-emitting material layer 336, and a sacrificial material layer 43 along a direction away from the substrate 10 includes: sequentially forming a first carrier material layer 323, a first light-emitting material layer 336, a first blocking material layer 371, and a sacrificial material layer 43 along a direction away from the substrate 10.

[0187] The steps of obtaining the first carrier structure 32, the first light-emitting structure 333, and the sacrificial structure 40 located at the first pixel opening 221 include: using the shielding structure 50 as a mask, removing the sacrificial material layer 43, the first light-emitting material layer 336, the first blocking material layer 371, and the first carrier material layer 323 located inside the second pixel opening 222 and on the side of the pixel limiting portion 21 facing away from the substrate 10, to obtain the first carrier structure 32, the first light-emitting structure 333, the first blocking structure 37, and the sacrificial structure 40 located at the first pixel opening 221;

[0188] Preferably, the first blocking structure 37 is a hole blocking structure.

[0189] In some embodiments, the step of forming a second carrier sublayer 34 that continuously covers the pixel definition portion 21 and the plurality of light-emitting structures 33 includes:

[0190] A first blocking layer 38 and a first transmission layer 342 are sequentially formed to continuously cover the pixel limiting part 21, the first light-emitting structure 333 and the second light-emitting structure 334;

[0191] Preferably, the first blocking layer 38 is a hole blocking layer, and / or the first transport layer 342 is an electron transport layer.

[0192] In some embodiments, the first light-emitting material layer 336 includes a first sub-material layer and a second sub-material layer sequentially stacked along a direction away from the substrate 10, and the step of obtaining the first current-carrying substructure 32, the first light-emitting structure 333, and the sacrificial structure 40 located at the first pixel opening 221 includes:

[0193] Using the masking structure 50 as a mask, the sacrificial material layer 43, the second sub-material layer, the first sub-material layer and the first carrier material layer 323 located in the second pixel opening 222 and on the side of the pixel limiting portion 21 away from the substrate 10 are removed to obtain the first carrier structure 32, the first light-emitting structure 333 and the sacrificial structure 40 located at the position of the first pixel opening 221.

[0194] The first light-emitting structure 333 includes a first substructure 331 and a second substructure 332 stacked sequentially along the direction away from the substrate 10. The first substructure 331 includes a main material and a doping material, and the second substructure 332 includes the main material.

[0195] Preferably, the second substructure 332 does not include doped material;

[0196] Preferably, the first light-emitting structure 333 is a blue light-emitting structure 33.

[0197] In some embodiments, the step of sequentially forming a first carrier material layer 323, a first light-emitting material layer 336, and a sacrificial material layer 43 along a direction away from the substrate 10 includes: sequentially forming a first carrier material layer 323, a first light-emitting material layer 336, a first blocking material layer 371, and a sacrificial material layer 43 along a direction away from the substrate 10.

[0198] The steps of obtaining the first carrier structure 32, the first light-emitting structure 333, and the sacrificial structure 40 located at the first pixel opening 221 include: using the shielding structure 50 as a mask, removing the sacrificial material layer 43, the first light-emitting material layer 336, the first blocking material layer 371, and the first carrier material layer 323 located inside the second pixel opening 222 and on the side of the pixel limiting portion 21 facing away from the substrate 10, to obtain the first carrier structure 32, the first light-emitting structure 333, the first blocking structure 37, and the sacrificial structure 40 located at the first pixel opening 221;

[0199] The step of forming a second carrier layer 34 that continuously covers the pixel defining portion 21 and the plurality of light-emitting structures 33 includes: sequentially forming a first blocking layer 38 and a first transmission layer 342 that continuously covers the pixel defining portion 21, the first light-emitting structure 333 and the second light-emitting structure 334.

[0200] Preferably, the first blocking structure 37 is a hole blocking structure, and / or the first blocking layer 38 is a hole blocking layer, and / or the first transport layer 342 is an electron transport layer.

[0201] Thirdly, this application also provides a display device, including the display panel 100 described above, or the display panel 100 prepared by any of the above-described preparation methods. Since this display device employs all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated upon here.

[0202] The display device can be any device with display function, such as mobile devices such as mobile phones, tablets, laptops, handheld computers, in-vehicle electronic devices, wearable devices, ultra-mobile personal computers (UMPCs), netbooks, or personal digital assistants (PDAs), as well as non-mobile devices such as personal computers (PCs), televisions (TVs), ATMs, or self-service machines.

[0203] The above description is merely a specific embodiment of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, substitutions for other connection methods described above can be made by referring to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application.

Claims

1. A display panel, characterized in that, include: substrate; A pixel definition layer is disposed on one side of the substrate, the pixel definition layer including a pixel defining portion and a plurality of pixel openings formed in the pixel defining portion; The light-emitting device layer includes a plurality of first charge carrier structures, a plurality of light-emitting structures, and a second charge carrier layer. The first charge carrier structures and the light-emitting structures are located at the positions of the corresponding pixel openings, and the light-emitting structures are located on the side of the corresponding first charge carrier structure facing away from the substrate. The second charge carrier layer continuously covers the pixel defining portion and the plurality of light-emitting structures.

2. The display panel according to claim 1, characterized in that, The second charge carrier layer includes a first transport layer, and the light-emitting device layer further includes a first electrode layer, wherein the first electrode layer is located on the side of the second charge carrier layer away from the substrate; Preferably, the orthographic projection of the pixel defining portion and the plurality of light-emitting structures onto the substrate is located within the orthographic projection of the first electrode layer onto the substrate; Preferably, the first transport layer is an electronic transport layer; Preferably, the first electrode layer is a cathode layer.

3. The display panel according to claim 2, characterized in that, The light-emitting device layer further includes at least one first blocking structure, which is located between the second charge carrier layer and the corresponding light-emitting structure. Preferably, the at least one first blocking structure includes a plurality of first blocking structures that correspond one-to-one with the plurality of light-emitting structures; Preferably, the first blocking structure is a hole blocking structure.

4. The display panel according to claim 2, characterized in that, The second charge carrier layer further includes a first barrier layer, which is located between the first transport layer and the plurality of light-emitting structures; Preferably, the first blocking layer continuously covers the pixel defining portion and the plurality of light-emitting structures; Preferably, the first blocking layer is a hole blocking layer.

5. The display panel according to claim 2, characterized in that, At least one of the plurality of light-emitting structures includes a first substructure and a second substructure, wherein: The first substructure is located on the side of the corresponding first current-carrying substructure away from the substrate, and the first substructure includes a main material and a doped material; The second substructure is located between the first substructure and the second charge-carrying sublayer, and the second substructure includes the main material; Preferably, the second substructure does not include the doped material; Preferably, the plurality of light-emitting structures includes a blue light-emitting structure, and the blue light-emitting structure includes a first substructure and a second substructure; Preferably, the plurality of light-emitting structures further includes a red light-emitting structure and / or a green light-emitting structure, wherein the red light-emitting structure includes the first substructure and the second substructure, and / or the green light-emitting structure includes the first substructure and the second substructure; Preferably, the second charge carrier layer further includes a first blocking layer, which is located between the first transport layer and the plurality of light-emitting structures; Preferably, the first blocking layer continuously covers the pixel defining portion and the plurality of light-emitting structures; Preferably, the first blocking layer is a hole blocking layer; Preferably, the thickness of the second substructure is D1, wherein D1 satisfies: 20nm≤D1≤50nm.

6. The display panel according to claim 2, characterized in that, The light-emitting device layer further includes at least one first blocking structure, which is located between the second sub-layer and the corresponding light-emitting structure. The second sub-layer further includes a first blocking layer, which continuously covers the pixel defining portion, the plurality of light-emitting structures and the at least one first blocking structure. Preferably, the thickness of the first barrier structure is greater than the thickness of the first barrier layer; Preferably, the at least one first blocking structure includes a plurality of first blocking structures corresponding one-to-one with the plurality of light-emitting structures, and the first blocking layer continuously covers the pixel defining portion and the plurality of first blocking structures; Preferably, the first blocking structure is a hole blocking structure; Preferably, the first blocking layer is a hole blocking layer; Preferably, the thickness of the first blocking structure is D2, wherein D2 satisfies: 23 angstroms ≤ D1 ≤ 40 angstroms; Preferably, the thickness of the first barrier layer is D3, wherein D3 satisfies: 10 angstroms ≤ D2 ≤ 25 angstroms.

7. The display panel according to claim 2, characterized in that, The light-emitting device layer further includes a plurality of second electrodes, which are located between the substrate and the corresponding first charge carrier structure and are partially covered by the pixel defining portion; Preferably, the second carrier layer further includes a first injection layer, which is located between the first transport layer and the first electrode layer; Preferably, the first injection layer is an electron injection layer; Preferably, at least one of the plurality of first charge carrier structures includes a second blocking structure, wherein the second blocking structure is an electron blocking structure; Preferably, at least one of the plurality of first carrier substructures includes a second transmission structure, wherein the second transmission structure is a hole transmission structure; Preferably, at least one of the plurality of first carrier structures includes a second injection structure, wherein the second injection structure is a hole injection structure.

8. A method for manufacturing a display panel, characterized in that, The preparation method includes: A pixel definition layer is formed on one side of the substrate, the pixel definition layer including a pixel defining portion and a plurality of pixel openings formed in the pixel defining portion; Multiple first charge carrier structures, multiple light-emitting structures, multiple sacrificial structures, and multiple blocking structures are sequentially formed at the corresponding pixel opening positions; The plurality of occluding structures and the plurality of sacrificial structures are removed sequentially; A second carrier layer is formed that continuously covers the pixel definition portion and the plurality of light-emitting structures.

9. The preparation method according to claim 8, characterized in that, The second current-carrying sublayer includes a first transport layer, and after the step of forming a second current-carrying sublayer that continuously covers the pixel definition portion and the plurality of light-emitting structures, it further includes: A first electrode layer is formed on the side of the second carrier layer away from the substrate; Preferably, the first transport layer is an electron transport layer, and / or the first electrode layer is a cathode layer; Preferably, the sacrificial structure includes a first sub-sacrificial structure and a second sub-sacrificial structure arranged sequentially in a direction away from the substrate, wherein the material of the first sub-sacrificial structure includes a water-soluble resin, and the material of the second sub-sacrificial structure includes an inorganic material.

10. The preparation method according to claim 8, characterized in that, The plurality of pixel openings includes a first pixel opening and a second pixel opening. The step of sequentially forming a plurality of first charge carrier structures, a plurality of light-emitting structures, a plurality of sacrificial structures, and a plurality of blocking structures located at the corresponding pixel opening positions includes: A first carrier material layer, a first light-emitting material layer, and a sacrificial material layer are sequentially formed along a direction away from the substrate; A shielding structure is formed on the side of the sacrificial material layer opposite to the substrate, and the projection of the shielding structure onto the substrate covers the projection of the first pixel opening onto the substrate. Using the shielding structure as a mask, the sacrificial material layer, the first light-emitting material layer, and the first charge carrier material layer located inside the second pixel opening and on the side of the pixel limiting portion facing away from the substrate are removed to obtain the first charge carrier structure, the first light-emitting structure, and the sacrificial structure located at the first pixel opening position. A first carrier structure, a second light-emitting structure, and a sacrificial structure are formed at the opening position of the second pixel.

11. The preparation method according to claim 10, characterized in that, The step of sequentially forming a first carrier material layer, a first light-emitting material layer, and a sacrificial material layer along a direction away from the substrate includes: sequentially forming a first carrier material layer, a first light-emitting material layer, a first barrier material layer, and a sacrificial material layer along a direction away from the substrate; The step of obtaining the first carrier structure, the first light-emitting structure, and the sacrificial structure located at the first pixel opening position includes: using the blocking structure as a mask, removing the sacrificial material layer, the first light-emitting material layer, the first blocking material layer, and the first carrier material layer located inside the second pixel opening and on the side of the pixel limiting portion away from the substrate, to obtain the first carrier structure, the first light-emitting structure, the first blocking structure, and the sacrificial structure located at the first pixel opening position; Preferably, the first blocking structure is a hole blocking structure.

12. The preparation method according to claim 10, characterized in that, The step of forming a second carrier sublayer that continuously covers the pixel definition portion and the plurality of light-emitting structures includes: A first blocking layer and a first transmission layer are sequentially formed to continuously cover the pixel defining portion, the first light-emitting structure, and the second light-emitting structure; Preferably, the first blocking layer is a hole blocking layer, and / or the first transport layer is an electron transport layer.

13. The preparation method according to claim 12, characterized in that, The first light-emitting material layer includes a first sub-material layer and a second sub-material layer sequentially stacked along a direction away from the substrate. The step of obtaining the first carrier structure, the first light-emitting structure, and the sacrificial structure located at the first pixel opening includes: Using the shielding structure as a mask, the sacrificial material layer, the second sub-material layer, the first sub-material layer, and the first charge carrier material layer located inside the second pixel opening and on the side of the pixel limiting portion facing away from the substrate are removed to obtain the first charge carrier structure, the first light-emitting structure, and the sacrificial structure located at the first pixel opening position. The first light-emitting structure includes a first substructure and a second substructure stacked sequentially along a direction away from the substrate. The first substructure includes a main material and a doping material, and the second substructure includes the main material. Preferably, the second substructure does not include the doped material; Preferably, the first light-emitting structure is a blue light-emitting structure.

14. The preparation method according to claim 10, characterized in that, The step of sequentially forming a first carrier material layer, a first light-emitting material layer, and a sacrificial material layer along a direction away from the substrate includes: sequentially forming a first carrier material layer, a first light-emitting material layer, a first barrier material layer, and a sacrificial material layer along a direction away from the substrate; The step of obtaining the first carrier structure, the first light-emitting structure, and the sacrificial structure located at the first pixel opening position includes: using the blocking structure as a mask, removing the sacrificial material layer, the first light-emitting material layer, the first blocking material layer, and the first carrier material layer located inside the second pixel opening and on the side of the pixel limiting portion away from the substrate, to obtain the first carrier structure, the first light-emitting structure, the first blocking structure, and the sacrificial structure located at the first pixel opening position; The step of forming a second carrier sublayer that continuously covers the pixel defining portion and the plurality of light-emitting structures includes: sequentially forming a first blocking layer and a first transmission layer that continuously cover the pixel defining portion, the first light-emitting structure and the second light-emitting structure; Preferably, the first blocking structure is a hole blocking structure, and / or the first blocking layer is a hole blocking layer, and / or the first transport layer is an electron transport layer.

15. A display device, characterized in that, It includes the display panel as described in any one of claims 1-7, or the display panel formed using the preparation method as described in any one of claims 8-14.

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