Display device

Abstract

A display device according to one exemplary embodiment includes: a substrate including a display area including a plurality of sub-pixels and a non-display area around the display area; an anode electrode disposed in each of the sub-pixels on the substrate; a bank disposed on the anode at a boundary between adjacent sub-pixels, and overlapping a periphery of an upper surface of the anode; and an optical pattern disposed between a periphery of an upper surface of the anode and the bank, where the bank includes a black-based material.

Description

TECHNICAL FIELD

[0001] The present specification relates to a display device, and more particularly, for example, but not limited to, a display device capable of implementing a narrow bezel and capable of preventing or reducing crack propagation. BACKGROUND

[0002] As the information society develops, various demands for display devices for displaying images are increasing, and various types of display devices such as liquid crystal display (LCD) devices and organic light emitting diode (OLED) display devices are utilized.

[0003] The display device includes a plurality of pixels and a plurality of switching elements for driving and controlling the pixels.

[0004] Accordingly, the present disclosure relates to a display device that substantially obviates one or more problems due to limitations and disadvantages of the related art. SUMMARY

[0005] An exemplary embodiment of the present specification is intended to provide a display device in which an optical pattern including a material having a higher refractive index than the bank can be formed on an upper surface of the anode overlapping the bank to guide external light reflected from the anode to the bank.

[0006] An exemplary embodiment of the present specification is also intended to provide a display device in which the bank can include a black matrix to absorb external light guided to the bank.

[0007] An exemplary embodiment of the present specification is also intended to provide a display device in which external light can be guided to the bank and absorbed, thereby reducing reflectivity due to the anode.

[0008] An exemplary embodiment of the present specification is also intended to provide a display device in which external light can be guided to the bank and absorbed, thereby preventing a ring-shaped spot from occurring in an area in which the anode overlaps the bank (or a part of a non-light emitting area).

[0009] The object of the present specification is not limited to the above-mentioned objects, and other technical objects can be inferred from the following embodiments.

[0010] According to one exemplary embodiment, there is provided a display device including a substrate including a display area including a plurality of pixels and a non-display area of the display area; an anode disposed in each sub-pixel on the substrate; a bank disposed on the anode at a boundary between adjacent sub-pixels and overlapping a periphery of an upper surface of the anode; and an optical pattern disposed between the periphery of the upper surface of the anode and the bank, wherein the bank includes a black matrix.

[0011] According to another exemplary embodiment, there is provided a display device including a substrate including a display area including a plurality of pixels and a non-display area around the display area; an anode disposed in each of sub-pixels on the substrate; a bank disposed on the anode at a boundary between adjacent sub-pixels and overlapping with a periphery of an upper surface of the anode; an organic layer disposed on the anode and the bank, a cathode on the organic layer, an encapsulation portion on the cathode, a touch portion disposed on the encapsulation portion, a first touch conductive layer having a bridge electrode, and a second touch conductive layer having a sensor electrode and disposed on the first touch conductive layer; and a black matrix disposed at the boundary between the adjacent sub-pixels on the touch portion and covering the bridge electrode and the sensor electrode, wherein a width of the black matrix is smaller than a width of the bank, and the display device further includes an optical pattern disposed between the periphery of the upper surface of the anode and the bank.

[0012] Details of other exemplary embodiments are included in the detailed description and the accompanying drawings.

[0013] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the inventive concepts claimed. BRIEF DESCRIPTION OF DRAWINGS

[0014] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain principles of the present disclosure. In the drawings:

[0015] Figure 1 is a plan view of a display device according to an exemplary embodiment.

[0016] Figure 2 is a cross-sectional view illustrating a bending state of a display panel according to Figure 1 .

[0017] Figure 3 is a cross-sectional view taken along line A-A’ in Figure 1 .

[0018] Figure 4 is a detailed cross-sectional view of a light emitting portion of Figure 3 .

[0019] Figure 5 is a detailed cross-sectional view of a light emitting portion according to a modification.

[0020] Figure 6 is a cross-sectional view of a contact portion according to Figure 3 .

[0021] Figure 7 is a cross-sectional view taken along line A-A’ in Figure 1a cross-sectional view of line B-B' in FIG. 1.

[0022] Figure 8 is along Figure 1 a cross-sectional view of line C-C' in FIG. 1.

[0023] Figure 9 is Figure 3 a magnified cross-sectional view of region Q1 in FIG. 1.

[0024] Figure 10 is Figure 9 a magnified cross-sectional view of region Q2 in FIG. 1.

[0025] Figure 11 is Figure 9 a magnified cross-sectional view of region Q2 in FIG. 1.

[0026] Figure 12 is a cross-sectional view of a display device according to another exemplary embodiment.

[0027] Figure 13 is a cross-sectional view of a display device according to another exemplary embodiment.

[0028] Figure 14 is a cross-sectional view of a display device according to another exemplary embodiment.

[0029] Figure 15 is a cross-sectional view of a display device according to another exemplary embodiment.

[0030] Figure 16 is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0031] Figure 17 is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0032] Figure 18 is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0033] Figure 19 is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0034] Throughout the drawings and detailed description, unless otherwise specified, like reference numerals should be understood to refer to like elements, features and structures. The relative dimensions and descriptions of these elements can be exaggerated for clarity, illustration and convenience.

[0035] Reference Signs

[0036] 1: display device

[0037] 100, 100_1, 100_2: display panel

[0038] D1, D2: dam portion DETAILED DESCRIPTION

[0039] Hereinafter, exemplary embodiments will be described with reference to the accompanying drawings. In the following description, it will be understood that the details of the disclosure are not necessary to obscure the spirit of the inventive concept when a detailed description of a well-known function or configuration related to the present document is determined to unnecessarily obscure the gist of the disclosure. The progress of the described processing steps and / or operations is only an example; however, the order of the steps and / or operations is not limited to the order set forth herein, and changes can be made as known in the art except for steps and / or operations that must occur in a particular order. The names of the respective elements used in the following description can be selected only for the convenience of writing the specification, and thus can be different from the names used in the actual product.

[0040] The advantages and features of the present disclosure and its implementation method will be clarified through the following exemplary embodiments to be described with reference to the accompanying drawings. However, the present disclosure can be implemented in different forms, and should not be interpreted as being limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided so that the present disclosure can be sufficiently thorough and complete to help those skilled in the art fully understand the scope of the present disclosure. Furthermore, the present disclosure is limited only by the scope of the claims.

[0041] The shapes (e.g., size, length, width, height, thickness, position, radius, diameter, and area), ratios, angles, numbers, etc. illustrated in the drawings to describe various exemplary embodiments of the present disclosure are given only by way of example. Therefore, the present disclosure is not limited to the illustrations in the drawings.

[0042] The word "exemplary" is used to mean serving as an example, instance, or illustration. Various aspects are exemplary aspects. "Embodiment," "example," "aspect," etc. should not be construed as meaning more preferred or advantageous than other implementations. Unless otherwise specified, embodiments, examples, exemplary embodiments, aspects, etc. can refer to one or more embodiments, one or more examples, one or more exemplary embodiments, one or more aspects, etc. In addition, the term "may" encompasses all the meanings of the term "can."

[0043] The same reference numerals indicate the same components. In addition, in the drawings, in order to efficiently describe the technical content, the thickness, ratio, and size of components can be exaggerated. The ratio of the components shown in the drawings is different from the actual ratio, and thus is not limited to the ratio shown in the drawings.

[0044] In the specification, when a first component (or region, layer, part, etc.) is described as being "on" a second component, or "connected" or "coupled" to the second component, it means that the first component can be directly connected / coupled to the second component, or a third component can be interposed therebetween.

[0045] The term "and / or" includes all one or more combinations of the associated listed items.

[0046] In explaining an element, even if there is no explicit description of the error or tolerance range, the element is to be interpreted as including the error range or tolerance range.

[0047] Terms such as "below," "lower," "above," "upper," and the like can be used herein to describe relationships between elements in the drawings. It will be understood that these terms are spatially relative terms and are based on the orientation of the drawings as depicted.

[0048] Terms such as "first," "second," "A," "B," "(a)," and "(b)" can be used herein to describe various components. These components are not limited by these terms. These terms are only used to distinguish one component from another. For example, a first component could be termed a second component, and, similarly, a second component could be termed a first component, without departing from the scope of the embodiments. The singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise.

[0049] Terms such as "below," "lower," "above," and "upper" are used to describe relationships between components shown in the drawings. These terms are relative concepts and are described with respect to the orientation marked in the drawings. For example, one or more other parts can be located between two parts as long as "immediately" or "directly" is not used. The spatially relative terms "below or under," "lower," "above," "upper," and the like can be used herein to easily describe the relationship between one element or component shown in the drawings and another element or component. The spatially relative terms should be understood to include terms of different directions of the elements in use or operation in addition to the directions shown in the drawings. For example, in the case of reversing the elements shown in the drawings, the element described as being disposed "below" or "under" another element can be disposed "above" the other element. Thus, the exemplary term "below" can include both downward and upward directions.

[0050] The term "at least one of' should be understood to include any and all combinations of one or more of the associated listed items. For example, the meaning of "at least one of a first element, a second element, and a third element" includes all combinations of all three listed elements, combinations of any two of the three elements, and each individual element (i.e., the first element, the second element, or the third element).

[0051] It should be understood that terms such as "include" or "has" are intended to indicate existence of described features, numbers, steps, operations, components, parts, or combinations thereof, and do not exclude possibility of existence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0052] Features of various embodiments of the present specification can be partially or wholly coupled or combined, can be variously interworked and driven, and the embodiments can be realized independently of each other or together in a related relationship.

[0053] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the example embodiments belong. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. For example, the term "component" or "unit" can be applied to, for example, an individual circuit or structure, an integrated circuit, a computing block of a circuit device, or any structure configured to perform the described functions, as would be understood by one of ordinary skill in the art.

[0054] Hereinafter, a display apparatus of the present specification will be described with reference to the following drawings and example embodiments.

[0055] Figure 1 is a plan view of a display apparatus according to one example embodiment.

[0056] Referring to Figure 1 The display apparatus 1 according to one example embodiment can include a display panel 100. The display panel 100 can include a display area DA including a plurality of pixels PX and a non-display area NDA. As one example, the non-display area NDA can extend from the display area DA. As one example, the non-display area NDA can completely or partially surround the display area DA. As one example, at least a part or the whole of the non-display area NDA can not be visible from a front side of the display panel 100, for example, by being bent toward a rear side of the display panel 100, but is not limited thereto. As one example, a flat surface shape of the display area DA can have a rectangular shape. However, embodiments of the present specification are not limited thereto, and the flat surface shape of the display area DA can be a square shape, a circular shape, an elliptical shape, or other polygonal shape, but is not limited thereto. For example, the display area DA can have a rectangular shape with rounded corners, but is not limited thereto, and can also have a rectangular shape with beveled corners.

[0057] In an exemplary embodiment, the first direction DR1 and the second direction DR2 are different directions and intersect each other (e.g., directions that perpendicularly intersect in a plan view). In Figure 1 an exemplary embodiment, the first direction DR1 can be substantially the same as an extension direction of a short side of the display panel 100, and the second direction DR2 can be the same as an extension direction of a long side of the display panel 100. However, the directions described in the exemplary embodiment should be understood to indicate relative directions, and the embodiments are not limited to the described directions.

[0058] As one example, the display area DA can include a short side extending in the first direction DR1 and a long side extending in the second direction DR2, but is not limited thereto. The non-display area NDA can surround the display area DA. The non-display area NDA can be disposed on one side and the other side of the display area DA in the first direction DR1, and on one side and the other side of the display area DA in the second direction DR2. The embodiments are not limited thereto. As one example, the display area DA can not include an edge, include three edges, or four or more edges. As one example, all edges of the display area DA can have the same length, but are not limited thereto.

[0059] As one example, the display panel 100 can further include a sensor non-display area NDA_S and a sensor hole SH surrounded by the sensor non-display area NDA_S, but is not limited thereto. In a plan view, the sensor holes SH1 and SH2 can be surrounded by the display area DA. The sensor holes SH1 and SH2 can be, for example, Figure 1 two sensor holes in, but the embodiments of the present specification are not limited thereto. For example, the sensor holes can be disposed as one sensor hole. The two sensor holes SH1 and SH2 can include a sensor hole in which an infrared sensor is disposed and a sensor hole in which a camera sensor is disposed, but the embodiments of the present specification are not limited thereto. The sensor non-display area NDA_S can be disposed between the sensor holes SH1 and SH2 and the display area DA. The sensor non-display area NDA_S can completely surround the sensor holes SH1 and SH2. Pixels PX can not be disposed in the sensor non-display area NDA_S. The embodiments are not limited thereto. As one example, there can be one, two, or more sensor holes. As one example, there can be two or more sensor non-display areas NDA_S. As one example, the sensor non-display area NDA_S can surround both of the sensor holes SH1 and SH2, but is not limited thereto. As one example, the sensor non-display area NDA_S can be disposed between the two sensor holes SH1 and SH2. As one example, two sensor non-display areas NDA_S can surround the sensor holes SH1 and SH2, respectively. As one example, the sensor non-display area NDA_S and the sensor hole SH can be omitted according to design.

[0060] As one example, the gate drive units GIP can be provided in the non-display region NDA on one side and / or the other side of the display region DA in the first direction DR1, but are not limited thereto. As one example, the low-potential voltage line VSSL can be provided outside the gate drive units GIP on the non-display region NDA. For example, as shown in FIG. 1, the low-potential voltage line VSSL can extend from the printed circuit board FPCB, pass through the sub-region SR and the bending region BR, be located outside the gate drive units GIP on the non-display region NDA, and be provided to surround the display region DA. Embodiments are not limited thereto. As one example, the low-potential voltage line VSSL can be provided inside the gate drive units GIP on the non-display region NDA. As one example, the low-potential voltage line VSSL can be provided to overlap the gate drive units GIP. As one example, the gate drive units can not be provided on the non-display region NDA, but can be separately provided on a separate panel and connected to the display panel 100, for example, can employ a tape automated bonding (TAB) method, a chip on glass (COG) method, a chip on panel (COP) method, or a chip on film (COF) method, but are not limited thereto. Figure 1

[0061] The non-display region NDA on the other side of the display region DA in the second direction DR2 can further extend from the central portion or the peripheral portion on the other side of the display region DA in the second direction DR2 toward the outside of the display region DA in the second direction DR2. The non-display region NDA further extending from the central portion on the other side of the display region DA in the second direction DR2 toward the outside of the display region DA in the second direction DR2 can have a width in the first direction DR1 that is less than a width in the first direction DR1 of the non-display region NDA adjacent to the other side of the display region DA in the second direction DR2, but is not limited thereto.

[0062] ​The display device 1 can include a main area MR, a sub area SR, and a bending area BR located between the main area MR and the sub area SR. The display area DA and the non-display area NDA surrounding four surfaces of the display area DA can form the main area MR, and a portion extending from a central portion of the other side of the display area DA toward the outside of the display area DA in the second direction DR2 can form the bending area BR and the sub area SR. The bending area BR can be disposed between the sub area SR and the main area MR. The sub area SR can include a first pad area PA1 and a second pad area PA2 located at an end portion of the other side of the sub area SR in the second direction DR2. The display device 1 can further include a data driving unit DIC and a printed circuit board FPCB. The data driving unit DIC can be disposed in the first pad area PA1, and the printed circuit board FPCB can be attached to the second pad area PA2. A plurality of pads connected to the data driving unit DIC or the printed circuit board FPCB can be disposed in each of the first pad area PA1 and the second pad area PA2. The data driving unit DIC can be configured, for example, in the form of a driving chip (IC), but is not limited thereto. In one exemplary embodiment, a case where the data driving unit DIC is disposed by a plastic on chip method in which the data driving unit DIC is directly mounted on the display panel 100 is described, but embodiments of the present specification are not limited thereto, and the data driving unit DIC can be disposed by a glass on chip method or a thin film on chip method, but is not limited thereto.

[0063] The display panel 100 according to one exemplary embodiment can further include a crack sensing pattern CRP surrounding the low potential voltage line VSSL. As an example, as illustrated in FIG. 1A, the crack sensing pattern CRP can be disposed to completely surround the display area DA, but is not limited thereto. For example, the crack sensing pattern CRP can be disposed outside the low potential voltage line VSSL. However, embodiments of the present specification are not limited thereto, and as an example, a portion of the crack sensing pattern CRP can not be disposed in the non-display area NDA located at the other side of the display area DA in the second direction DR2, or at any position on the non-display area NDA. Figure 1

[0064] Figure 2 is a cross-sectional view illustrating a bending state of a display panel according to Figure 1

[0065] Referring to Figure 2 ​​The bending area BR of the display panel 100 of the display apparatus 1 according to one exemplary embodiment can be bent in a thickness direction (or third direction DR3). Accordingly, the main area MR and the sub area SR can overlap each other in the thickness direction. The display panel 100 can be bent in a manner such that a lower surface of the main area MR faces an upper surface of the sub area SR. The printed circuit board FPCB can be attached to an end portion of the sub area SR.

[0066] Figure 3 is a cross-sectional view taken along line A-A' in Figure 1 .

[0067] Referring to Figure 3 , a pixel PX (see Figure 1 ) of the display panel 100 can include a plurality of sub-pixels PX1, PX2, and PX3. The first sub-pixel PX1 can be a red sub-pixel, the second sub-pixel PX2 can be a green sub-pixel, and the third sub-pixel PX3 can be a blue sub-pixel, but embodiments of the present specification are not limited thereto. In some exemplary embodiments, the pixel PX further includes a fourth sub-pixel, and the fourth sub-pixel can be a white sub-pixel, but embodiments of the present disclosure are not limited thereto. As one example, the pixel PX (see Figure 1 ) of the display panel 100 can include two, four, or more sub-pixels. As one example, the plurality of sub-pixels included in one pixel can emit light of different colors, or two or more sub-pixels of the plurality of sub-pixels included in one pixel can emit light of the same color. As one example, a sub-pixel that emits light of a color other than red, green, blue, white can be alternatively or additionally included.

[0068] The display panel 100 can include a substrate 101, a first thin film transistor 120, a second thin film transistor 130, a light emitting part 150, an encapsulating part 170, a touch part 180, a color filter insulating layer 114, a black matrix BM, color filters 191, 192, and 193, and a planarization layer OC. The display panel 100 can include at least one panel insulating layer and at least one touch insulating layer between the substrate 101 and the light emitting part 150. The at least one panel insulating layer can include at least one of a buffer layer 102, a first insulating layer 103, a second insulating layer 104, a 3-1 insulating layer 105-1, a 3-2 insulating layer 105-2, a fourth insulating layer 106, a fifth insulating layer 108, a sixth insulating layer 109, a first protection layer 111, and a second protection layer 112, and the at least one touch insulating layer can include at least one of a touch buffer layer 181, a first touch insulating layer 183, and a second touch insulating layer 184. Embodiments are not limited thereto. As one example, one or more of the above-described components can be omitted, and / or one or more additional components can be further included.

[0069] The substrate 101 can be a rigid substrate or a flexible substrate. As one example, the substrate 101 can be a transparent substrate or an opaque substrate. As one example, the substrate 101 can include glass, plastic, or a flexible polymer film, but is not limited thereto. As one example, the substrate 101 can include one or more plastic materials. As one example, the substrate 101 can include one or more of polyethylene terephthalate (PET), polycarbonate (PC), acrylonitrile-butadiene-styrene copolymer (ABS), polyimide (PI) film, but is not limited thereto. For example, the substrate 101 can be a multi-substrate including a plurality of plastic materials (e.g., polyimide, etc.). For example, the substrate 101 can include a first substrate portion 101a and a second substrate portion 101b each including a plastic material, and a third substrate portion 101c including an inorganic insulating material positioned between the first substrate portion 101a and the second substrate portion 101b, but embodiments of the present specification are not limited thereto.

[0070] The buffer layer 102 can be disposed on the substrate 101. The buffer layer 102 can reduce, minimize, or delay diffusion of moisture or oxygen that penetrates the substrate 101. The buffer layer 102 can be formed by alternately stacking silicon nitride (SiN x ) and silicon oxide (SiO x ) at least once, but embodiments of the present specification are not limited thereto.

[0071] The first light-blocking layer 126 can be optionally disposed on the buffer layer 102. The first light-blocking layer 126 can reduce or prevent light from penetrating the first semiconductor layer 123 of the first thin-film transistor 120. For example, the first semiconductor layer 123 can be disposed to overlap the first light-blocking layer 126. The first light-blocking layer 126 can be formed of a single layer or a plurality of layers formed of one of molybdenum (Mo), aluminum (Al), chromium (Cr), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof, but embodiments of the present specification are not limited thereto. As one example, the light-blocking layer 126 can be omitted according to design.

[0072] The first insulating layer 103 can be disposed on the buffer layer 102 and the first light-blocking layer 126. The first insulating layer 103 can reduce or prevent short-circuiting between the first light-blocking layer 126 and components of the first thin-film transistor 120. The first insulating layer 103 can be formed of the same or different material as the buffer layer 102, but embodiments of the present specification are not limited thereto. For example, the first insulating layer 103 can be formed of an inorganic insulating material such as silicon nitride (SiN x ) or silicon oxide (SiO x ), but embodiments of the present specification are not limited thereto.

[0073] The first thin film transistor 120 can be provided on the first insulating layer 103. The first thin film transistor 120 can include a first source 121, a first gate 122, a first semiconductor layer 123, and a first drain 124.

[0074] The first semiconductor layer 123 can be provided on the first insulating layer 103. The first semiconductor layer 123 can include a metal oxide semiconductor such as indium gallium zinc oxide (IGZO), a silicon-based semiconductor material such as amorphous silicon, polysilicon, or the like, a compound semiconductor, and an oxide semiconductor, but embodiments of the present specification are not limited thereto. The first semiconductor layer 123 can include a channel region, a source region, and a drain region.

[0075] Because a polycrystalline semiconductor layer has a higher mobility than an amorphous semiconductor layer and an oxide semiconductor layer, power consumption can be less, and reliability can be excellent. Thus, as one example, the driving transistor can be formed of a polycrystalline semiconductor layer, but is not limited thereto.

[0076] The second insulating layer 104 can be provided on the first semiconductor layer 123. The second insulating layer 104 can be formed of the same or different material as the first insulating layer 103, and can reduce or prevent short-circuiting between the first semiconductor layer 123 and another component of the first thin film transistor 120.

[0077] The first gate 122 can be provided on the second insulating layer 104. The first gate 122 can be provided on the second insulating layer 104 to overlap with the channel region of the first semiconductor layer 123. The first gate 122 can be formed of a single layer or a plurality of layers formed of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), or a compound thereof, but embodiments of the present specification are not limited thereto. The first gate 122 can be provided together with a gate line, but is not limited thereto.

[0078] The third insulating layers 105-1 and 105-2 can be provided on the first gate 122. The third insulating layers 105-1 and 105-2 can be formed by alternately stacking silicon nitride (SiN x ) and silicon oxide (SiO x ) at least once, but embodiments of the present specification are not limited thereto. For example, the 3-1 insulating layer 105-1 can include silicon oxide (SiO x ), and the 3-2 insulating layer 105-2 can include silicon nitride (SiN x ), but embodiments of the present specification are not limited thereto.

[0079] The first source 121 and the first drain 124 can be provided on the third insulating layers 105-1 and 105-2.

[0080] The first source electrode 121 and the first drain electrode 124 can be electrically connected to the first semiconductor layer 123 through a contact hole. The first source electrode 121 and the first drain electrode 124 can be formed of a conductive material (e.g., a metallic material). For example, the first source electrode 121 and the first drain electrode 124 can be formed of a single layer or a multi-layer of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof, but embodiments of the present specification are not limited thereto.

[0081] The first source electrode 121 and the first drain electrode 124 can be provided together with a data line, but are not limited thereto. For example, the data line can be formed of the same material as the first source electrode 121 and the first drain electrode 124 and be provided on the same layer as the first source electrode 121 and the first drain electrode 124, but embodiments of the present specification are not limited thereto. As one example, the data line can be formed of a different material from the first source electrode 121 and the first drain electrode 124 and / or can be formed on a different layer from the first source electrode 121 and the first drain electrode 124.

[0082] The storage electrode 140 can be provided to be spaced apart from the first thin film transistor 120. The storage electrode 140 can include a first storage electrode 141 and a second storage electrode 142.

[0083] As one example, the first storage electrode 141 can be formed of the same material as or different from the first gate electrode 122 and / or be provided on the same layer as or different from the first gate electrode 122, but embodiments of the present specification are not limited thereto.

[0084] The second storage electrode 142 can be provided on the first storage electrode 141. The second storage electrode 142 can be provided on the third insulating layers 105-1 and 105-2, and the third insulating layers 105-1 and 105-2 between the first storage electrode 141 and the second storage electrode 142 can serve as a dielectric to generate a capacitance, but are not limited thereto. The second storage electrode 142 can be formed of the same material as or different from the first storage electrode 141, but embodiments of the present specification are not limited thereto.

[0085] The second thin film transistor 130 can be provided to be spaced apart from the first thin film transistor 120 and the storage electrode 140. The second thin film transistor 130 can include a second source electrode 131, a second gate electrode 132, a second semiconductor layer 133, and a second drain electrode 134.

[0086] The second light-blocking layer 136 can be provided on the same layer as or a different layer from the second storage electrode 142, but is not limited thereto. As one example, the second light-blocking layer 136 can be omitted according to design.

[0087] Like the first light-blocking layer 126, the second light-blocking layer 136 can reduce or prevent light from traveling to the second semiconductor layer 133, thereby extending the lifetime of the second thin film transistor 130. For example, the second semiconductor layer 133 can be provided to overlap the second light-blocking layer 136.

[0088] The fourth insulating layer 106 can be provided on the second light-blocking layer 136. The fourth insulating layer 106 can be formed of the same material as the first insulating layer 103, the second insulating layer 104, or the third insulating layers 105-1 and 105-2, but embodiments of the present specification are not limited thereto.

[0089] The second semiconductor layer 133 can be provided on the fourth insulating layer 106. The second semiconductor layer 133 can include a source region, a drain region, and a channel region between the source region and the drain region.

[0090] The second semiconductor layer 133 can include a metal oxide semiconductor such as indium gallium zinc oxide (IGZO), a silicon-based semiconductor material such as amorphous silicon, polysilicon, or the like, a compound semiconductor, and an oxide semiconductor, but embodiments of the present specification are not limited thereto.

[0091] The fifth insulating layer 108 can be provided on the second semiconductor layer 133. The fifth insulating layer 108 can be formed of the same material as the first insulating layer 103, the second insulating layer 104, the third insulating layers 105-1 and 105-2, or the fourth insulating layer 106, but embodiments of the present specification are not limited thereto.

[0092] The second gate 132 can be provided on the fifth insulating layer 108.

[0093] The second gate 132 can be formed of the same material as the first gate 122, but is not limited thereto. For example, the second gate 132 can be formed of a single layer or a plurality of layers formed of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), or a compound thereof, but embodiments of the present specification are not limited thereto.

[0094] The sixth insulating layer 109 can be provided on the second gate 132. The sixth insulating layer 109 can be formed of the same material as the first insulating layer 103, the second insulating layer 104, the third insulating layers 105-1 and 105-2, the fourth insulating layer 106, or the fifth insulating layer 108, but embodiments of the present specification are not limited thereto.

[0095] The first source 121, the first drain 124, the second source 131, and the second drain 134 can be provided on the sixth insulating layer 109, but are not limited thereto. As one example, the first source 121 and the first drain 124 can be provided on a different layer from the second source 131 and the second drain 134.

[0096] The second source electrode 131 and the second drain electrode 134 can be formed of the same material as the first source electrode 121 and the first drain electrode 124, and be provided on the same layer as the first source electrode 121 and the first drain electrode 124, but embodiments of the present specification are not limited thereto. For example, the second source electrode 131 and the second drain electrode 134 can be formed of a single layer or a multilayer formed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof, but embodiments of the present specification are not limited thereto. For example, the second source electrode 131 can be electrically connected to the second storage electrode 142. The second source electrode 131 can pass through the sixth insulating layer 109, the fifth insulating layer 108, and the fourth insulating layer 106, and can be electrically connected to the second storage electrode 142.

[0097] The first thin film transistor 120 can be a drive transistor, and the second thin film transistor 130 can be a switching transistor, but embodiments of the present specification are not limited thereto.

[0098] The first protective layer 111 can be provided on the first source electrode 121 and the first drain electrode 124.

[0099] The first protective layer 111 can planarize an upper portion of the first thin film transistor 120 and protect the first thin film transistor 120. The first protective layer 111 can be formed of an organic material and / or an inorganic material. For example, the first protective layer 111 can be formed of an organic material including an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, or a polyimide resin, but embodiments of the present specification are not limited thereto.

[0100] The second protective layer 112 can be provided on the first protective layer 111. The second protective layer 112 can be formed of the same material as the first protective layer 111 or can be formed of a different material from the first protective layer 111, but embodiments of the present specification are not limited thereto.

[0101] In some example embodiments, a third protective layer can also be provided on an upper surface of the second protective layer 112, but embodiments of the present specification are not limited thereto.

[0102] As one example, the connection electrode 145 can be provided between the first protective layer 111 and the second protective layer 112, but is not limited thereto.

[0103] The connection electrode 145 can electrically connect the first thin film transistor 120 to the light emitting portion 150. The connection electrode 145 can be formed of the same material as or a different material from the first source electrode 121 and the first drain electrode 124, but embodiments of the present specification are not limited thereto. As one example, the connection electrode 145 can be omitted. As one example, the first thin film transistor 120 can be directly connected to the light emitting portion 150 without the connection electrode, but is not limited thereto.

[0104] The connection electrode 145 can be formed of a single layer or a plurality of layers made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof, but embodiments of the present specification are not limited thereto.

[0105] The light emitting portion 150 can be disposed on the second protection layer 112. The light emitting portion 150 can include an anode 151, an organic layer 152, and a cathode 153.

[0106] The anode 151 can be disposed on the second protection layer 112. The anode 151 can be electrically connected to the first thin film transistor 120 through a contact hole formed in the second protection layer 112. As one example, the anode 151 can be a reflective electrode that reflects light, but embodiments of the present specification are not limited thereto. The anode 151 can include a conductive material. As one example, the anode 151 can include a metal material having high reflectivity (for example, a layered structure of titanium (Ti) and aluminum (Al) (Ti / Al / Ti), a layered structure of indium tin oxide (ITO) and aluminum (Al) (ITO / Al / ITO), or an APC alloy), and can be formed of a single layer or a plurality of layers, but embodiments of the present specification are not limited thereto.

[0107] The organic layer 152 can be disposed on the anode 151. The organic layer 152 can include one or more light emitting structures (or light emitting elements) stacked on the anode 151 in the order of a hole transport layer and an electron transport layer, or in the reverse order, but is not limited thereto. For example, the hole transport layer can include a hole transport layer, a hole injection layer, an electron blocking layer, a p-type charge generation layer, etc., but embodiments of the present specification are not limited thereto. For example, the electron transport layer can include an electron transport layer, an electron injection layer, a hole blocking layer, an n-type charge generation layer, etc., but embodiments of the present specification are not limited thereto. As one example, one or more of the above layers can be omitted according to design. The organic layer 152 can be an organic light emitting layer, an inorganic light emitting layer, a quantum dot light emitting layer, a micro light emitting diode, a micro mini light emitting diode, etc., but embodiments of the present specification are not limited thereto. For example, the organic layer 152 of the display panel 100 according to one exemplary embodiment of the present specification can include an organic light emitting layer. The organic layer 152 can include a red light emitting layer, a green light emitting layer, and a blue light emitting layer. The organic layer 152 can be a white light emitting layer, but embodiments of the present specification are not limited thereto. Hereinafter, a specific structure of the organic layer 152 according to one exemplary embodiment will be described.

[0108] Figure 4 is Figure 3 a specific cross-sectional view of the light emitting part.

[0109] Referring to Figure 4 , the light emitting part 150 can include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3.

[0110] The thickness of the light emitting part 150 in each of the sub-pixels PX1, PX2, or PX3 can be different, but embodiments of the present specification are not limited thereto, and the thickness of the light emitting part 150 in each of the sub-pixels PX1, PX2, or PX3 can be the same.

[0111] The organic layer 152 can include a first organic layer 152a disposed in the first sub-pixel PX1, a second organic layer 152b disposed in the second sub-pixel PX2, and a third organic layer 152c disposed in the third sub-pixel PX3. The light emitting layers EML1, EML2, and EML3 of the organic layers 152a, 152b, and 152c can be physically separated, but lower and upper layers of the light emitting layers EML1, EML2, and EML3 can be integrally formed across the sub-pixels PX1, PX2, and PX3, but are not limited thereto. The thickness of each of the light emitting layers EML1, EML2, or EML3 can be different. For example, the thickness of the first light emitting layer EML1 can be the largest, the thickness of the second light emitting layer EML2 can be the second largest, and the thickness of the third light emitting layer EML3 can be the smallest, but embodiments of the present specification are not limited thereto.

[0112] A hole injection layer HIL can be disposed on the anode 151. The hole injection layer HIL can be located between the anode 151 and the emission layers EML1, EML2, and EML3. The hole injection layer HIL can be integrally formed across the sub-pixels PX1, PX2, and PX3, or can be formed individually for each of the sub-pixels PX1, PX2, and PX3. For example, the hole injection layer HIL can be formed of a hole injection material selected from one of MTDATA, CuPc, TCTA, NPB (NPD), HATCN, TDAPB, PEDOT / PSS, F4TCNQ, N-(diphenyl-4-yl)-9,9-dimethyl-N-(4-(9-phenyl-9H-carbazol-3-yl)phenyl)-9H-fluorene-2-amine, or the like, but embodiments of the present specification are not limited thereto.

[0113] A hole transport layer HTL can be disposed on the hole injection layer HIL. The hole transport layer HTL can be located between the hole injection layer HIL and the emission layers EML1, EML2, and EML3. The hole transport layer HTL can be integrally formed across the sub-pixels PX1, PX2, and PX3, or can be formed individually for each of the sub-pixels PX1, PX2, and PX3. The hole transport layer HTL can be formed of one or more selected from the group of arylamine-based materials (e.g., N,N-naphthyl-N,N'-phenylbenzidine (NPB), TPD (N,N'-bis(3-methylphenyl-N,N'-bis(phenyl)benzidine), PPD, TTBND, FFD, p-dmDPS, and TAPC), star-shaped aromatic amine-based materials (e.g., TCTA, PTDATA, TDAPB, TDBA, 4-a, and TCTA), and spiro and ladder materials (e.g., spiro-TPD, spiro-mTTB, and spiro-2, NPD (N,N-naphthyl-N,N'-phenylbenzidine), s-TAD, and MTDATA (4,4',4"-tris(N-3-methylphenyl-N-phenylamino)triphenylamine)), but embodiments of the present specification are not limited thereto.

[0114] The emission layers EML1, EML2, and EML3 can be disposed on the hole transport layer HTL. The first emission layer EML1 can be disposed in the first sub-pixel PX1, the second emission layer EML2 can be disposed in the second sub-pixel PX2, and the third emission layer EML3 can be disposed in the third sub-pixel PX3.

[0115] The thickness of each of the emission layers EML1, EML2, or EML3 can be different. For example, the first emission layer EML1 can be formed to a thickness of to The second emission layer EML2 can be formed to a thickness of to The third emission layer EML3 can be formed to a thickness of to a thickness of 100 nm to 200 nm, but embodiments of the present specification are not limited thereto.

[0116] Each of the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 can include a material that can emit light in a visible light range by receiving and combining holes and electrons.

[0117] An electron blocking layer EBL can be disposed on each of the light-emitting layers EML1, EML2, or EML3. The electron blocking layer EBL can be integrally disposed across the sub-pixels PX1, PX2, and PX3, or can be formed individually for each of the sub-pixels PX1, PX2, and PX3.

[0118] An electron transport layer ETL can be disposed on the electron blocking layer EBL. The electron transport layer ETL can be integrally disposed across the sub-pixels PX1, PX2, and PX3, or can be formed individually for each of the sub-pixels PX1, PX2, and PX3. The electron transport layer ETL can be formed of an anthracene derivative and lithium quinolate (Liq), or one or more selected from oxadiazole, triazole, phenanthroline, benzoxazole, benzothiazole, or benzimidazole (for example, 2-[4-(9,10-di-2-naphthyl-2-anthryl)phenyl]-1-phenyl-1H-benzimidazole), but embodiments of the present specification are not limited thereto.

[0119] A cathode 153 can be disposed on the electron transport layer ETL.

[0120] Figure 5 is a detailed cross-sectional view of the light-emitting portion according to the modification.

[0121] Referring to Figure 4 and Figure 5 The organic layer 152_1 can include a first organic layer 152a_1 disposed in the first sub-pixel PX1, a second organic layer 152b_1 disposed in the second sub-pixel PX2, and a third organic layer 152c_1 disposed in the third sub-pixel PX3.

[0122] The light-emitting layer of each of the organic layers 152a_1, 152b_1, or 152c_1 can be physically separated, but lower and upper layers of the light-emitting layer can be integrally formed across the sub-pixels PX1, PX2, and PX3, but are not limited thereto. The thickness of each of the light-emitting layers can be different. For example, the thickness of the first light-emitting layer of the first sub-pixel can be the greatest, the thickness of the second light-emitting layer of the second sub-pixel can be the second greatest, and the thickness of the third light-emitting layer of the third sub-pixel can be the least, but embodiments of the present specification are not limited thereto. In addition, the light-emitting layer of each of the organic layers 152a_1, 152b_1, or 152c_1 can be disposed as two or more light-emitting layers.

[0123] A hole injection layer HIL can be disposed on the anode 151. The hole injection layer HIL can be located between the anode 151 and the emission layers EML1a, EML2a, and EML3a. The hole injection layer HIL can be integrally disposed across the sub-pixels PX1, PX2, and PX3, or can be formed individually for each of the sub-pixels PX1, PX2, and PX3. For example, the hole injection layer HIL can be formed of a hole injection material selected from one of MTDATA, CuPc, TCTA, NPB (NPD), HATCN, TDAPB, PEDOT / PSS, F4TCNQ, N-(biphenyl-4-yl)-9,9-dimethyl-N-(4-(9-phenyl-9H-carbazol-3-yl)phenyl)-9H-fluorene-2-amine, and the like, but embodiments of the present specification are not limited thereto.

[0124] A first hole transport layer HTL1 can be disposed on the hole injection layer HIL. The first hole transport layer HTL1 can be located between the hole injection layer HIL and the emission layers EML1a, EML2a, and EML3a. The first hole transport layer HTL1 can be integrally disposed across the sub-pixels PX1, PX2, and PX3, or can be formed individually for each of the sub-pixels PX1, PX2, and PX3. The first hole transport layer HTL1 can be formed of one or more selected from the group of arylamine-based materials (e.g., NPB (N,N-naphthyl-N,N'-phenylbenzidine) TPD (N,N'-bis(3-methylphenyl)-N,N'-bis(phenyl)benzidine), PPD, TTBND, FFD, p-dmDPS, and TAPC), star-shaped aromatic amine-based materials (e.g., TCTA, PTDATA, TDAPB, TDBA, 4-a, and TCTA), and spiro and ladder materials (e.g., spiro-TPD, spiro-mTTB, and spiro-2, NPD (N,N-naphthyl-N,N'-phenylbenzidine), s-TAD, and 4,4',4"-tris(N-3-methylphenyl-N-phenylamino)triphenylamine (MTDATA)), but embodiments of the present specification are not limited thereto.

[0125] The emission layers EML1a, EML2a, and EML3a can be disposed on the first hole transport layer HTL1. The 1-1 emission layer EML1a can be disposed in the first sub-pixel PX1, the 2-1 emission layer EML2a can be disposed in the second sub-pixel PX2, and the 3-1 emission layer EML3a can be disposed in the third sub-pixel PX3. Each of the emission layers EML1a, EML2a, and EML3a can be the same as each of the emission layers EML1, EML2, and EML3 of the display apparatus 1000 of FIG. 1, but is not limited thereto. Figure 4

[0126] ​The thickness of each of the light-emitting layers EML1a, EML2a, or EML3a can be different. For example, the 1-1 light-emitting layer EML1a can be formed to a thickness of to , the 2-1 light-emitting layer EML2a can be formed to a thickness of to , and the 3-1 light-emitting layer EML3a can be formed to a thickness of to , but embodiments of the present specification are not limited thereto.

[0127] A hole blocking layer HBL can be disposed on each of the light-emitting layers EML1a, EML2a, or EML3a. The hole blocking layer HBL can be integrally disposed across the sub-pixels PX1, PX2, and PX3, or can be formed individually for each of the sub-pixels PX1, PX2, and PX3.

[0128] A second hole transport layer HTL2 can be disposed on the hole blocking layer HBL. The second hole transport layer HTL2 can be disposed between the hole blocking layer HBL and the light-emitting layers EML1b, EML2b, and EML3b. The second hole transport layer HTL2 can be integrally disposed across the sub-pixels PX1, PX2, and PX3, or can be formed individually for each of the sub-pixels PX1, PX2, and PX3. The material of the second hole transport layer HTL2 can be the same as that of the first hole transport layer HTL1, but embodiments of the present specification are not limited thereto.

[0129] The light-emitting layers EML1b, EML2b, and EML3b can be disposed on the second hole transport layer HTL2. The 1-2 light-emitting layer EML1b can be disposed in the first sub-pixel PX1, the 2-2 light-emitting layer EML2b can be disposed in the second sub-pixel PX2, and the 3-2 light-emitting layer EML3b can be disposed in the third sub-pixel PX3. Each of the light-emitting layers EML1b, EML2b, and EML3b can be the same as each of the light-emitting layers EML1a, EML2a, and EML3a, but is not limited thereto.

[0130] The thickness of each of the light-emitting layers EML1b, EML2b, or EML3b can be different. For example, the 1-2 light-emitting layer EML1b can be formed to a thickness of to , the 2-2 light-emitting layer EML2b can be formed to a thickness of to , and the 3-2 light-emitting layer EML3b can be formed to a thickness of to The thickness of the light-emitting layer EML1b, EML2b, or EML3b can be the same as or different from the thickness of the light-emitting layer EML1a, EML2a, or EML3a, but embodiments of the present specification are not limited thereto. As one example, the thickness of the light-emitting layer EML1b, EML2b, or EML3b can be the same as the thickness of the light-emitting layer EML1a, EML2a, or EML3a, or the thickness of the light-emitting layer EML1b, EML2b, or EML3b can be different from the thickness of the light-emitting layer EML1a, EML2a, or EML3a.

[0131] An electron blocking layer EBL can be disposed on each of the light-emitting layers EML1b, EML2b, or EML3b. The electron blocking layer EBL can be integrally disposed across the sub-pixels PX1, PX2, and PX3, or can be formed individually for each of the sub-pixels PX1, PX2, and PX3.

[0132] An electron transport layer ETL can be disposed on the electron blocking layer EBL. The electron transport layer ETL can be integrally disposed across the sub-pixels PX1, PX2, and PX3, or can be formed individually for each of the sub-pixels PX1, PX2, and PX3. The electron transport layer ETL can be formed of an anthracene derivative and lithium quinolate (Liq), or one or more selected from oxadiazole, triazole, phenanthroline, benzoxazole, benzothiazole, or benzimidazole (for example, 2-[4-(9,10-di-2-naphthyl-2-anthryl)phenyl]-1-phenyl-1H-benzimidazole), but embodiments of the present specification are not limited thereto.

[0133] A cathode 153 can be disposed on the electron transport layer ETL.

[0134] Referring back to FIG. 1, Figure 3 A cathode 153 can be disposed on the organic layer 152. The cathode 153 can be a transparent electrode that transmits light, but embodiments of the present specification are not limited thereto. For example, the cathode 153 can include a transparent conductive material (for example, indium tin oxide (ITO) or indium zinc oxide (IZO)) or a metal that transmits visible light, but embodiments of the present specification are not limited thereto.

[0135] The bank 154 can be provided to expose the anode 151. The bank 154 can define openings (or light emitting areas EA1, EA2, and EA3) of the sub-pixels PX1, PX2, and PX3, and can be provided to cover an edge portion (or a periphery) of the anode 151. As one example, the first sub-pixel PX1 can include the first light emitting area EA1 and the first non-light emitting area NEA1 surrounding the first light emitting area EA1, the second sub-pixel PX2 can include the second light emitting area EA2 and the second non-light emitting area NEA2 surrounding the second light emitting area EA2, and the third sub-pixel PX3 can include the third light emitting area EA3 and the third non-light emitting area NEA3 surrounding the third light emitting area EA3. As one example, each of the non-light emitting areas NEA1, NEA2, or NEA3 can correspond to a boundary between adjacent sub-pixels PX1, PX2, and PX3.

[0136] The bank 154 can include a black matrix material. For example, the bank 154 can be formed of a material including a black pigment or an organic material (e.g., a benzocyclobutene resin, a polyimide resin, an acrylic resin, a photosensitive polymer, etc.), but embodiments of the present specification are not limited thereto. When the bank 154 is formed of a material including a black pigment or a black dye, the bank 154 can be a black bank. When the bank 154 is formed of a material including a black pigment or a black dye, external light or light reflected from the outside can be shielded, thereby further improving the luminance of the display device.

[0137] According to the display device 1 based on one exemplary embodiment, an optical pattern PTP can be provided between the anode 151 and the bank 154. As one example, the optical pattern PTP can be formed directly on an upper surface of the anode 151. Alternatively, one or more patterns can be interposed between the optical pattern PTP and the anode 151. The optical pattern PTP can be in direct contact with the bank 154. As one example, the bank 154 is not provided with the pattern PTP on the outside, but is not limited thereto. As one example, the optical pattern PTP can be completely covered by the bank 154, but is not limited thereto. The optical pattern PTP can function to reduce the reflectance of the anode 151. The function of the optical pattern PTP will be described below.

[0138] A spacer 155 can also be provided on the bank 154. The spacer 155 can be formed of the same material as the bank 154, but embodiments of the present specification are not limited thereto. For example, the spacer 155 can be a transparent bank, but is not limited thereto, and the spacer 155 can be formed of the same material as the bank 154. For example, the spacer 155 can be provided on at least one boundary of the first to third sub-pixels PX1, PX2, and PX3, but embodiments of the present specification are not limited thereto. In some exemplary embodiments, the bank 154 and the spacer 155 can be formed of the same material and formed simultaneously through a half-tone mask, but embodiments of the present disclosure are not limited thereto.

[0139] The organic layer 152 can be provided on the anode 151, the bank 154, and the spacer 155. The cathode 153 can be provided on the organic layer 152.

[0140] The encapsulation part 170 can be provided on the cathode 153. The encapsulation part 170 can include one or more insulating layers. For example, the encapsulation part 170 can include a first encapsulation layer 171, a second encapsulation layer 172 provided on the first encapsulation layer 171, and a third encapsulation layer 173 provided on the second encapsulation layer 172. The encapsulation part 170 can include one or more inorganic insulating material layers and one or more organic material layers. For example, the first encapsulation layer 171 and the third encapsulation layer 173 can include an inorganic insulating material, and the second encapsulation layer 172 can include an organic material, but embodiments of the present specification are not limited thereto.

[0141] The touch part 180 can be provided on the encapsulation part 170. The touch part 180 can include a touch buffer layer 181, a first touch conductive layer, a first touch insulating layer 183, a second touch insulating layer 184, and a second touch conductive layer. In some exemplary embodiments, a touch organic layer can also be provided on the second touch conductive layer, but embodiments of the present disclosure are not limited thereto. As one example, one or more of the above-described components of the touch part 180 can be omitted according to design, and / or one or more additional components can also be included. As one example, the entire touch part 180 can be omitted according to design.

[0142] Figure 6 is a cross-sectional view of a contact part according to Figure 3

[0143] Referring to Figure 3 and Figure 6 The touch buffer layer 181 can be provided on the encapsulation part 170. For example, the touch buffer layer 181 can be provided on the third encapsulation layer 173. The touch buffer layer 181 can be formed of the same material as the buffer layer 102, but embodiments of the present specification are not limited thereto.

[0144] ​The first touch conductive layer can be disposed on the touch buffer layer 181. The first touch conductive layer can include a bridge electrode 182. The bridge electrode 182 and the sensor electrode 185 to be described below can be disposed at each boundary between the adjacent sub-pixels PX1, PX2, and PX3. For example, the bridge electrode 182 and the sensor electrode 185 can be disposed in the non-emitting areas NEA1, NEA2, and NEA3. The bridge electrode 182 and the sensor electrode 185 can overlap the black matrix BM to be described below in a thickness direction. The black matrix BM can cover the bridge electrode 182 and the sensor electrode 185. Accordingly, it is possible to reduce or prevent the bridge electrode 182 and the sensor electrode 185 from being visible from the outside. The embodiments are not limited thereto. As one example, the bridge electrode 182 and the sensor electrode 185 can be disposed to at least partially overlap the sub-pixels PX1, PX2, and PX3. As one example, the bridge electrode 182 and the sensor electrode 185 can be an opaque electrode, a transparent electrode, or a mesh-type electrode, but are not limited thereto.

[0145] The first touch insulating layer 183 and the second touch insulating layer 184 disposed on the first touch insulating layer 183 can be disposed on the first touch conductive layer. The first touch insulating layer 183 and the second touch insulating layer 184 disposed on the first touch insulating layer 183 can reduce or prevent short circuiting between the first touch conductive layer and the second touch conductive layer. The first touch insulating layer 183 can be formed of silicon oxide (SiO x ), silicon nitride (SiN x ), or a multilayer thereof, but the embodiments of the present specification are not limited thereto. The second touch insulating layer 184 can include an organic insulating material, but the embodiments of the present specification are not limited thereto, and the second touch insulating layer 184 can include the same material as the first touch insulating layer 183. As one example, at least one of the first touch insulating layer 183 and the second touch insulating layer 184 can be omitted, and / or one or more insulating layers can be further included.

[0146] The second touch conductive layer can be disposed on the second touch insulating layer 184. The second touch conductive layer can include a first sensor electrode 185a and a second sensor electrode 185b. The sensor electrode 185 can include the first sensor electrode 185a extending in the first direction DR1 (see FIG. 2) and the second sensor electrode 185b extending in the second direction DR2 (see FIG. 2). Figure 1) and a second sensor electrode 185b extending in a second direction DR2 different from the first direction DR1. Embodiments are not limited thereto. As one example, the first sensor electrode 185a and / or the second sensor electrode 185b can extend in a direction between the first direction DR1 and the second direction DR2, but are not limited thereto. As one example, although the first sensor electrode 185a and / or the second sensor electrode 185b are illustrated and described as being disposed above the bridge electrode 182, embodiments are not limited thereto. As one example, the bridge electrode 182 can be disposed above the first sensor electrode 185a and / or the second sensor electrode 185b, but is not limited thereto.

[0147] The bridge electrode 182 can be electrically connected to the first sensor electrode 185a through a contact hole formed in the first touch insulating layer 183 and the second touch insulating layer 184. For example, the first sensor electrode 185a and the bridge electrode 182 can extend in the first direction DR1 (see FIG. 2A), but are not limited thereto. Figure 1

[0148] The sensor electrode 185 and the bridge electrode 182 can include a metal material. For example, the sensor electrode 185 and the bridge electrode 182 can be formed of titanium (Ti), nickel (Ni), aluminum (Al), or an alloy thereof, and formed of three layers (e.g., titanium (Ti) / aluminum (Al) / titanium (Ti)), but embodiments of the present specification are not limited thereto. As one example, the sensor electrode 185 and the bridge electrode 182 can be formed of a transparent conductive material, but are not limited thereto.

[0149] The color filter insulating layer 114 can be disposed on the second touch conductive layer. The color filter insulating layer 114 can be formed of an inorganic insulating material such as silicon nitride (SiN x ) or silicon oxide (SiO x ), but embodiments of the present specification are not limited thereto.

[0150] The black matrix BM can be disposed on the color filter insulating layer 114. The black matrix BM can include a black base material. For example, the black matrix BM can include a light-blocking material or a light-absorbing material. For example, the black matrix BM can be formed of a material including a black pigment, a black dye, or the like. The black matrix BM can cover the bridge electrode 182 and the sensor electrode 185. Accordingly, it is possible to reduce or prevent the bridge electrode 182 and the sensor electrode 185 from being visible from the outside. For example, a width of the black matrix BM can be less than a width of the bank 154. Embodiments are not limited thereto. As one example, the black matrix BM can not cover the bridge electrode 182 and the sensor electrode 185. As one example, the black matrix BM can be omitted according to design.

[0151] ​As one example, the color filters 191, 192, and 193 can be disposed above or below the black matrix BM, but are not limited thereto.

[0152] The color filters 191, 192, and 193 can be disposed on the first to third sub-pixels PX1, PX2, and PX3, respectively, and can block specific colors of light emitted from the light emitting areas EA1, EA2, and EA3 of the sub-pixels PX1, PX2, and PX3. The first color filter 191 can be disposed to block light of other colors than red (R) light. In this case, the first color filter 191 can be disposed as a red color filter. The second color filter 192 can be disposed to block light of other colors than green (G) light. In this case, the second color filter 192 can be disposed as a green color filter. The third color filter 193 disposed in the third sub-pixel PX3 can be disposed to block light of other colors than blue (B) light. In this case, the third color filter 193 can be disposed as a blue color filter. However, embodiments of the present specification are not limited thereto.

[0153] For example, each of the color filters 191, 192, or 193 can be in direct contact with the side surface and the upper surface of the black matrix BM, or another pattern can be disposed between the color filters 191, 192, or 193 and the black matrix BM. For example, each of the color filters 191, 192, or 193 can be spaced apart from the boundaries of the adjacent sub-pixels PX1, PX2, and PX3, but embodiments of the present specification are not limited thereto, and the color filters 191, 192, and 193 can overlap each other in the thickness direction.

[0154] A planarization layer OC can be disposed on the color filters 191, 192, and 193. The planarization layer OC can function to planarize steps formed by the color filters 191, 192, and 193. For example, the planarization layer OC can include an organic insulating material, but is not limited thereto.

[0155] Figure 7 is a cross-sectional view along the line B-B' in Figure 1 .

[0156] Referring to Figure 7 , at least one of the panel inorganic layers 102, 103, 104, 105-1, 105-2, 106, 108, and 109 can not extend to the end portion of the substrate 101. As one example, at least one of the panel inorganic layers 102, 103, 104, 105-1, 105-2, 106, 108, and 109 can expose the end portion of the substrate 101, but embodiments of the present specification are not limited thereto.

[0157] According to an exemplary embodiment, the display panel 100 may further include a crack sensing pattern (CSP), a low-potential voltage line (VSSL), and a gating drive unit (GIP). As described above... Figure 1 As described above, the low-potential voltage line VSSL can be located between the crack sensing pattern CSP and the display area DA, and the gating drive unit GIP can be located between the low-potential voltage line VSSL and the display area DA.

[0158] For example, such as Figure 7 As shown, the gate drive unit GIP can be connected to the first gate 122 (see...) Figure 3 The conductive layer located on the same layer, and the second light-shielding layer 136 (see...) Figure 3 The conductive layer is located on the same layer as the first source 121 or on the same layer as the first source 121, but the embodiments described herein are not limited to this.

[0159] For example, the crack sensing pattern CSP can be disposed between the first dam D1 and the second dam D2, but is not limited thereto. As an example, the crack sensing pattern CSP can be formed by the first gate 122 (see... Figure 3 The conductive layer located on the same layer or with the second light-shielding layer 136 (see...) Figure 3 The conductive layers are formed on the same layer as the first source 121, but the embodiments described herein are not limited thereto. For example, the crack sensing pattern CSP may include a conductive layer on the same layer as the first source 121, or it may include one or more conductive layers on any other layer, but the embodiments described herein are not limited thereto.

[0160] As an example, a low-potential voltage line VSSL can be disposed between the crack sensing pattern CSP and the gating drive unit GIP, but is not limited thereto. The low-potential voltage line VSSL can be formed from a conductive layer located on the same layer as the first source 121, or from one or more conductive layers located on any other layer, but the embodiments described herein are not limited thereto.

[0161] As an example, the first protective layer 111 may cover the gated drive unit GIP, partially cover one end of the low-potential voltage line VSSL, and expose the other end of the low-potential voltage line VSSL, but is not limited thereto. In this specification, one end may refer to the area of ​​a particular component located in the direction from the non-display area NDA toward the display area DA, and the other end may refer to the area of ​​a particular component located in the direction from the display area DA toward the non-display area NDA.

[0162] As one example, the first connection electrode CNE1, which is located on the same layer as the connection electrode 145, can be provided on the first protective layer 111, but is not limited thereto. As one example, the first connection electrode CNE1 can be directly connected to the low-potential voltage line VSSL at a region exposed by the first protective layer 111, but is not limited thereto. The first connection electrode CNE1 can cover another end portion of the low-potential voltage line VSSL, but embodiments of the present specification are not limited thereto. As one example, the first connection electrode CNE1 can cover the entire or at least a part of the region of the low-potential voltage line VSSL exposed by the first protective layer 111. As one example, the first connection electrode CNE1 can be omitted according to design.

[0163] The second protective layer 112 can be provided on the first connection electrode CNE1. The second protective layer 112 can directly contact and cover one end portion of the first connection electrode CNE1, and expose another end portion of the first connection electrode CNE1. As one example, the second protective layer 112 can form a first layer of the first dam portion D1 and / or a first layer of the second dam portion D2, but is not limited thereto. The first dam portion D1 can overlap, for example, the low-potential voltage line VSSL, and cover another end portion of the low-potential voltage line VSSL. The first dam portion D1 can be in direct contact with the first connection electrode CNE1, and cover another end portion of the first connection electrode CNE1, but is not limited thereto. The second protective layer 112 forming the first layer of the second dam portion D2 can be in direct contact with an exposed side surface of at least one of the panel inorganic layers 102, 103, 104, 105, 106, 107, and 109, and can be in direct contact with the upper surface of the substrate 101, but embodiments of the present specification are not limited thereto. The second protective layer 112 can overlap the gate drive unit GIP. In the present specification, the dam portion is provided as two dam portions, for example, but can be provided as three or more dam portions or one dam portion.

[0164] The low-potential connection electrode 151' can be provided on the first connection electrode CNE1 exposed by the second protective layer 112 and the second protective layer 112. As one example, the low-potential connection electrode 151' can be located on the same layer as the anode 151 (see Figure 3 ) but is not limited thereto. As one example, the low-potential connection electrode 151' can be provided on the first connection electrode CNE1 exposed by the second protective layer 112 and / or the low-potential voltage line VSSL exposed by the first connection electrode CNE1 and / or the second protective layer 112, but is not limited thereto. The low-potential connection electrode 151' can be electrically connected to the first connection electrode CNE1 exposed by the second protective layer 112. The low-potential connection electrode 151' can be electrically connected to the cathode 153 described above. Figure 3

[0165] ​As one example, the bank 154 can be provided on the low-potential connection electrode 151' and the second protective layer 112. The bank 154 can overlap the gate drive unit GIP, overlap the low-potential connection electrode 151', and cover the other end portion of the low-potential connection electrode 151', but is not limited thereto. The bank 154 can cover the low-potential connection electrode 151' entirely, but embodiments of the present specification are not limited thereto. The bank 154 can expose the central portion and the other end portion of the first connection electrode CNE1, but embodiments of the present specification are not limited thereto. The bank 154 can form the second layer of the first dam portion D1 and the second layer of the second dam portion D2, but is not limited thereto. In each dam portion D1 or D2, the bank 154 can overlap and entirely cover the second protective layer 112 forming the first layer, or can expose at least a portion of the second protective layer 112, but embodiments of the present specification are not limited thereto. In the second dam portion D2, the bank 154 can be in contact with the side surface of the second protective layer 112 and the upper surface of the substrate 101, but embodiments of the present specification are not limited thereto. As one example, the bank 154 can expose at least a portion of the side surface of the second protective layer 112 and / or can not be in contact with the upper surface of the substrate 101, but is not limited thereto.

[0166] The spacer 155 can be provided on the bank 154. The spacer 155 can overlap the gate drive unit GIP. As one example, the spacer 155 can form the third layer of the dam portion D1 or D2, but is not limited thereto, or can not be formed in the dam portion D1 or D2. The spacer 155 forming the third layer of each dam portion D1 or D2 can overlap the bank 154 forming the second layer. As one example, the spacer 155 forming the third layer of each dam portion D1 or D2 can entirely cover the bank 154, but embodiments of the present specification are not limited thereto. In the second dam portion D2, the spacer 155 can be in contact with the side surface of the bank 154 and the upper surface of the substrate 101, but embodiments of the present specification are not limited thereto. As one example, the spacer 155 can expose at least a portion of the side surface of the bank 154 and / or can not be in contact with the upper surface of the substrate 101, but is not limited thereto.

[0167] The encapsulation portion 170 can be disposed on the spacer 155. The first encapsulation layer 171 can extend to the gate drive unit GIP, the low potential voltage line VSSL, the first dam portion D1, and the second dam portion D2, and cover an outer surface of the second dam portion D2. As one example, the second encapsulation layer 172 can terminate at the first dam portion D1, or can terminate between the first dam portion D1 and the second dam portion D2, but is not limited thereto. The second encapsulation layer 172 can overlap the gate drive unit GIP and the low potential voltage line VSSL. The third encapsulation layer 173 can extend to the gate drive unit GIP, the low potential voltage line VSSL, the first dam portion D1, and the second dam portion D2, and be in direct contact with the first encapsulation layer 171 on the first dam portion D1, the crack sensing pattern CSP, and / or the second dam portion D2. As one example, the first encapsulation layer 171 and / or the third encapsulation layer 173 can be in contact with an upper surface of the substrate 101, but is not limited thereto. As one example, the first encapsulation layer 171 and / or the third encapsulation layer 173 can be in contact with the upper surface of the substrate 101 while exposing at least a portion of the upper surface of the substrate 101, but is not limited thereto.

[0168] The touch buffer layer 181 and the first touch insulating layer 183 can extend to the gate drive unit GIP, the low potential voltage line VSSL, the first dam portion D1, and the second dam portion D2, and cover an outer surface of the second dam portion D2. The second touch insulating layer 184 can extend to the gate drive unit GIP, the low potential voltage line VSSL, the first dam portion D1, and the crack sensing pattern CSP, and terminate at the second dam portion D2, but embodiments of the present specification are not limited thereto. As one example, the touch buffer layer 181 and the first touch insulating layer 183 can be in contact with an upper surface of the substrate 101, but is not limited thereto.

[0169] The color filter insulating layer 114 can extend to the gate drive unit GIP, the low potential voltage line VSSL, the first dam portion D1, and the second dam portion D2, and be in direct contact with an outer surface of the second touch insulating layer 184 and / or an upper surface of the substrate 101, but embodiments of the present specification are not limited thereto.

[0170] Figure 8 is a cross-sectional view along a line C-C’ in Figure 1 .

[0171] Referring to Figure 3 , Figure 7 and Figure 8 , a bending area BR can be disposed between the sub-area SR and the crack sensing pattern CSP. In the bending area BR, the panel inorganic layers 102, 103, 104, 105, 106, 107, and 109 can be removed to expose an upper surface of the substrate 101, but is not limited thereto.

[0172] As one example, a pad electrode PAD can be provided in the first pad area PA1, and a third connection electrode CNE3 can be provided on the crack sensing pattern CSP. As one example, the pad electrode PAD can be provided on the same layer as the first source electrode 121 (see Figure 3 ), and / or the third connection electrode CNE3 can be provided on the same layer as the first source electrode 121 (see Figure 3 ), but is not limited thereto.

[0173] The first protective layer 111 can be provided on the pad electrode PAD and the third connection electrode CNE3. The first protective layer 111 can be provided in the bending area BR. As one example, the first protective layer 111 can be in direct contact with the upper surface of the substrate 101 and be located in the bending area BR, but is not limited thereto. As one example, the first protective layer 111 can be in direct contact with the side surfaces of the panel inorganic layers 102, 103, 104, 105, 106, 107, and 109, but is not limited thereto.

[0174] The second connection electrode CNE2 can be provided on the first protective layer 111. As one example, the second connection electrode CNE2 can be provided on the same layer as the connection electrode 145 (see Figure 3 ). The second connection electrode CNE2 can electrically connect the pad electrode PAD to the third connection electrode CNE3. The second connection electrode CNE2 can be provided on the bending area BR and also on the first pad area PA1 and the crack sensing pattern CSP.

[0175] The data driving unit DIC can be provided on or connected to the pad electrode PAD. As one example, the data driving unit DIC can include a bump BUMP, an anisotropic conductive film ACF can be provided between the pad electrode PAD and the bump BUMP, and the anisotropic conductive film ACF can electrically connect the pad electrode PAD to the bump BUMP, but is not limited thereto. The anisotropic conductive film ACF can include a resin SR and a plurality of conductive balls CB dispersed in the resin SR. The pad electrode PAD and the bump BUMP can be electrically connected by the conductive balls CB.

[0176] As one example, the second protective layer 112 can be provided on the second connection electrode CNE2, but is not limited thereto. The second protective layer 112 can expose the pad electrode PAD.

[0177] The first encapsulation layer 171 and the third encapsulation layer 173 of the encapsulation portion 170 can extend until before the bending area BR. For example, the first encapsulation layer 171 and the third encapsulation layer 173 can extend until before the crack sensing pattern CSP, but embodiments of the present specification are not limited thereto, and the first encapsulation layer 171 and the third encapsulation layer 173 can also overlap the crack sensing pattern CSP. The first encapsulation layer 171 and the third encapsulation layer 173 can not be disposed in the bending area BR.

[0178] The touch buffer layer 181 and the first touch insulating layer 183 can extend before the bending area BR. For example, the touch buffer layer 181 and the first touch insulating layer 183 can extend until before the crack sensing pattern CSP, but embodiments of the present specification are not limited thereto, and the touch buffer layer 181 and the first touch insulating layer 183 can also overlap the crack sensing pattern CSP. The touch buffer layer 181 and the first touch insulating layer 183 can not be disposed in the bending area BR.

[0179] The second touch insulating layer 184 can overlap the first dam portion D1 and the second dam portion D2. The second touch insulating layer 184 can not be disposed outside the second dam portion D2, but embodiments of the present specification are not limited thereto.

[0180] The touch connection line 185' can be electrically connected to the second connection electrode CNE2. The touch connection line 185' can be used to provide a signal applied from the pad electrode PAD and the second connection electrode CNE2 to the first sensor electrode 185a or the second sensor electrode 185b described above in Figure 3 . The touch connection line 185' can be located on the same layer as the first sensor electrode 185a of the second touch conductive layer Figure 3 , but embodiments of the present specification are not limited thereto, and the touch connection line 185' can be located on the same layer as the bridge electrode 182 of the first touch conductive layer Figure 3 , or be formed by both the first touch conductive layer and the second touch conductive layer, but embodiments of the present specification are not limited thereto. As one example, the touch connection line 185' can be located on a different layer from the second touch conductive layer and the first touch conductive layer, but is not limited thereto.

[0181] The color filter insulating layer 114 can be disposed on the touch connection line 185', and the color filter insulating layer 114 can not be disposed in the bending area BR.

[0182] Figure 9 is Figure 3 an enlarged sectional view of the area Q1 in

[0183] Referring to Figure 9As an example, the distance between the end of the black matrix BM and the boundary between the first luminous region EA1 and the first non-luminous region NEA1 can be longer than the distance between the end of the embankment 154 and the boundary between the first luminous region EA1 and the first non-luminous region NEA1. As an example, the end of the embankment 154 can be aligned with the boundary between the first luminous region EA1 and the first non-luminous region NEA1, but the embodiments described herein are not limited to this. In the case of the display panel 100 according to an exemplary embodiment, the embankment 154 may comprise a black base material, and since the distance between the end of the black matrix BM and the boundary between the first luminous region EA1 and the first non-luminous region NEA1 can be longer than the distance between the end of the embankment 154 and the boundary between the first luminous region EA1 and the first non-luminous region NEA1, the first light L1 emitted from the first luminous region EA1 can be emitted upwards at a larger viewing angle, which is as large as the space between the end of the black matrix BM and the boundary between the first luminous region EA1 and the first non-luminous region NEA1. Therefore, the brightness reduction can be reduced or minimized depending on the viewing angle. However, when the distance between the end of the black matrix BM and the boundary between the first luminous region EA1 and the first non-luminous region NEA1 is longer than the distance between the end of the dam 154 and the boundary between the first luminous region EA1 and the first non-luminous region NEA1, and the dam 154 is formed of a transparent material, the second light L2 incident from the outside may be reflected by the dam 154, resulting in visible annular spots. However, in the case of the display panel 100 according to an exemplary embodiment, the second light L2 can be absorbed or blocked by the dam 154, which includes a black base material, thereby reducing or preventing the appearance of annular spots.

[0184] Furthermore, according to an exemplary embodiment, the display panel 100 may also include an optical pattern PTP in the area where the anode 151 overlaps with the dam 154. The optical pattern PTP may be disposed between the upper surface of the anode 151 and the dam 154. As described above, the dam 154 is used to absorb or block the second light L2, but as... Figure 9 As shown, the thickness of the dam 154 can decrease towards the center of the anode 151. In this case, light L3 and L4 that are not absorbed by the dam 154 may be generated in the second light L2 of the dam 154. The third light L3 and the fourth light L4 pass through the dam 154 and are likely to be reflected by the anode 151, so in this case, annular spots may appear.

[0185] Figure 10 yes Figure 9 Enlarged cross-sectional view of region Q2 in the image. Figure 11 yes Figure 9 Enlarged cross-sectional view of region Q2 in the image. Figure 10The light incident from the first light-emitting region EA1 or the first non-light-emitting region NEA1 toward the optical pattern PTP from left to right is exemplified, and Figure 11 The light incident from the first non-light-emitting region NEA1 toward the optical pattern PTP from right to left is exemplified.

[0186] As shown in Figure 9 and Figure 10 , the refractive index of the optical pattern PTP can be higher than the refractive index of the bank 154. For example, the refractive index of the bank 154 can be in the range of about 1.5 to 1.6, and the refractive index of the optical pattern PTP can be in the range of about 1.6 to 1.8, but embodiments of the present specification are not limited thereto. The optical pattern PTP can include an organic insulating material or an inorganic insulating material. The height h of the optical pattern PTP can be greater than or equal to about 1.2 times the length l of the bottom surface of the optical pattern PTP, but embodiments of the present specification are not limited thereto. As one example, the optical pattern PTP can have a triangular shape, but is not limited thereto.

[0187] When the optical pattern PTP is not present (see L3' of Figure 10 ), the third light L3' can have an incident angle from the bank 154 to the anode 151 that is equal to a reflection angle from the anode 151 to the bank 154. In this case, due to the third light L3' reflected from the anode 151, the annular spot can be visible.

[0188] However, as shown in Figure 10 , when the optical pattern PTP is present, since the optical pattern PTP includes a high-refractive material compared to the bank 154, the optical pattern PTP can refract the third light L3 to increase the travel angle of the third light L3. As one example, there can be a plurality of optical patterns PTP at one end of the bank 154. For example, the travel angle of the third light L3 initially incident onto the optical pattern PTP is a1, but the travel angle of the third light L3 reflected from the anode 151 and refracted by the optical pattern PTP (e.g., another optical pattern PTP) can be a2 that is greater than a1. The travel angle of light in the present specification can refer to an angle from a normal line (a line extending vertically) to a propagation direction of light. When the travel angle of the third light L3 increases, the path of the third light L3 in the black matrix bank 154 is longer, and thus the third light L3 is likely to be absorbed by the bank 154. Accordingly, it is possible to reduce or prevent the third light L3 reflected from the anode 151 from being emitted to the outside, thereby reducing or eliminating the visible annular spot.

[0189] As shown in Figure 9 and Figure 11 , when the optical pattern PTP is not present (see L3' of Figure 11The fourth light L4' can have an incidence angle from the bank 154 to the anode 151 that is equal to a reflection angle from the anode 151 to the bank 154. In this case, a ring-shaped spot can be visible due to the fourth light L4' reflected from the anode 151.

[0190] However, as Figure 11 indicated, when the optical pattern PTP is present, since the optical pattern PTP includes a high-refractive material compared to the bank 154, the optical pattern PTP can refract the fourth light L4 to increase a traveling angle of the fourth light L4. For example, a traveling angle of the fourth light L4 initially incident on the optical pattern PTP is b1, but a traveling angle of the fourth light L4 reflected from the anode 151 and refracted by the optical pattern PTP can be b2 that is greater than b1. When the traveling angle of the fourth light L4 is greater than a critical viewing angle (e.g., 60°) at which a user can see light from the outside, the user cannot see the fourth light L4, thereby reducing or eliminating a ring-shaped spot.

[0191] Hereinafter, display apparatuses according to other exemplary embodiments will be described. In the following exemplary embodiments, detailed descriptions of the reference numerals or components described in Figures 1 to 11 the above exemplary embodiments will be omitted or be given briefly, or repetitive descriptions thereof will be omitted or be given briefly.

[0192] Figure 12 is a cross-sectional view of a display apparatus according to another exemplary embodiment.

[0193] Referring to Figure 12 , an optical pattern PTP_1 according to the present exemplary embodiment is different from the optical pattern PTP according to Figure 10 in that it can have a right triangle shape.

[0194] For example, the optical pattern PTP_1 can have one side surface that extends perpendicularly and another side surface that tapers perpendicularly. As one example, the optical pattern PTP_1 can have one side surface adjacent to an end of the bank 154 that extends perpendicularly and another side surface that tapers perpendicularly away from the end of the bank 154, or vice versa. As one example, there can be a plurality of optical patterns PTP_1 that have the same shape or different shapes, and / or the same size or different sizes. As one example, the side surfaces of the plurality of optical patterns PTP_1 that extend perpendicularly can face the same or different directions, but are not limited thereto.

[0195] Even in the present exemplary embodiment, a ring-shaped spot can be reduced or prevented from being visible by including the optical pattern PTP_1 that includes a high-refractive material compared to the bank 154.

[0196] Since in Figures 10 to 12The remaining portions of the detailed description are thus omitted or briefly given, as they are the same as the description given in

[0197] Figure 13 is a cross-sectional view of a display device according to another exemplary embodiment.

[0198] Referring to Figure 13 , the optical pattern PTP_2 according to the present exemplary embodiment is different from the optical pattern PTP according to Figure 10 in that it can have a rectangular shape.

[0199] Even in the present exemplary embodiment, by including the optical pattern PTP_2 including a high-refractive material compared to the bank 154, it is possible to reduce or prevent the annular spot from being visible.

[0200] Since the remaining portions have been described in Figures 10 to 12 , detailed descriptions thereof will be omitted or given briefly below.

[0201] Figure 14 is a cross-sectional view of a display device according to another exemplary embodiment.

[0202] Referring to Figure 14 , the optical pattern PTP_3 according to the present exemplary embodiment is different from the optical pattern PTP_2 according to Figure 13 in that it can have a curved upper end portion.

[0203] Even in the present exemplary embodiment, by including the optical pattern PTP_3 including a high-refractive material compared to the bank 154, it is possible to reduce or prevent the annular spot from being visible.

[0204] Since the remaining descriptions are the same as those in Figure 13 , detailed descriptions thereof will be omitted or given briefly.

[0205] Figure 15 is a cross-sectional view of a display device according to another exemplary embodiment.

[0206] Referring to Figure 15 , the optical pattern PTP4 according to the present exemplary embodiment is different from the optical pattern PTP according to Figure 10 in that it can have an inverted-tapered trapezoidal shape.

[0207] Even in the present exemplary embodiment, by including the optical pattern PTP_4 including a high-refractive material compared to the bank 154, it is possible to reduce or prevent the annular spot from being visible.

[0208] Since the remaining portions have been described in Figures 10 to 12 , detailed descriptions thereof will be omitted or given briefly below.

[0209] Figure 16 is a cross-sectional view of a display device according to yet another exemplary embodiment. Figure 17 is a cross-sectional view of a display device according to yet another exemplary embodiment. Figure 18 is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0210] Referring to Figures 16 to 18 , the display panel 100_1 of the display device according to the present exemplary embodiment differs from the display panel 100 according to Figure 3 , Figure 7 and Figure 8 in that it can further include a third protection layer 113 located on the second protection layer 112.

[0211] More specifically, the display panel 100_1 according to the present exemplary embodiment can further include a third protection layer 113 located between the second protection layer 112 and the anode 151. The material of the third protection layer 113 can include at least one material exemplified as the material of the second protection layer 112, but embodiments of the present specification are not limited thereto.

[0212] As shown in Figure 17 and Figure 18 , each of the first dam portion D1_1 and the second dam portion D2_1 can include the third protection layer 113 as a first layer, and can not include the second protection layer 112, but embodiments of the present specification are not limited thereto.

[0213] Since the remaining portions have been described in Figure 3 , Figure 7 and Figure 8 , detailed descriptions thereof will be omitted or given briefly below.

[0214] Figure 19 is a cross-sectional view of a display device according to another exemplary embodiment.

[0215] Referring to Figure 19 , the color filters 191_1, 192_1 and 193_1 of the display panel 100_2 of the display device according to the present exemplary embodiment differ from the color filters 191, 192 and 193 of the display panel 100 according to Figure 3 in that they can overlap each other in the non-emitting areas NEA1, NEA2 and NEA3.

[0216] Figure 19The second color filter 192_1 is positioned at the top, the first color filter 191_1 is positioned below the second color filter 192_1, and finally the third color filter 193_1 is positioned at the bottom of each non-emitting area NEA1, NEA2, or NEA3, but the layering order of each color filter 191_1, 192_1, or 193_1 in the non-emitting areas NEA1, NEA2, and NEA3 can vary according to the process order.

[0217] Since the remaining portions have been described in Figure 3 the detailed description thereof will be omitted or briefly given.

[0218] A display device according to various exemplary embodiments of the present specification can be described as follows.

[0219] A display device according to an exemplary embodiment of the present disclosure includes a substrate including a display area including a plurality of sub-pixels and a non-display area around the display area, an anode disposed in each of the sub-pixels on the substrate, a bank disposed on the anode at a boundary between adjacent sub-pixels and overlapping with a periphery of an upper surface of the anode, and an optical pattern disposed between the periphery of the upper surface of the anode and the bank, wherein the bank includes a black matrix material.

[0220] In the display device according to an exemplary embodiment of the present specification, the optical pattern can be in direct contact with the bank.

[0221] In the display device according to an exemplary embodiment of the present specification, a refractive index of the optical pattern can be greater than a refractive index of the bank.

[0222] In the display device according to an exemplary embodiment of the present specification, the plurality of sub-pixels can include a first sub-pixel, a second sub-pixel, and a third sub-pixel, and further include an organic layer disposed on the bank.

[0223] In the display device according to an exemplary embodiment of the present specification, the organic layer can include a first light emitting layer on the first sub-pixel, a second light emitting layer on the second sub-pixel, and a third light emitting layer on the third sub-pixel.

[0224] In the display device according to an exemplary embodiment of the present specification, in each sub-pixel, each of the first light emitting layer, the second light emitting layer, and the third light emitting layer can be laminated into two or more layers.

[0225] The display device according to an exemplary embodiment of the present specification can further include a cathode on the organic layer and a black matrix at a boundary between adjacent sub-pixels on the cathode, wherein a width of the black matrix can be less than a width of the bank.

[0226] In the display device according to the exemplary embodiment of the present specification, an end portion of the black matrix can be closer to a boundary between adjacent sub-pixels than an end portion of the bank.

[0227] The display device according to the exemplary embodiment of the present specification can further include a touch portion on the cathode, wherein the touch portion can include a bridge electrode and a sensor electrode on the bridge electrode, and the black matrix can overlap the bridge electrode and the sensor electrode.

[0228] The display device according to the exemplary embodiment of the present specification can further include a color filter on the touch portion and the black matrix, wherein the color filter can include a first color filter on the first sub-pixel, a second color filter on the second sub-pixel, and a third color filter on the third sub-pixel.

[0229] In the display device according to the exemplary embodiment of the present specification, the first color filter, the second color filter, and the third color filter can overlap each other at a boundary between the sub-pixels.

[0230] The display device according to the exemplary embodiment of the present specification can further include a first transistor between the substrate and the anode, and a second transistor between the first transistor and the anode.

[0231] The display device according to the exemplary embodiment of the present specification can further include a first protection layer between the second transistor and the anode, a first connection electrode disposed on the first protection layer, and a second protection layer on the first connection electrode, wherein the first connection electrode can electrically connect the second transistor to the anode.

[0232] In the display device according to the embodiment of the present specification, the semiconductor layer of the first transistor can include polysilicon, and the semiconductor layer of the second transistor can include an oxide.

[0233] In the display device according to the exemplary embodiment of the present specification, the non-emitting area can include a low potential voltage line and a gate driving unit between the low potential voltage line and the display area.

[0234] In the display device according to the exemplary embodiment of the present specification, the non-display area can further include a crack sensing pattern outside the low potential voltage line and a dam portion overlapping the low potential voltage line.

[0235] A display device according to an example embodiment of the present specification includes a substrate including a display area including a plurality of pixels and a non-display area around the display area; an anode provided on the substrate in each of sub-pixels; a bank provided on the anode at a boundary between adjacent sub-pixels and overlapping with a periphery of an upper surface of the anode; an organic layer provided on the anode and the bank; a cathode on the organic layer; an encapsulation portion on the cathode; a touch portion provided on the encapsulation portion, a first touch conductive layer having a bridge electrode, and a second touch conductive layer having a sensor electrode and provided on the first touch conductive layer; and a black matrix provided at the boundary between the adjacent sub-pixels on the touch portion and covering the bridge electrode and the sensor electrode, wherein a width of the black matrix is smaller than a width of the bank, and the display device further includes an optical pattern provided between the periphery of the upper surface of the anode and the bank.

[0236] In the display device according to an example embodiment of the present specification, an end portion of the black matrix can be closer to the boundary between the adjacent sub-pixels than an end portion of the bank.

[0237] In the display device according to an example embodiment of the present specification, the optical pattern can be in direct contact with the bank.

[0238] In the display device according to an example embodiment of the present specification, a refractive index of the optical pattern can be greater than a refractive index of the bank.

[0239] In the display device according to an example embodiment of the present specification, an optical pattern including a material having a higher refractive index than the bank can be formed on the upper surface of the anode overlapping with the bank to guide external light reflected from the anode to the bank.

[0240] In the display device according to an example embodiment of the present specification, the bank can include a black base material to absorb external light guided to the bank.

[0241] In the display device according to an example embodiment of the present specification, external light can be guided to the bank and absorbed, thereby reducing reflectance due to the anode. Accordingly, a low-power display device can be implemented.

[0242] In the display device according to an example embodiment of the present specification, external light can be guided to the bank and absorbed, thereby preventing a ring-shaped spot from occurring in a region in which the anode overlaps with the bank (or a portion of the non-light emitting area).

[0243] However, the effects obtainable from the present specification are not limited to the above-mentioned effects, and other effects not mentioned will be clearly understood by those skilled in the art from the following description.

[0244] Although embodiments of the present application have been described above with reference to the drawings, it will be understood by those skilled in the art that the above-described technical configuration of the present application can be implemented in other specific forms without changing the technical spirit or essential characteristics of the present application. Therefore, it should be understood that the above-described embodiments are illustrative in all aspects and are not restrictive. In addition, the scope of the present application is described by the claims to be described below rather than the detailed description. Furthermore, the meaning and scope of the claims and all changes or modifications derived from equivalent concepts or modifications should be interpreted as being included in the scope of the present application.

[0245] Cross Reference to Related Applications

[0246] This application claims priority to and the benefit of Korean Patent Application No. 10-2024-0102257, filed August 1, 2024, the entire contents of which are incorporated herein by reference for all purposes as if fully set forth herein.

Claims

1. A display device comprising: a substrate including a display region including a plurality of subpixels and a non-display region around the display region; an anode provided in each of the subpixels on the substrate; a bank provided on the anode, the bank being located at a boundary between adjacent subpixels and overlapping with a periphery of an upper surface of the anode; and an optical pattern provided between the periphery of the upper surface of the anode and the bank, wherein the bank includes a black base material.

2. The display device according to claim 1, wherein The optical pattern is in direct contact with the bank.

3. The display device according to claim 1, wherein A refractive index of the optical pattern is greater than a refractive index of the bank.

4. The display device according to claim 1, wherein The plurality of subpixels includes a first subpixel, a second subpixel, and a third subpixel, and further includes an organic layer provided on the bank.

5. The display device of claim 4, wherein, The organic layer includes a first light-emitting layer on the first subpixel, a second light-emitting layer on the second subpixel, and a third light-emitting layer on the third subpixel.

6. The display device of claim 5, wherein, In each subpixel, each of the first light-emitting layer, the second light-emitting layer, and the third light-emitting layer is stacked into two or more layers.

7. The display device of claim 4, further comprising: a cathode on the organic layer; and a black matrix on the cathode at the boundary between the adjacent subpixels, wherein a width of the black matrix is smaller than a width of the bank.

8. The display device of claim 7, wherein, An end portion of the black matrix is closer to the boundary between the adjacent subpixels than an end portion of the bank.

9. The display device according to claim 7, further comprising a touch portion on the cathode, wherein, The touch portion includes a bridge electrode and a sensor electrode on the bridge electrode, and the black matrix overlaps with the bridge electrode and the sensor electrode.

10. The display device according to claim 9, further comprising a color filter on the touch portion and the black matrix, wherein The color filter includes a first color filter on the first subpixel, a second color filter on the second subpixel, and a third color filter on the third subpixel.

11. The display device of claim 10, wherein, The first color filter, the second color filter, and the third color filter overlap with each other at the boundary between the subpixels.

12. The display device of claim 1, further comprising: a first transistor and a second transistor between the substrate and the anode.

13. The display device of claim 12, further comprising: a first protective layer between the second transistor and the anode; a first connection electrode provided on the first protective layer; and a second protective layer on the first connection electrode, wherein the first connection electrode electrically connects the second transistor to the anode.

14. The display device of claim 12, wherein, A semiconductor layer of the first transistor includes polysilicon, and a semiconductor layer of the second transistor includes an oxide.

15. The display device of claim 1, wherein, The non-display region includes a low-potential voltage line and a gate drive unit between the low-potential voltage line and the display region.

16. The display device of claim 15, wherein, The non-display region further includes a crack sensing pattern outside the low-potential voltage line and a dam portion overlapping with the low-potential voltage line.

17. The display device of claim 1, wherein, The optical pattern is directly formed on the upper surface of the anode.

18. The display device of claim 1, wherein, The optical pattern is not formed outside the bank.

19. The display device of claim 1, wherein, The optical pattern includes an insulating material.

20. The display device of claim 1, wherein, The optical pattern has a triangular shape, a rectangular shape, a shape having a curved upper end portion, or an inverted tapered trapezoidal shape.

21. The display device of claim 20, wherein, The optical pattern has a triangular shape, a height of the triangular shape being greater than or equal to 1.2 times a length of a base surface of the triangular shape.

22. The display device of claim 20, wherein, The optical pattern has a right-angled triangular shape.

23. The display device of claim 20, wherein, A plurality of optical patterns are provided between the periphery of the upper surface of the anode and the bank.

24. The display device of claim 20, wherein, The optical pattern is configured to refract light transmitted into the bank to increase a travel angle of the light with respect to a normal to an upper surface of the substrate.

25. The display device of claim 23, wherein, Light transmitted into the bank is incident on one of the plurality of optical patterns at a first travel angle with respect to a normal to an upper surface of the substrate, is reflected from the anode, and is refracted by another of the plurality of optical patterns to have a second travel angle.

26. The display device of claim 25, wherein, The second travel angle is greater than the first travel angle.

27. A display device, the display device comprising: a substrate including a display region including a plurality of sub-pixels and a non-display region around the display region; an anode provided in each of the sub-pixels on the substrate; a bank provided on the anode, the bank being located at a boundary between adjacent sub-pixels and overlapping with a periphery of an upper surface of the anode; an organic layer provided on the anode and the bank; a cathode on the organic layer; an encapsulation portion on the cathode; a touch portion provided on the encapsulation portion, a first touch conductive layer having a bridge electrode, and a second touch conductive layer having a sensor electrode and provided on the first touch conductive layer; and a black matrix provided on the touch portion at the boundary between the adjacent sub-pixels and covering the bridge electrode and the sensor electrode, wherein a width of the black matrix is smaller than a width of the bank, and the display device further includes an optical pattern provided between the periphery of the upper surface of the anode and the bank.

28. The display device of claim 27, wherein, An end portion of the black matrix is closer to the boundary between the adjacent sub-pixels than an end portion of the bank.

29. The display device of claim 27, wherein, The optical pattern is in direct contact with the bank.

30. The display device of claim 27, wherein, A refractive index of the optical pattern is greater than a refractive index of the bank.

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