Display device, device for manufacturing display device, and method for manufacturing display device

Abstract

A display apparatus, an apparatus for manufacturing the display apparatus, and a method of manufacturing the display apparatus are provided. The display device includes a substrate including a first display area and a second display area, the first display area including a first pixel area, a second pixel area spaced apart from the first pixel area, and a transmissive area; a first pixel in the first pixel region, including a first pixel electrode, a first counter electrode, and a first intermediate layer between the first pixel electrode and the first counter electrode; a second pixel in the second pixel region, including a second pixel electrode, a second counter electrode, and a second intermediate layer between the second pixel electrode and the second counter electrode; and a bridge electrode electrically connecting the first pair of electrodes to the second pair of electrodes, a thickness of the bridge electrode changing in a direction from one of the first pair of electrodes and the second pair of electrodes toward the other of the first pair of electrodes and the second pair of electrodes.

Description

[0001] This application is a divisional application of the patent application filed on October 20, 2020, with application number 202011122856.8 and title "Display Device". Technical Field

[0002] One or more embodiments relate to apparatus and methods, and to a display device and apparatus and methods for manufacturing the display device. Background Technology

[0003] Display devices continue to be used for a variety of purposes. As display devices have become thinner and lighter, their applications have expanded.

[0004] Because display devices are used in various ways, a variety of methods can be used to design the shape of display devices. In addition, more and more functions can be combined or associated with display devices.

[0005] It will be understood that this background section is partly intended to provide useful context for understanding the technology. However, this background section may also include ideas, concepts, or understandings that were not known or understood by those skilled in the art prior to the corresponding valid filing date of the subject matter disclosed herein. Summary of the Invention

[0006] One or more embodiments include a display device that includes a sensor region in which sensors, etc., can be disposed within a display area. However, these are merely examples, and the scope of disclosure is not limited thereto.

[0007] Additional aspects will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the given embodiments.

[0008] According to one or more embodiments, a display device may include: a substrate, the substrate including a first display area and a second display area adjacent to the first display area, the first display area including a first pixel area, a second pixel area spaced apart from the first pixel area and a transmissive area; a first pixel, disposed in the first pixel area and including a first pixel electrode, a first pair of electrodes and a first intermediate layer disposed between the first pixel electrode and the first pair of electrodes; a second pixel, disposed in the second pixel area and including a second pixel electrode, a second pair of electrodes and a second intermediate layer disposed between the second pixel electrode and the second pair of electrodes; and a bridging electrode electrically connecting the first pair of electrodes to the second pair of electrodes, wherein the thickness of the bridging electrode may vary in a direction from one of the first pair of electrodes and the second pair of electrodes toward the other of the first pair of electrodes and the second pair of electrodes.

[0009] In one embodiment, the thickness of one portion of the bridging electrode may be greater than the thickness of another portion of the bridging electrode.

[0010] In an embodiment, the display device may further include: a pixel defining layer disposed on a first pixel electrode and a second pixel electrode and including a first opening and a second opening respectively exposing a central portion of each of the first pixel electrode and the second pixel electrode, wherein a bridging electrode may be disposed on the pixel defining layer.

[0011] In an embodiment, the thickness of the thickest portion of the bridging electrode can be substantially equal to the greater of the thickness of the first pair of electrodes and the thickness of the second pair of electrodes.

[0012] In an embodiment, the thickness of the bridging electrode can gradually decrease from the thickest part of the bridging electrode to the thinnest part of the bridging electrode.

[0013] In this embodiment, the first display area and the second display area may have different light transmittance.

[0014] In one embodiment, the resolution of the image in the first display area may be lower than the resolution of the image in the second display area.

[0015] In an embodiment, the display device may further include components disposed in the first display area.

[0016] In one embodiment, the first pair of electrodes, the second pair of electrodes, and the bridging electrode can be integrated with each other.

[0017] In one embodiment, the transmission area may be located between the first pair of electrodes, the second pair of electrodes, and the bridging electrode.

[0018] According to one or more embodiments, a display device may include: a substrate including a first display area and a second display area adjacent to the first display area, the first display area including a plurality of pixel areas spaced apart from each other; a pixel disposed on each of the plurality of pixel areas and including a pixel electrode, a counter electrode and an intermediate layer disposed between the pixel electrode and the counter electrode of each of the plurality of pixels; and a bridging electrode electrically connecting the counter electrodes of a plurality of pixels in two of the plurality of pixel areas spaced apart from each other, wherein the thickness of the bridging electrode may vary between the counter electrodes electrically connected to each other via the bridging electrode.

[0019] In an embodiment, the thickest portion of the bridging electrode may be disposed between the counter electrodes that are electrically connected to each other via the bridging electrode.

[0020] In an embodiment, each of the counter electrodes may be integrated with the bridging electrode.

[0021] In an embodiment, a bridging electrode can electrically connect adjacent counter electrodes among the counter electrodes of multiple pixels.

[0022] In an embodiment, the display device may further include components disposed in the first display area.

[0023] In this embodiment, the first display area and the second display area may have different light transmittance.

[0024] According to one or more embodiments, an apparatus for manufacturing a display device may include: a chamber in which a display substrate may be disposed; a deposition source disposed in the chamber and supplying deposition material to the display substrate; and a mask assembly disposed in the chamber and between the deposition source and the display substrate, wherein the mask assembly may include a mask frame and a mask sheet, the mask sheet being disposed at the mask frame and including a plurality of first openings through which the deposition material passes and at least one second opening disposed between two of the plurality of first openings. The at least one second opening may have an area different from that of the first opening.

[0025] In an embodiment, at least one second opening portion may include a plurality of second opening portions, which may be linearly disposed between two first opening portions.

[0026] In an embodiment, at least one second opening portion may include a plurality of second opening portions, and at least two of the plurality of second opening portions may have different areas.

[0027] In an embodiment, the plurality of first opening portions may have an area larger than that of at least one second opening portion.

[0028] In an embodiment, the plurality of first opening portions may be quadrilateral, and at least one second opening portion may be circular.

[0029] In an embodiment, at least one second opening portion may include a plurality of second opening portions, which may be linearly arranged between the edges of the first opening portion that may be adjacent to each other and face each other.

[0030] In an embodiment, at least one second opening portion may include a plurality of second opening portions, and the mask sheet has portions disposed between adjacent second opening portions in the plurality of second opening portions, wherein the thickness of a portion of the mask sheet may be less than the thickness of another portion of the mask sheet.

[0031] According to one or more embodiments, a method of manufacturing a display device may include: disposing a display substrate and a mask assembly in a cavity; aligning the positions of the display substrate and the mask assembly; and forming a plurality of counter electrodes corresponding to a plurality of pixel regions spaced apart from each other in a first display region of the display substrate, and forming a bridging electrode that electrically connects two of the plurality of counter electrodes.

[0032] In an embodiment, the step of forming a bridging electrode may include forming a bridging electrode of varying thickness between opposing electrodes that are electrically connected to each other.

[0033] In an embodiment, the step of forming a bridging electrode may include forming the thickest portion of the bridging electrode between opposing electrodes that are electrically connected to each other.

[0034] In an embodiment, the method may further include forming another pair of electrodes in a second display area of ​​the display substrate when a plurality of pair electrodes and bridging electrodes are formed in a first display area.

[0035] In an embodiment, the steps of forming a plurality of counter electrodes and forming a bridging electrode may include forming each of the plurality of counter electrodes integrally with the bridging electrode.

[0036] In this embodiment, the first display area and the second display area may have different light transmittance.

[0037] In an embodiment, the method may further include setting the component in a first display area.

[0038] Other aspects, features, and advantages, in addition to those described above, will become clear from the accompanying drawings, appended claims, and detailed description.

[0039] These general embodiments can be implemented using systems, methods, computer programs, or any combination of systems, methods, and computer programs. Attached Figure Description

[0040] The above and other aspects, features, and advantages of the embodiments will become clearer from the following description taken in conjunction with the accompanying drawings, in which: Figure 1 This is a perspective view showing a display device according to an embodiment; Figure 2 This is a schematic cross-sectional view illustrating a display device according to an embodiment; Figure 3 This is a schematic plan view of the display panel according to an embodiment; Figure 4 yes Figure 3 An enlarged plan view of an embodiment of the first display area; Figure 5 and Figure 6 This is an equivalent circuit diagram of the pixels according to the embodiment; Figure 7 This is a schematic diagram showing the arrangement of pixel circuitry according to an embodiment; Figure 8 It is along Figure 7 A schematic cross-sectional view of the pixel circuits captured by lines I-I' and II-II'; Figure 9 This is a plan view showing a portion of the first display area according to an embodiment; Figure 10 It is along Figure 9 A schematic cross-sectional view of a portion of the first display area intercepted by line B-B'; Figure 11 This is a schematic cross-sectional view of a display device manufacturing apparatus according to an embodiment; Figure 12 It is shown Figure 11 A plan view of a portion of the mask shown; Figure 13 It is along Figure 12 A schematic cross-sectional view of a portion of the mask sheet taken by line C-C'; Figures 14A to 14C It is shown Figure 11 A plan view of an embodiment of the second opening portion shown; Figure 15 This is a perspective view showing a display device according to an embodiment; Figure 16 It is shown Figure 15 A plan view of the counter electrode of the display panel of the display device shown; Figure 17 It shows the manufacturing process. Figure 16 A plan view of a portion of the mask sheet of the display panel shown; and Figure 18 This is a plan view showing a portion of the counter electrode of the main pixel of a display device according to an embodiment. Detailed Implementation

[0041] The embodiments illustrated in the accompanying drawings will now be discussed in detail, wherein the same reference numerals refer to the same elements throughout. In this regard, embodiments may take different forms and should not be construed as limited to the description set forth herein. Therefore, the embodiments are described below only with reference to the accompanying drawings to explain the disclosed aspects.

[0042] In the following description, embodiments will be described in detail with reference to the accompanying drawings. In the following description, the same reference numerals will denote the same elements and redundant descriptions may be omitted.

[0043] Some parts unrelated to the description may be omitted in the description of the disclosed embodiments, and the same reference numerals refer to the same elements throughout the specification.

[0044] When a layer, film, region, substrate, or area is referred to as being "on" another layer, film, region, substrate, or area, the layer, film, region, substrate, or area may be directly on the other layer, film, region, substrate, or area, or there may be an intermediate layer, film, region, substrate, or area located between them. Conversely, when a layer, film, region, substrate, or area is referred to as being "directly on" another layer, film, region, substrate, or area, there may be no intermediate layer, film, region, substrate, or area located between them. Furthermore, when a layer, film, region, substrate, or area is referred to as being "below" another layer, film, region, substrate, or area, the layer, film, region, substrate, or area may be directly below the other layer, film, region, substrate, or area, or there may be an intermediate layer, film, region, substrate, or area located between them. Conversely, when a layer, film, region, substrate, or area is referred to as being "directly below" another layer, film, region, substrate, or area, there may be no intermediate layer, film, region, substrate, or area located between them. Furthermore, "above" or "on" can include being positioned on or below an object and does not necessarily imply a direction based on gravity.

[0045] For ease of description, spatial relative terms such as “below,” “under,” “down,” “above,” and “above” are used herein to describe the relationship between one element or component and another, as shown in the accompanying drawings. It will be understood that spatial relative terms are intended to cover different orientations of the device in use or operation, in addition to those depicted in the accompanying drawings. For example, if the device shown in the accompanying drawings is flipped, a device positioned “below” or “under” another device may be placed “above” said other device. Therefore, the descriptive term “below” can include both a lower and upper position. The device may also be positioned in other directions, and thus spatial relative terms may be interpreted differently depending on the orientation.

[0046] Throughout this specification, when an element is referred to as being “connected” to another element, the element may be “directly connected” to the other element or “electrically connected” to the other element, and one or more intermediate elements may be placed between them. It will also be understood that when the terms “comprising” and its variations and / or “including” and their variations are used in this specification, they or may describe the presence of the stated features, integrals, steps, operations, elements, and / or components, but do not preclude the presence or addition of other features, integrals, steps, operations, elements, components, and / or any combinations thereof.

[0047] It will be understood that although terms such as “first” and “second” may be used here to describe various components, these components should not be limited by these terms, which are only used to distinguish one component from another.

[0048] As used herein, the singular forms “a,” “one,” and “the” are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0049] In the accompanying drawings, the dimensions and thicknesses of the elements may be enlarged for better understanding, clarity, and ease of description. However, the disclosure is not limited to the dimensions and thicknesses shown. In the accompanying drawings, the thicknesses of layers, films, panels, regions, and other elements may be exaggerated for clarity. In the accompanying drawings, the thicknesses of some layers and regions may be exaggerated for better understanding and ease of description.

[0050] Furthermore, in the instruction manual, the phrase "in a plan view" refers to the view of a portion of an object from above, while the phrase "in a schematic sectional view" refers to the view of a schematic section taken by vertically cutting a portion of an object from the side.

[0051] Additionally, the terms "overlapping" or "overlapping" indicate that the first object may be above or below the second object, or to one side of the second object, and vice versa. Furthermore, the term "overlapping" may include layering, stacking, facing or directly opposite, extending over, covering or partially covering, or any other suitable term as will be understood and appreciated by one of ordinary skill in the art. The terms "facing" and "directly opposite" indicate that the first element may be directly or indirectly opposite the second element. In the case where a third element is located between the first and second elements, the first and second elements may be understood as being indirectly opposite each other, although still directly opposite each other. When an element is described as "not overlapping" with another element or "will not overlap" with another element, this may include elements spaced apart from each other, offset from each other, or separated from each other, or any other suitable term as will be understood and appreciated by one of ordinary skill in the art.

[0052] Taking into account the problematic measurement and the errors associated with the measurement of a specific quantity (i.e., limitations of the measurement system), as used herein, “about” or “approximately” includes the stated value and indicates a range of acceptable deviations from the specific value as determined by one of ordinary skill in the art. For example, “about” may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0053] In the specification and claims, for purposes of meaning and interpretation, the term "and / or" is intended to include any combination of the terms "and" and "or". For example, "A and / or B" can be understood to mean "A, B, or A and B". The terms "and" and "or" can be used in a combined or separate sense and can be understood as equivalent to "and / or". In the specification and claims, the phrase "at least one of..." is intended to include, for purposes of meaning and interpretation, the meaning of "at least one selected from the group of...". For example, "at least one of A and B" can be understood to mean "A, B, or A and B".

[0054] In the following embodiments, the x-axis, y-axis, and z-axis are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other.

[0055] When embodiments can be implemented differently, the specific process sequence can be performed differently than the described sequence. For example, two consecutively described processes can be performed substantially simultaneously or in the reverse order of the described sequence.

[0056] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the embodiments pertain. Furthermore, it will be understood that terms (such as those defined in a general dictionary) shall be interpreted as having a meaning consistent with their meaning in the context of the relevant field and shall not be interpreted in an idealized or overly formalized sense, unless expressly defined herein.

[0057] Figure 1 This is a perspective view showing a display device according to an embodiment.

[0058] Reference Figure 1 The display device 1 may include a display area DA that can display one or more images and a non-display area NDA that may not display one or more images. The display area DA may include a second display area DA2 and a first display area DA1 located or disposed in the second display area DA2. The display device 1 may provide a main image by using light emitted from a main pixel PXm arranged or disposed in the second display area DA2.

[0059] Display device 1 may include a first display area DA1 within a second display area DA2. See below for reference. Figure 2 As described, the first display area DA1 may be an area under or below which components such as sensors may be arranged or positioned, the sensors using infrared light, visible light, sound, etc.

[0060] The first display area DA1 may include a transmission area TA through which light and / or sound emitted from the component to the outside, or light and / or sound propagating from the outside toward the component, can be transmitted. In an embodiment, when infrared light is transmitted through the first display area DA1, the transmittance of the infrared light may be about 10% or greater (e.g., about 20% or greater, about 25% or greater, about 50% or greater, about 85% or greater, or about 90% or greater). In this case, the transmittance of the first display area DA1 may differ from the transmittance of the second display area DA2. For example, the transmittance of the first display area DA1 may be higher than the transmittance of the second display area DA2.

[0061] In an embodiment, sub-pixels PXa may be arranged or disposed in a first display area DA1, and an image may be provided by using light emitted from the sub-pixels PXa. The image provided in the first display area DA1 may be a sub-image and may have a lower resolution than the image provided in the second display area DA2. For example, the first display area DA1 may include a transmissive area TA through which light and / or sound can pass, wherein the number of sub-pixels PXa arranged or disposed per unit area in the first display area DA1 may be smaller than the number of main pixels PXm arranged or disposed per unit area in the second display area DA2.

[0062] The first display area DA1 may be at least partially surrounded by the second display area DA2, in an embodiment, Figure 1 It is shown that the first display area DA1 can be completely surrounded by the second display area DA2.

[0063] In the following description, organic light-emitting display devices will be used as examples of display device 1 according to embodiments; however, the disclosed display devices are not limited thereto. In the embodiments, various types of display devices, such as inorganic displays (inorganic light-emitting displays) and quantum dot light-emitting displays, can be implemented within the spirit and scope of the disclosure.

[0064] Although Figure 1 The illustration shows that a first display area DA1 can be arranged or positioned on one side (upper right side) of a second display area DA2 having a quadrilateral shape, but the disclosure is not limited thereto. The shape of the second display area DA2 can be circular, elliptical, or a polygon such as a triangle or pentagon, and various modifications can be made to the position and number of the first display area DA1 within the spirit and scope of the disclosure.

[0065] Figure 2 This is a schematic cross-sectional view illustrating a display device according to an embodiment. Figure 2 Can be along Figure 1The schematic cross-section corresponding to the line A-A'.

[0066] Reference Figure 2 The display device 1 may include a display panel 10 containing display elements and a component 20 positioned or disposed below the display panel 10 and corresponding to the first display area DA1.

[0067] The display panel 10 may include a substrate 100, a display element layer 200 disposed on or on the substrate 100, and a thin film encapsulation layer 300 serving as a sealing member for sealing the display element layer 200. The display panel 10 may also include a lower protective film 175 disposed under the substrate 100.

[0068] Substrate 100 may comprise glass or a polymeric resin. The polymeric resin may comprise polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose acetate propionate, or other polymeric resins within the spirit and scope of this disclosure. Substrate 100 comprising a polymeric resin may be flexible, rollable, or bendable. Substrate 100 may have a multilayer structure comprising an inorganic layer (not shown) and / or layers containing the polymeric resin described above.

[0069] The display element layer 200 may include a circuit layer containing a thin-film transistor (TFT), an organic light-emitting diode (OLED) as a display element, and an insulating layer IL between the TFT and the OLED.

[0070] The main pixel PXm, including a thin-film transistor TFT and an organic light-emitting diode OLED electrically connected to the thin-film transistor TFT, can be arranged or disposed in the second display area DA2. The sub-pixel PXa, including a thin-film transistor TFT and an organic light-emitting diode OLED electrically connected to the thin-film transistor TFT, can be arranged or disposed in the first display area DA1. Lines or wiring (not shown) can be electrically connected to the main pixel PXm and the sub-pixel PXa.

[0071] The transmissive region TA, which may or may not contain thin-film transistors (TFTs) and pixels, may be arranged or set in the first display area DA1. The transmissive region TA can be understood as the area through which light / signals output from component 20 or input to component 20 can be transmitted.

[0072] Component 20 may be positioned or disposed in the first display area DA1. Component 20 may include electronic components that use light or sound. For example, component 20 may include sensors such as infrared sensors for receiving and using light, sensors for outputting and detecting light or sound to measure distance or identify fingerprints or touch, miniature (or compact) lamps for outputting light, or speakers for outputting sound. In the case of electronic components using light, the electronic components may use light of various wavelengths such as visible light, infrared light, ultraviolet light, etc. More than one component 20 may be provided or disposed in the first display area DA1. For example, as component 20, a light-emitting device and a light-receiving device may be provided or disposed together or in combination in the first display area DA1. Optionally, the light-emitting part and the light-receiving part may be provided or disposed simultaneously in one component 20.

[0073] The thin-film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In this regard, Figure 2 A first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330 are shown, as well as an organic encapsulation layer 320 between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330.

[0074] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may comprise one or more inorganic materials such as alumina, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, or silicon oxynitride. The organic encapsulation layer 320 may comprise polymeric materials. Polymeric materials may comprise polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, hexamethyldisiloxane, acrylic resins (e.g., polymethyl methacrylate or polyacrylic acid), or any combination thereof.

[0075] The lower protective film 175 may be attached below or beneath the substrate 100 to support and protect the substrate 100. The lower protective film 175 may include an opening 175OP corresponding to the first display area DA1. Because the lower protective film 175 may include the opening 175OP, the light transmittance of the first display area DA1 can be improved. The lower protective film 175 may include polyethylene terephthalate (PET) or polyimide (PI) or other suitable materials within the spirit and scope of this disclosure.

[0076] The area of ​​the first display area DA1 can be larger than the area where the component 20 can be arranged or set. Although Figure 2It is shown that the area of ​​the first display area DA1 can be equal to (or substantially equal to) the area of ​​the opening 175OP, but the area of ​​the opening 175OP disposed in the lower protective film 175 can be not equal to (or substantially not equal to) the area of ​​the first display area DA1. For example, the area of ​​the opening 175OP can be smaller than the area of ​​the first display area DA1.

[0077] Although not shown, components such as input sensing elements for sensing touch input, anti-reflective elements including a black matrix and color filters or polarizers and delay units, and transparent windows may be arranged or disposed on the display panel 10.

[0078] In this embodiment, the thin-film encapsulation layer 300 can be used as an encapsulation component for sealing the display element layer 200; however, the disclosure is not limited thereto. For example, an encapsulation substrate bonded to the substrate 100 by a sealant or glass frit can be used as a component for sealing the display element layer 200. In this case, the encapsulation substrate may include the same or similar material as the material of the substrate 100 described above.

[0079] Figure 3 This is a schematic plan view of a display panel according to an embodiment. Figure 4 yes Figure 3 An enlarged plan view of an embodiment of the first display area.

[0080] Reference Figure 3 and Figure 4 Various components of the display panel 10 can be arranged or disposed on the substrate 100. The substrate 100 may include a display area DA and a non-display area NDA surrounding or around the display area DA. As described above, the display area DA may include a second display area DA2 in which a main image can be displayed and a first display area DA1 in which a transmission area TA can be included and a sub-image can be displayed.

[0081] The main pixel PXm can be arranged or disposed in the second display area DA2. Each main pixel PXm can comprise a display element such as an organic light-emitting diode (OLED). Each main pixel PXm can emit, for example, red, green, blue, or white light from the OLED. Here, the main pixel PXm can be understood as a pixel that emits any one of red, green, blue, and white light. The second display area DA2 can be defined by referring to the above... Figure 2 The described encapsulation components (e.g., thin film encapsulation layers or encapsulation substrates) are covered or stacked and protected from external air or moisture.

[0082] A first display area DA1 may be arranged or disposed within a second display area DA2, and sub-pixels PXa may be arranged or disposed within the first display area DA1. Each sub-pixel PXa may include a display element such as an organic light-emitting diode (OLED). Each sub-pixel PXa may emit, for example, red, green, blue, or white light from the organic light-emitting diode. Here, a sub-pixel PXa can be understood as a pixel that emits any one of red, green, blue, and white light. The first display area DA1 may include a transmissive area TA arranged or disposed between the sub-pixels PXa.

[0083] Because the first display area DA1 may include the transmissive area TA, the resolution of the first display area DA1 can be lower than the resolution of the second display area DA2. For example, the resolution of the first display area DA1 may be about half the resolution of the second display area DA2. In an embodiment, the resolution of the second display area DA2 may be about 400 ppi or greater, and the resolution of the first display area DA1 may be about 200 ppi.

[0084] Reference Figure 4 Describe the first display area DA1.

[0085] The first display area DA1 may include a sub-pixel area PA1 and a transmissive area TA or multiple transmissive areas (e.g., see...). Figure 2 The sub-pixel region PA1 includes at least one sub-pixel PXa. The sub-pixel region PA1 and the transmission region TA can be arranged or disposed alternately on the first direction DR1 and the second direction DR2, and can be arranged or disposed, for example, in a grid shape.

[0086] Sub-pixel region PA1 may include sub-pixel Pr emitting red light, sub-pixel Pg emitting green light, and sub-pixel Pb emitting blue light. Although Figure 4 A pentile-type subpixel PXa is shown, but subpixels PXa can be formed in a strip shape or in various other shapes. Although Figure 4 It is shown that eight sub-pixels PXa can be included in the sub-pixel region PA1, but the number of sub-pixels PXa can be modified according to the resolution of the first display region DA1.

[0087] In an embodiment, the pixel circuitry of a main pixel PXm and the pixel circuitry of a sub-pixel PXa may have the same shape. However, the disclosure is not limited thereto. The pixel circuitry included in the main pixel PXm and the pixel circuitry included in the sub-pixel PXa may be different from each other.

[0088] Subpixels PXa may be omitted or arranged within the transmissive region TA. Omitting or omitting subpixels PXa indicates that subpixels PXa may not include elements such as organic light-emitting diodes (OLEDs) (see...). Figure 2The display element is an organic light-emitting diode (OLED). For example, it is understood that the pixel electrodes, intermediate layer, and counter electrode constituting the OLED, as well as the pixel circuitry electrically connected to the OLED, may not be arranged or may be arranged in the transmission region TA. Some of the signal lines PL, DL, SL, and EL that are electrically connected to supply signals to the sub-pixel PXa in the sub-pixel region PA1 may be positioned or arranged across the transmission region TA. However, even in this case, in order to increase the transmittance of the transmission region TA, the signal lines PL, DL, SL, and EL may be arranged or arranged to bypass the central portion of the transmission region TA.

[0089] Although not shown, a conductive layer (not shown) may be disposed or disposed on the substrate 100 to correspond to the sub-pixel region PA1 of the first display region DA1. The conductive layer may be disposed or disposed below or beneath the sub-pixel PXa, for example, between the substrate 100 and the thin-film transistor of the sub-pixel PXa. The conductive layer may block light from the assembly 20 (see...). Figure 2 The emitted external light is input to the pixel circuit PC of sub-pixel PXa (see...). Figure 5 This prevents interference with the pixel circuit PC of sub-pixel PXa. A constant voltage or signal can be applied to the conductive layer to prevent damage to the pixel circuit PC due to electrostatic discharge. The conductive layer can be provided or disposed in the first display area DA1, and in some cases, the conductive layer can be provided with different voltages.

[0090] A connection region CTA can be arranged or positioned between the sub-pixel regions PA1 described above. Connection electrodes (not shown) can be arranged or positioned in the connection region CTA to electrically connect the spaced-apart sub-pixel regions PA1.

[0091] Return to reference Figure 3 Each pixel PXm or PXa can be electrically connected to external circuitry arranged or disposed in the non-display area NDA. The first scan drive circuit 110, the second scan drive circuit 120, the terminal 140, the first power line 160, and the second power line 170 can be arranged or disposed in the non-display area NDA.

[0092] The first scan driving circuit 110 can provide a scan signal to each pixel (e.g., a main pixel PXm or a sub-pixel PXa) via a scan line SL. The first scan driving circuit 110 can also provide an emission control signal to each pixel PXm or PXa via an emission control line EL. The second scan driving circuit 120 can be arranged or positioned parallel to the first scan driving circuit 110, and display areas DA1 and DA2 are located between the second scan driving circuit 120 and the first scan driving circuit 110. Some pixels arranged or positioned in display areas DA1 and DA2 (e.g., some of the main pixels PXm and sub-pixels PXa) can be electrically connected to the first scan driving circuit 110, and other pixels can be electrically connected to the second scan driving circuit 120. In an embodiment, the second scan driving circuit 120 can be omitted.

[0093] Terminal 140 may be arranged or disposed on one side of substrate 100. Terminal 140 may be exposed without being covered by or overlapping with an insulating layer and electrically connected to a printed circuit board (PCB). Terminal PCB-P of the PCB may be electrically connected to terminal 140 of display panel 10. The PCB may transmit power or signals from controller (not shown) to display panel 10. Control signals generated by controller may be transmitted via the PCB to each of the first scan drive circuit 110 and the second scan drive circuit 120. Controller may provide a first power voltage ELVDD (see [reference needed]) to first power line 160 via first connection line 161. Figure 5 The controller can supply a second power voltage ELVSS to the second power supply line 170 via the second connection line 171 (see...). Figure 5 The first power voltage ELVDD can be provided to each pixel (e.g., main pixel PXm or sub-pixel PXa) via the drive voltage line PL electrically connected to the first power line 160, and the second power voltage ELVSS can be provided to the counter electrode of each pixel PXm or PXa electrically connected to the second power line 170.

[0094] The data driving circuit 150 can be electrically connected to the data line DL. The data signal of the data driving circuit 150 can be provided to each pixel PXm or PXa through the connection line 151 electrically connected to the terminal 140 and the data line DL electrically connected to the connection line 151. Figure 3 The data driving circuit 150 is shown to be arranged or disposed on a printed circuit board (PCB); however, in this embodiment, the data driving circuit 150 may be arranged or disposed on a substrate 100. For example, the data driving circuit 150 may be arranged or disposed between terminal 140 and the first power line 160.

[0095] The first power line 160 may be arranged or disposed between the second display area DA2 and the terminal 140 and may include a first sub-line 162 and a second sub-line 163 extending parallel in the x-direction. The second power line 170 may partially surround the display area DA in a ring shape with one side open.

[0096] Figure 5 and Figure 6 This is an equivalent circuit diagram of the pixels according to the embodiment.

[0097] Reference Figure 5 and Figure 6 Each pixel PXm or PXa may include a pixel circuit PC electrically connected to the scan line SL and the data line DL, and an organic light-emitting diode (OLED) electrically connected to the pixel circuit PC.

[0098] The pixel circuit PC may include a driving thin-film transistor T1, a switching thin-film transistor T2, and a storage capacitor Cst. The switching thin-film transistor T2 may be electrically connected to the scan line SL and the data line DL, and may transmit the data signal Dm input through the data line DL to the driving thin-film transistor T1 according to the scan signal Sn input through the scan line SL.

[0099] The storage capacitor Cst can be electrically connected to the switching thin-film transistor T2 and the drive voltage line PL, and can store the voltage corresponding to the difference between the voltage received from the switching thin-film transistor T2 and the first power voltage (or drive voltage) ELVDD supplied to the drive voltage line PL.

[0100] The driving thin-film transistor T1 can be electrically connected to the driving voltage line PL and the storage capacitor Cst, and can control the driving current flowing from the driving voltage line PL through the organic light-emitting diode (OLED) in response to the voltage value stored in the storage capacitor Cst. The OLED can emit light with a certain brightness according to the driving current.

[0101] Although Figure 5 The pixel circuit PC shown includes two thin-film transistors and a storage capacitor, but the disclosure is not limited thereto. Figure 6 As shown, the pixel circuit PC may include seven thin-film transistors and a storage capacitor. Although Figure 6 The diagram shows a single storage capacitor, but the pixel circuitry PC may include two or more storage capacitors.

[0102] Reference Figure 6Each pixel PXm or PXa may include pixel circuitry PC and an organic light-emitting diode (OLED) electrically connected to the pixel circuitry PC. The pixel circuitry PC may include thin-film transistors and storage capacitors. The thin-film transistors and storage capacitors may be electrically connected to signal lines SL, SL-1, EL, and DL, initialization voltage line VL, and drive voltage line PL.

[0103] Although Figure 6 It is shown that each pixel PXm or PXa can be electrically connected to signal lines SL, SL-1, EL and DL, initialization voltage line VL, and drive voltage line PL, but the disclosure is not limited thereto. In embodiments, at least one of the signal lines SL, SL-1, EL and DL, initialization voltage line VL, drive voltage line PL, etc., can be shared by adjacent pixels.

[0104] Signal lines SL, SL-1, EL, and DL may include a scan line SL that can transmit a scan signal Sn, a previous scan line SL-1 that can transmit the previous scan signal Sn-1 to the first initialization thin-film transistor T4 and the second initialization thin-film transistor T7, an emission control line EL that can transmit an emission control signal En to the operation control thin-film transistor T5 and the emission control thin-film transistor T6, and a data line DL that intersects with the scan line SL and can transmit a data signal Dm. The drive voltage line PL can transmit a drive voltage ELVDD to the drive thin-film transistor T1, and the initialization voltage line VL can transmit an initialization voltage Vint used to initialize the pixel electrodes of the drive thin-film transistor T1 and the organic light-emitting diode (OLED).

[0105] The driving gate electrode G1 of the driving thin-film transistor T1 can be electrically connected to the lower electrode CE1 of the storage capacitor Cst. The driving source electrode S1 of the driving thin-film transistor T1 can be electrically connected to the driving voltage line PL via the operation control thin-film transistor T5. The driving drain electrode D1 of the driving thin-film transistor T1 can be electrically connected to the pixel electrode of the organic light-emitting diode (OLED) via the emission control thin-film transistor T6. The driving thin-film transistor T1 can receive the data signal Dm according to the switching operation of the switching thin-film transistor T2 and supply the driving current I to the OLED. OLED .

[0106] The switching gate electrode G2 of the switching thin-film transistor T2 can be electrically connected to the scan line SL, the switching source electrode S2 of the switching thin-film transistor T2 can be electrically connected to the data line DL, and the switching drain electrode D2 of the switching thin-film transistor T2 can be electrically connected to the driving source electrode S1 of the driving thin-film transistor T1 and electrically connected to the driving voltage line PL via the operation control thin-film transistor T5. The switching thin-film transistor T2 can be turned on according to the scan signal Sn received through the scan line SL to perform a switching operation that transmits the data signal Dm transmitted to the data line DL to the driving source electrode S1 of the driving thin-film transistor T1.

[0107] The compensation gate electrode G3 of the compensation thin-film transistor T3 can be electrically connected to the scan line SL. The compensation source electrode S3 of the compensation thin-film transistor T3 can be electrically connected to the driving drain electrode D1 of the driving thin-film transistor T1 and electrically connected to the pixel electrode of the organic light-emitting diode (OLED) via the emission control thin-film transistor T6. The compensation drain electrode D3 of the compensation thin-film transistor T3 can be electrically connected to the lower electrode CE1 of the storage capacitor Cst, the first initialization drain electrode D4 of the first initialization thin-film transistor T4, and the driving gate electrode G1 of the driving thin-film transistor T1. The compensation thin-film transistor T3 can be turned on according to the scan signal Sn received through the scan line SL to electrically connect the driving gate electrode G1 of the driving thin-film transistor T1 to the driving drain electrode D1 to connect the driving thin-film transistor T1 diode.

[0108] The first initialization gate electrode G4 of the first initialization thin-film transistor T4 can be electrically connected to the previous scan line SL-1. The first initialization source electrode S4 of the first initialization thin-film transistor T4 can be electrically connected to the second initialization drain electrode D7 and the initialization voltage line VL of the second initialization thin-film transistor T7. The first initialization drain electrode D4 of the first initialization thin-film transistor T4 can be electrically connected to the lower electrode CE1 of the storage capacitor Cst, the compensation drain electrode D3 of the compensation thin-film transistor T3, and the driving gate electrode G1 of the driving thin-film transistor T1. The first initialization thin-film transistor T4 can be turned on according to the previous scan signal Sn-1 received through the previous scan line SL-1 to perform an initialization operation that initializes the voltage of the driving gate electrode G1 of the driving thin-film transistor T1 by transmitting an initialization voltage Vint to the driving gate electrode G1 of the driving thin-film transistor T1.

[0109] The operation control gate electrode G5 of the operation control thin film transistor T5 can be electrically connected to the emitter control line EL, the operation control source electrode S5 of the operation control thin film transistor T5 can be electrically connected to the drive voltage line PL, and the operation control drain electrode D5 of the operation control thin film transistor T5 can be electrically connected to the drive source electrode S1 of the drive thin film transistor T1 and the switch drain electrode D2 of the switch thin film transistor T2.

[0110] The emission control gate electrode G6 of the emission control thin film transistor T6 can be electrically connected to the emission control line EL. The emission control source electrode S6 of the emission control thin film transistor T6 can be electrically connected to the driving drain electrode D1 of the driving thin film transistor T1 and the compensation source electrode S3 of the compensation thin film transistor T3. The emission control drain electrode D6 of the emission control thin film transistor T6 can be electrically connected to the second initialization source electrode S7 of the second initialization thin film transistor T7 and the pixel electrode of the organic light-emitting diode OLED.

[0111] The operation control thin-film transistor T5 and the emission control thin-film transistor T6 can be simultaneously turned on according to the emission control signal En received through the emission control line EL, so that the driving voltage ELVDD can be transmitted to the organic light-emitting diode OLED, and therefore the driving current I... OLED It can flow through organic light-emitting diodes (OLEDs).

[0112] The second initialization gate electrode G7 of the second initialization thin-film transistor T7 can be electrically connected to the previous scan line SL-1. The second initialization source electrode S7 of the second initialization thin-film transistor T7 can be electrically connected to the emission control drain electrode D6 of the emission control thin-film transistor T6 and the pixel electrode of the organic light-emitting diode (OLED). The second initialization drain electrode D7 of the second initialization thin-film transistor T7 can be electrically connected to the first initialization source electrode S4 of the first initialization thin-film transistor T4 and the initialization voltage line VL. The second initialization thin-film transistor T7 can be turned on according to the previous scan signal Sn-1 received through the previous scan line SL-1 to initialize the pixel electrode of the organic light-emitting diode (OLED).

[0113] Although Figure 6 The illustration shows a scenario where the first initialization thin-film transistor T4 and the second initialization thin-film transistor T7 can be electrically connected to the preceding scan line SL-1, but the disclosure is not limited thereto. In an embodiment, the first initialization thin-film transistor T4 can be electrically connected to the preceding scan line SL-1 to be driven according to the preceding scan signal Sn-1, and the second initialization thin-film transistor T7 can be electrically connected to a separate signal line (e.g., a subsequent scan line) to be driven according to the signal transmitted to that signal line.

[0114] The upper electrode of the storage capacitor Cst can be electrically connected to the driving voltage line PL, and the counter electrode of the organic light-emitting diode (OLED) can be electrically connected to the second power voltage (common voltage) ELVSS. Therefore, the OLED can receive a driving current I from the driving thin-film transistor T1. OLED It emits light to display images.

[0115] Although Figure 6It is shown that the compensation thin-film transistor T3 and the first initialization thin-film transistor T4 can have dual gate electrodes, but the compensation thin-film transistor T3 and the first initialization thin-film transistor T4 can have a single gate electrode.

[0116] Figure 7 This is a schematic diagram illustrating the arrangement of pixel circuitry according to an embodiment. Figure 8 It is along Figure 7 A schematic cross-sectional view of the pixel circuits captured by lines I-I' and II-II'.

[0117] Reference Figure 7 and Figure 8 The driving thin-film transistor T1, the switching thin-film transistor T2, the compensation thin-film transistor T3, the first initialization thin-film transistor T4, the operation control thin-film transistor T5, the emission control thin-film transistor T6, and the second initialization thin-film transistor T7 can be arranged or disposed along the semiconductor layer 1130.

[0118] The semiconductor layer 1130 may be disposed or located on the substrate 100 on which an inorganic insulating material buffer layer may be formed. In an embodiment, the semiconductor layer 1130 may comprise low-temperature polycrystalline silicon (LTPS). This is because polycrystalline silicon has a high electron mobility (approximately 10 cm⁻¹). 2 Polycrystalline silicon (PS) offers advantages such as low power consumption and high reliability, making it suitable for use as a semiconductor layer in thin-film transistors (TFTs) in display devices. However, the disclosure is not limited thereto. In embodiments, semiconductor layer 1130 may be formed of amorphous silicon (a-Si) and / or oxide semiconductors, some semiconductor layers in the TFT may be formed of LTPS, and other semiconductor layers may be formed of amorphous silicon (a-Si) and / or oxide semiconductors.

[0119] Some regions of semiconductor layer 1130 may correspond to the semiconductor layers of driving thin-film transistor T1, switching thin-film transistor T2, compensation thin-film transistor T3, first initialization thin-film transistor T4, operation control thin-film transistor T5, emission control thin-film transistor T6, and second initialization thin-film transistor T7. In other words, it can be understood that the semiconductor layers of driving thin-film transistor T1, switching thin-film transistor T2, compensation thin-film transistor T3, first initialization thin-film transistor T4, operation control thin-film transistor T5, emission control thin-film transistor T6, and second initialization thin-film transistor T7 may be electrically connected to each other and may be bent in various shapes.

[0120] The semiconductor layer 1130 may include a channel region and source and drain regions on both sides of the channel region, which can be understood as the source and drain electrodes of the corresponding thin-film transistor. In the following text, for convenience, the source region is referred to as the source electrode and the drain region may be referred to as the drain electrode.

[0121] The driving thin-film transistor T1 may include a driving gate electrode G1 superimposed on the driving channel region, and driving source electrodes S1 and driving drain electrodes D1 on both sides of the driving channel region. The driving channel region superimposed on the driving gate electrode G1 may have a curved shape, such as an Ω-shaped or arched shape, to form a long channel length in a narrow space. When the driving channel region is long, the driving range of the gate voltage can be widened, thus allowing for finer control of the grayscale of the light emitted from the organic light-emitting diode OLED and improving its display quality.

[0122] The switching thin-film transistor T2 may include a switching gate electrode G2 superimposed on the switching channel region, and a switching source electrode S2 and a switching drain electrode D2 on both sides of the switching channel region. The switching drain electrode D2 may be electrically connected to the driving source electrode S1.

[0123] The compensation thin-film transistor T3 can be a dual thin-film transistor, which may include compensation gate electrodes G3 stacked with two compensation channel regions respectively, and may include compensation source electrodes S3 and compensation drain electrodes D3 arranged or disposed on both sides of the compensation gate electrode G3. The compensation thin-film transistor T3 can be electrically connected to the driving gate electrode G1 of the driving thin-film transistor T1 via the node connection line 1174 described below.

[0124] The first initialization thin-film transistor T4 may be a dual thin-film transistor, which may include a first initialization gate electrode G4 superimposed on two first initialization channel regions respectively, and may include a first initialization source electrode S4 and a first initialization drain electrode D4 arranged or disposed on both sides of the first initialization gate electrode G4.

[0125] The operation control thin-film transistor T5 may include an operation control gate electrode G5 stacked with the operation control channel region, and an operation control source electrode S5 and an operation control drain electrode D5 positioned or disposed on both sides of the operation control gate electrode G5. The operation control drain electrode D5 may be electrically connected to the drive source electrode S1.

[0126] The emitter control thin-film transistor T6 may include an emitter control gate electrode G6 stacked with the emitter control channel region, and an emitter control source electrode S6 and an emitter control drain electrode D6 positioned or disposed on both sides of the emitter control gate electrode G6. The emitter control source electrode S6 may be electrically connected to the drive drain electrode D1.

[0127] The second initialization thin-film transistor T7 may include a second initialization gate electrode G7 superimposed on the second initialization channel region, and a second initialization source electrode S7 and a second initialization drain electrode D7 located or disposed on both sides of the second initialization gate electrode G7.

[0128] The thin-film transistor described above can be electrically connected to signal lines SL, SL-1, EL and DL, initialization voltage line VL and drive voltage line PL.

[0129] The scan line SL, the previous scan line SL-1, the emission control line EL, and the drive gate electrode G1 can be arranged or disposed on the semiconductor layer 1130, and one or more insulating layers are located between them.

[0130] The scan line SL can extend along the first direction DR1. Some regions of the scan line SL can correspond to the switching gate electrode G2 and the compensation gate electrode G3. For example, the regions of the scan line SL that overlap with the channel regions of the switching thin-film transistor T2 and the compensation thin-film transistor T3 can be the switching gate electrode G2 and the compensation gate electrode G3, respectively.

[0131] The preceding scan line SL-1 can extend along the first direction DR1, and some regions of the preceding scan line SL-1 can correspond to the first initial gate electrode G4 and the second initial gate electrode G7, respectively. For example, the regions of the preceding scan line SL-1 that overlap with the channel regions of the first initial thin-film transistor T4 and the second initial thin-film transistor T7 can be the first initial gate electrode G4 and the second initial gate electrode G7, respectively.

[0132] The emitter control line EL can extend along the first direction DR1. Some regions of the emitter control line EL can correspond to the operation control gate electrode G5 and the emitter control gate electrode G6, respectively. For example, the regions of the emitter control line EL that overlap with the channel regions of the operation control thin-film transistor T5 and the emitter control thin-film transistor T6 can be the operation control gate electrode G5 and the emitter control gate electrode G6, respectively.

[0133] The driving gate electrode G1 can be a floating electrode and can be electrically connected to the compensation thin-film transistor T3 via the node connection line 1174 described above.

[0134] The electrode voltage line HL can be arranged or placed above the scan line SL, the previous scan line SL-1, the emission control line EL, and the drive gate electrode G1, with one or more insulating layers located between them.

[0135] The electrode voltage line HL may extend in the first direction DR1 to intersect the data line DL and the drive voltage line PL. A portion of the electrode voltage line HL may cover at least a portion of the drive gate electrode G1 or overlap with at least a portion of the drive gate electrode G1, and may form a storage capacitor Cst with the drive gate electrode G1. For example, the drive gate electrode G1 may be the lower electrode CE1 of the storage capacitor Cst, and a portion of the electrode voltage line HL may be the upper electrode CE2 of the storage capacitor Cst.

[0136] The upper electrode CE2 of the storage capacitor Cst can be electrically connected to the drive voltage line PL. In this regard, the electrode voltage line HL can be electrically connected to the drive voltage line PL, which is arranged or positioned on the electrode voltage line HL, via the contact hole CNT. Therefore, the electrode voltage line HL can have the same voltage level as the drive voltage line PL (constant voltage). For example, the electrode voltage line HL can have a constant voltage of approximately +5V. The electrode voltage line HL can be understood as a horizontal drive voltage line.

[0137] Because the driving voltage line PL extends in the second direction DR2, and the electrode voltage line HL, which is electrically connected to the driving voltage line PL, extends in the first direction DR1, which intersects the second direction DR2, the driving voltage line PL and the electrode voltage line HL can form a grid structure in the display area.

[0138] The data line DL, drive voltage line PL, initialization connection line 1173 and node connection line 1174 can be arranged or disposed on the electrode voltage line HL, and one or more insulating layers are located between them.

[0139] The data line DL can extend along the second direction DR2 and can be electrically connected to the switching source electrode S2 of the switching thin-film transistor T2 through the contact hole 1154. A portion of the data line DL can be understood as the switching source electrode S2.

[0140] The drive voltage line PL can extend in the second direction DR2 and can be electrically connected to the electrode voltage line HL through the contact hole CNT as described above. For example, the drive voltage line PL can be electrically connected to the operation control thin-film transistor T5 through the contact hole 1155. The drive voltage line PL can be electrically connected to the operation control source electrode S5 through the contact hole 1155.

[0141] One end of the initialization connection line 1173 can be electrically connected to the first initialization thin-film transistor T4 and the second initialization thin-film transistor T7 through the contact hole 1152, and the other end of the initialization connection line 1173 can be electrically connected to the initialization voltage line VL through the contact hole 1151 described below.

[0142] One end of the node connection line 1174 can be electrically connected to the compensation drain electrode D3 through the contact hole 1156, and the other end of the node connection line 1174 can be electrically connected to the drive gate electrode G1 through the contact hole 1157.

[0143] The initialization voltage line VL can be arranged or placed on the data line DL, the drive voltage line PL, the initialization connection line 1173 and the node connection line 1174, and one or more insulating layers are located between them.

[0144] The initialization voltage line VL can extend along the first direction DR1. The initialization voltage line VL can be electrically connected to the first initialization thin-film transistor T4 and the second initialization thin-film transistor T7 via the initialization connection line 1173. The initialization voltage line VL can have a constant voltage (e.g., approximately -2V).

[0145] The initialization voltage line VL can be arranged or disposed on the same layer as the pixel electrode 210 of the organic light-emitting diode OLED, and can include the organic light-emitting diode OLED (see...). Figure 8 The pixel electrode 210 is made of the same material as the emitter control thin-film transistor T6. The pixel electrode 210 can be electrically connected to the emitter control thin-film transistor T6. The pixel electrode 210 can be electrically connected to the connecting metal 1175 through the contact hole 1163, and the connecting metal 1175 can be electrically connected to the emitter control drain electrode D6 through the contact hole 1153.

[0146] Figure 7 It is shown that the initialization voltage line VL can be arranged or disposed on the same layer as the pixel electrode 210; however, in the embodiment, the initialization voltage line VL can be arranged or disposed on the same layer as the electrode voltage line HL.

[0147] In the following text, reference will be made to Figure 8 The description includes a stacked structure of components in the main pixel according to an embodiment.

[0148] The substrate 100 may comprise glass or a polymeric resin. The polymeric resin may include polymeric resins such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate. The substrate 100 comprising the polymeric resin may be flexible, rollable, or bendable. The substrate 100 may have a multilayer structure comprising an inorganic layer (not shown) and a layer containing the polymeric resin thereon.

[0149] A buffer layer 111 may be positioned or disposed on the substrate 100 to reduce or block the penetration of foreign matter, moisture, or outside air from the bottom of the substrate 100, and may provide a flat surface on the substrate 100. The buffer layer 111 may comprise inorganic materials, organic materials, or organic / inorganic mixtures such as oxides or nitrides, and may comprise a single-layer or multi-layer structure of inorganic and organic materials. A barrier layer (not shown) for blocking the penetration of outside air may be included between the substrate 100 and the buffer layer 111.

[0150] Gate electrodes G1 and G6 may be disposed or located on semiconductor layers A1 and A6, with a first gate insulating layer 112 situated between them. Gate electrodes G1 and G6 may comprise molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or other suitable materials within the spirit and scope of this disclosure, and may comprise a single layer or multiple layers. For example, gate electrodes G1 and G6 may comprise a single Mo layer. Scan line SL, previous scan line SL-1, and emission control line EL (see...) Figure 7 The gate electrode G1 and G6 can be formed on the same layer. For example, the gate electrode G1 and G6, the scan line SL, the previous scan line SL-1, and the emission control line EL (see...) Figure 7 It can be arranged or disposed on the first gate insulating layer 112.

[0151] The first gate insulating layer 112 may include silicon oxide (SiO2) or silicon nitride (SiN). x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO).

[0152] The second gate insulating layer 113 can be provided or configured to cover the gate electrodes G1 and G6 or be stacked with the gate electrodes G1 and G6. The second gate insulating layer 113 may include silicon oxide (SiO2) or silicon nitride (SiN). x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO).

[0153] The lower electrode CE1 of the storage capacitor Cst can be integrally formed with the driving gate electrode G1 of the driving thin-film transistor T1. For example, the driving gate electrode G1 of the driving thin-film transistor T1 can be used as the lower electrode CE1 of the storage capacitor Cst.

[0154] The upper electrode CE2 of the storage capacitor Cst can be stacked with the lower electrode CE1, and the second gate insulating layer 113 is located between the upper electrode CE2 and the lower electrode CE1. In this case, the second gate insulating layer 113 can serve as the dielectric layer of the storage capacitor Cst. The upper electrode CE2 can include a conductive material comprising molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and can include a single layer or multiple layers comprising the above materials. For example, the upper electrode CE2 can include a single Mo layer or multiple layers of Mo / Al / Mo.

[0155] Although it is shown that the storage capacitor Cst can be stacked with the driving thin-film transistor T1, the disclosure is not limited thereto. Various modifications can be made to the storage capacitor Cst so that the storage capacitor Cst may not be stacked with the driving thin-film transistor T1.

[0156] The upper electrode CE2 can be used as the electrode voltage line HL. For example, a portion of the electrode voltage line HL can be the upper electrode CE2 of the storage capacitor Cst.

[0157] The interlayer insulating layer 115 may be provided or configured to cover the upper electrode CE2 or be stacked with the upper electrode CE2. The interlayer insulating layer 115 may include silicon oxide (SiO2) or silicon nitride (SiN). x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO). Figure 8 In this embodiment, the interlayer insulation layer 115 may be shown as a single layer; however, in other embodiments, the interlayer insulation layer 115 may have a multilayer structure.

[0158] The data line DL, drive voltage line PL, and connecting metal 1175 can be arranged or disposed on the interlayer insulating layer 115. The data line DL, drive voltage line PL, and connecting metal 1175 may include conductive materials containing molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may include a single layer or multiple layers containing the above materials. For example, the data line DL, drive voltage line PL, and connecting metal 1175 may include a Ti / Al / Ti multilayer structure.

[0159] The upper electrode CE2 of the storage capacitor Cst can be electrically connected to the drive voltage line PL through a contact hole CNT defined in the interlayer insulating layer 115. This means that the electrode voltage line HL can be electrically connected to the drive voltage line PL through the contact hole CNT. Therefore, the electrode voltage line HL can have the same voltage level (constant voltage) as the drive voltage line PL.

[0160] The connecting metal 1175 can be electrically connected to the semiconductor layer A6 of the emission control thin film transistor T6 through contact holes 1153 passing through the interlayer insulating layer 115, the second gate insulating layer 113, and the first gate insulating layer 112. The emission control thin film transistor T6 can be electrically connected to the pixel electrode 210 of the organic light-emitting diode OLED through the connecting metal 1175.

[0161] The planarization layer 117 can be arranged or disposed on the data line DL, the driving voltage line PL, and the connecting metal 1175, and the organic light-emitting diode (OLED) can be positioned or disposed on the planarization layer 117.

[0162] The planarization layer 117 may have a flat upper surface, allowing the pixel electrode 210 to be formed flat. The planarization layer 117 may comprise a single layer or multiple layers formed of organic materials. The planarization layer 117 may comprise a general polymer such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), or polystyrene (PS), a phenolic polymer derivative, acrylic polymers, imide polymers, aromatic ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, or any blend thereof. The planarization layer 117 may comprise inorganic materials. The planarization layer 117 may comprise silicon oxide (SiO2), silicon nitride (SiN2), etc. x The planarization layer 117 may contain inorganic materials, such as silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO). When the planarization layer 117 comprises inorganic materials, chemical planarization polishing may be performed, for example, in some cases. The planarization layer 117 may comprise both organic and inorganic materials.

[0163] The pixel electrode 210 can be a (semi-)transparent electrode or a reflective electrode. In an embodiment, the pixel electrode 210 may include a reflective layer formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or any mixture thereof, and a transparent electrode layer or a semi-transparent electrode layer formed or disposed on the reflective layer. The transparent electrode layer or the semi-transparent electrode layer may include at least one of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and zinc aluminum oxide (AZO). In an embodiment, the pixel electrode 210 may include a stacked structure of ITO / Ag / ITO.

[0164] The pixel defining layer 119 can be disposed or formed on the planarization layer 117. The pixel defining layer 119 can have an opening 119OP that exposes the central portion of the pixel electrode 210, thereby defining the emission region of the pixel. For example, the pixel defining layer 119 can increase the distance between the edge of the pixel electrode 210 and the counter electrode 230 above the pixel electrode 210 to prevent arcing or the like at the edge of the pixel electrode 210. The pixel defining layer 119 can be formed from an organic insulating material such as polyimide, polyamide, acrylic resin, benzocyclobutene, hexamethyldisiloxane (HMDSO), or phenolic resin by spin coating or other processes within the spirit and scope of the disclosure.

[0165] The intermediate layer 220 of an organic light-emitting diode (OLED) may include an organic emitting layer. The organic emitting layer may include organic materials comprising fluorescent or phosphorescent materials that emit red, green, blue, or white light. The organic emitting layer may include low-molecular-weight or high-molecular-weight organic materials, and functional layers such as a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), and an electron injection layer (EIL) may be optionally arranged or disposed below, below, or above the organic emitting layer. The intermediate layer 220 may be arranged or disposed corresponding to each pixel electrode 210, respectively. However, the disclosure is not limited thereto. The intermediate layer 220 may be modified in various ways, such as by being modified to be an integral layer included above multiple pixel electrodes 210.

[0166] The counter electrode 230 can be a transparent electrode or a reflective electrode. In embodiments, the counter electrode 230 can be a transparent electrode or a semi-transparent electrode, and can include a thin metal layer having a low work function and comprising Li, Ca, LiF / Ca, LiF / Al, Al, Ag, Mg, or any mixture thereof. A transparent conductive oxide (TCO) layer such as ITO, IZO, ZnO, or In2O3 can be arranged or disposed on the thin metal layer.

[0167] When the pixel electrode 210 is a reflective electrode and the counter electrode 230 is a transparent electrode, light emitted from the intermediate layer 220 can be emitted toward the counter electrode 230, making the display device a top-emitting type display device. When the pixel electrode 210 is a transparent electrode or a semi-transparent electrode and the counter electrode 230 is a reflective electrode, light emitted from the intermediate layer 220 can be emitted toward the substrate 100, making the display device a bottom-emitting type display device. However, the embodiments are not limited to these. The display device can be a dual-emitting type display device that can emit light in two directions corresponding to its top and bottom sides.

[0168] In an embodiment, the counter electrode 230 may be arranged or disposed across the entire surface of the second display area DA2, and the edge portion of the counter electrode 230 may be positioned or disposed in the non-display area NDA. The counter electrode 230 may be integrally formed in the main pixel PXm positioned or disposed in the second display area DA2 (e.g., formed in an organic light-emitting diode OLED) to correspond to the pixel electrode 210.

[0169] The counter electrode 230 can be provided or disposed in a sub-pixel PXa located or disposed in the first display area DA1. However, since the first display area DA1 may include a transmissive area TA and a sub-pixel area PA1 where the sub-pixel PXa can be located or disposed, portions of the counter electrode 230 may not be provided or may be disposed in some areas corresponding to the transmissive area TA. In the case of a top-emitting display device, light can be emitted toward the counter electrode 230, but the transmittance of the transmissive area TA will be partially reduced due to the counter electrode 230. Therefore, by not providing or disposing of the counter electrode 230 in the areas corresponding to the transmissive area TA, the transmittance of the transmissive area TA can be improved.

[0170] For this purpose, the counter electrode 230 arranged or disposed in the first display area DA1 can have a patterned shape for each sub-pixel area PA1. The counter electrode 230 positioned or disposed in the first display area DA1 can be formed by laser ablation by removing some areas corresponding to the transmission area TA, or by patterning with a fine metal mask (FMM). In the following embodiments, it can be assumed that the counter electrode 230 can be formed in the first display area DA1 by patterning with an FMM mask.

[0171] Figure 9 This is a plan view showing a portion of the first display area according to an embodiment. Figure 10 It is along Figure 9 A schematic cross-sectional view of the first display area intercepted by line B-B'.

[0172] Reference Figure 9 and Figure 10 The first display area DA1 may include a sub-pixel area PA1 and a transmissive area TA, and the sub-pixel PXa may be arranged or set in the sub-pixel area PA1. For example... Figure 9 As shown, the sub-pixel region PA1 may include a first pixel region PA1-1 and a second pixel region PA1-2. The first pixel PXa1 may be arranged or set in the first pixel region PA1-1, and the second pixel PXa2 may be arranged or set in the second pixel region PA1-2.

[0173] In an embodiment, a first pair of electrodes 230a may be provided or disposed in a first pixel region PA1-1, and a second pair of electrodes 230b may be provided or disposed in a second pixel region PA1-2. The first pair of electrodes 230a may be arranged or configured to correspond to the first pixel region PA1-1, and the second pair of electrodes 230b may be arranged or configured to correspond to the second pixel region PA1-2. In this case, the shapes of the first pair of electrodes 230a and the second pair of electrodes 230b may be similar to or the same as each other.

[0174] The first pixel PXa1 arranged or disposed in the first pixel region PA1-1 may include a first pair of electrodes 230a integrally formed in the first pixel region PA1-1.

[0175] The second pixel PXa2 arranged or disposed in the second pixel region PA1-2 may include a second pair of electrodes 230b integrally formed in the second pixel region PA1-2.

[0176] Each of the first pixel region PA1-1 and the second pixel region PA1-2 can be set to multiple. In this case, the first pixel region PA1-1 and the second pixel region PA1-2 can be arranged or set in various ways. For example, as Figure 9 As shown, some of the first pixel regions PA1-1 can be arranged or positioned linearly in the first direction DR1, and some of the second pixel regions PA1-2 can be arranged or positioned in a different row than some of the first pixel regions PA1-1. In this case, the first pixel regions PA1-1 and the second pixel regions PA1-2 can be arranged or positioned to cover or overlap the transmission region TA. For example, the first pixel regions PA1-1 and the second pixel regions PA1-2 can be arranged or positioned in a zigzag shape. In an embodiment, the first pixel regions PA1-1 and the second pixel regions PA1-2 can be arranged or positioned in the same row. In this case, each first pixel region PA1-1 and each second pixel region PA1-2 can be arranged or positioned alternately. In an embodiment, the first pixel regions PA1-1 and the second pixel regions PA1-2 can be arranged or positioned in different rows. In this case, some of the first pixel regions PA1-1 and some of the second pixel regions PA1-2 arranged or positioned in a row can be spaced apart from each other in the second direction DR2, and can be arranged or positioned linearly in the first direction DR1. In the above case, the first pixel region PA1-1 and the second pixel region PA1-2 can be arranged or set to be spaced apart from each other, and each first pixel region PA1-1 and each second pixel region PA1-2 that are adjacent to each other can be non-overlapping.

[0177] First pixel region PA1-1 and second pixel region PA1-2 can be electrically connected to each other through a connection region CTA. In this case, bridging electrodes 230c, which will be described below, can be arranged or disposed in the connection region CTA to electrically connect the counter electrodes on the spaced-apart pixel regions. In this case, a connection region CTA can be provided or disposed, and the bridging electrodes 230c arranged or disposed in the connection region CTA can electrically connect at least two pixel regions to each other. For example, some of the bridging electrodes 230c can electrically connect the first pair of electrodes 230a in the first pixel region PA1-1 to each other. Other bridging electrodes 230c can electrically connect the second pair of electrodes 230b in the second pixel region PA1-2 to each other. The remaining bridging electrodes 230c can electrically connect the first pair of electrodes 230a of the first pixel region PA1-1 and the second pair of electrodes 230b of the second pixel region PA1-2, which can be spaced apart from each other. In an embodiment, the bridging electrodes 230c can electrically connect the first pair of electrodes 230a and the second pair of electrodes 230b, which are spaced apart from each other. In an embodiment, the bridging electrode 230c can electrically connect adjacent pair electrodes to each other. In this case, the bridging electrode 230c is not limited to the above and can have any structure in which at least two of the first pair electrodes 230a and the second pair electrodes 230b are electrically connected to each other.

[0178] In this case, the first pair of electrodes 230a can be arranged or configured to correspond to the first pixel region PA1-1, and the second pair of electrodes 230b can be arranged or configured to correspond to the second pixel region PA1-2.

[0179] In the above case, each first pair of electrodes 230a and each second pair of electrodes 230b can be electrically connected via bridging electrodes 230c as described above.

[0180] The third pair of electrodes 230d can be arranged or disposed on the entire surface of the second display area DA2. In this case, the third pair of electrodes 230d can be electrically connected to at least one of the first pair of electrodes 230a, the second pair of electrodes 230b, and the bridging electrode 230c. The first pair of electrodes 230a, the second pair of electrodes 230b, the third pair of electrodes 230d, and the bridging electrode 230c described above can be integrally formed with each other. In the following, for ease of description, a detailed description of an example in which the third pair of electrodes 230d can be electrically connected to at least one of the bridging electrodes 230c will be given.

[0181] The bridging electrode 230c described above can be arranged or disposed on and in contact with the respective layers. For example, the bridging electrode 230c can be arranged or disposed on the functional layers (not shown) of the intermediate layers 220a and / or 220b. In an embodiment, the bridging electrode 230c can be arranged or disposed on the pixel defining layer 119. In the following, for ease of description, a detailed description of examples in which the bridging electrode 230c can be arranged or disposed on the pixel defining layer 119 will be given. In this case, the pixel electrodes 210a and / or 210b may not be arranged or may be disposed between the bridging electrode 230c and the substrate 100.

[0182] The thickness of the bridging electrode 230c described above can vary along its length. In this case, the length direction of the bridging electrode 230c can be the direction from one pair of electrodes electrically connected to each other through the bridging electrode 230c to another pair of electrodes. For example, the length direction of the bridging electrode 230c can be from... Figure 9 The direction from one of the first pair of electrodes 230a and the second pair of electrodes 230b to the other of the first pair of electrodes 230a and the second pair of electrodes 230b. The thickness of the bridging electrode 230c can be measured by cutting in a direction perpendicular to the length direction of the bridging electrode 230c. For example, in Figure 10 In this context, the thickness of the bridging electrode 230c can be the vertical distance from the upper surface of the pixel defining layer 119 on which the bridging electrode 230c can be arranged or disposed to the upper surface of the bridging electrode 230c.

[0183] In the above scenario, the thickness of the bridging electrode 230c can vary along its length. In this case, the thickness of the bridging electrode 230c can be greatest or thickest at one or more portions between the first pair of electrodes 230a and the second pair of electrodes 230b, and the bridging electrode 230c can be a non-uniform layer. For example, in an embodiment, the thickness of the bridging electrode 230c can be greatest at only one portion along its length. In this case, the thickness of the bridging electrode 230c can decrease from its thickest portion toward both sides. For example, the thickest portion of the bridging electrode 230c can be arranged or disposed between the first pair of electrodes 230a and the second pair of electrodes 230b, and the thinnest portion of the bridging electrode 230c can be a portion overlapping at least one of the first pair of electrodes 230a and the second pair of electrodes 230b. In an embodiment, the bridging electrode 230c may have at least two portions, each having a maximum thickness. In this case, the thickness of the bridging electrode 230c may decrease from its thickest portion toward both sides of the thickest portion. Alternatively, the thickness of the bridging electrode 230c may increase from its thinnest portion toward both sides of the thinnest portion. In the above case, the thickness of the bridging electrode 230c may decrease from its thickest portion toward its thinnest portion.

[0184] The maximum or thickest thickness of the bridging electrode 230c may be equal to (or substantially equal to) the maximum or thickest thickness of at least one of the first pair of electrodes 230a and the second pair of electrodes 230b.

[0185] In the above scenario, within the first display area DA1, the first pair of electrodes 230a and the second pair of electrodes 230b can be electrically connected to each other like a mesh or grid via bridging electrodes 230c. For example, since the transmission region TA can be arranged or disposed between the electrically connected first pair of electrodes 230a, the second pair of electrodes 230b, and the bridging electrodes 230c (i.e., the transmission region TA can be surrounded by the electrically connected first pair of electrodes 230a, the second pair of electrodes 230b, and the bridging electrodes 230c), and individual electrodes can be omitted or disposed within the transmission region TA, the light transmittance of the first display area DA1 can be ensured, and voltage can also be applied to the pixel areas arranged or disposed within the first display area DA1.

[0186] Figure 11 This is a schematic cross-sectional view illustrating a display device manufacturing apparatus according to an embodiment. Figure 12 It is shown Figure 11A plan view of a portion of the mask shown. Figure 13 It is along Figure 12 A schematic cross-sectional view of a portion of the mask sheet taken by line C-C'.

[0187] Reference Figures 11 to 13 Display device 1 can be manufactured using display device manufacturing equipment 400 (see...) Figure 1 The main pixel (not shown).

[0188] Display device manufacturing equipment 400 may include a chamber 410, a mask assembly 420, a first support portion 430, a second support portion 440, a deposition source 450, a magnetic force generating portion 460, a visual portion (or multiple visual portions) 470, and a pressure regulating portion 480.

[0189] The chamber 410 may have a space formed therein, and a portion of the chamber 410 may be formed to be open. In this case, a gate valve 411 may be arranged or provided at the open portion of the chamber 410 to be opened and closed.

[0190] Mask assembly 420 can be selectively arranged or disposed within chamber 410. In this case, mask assembly 420 may include mask frame 421 and mask sheet 422. Mask frame 421 can be formed by connecting frames to each other and may include openings therein. In this case, mask frame 421 may include one opening or multiple openings separated from each other. In this case, mask frame 421 may be formed in a grid shape like a window frame or in other shapes within the spirit and scope of the disclosure. Mask sheet 422 can be fixed to mask frame 421 in a tensioned state. In this case, mask sheet 422 may have openings arranged or configured to allow deposited material to pass through it.

[0191] Mask sheet 422 may include mask sheet body 422f, ribs 422d, and shielding portion 422e. In this case, shielding portion 422e may include at least one first opening portion 422a through which deposition material can pass to form the first pair of electrodes (not shown) or the second pair of electrodes (not shown) described above. Shielding portion 422e may include at least one second opening portion 422b for forming the bridging electrodes (not shown) described above. In this case, when the second opening portions 422b are provided, the shapes of the second opening portions 422b may be similar, identical, or different from each other. The planar area of ​​each second opening portion 422b may be smaller than the planar area of ​​the first opening portion 422a. Mask sheet body 422f may include a third opening portion 422c for forming the third pair of electrodes (not shown) described above.

[0192] The mask body 422f may have a third opening 422c therein, and a rib 422d may be arranged or configured to span the third opening 422c to connect the shielding portion 422e to the mask body 422f. The width of the rib 422d (e.g., the width of the rib 422d in...) Figure 12 The width (measured in the y-axis direction) can be formed to be small or thin, thereby preventing the deposited material from not being deposited on the display substrate D arranged or set behind the rib 422d.

[0193] The shielding portion 422e can be formed in a plate shape, and can completely block the deposited material to prevent it from depositing onto the display substrate D. In this case, the deposited material can pass through the first opening portion 422a and the second opening portion 422b arranged or disposed in the shielding portion 422e to form a first display area (not shown) of the display substrate D. As an example, the deposited material passing through the first opening portion 422a can form a first pair of electrodes and a second pair of electrodes, and the deposited material passing through the second opening portion 422b can form a bridging electrode.

[0194] The shielding portion 422e can be formed with different thicknesses. For example, the thickness of the portion of the shielding portion 422e where the first opening portion 422a can be arranged or disposed and the thickness of the portion of the shielding portion 422e where the second opening portion 422b can be arranged or disposed can be different from each other. In this case, in the portion forming the edge of the first opening portion 422a adjacent to the edge of the second opening portion 422b, the thickness of the shielding portion 422e at the edge of the first opening portion 422a adjacent to the edge of the second opening portion 422b can be smaller than the thickness of the shielding portion 422e at the edge of the first opening portion 422a not adjacent to the edge of the second opening portion 422b. For example, as Figure 13As shown, the thickness of the portion of the shielding portion 422e where the second opening portion 422b can be arranged or disposed can be smaller than the thickness of the portion of the shielding portion 422e where the first opening portion 422a can be arranged or disposed. In this case, because the deposited material passing through the second opening portion 422b can reach the rear of the shielding portion 422e where the second opening portion 422b can be arranged or disposed, the disconnection of the bridging electrode can be prevented when the deposited material passing through the second opening portion 422b forms a bridging electrode. The thickest portion of the bridging electrode can be arranged or disposed on the display substrate D to correspond to the center of the second opening portion 422b, and the thinnest portion of the bridging electrode can be arranged or disposed on the display substrate D to correspond to the rear of the shielding portion 422e arranged or disposed around the second opening portion 422b. For example, the thinnest portion of the bridging electrode may be arranged or disposed in the rear portion of the shielding portion 422e between adjacent second opening portions 422b, and may also be arranged or disposed in the rear portion of the shielding portion 422e between adjacent first opening portions 422a and second opening portions 422b.

[0195] The first opening 422a, the second opening 422b, and the third opening 422c can have various shapes. For example, an example shape of the first opening 422a, the shape of the second opening 422b, and the shape of the third opening 422c can include at least one of a circular shape, a polygonal shape, and an elliptical shape, or other shapes within the spirit and scope of the disclosure. In the following, for ease of description, a detailed description will be given primarily of the case where the shape of the first opening 422a and the shape of the third opening 422c can be quadrilaterals and the shape of the second opening 422b can be circular.

[0196] The shape of the first opening 422a can be formed to correspond to the first pixel region PA1-1 or the second pixel region PA1-2. For example, the shape of the first opening 422a can include a rectangular shape, a square shape, or a rhombus shape. In this case, the deposition material can pass through the first opening 422a and can be deposited onto the display substrate D to form a first pair of electrodes or a second pair of electrodes. In this case, when the first openings 422a are provided, the first openings 422a can be sufficiently spaced apart from each other, such that after the deposition material passing through each first opening 422a can be deposited onto the display substrate D, the first openings 422a can be unconnected to each other. In this case, the edge portions of the first openings 422a can be chamfered.

[0197] As described above, the second opening portion 422b can be arranged or disposed between the first opening portions 422a. For example, the second opening portion 422b can be arranged or disposed between adjacent first opening portions 422a. In this case, at least one second opening portion 422b can be arranged or disposed. When the second opening portion 422b is disposed, the second opening portion 422b can be arranged linearly or disposed between two first opening portions 422a.

[0198] The third opening portion 422c can be arranged or disposed at the mask body 422f, and the shielding portion 422e can be arranged or disposed within the third opening portion 422c. In this case, the deposition material passing through the third opening portion 422c can be deposited onto the display substrate D to form a third pair of electrodes. In this case, the third pair of electrodes can be electrically connected to at least one of the bridging electrodes, and can be arranged or configured to surround the first pair of electrodes and the second pair of electrodes in a plane.

[0199] The display substrate D can be mounted on the first support portion 430. In this case, the first support portion 430 can adjust the position of the display substrate D. For example, the first support portion 430 may include a UVW stage.

[0200] The mask assembly 420 can be mounted on the second support portion 440. In this case, similar to the first support portion 430, the second support portion 440 can adjust the position of the mask assembly 420.

[0201] After receiving the deposited material, the deposition source 450 can evaporate or sublimate the deposited material and supply the evaporated or sublimated deposited material to the chamber 410. In this case, the deposition source 450 may include a heater located therein, and the deposited material can be melted or sublimated by heating the deposited material in the deposition source 450 through the operation of the heater. In this case, the deposition source 450 may be arranged or located at approximately the center or edge of the chamber 410. In the following, for ease of description, a detailed description of the case where the deposition source 450 may be arranged or located at the edge of the chamber 410 will be given primarily. It will be understood that more than one deposition source 450 may be present.

[0202] The magnetic force generating portion 460 can be arranged or disposed in the chamber 410 to make the display substrate D and the mask assembly 420 in close contact with each other. In this case, the magnetic force generating portion 460 may include an electromagnet or a permanent magnet for generating magnetic force.

[0203] A visual section (or multiple visual sections) 470 may be arranged or positioned in the chamber 410 to capture the positions of the mask assembly 420 and the display substrate D. In this case, the visual section (or multiple visual sections) 470 may capture alignment marks, etc., of at least one of the mask assembly 420 and the display substrate D.

[0204] The pressure regulating section 480 can be connected to the chamber 410 to regulate the pressure inside the chamber 410. In this case, the pressure regulating section 480 may include a connecting pipe 481 connected to the chamber 410 and a pump 482 disposed or provided at the connecting pipe 481.

[0205] The main pixel (not shown) or display device (not shown) can be manufactured by display device manufacturing equipment 400. In this case, display device manufacturing equipment 400 can manufacture the main pixel or display device (not shown) according to the embodiments described above and below. However, in the following, for ease of description, the manufacturing process of display device manufacturing equipment 400 will be mainly described as including... Figure 9 and Figure 10 A detailed description of the main pixels (not shown) in the pixel region shown. In the following text, with... Figure 9 and Figure 10 The same reference numerals in the figures indicate the same components or elements.

[0206] For example, a mask assembly 420 and a display substrate D including a substrate (not shown) having an insulating layer (not shown) formed thereon can be arranged or disposed in a cavity 410. In this case, the substrate can be in a state where pixel electrodes (not shown) and organic light-emitting diodes (not shown) and organic emitting layers (not shown) are formed on the substrate.

[0207] After the display substrate D is mounted on the first support portion 430 and the mask assembly 420 is mounted on the second support portion 440, the substrate 100 and the mask assembly 420 can be photographed through the visual portion (or multiple visual portions) 470. Afterward, the display substrate D and the mask assembly 420 can be aligned.

[0208] When the deposition source (or multiple deposition sources) 450 operates to supply deposition material, the deposition material can pass through the first opening portion 422a, the second opening portion 422b, and the third opening portion 422c of the mask 422 to be deposited onto the pixel defining layer and the organic light-emitting layer of the display substrate D. In this case, the deposition material passing through the first opening portion 422a can form the first pair of electrodes 230a and the second pair of electrodes 230b as described above, the deposition material passing through the second opening portion 422b can form the bridging electrode 230c, and the deposition material passing through the third opening portion 422c can form the third pair of electrodes 230d.

[0209] When deposited as described above, the first pair of electrodes 230a and the second pair of electrodes 230b can be arranged or configured in a serpentine (or zigzag) shape.

[0210] In this configuration, the deposited material passing through the second opening 422b can connect the first pair of electrodes 230a to the second pair of electrodes 230b by forming bridging electrodes 230c of different thicknesses at their respective portions. The bridging electrodes 230c, arranged or disposed at the outer portion of the first display area DA1, can electrically connect the first pair of electrodes 230a or the second pair of electrodes 230b to the third pair of electrodes 230d. In this configuration, the first pair of electrodes 230a, the second pair of electrodes 230b, the third pair of electrodes 230d, and the bridging electrodes 230c can be integrally formed to be electrically connected to each other.

[0211] Therefore, counter electrodes arranged or disposed on the display substrate D can be electrically connected to each other by bridging electrode 230c in a single process. By depositing deposition material onto the display substrate D while maintaining a constant position of the display substrate D and mask assembly 420 without changing the mask assembly 420 during the formation of each counter electrode and bridging electrode 230c, errors in the deposition material pattern caused by changes in the position of the mask assembly 420 or alignment errors between the mask assembly 420 and the display substrate D can be reduced.

[0212] Figures 14A to 14C It is shown Figure 11 A plan view of an embodiment of the second opening portion shown.

[0213] Reference Figures 14A to 14C The second opening portion 422b can be configured as described above. In this case, at least one of the shapes and sizes of some of the second opening portions 422b may be similar to, the same as, or different from the shapes and sizes of at least one of the other second opening portions 422b.

[0214] For example, such as Figure 14AAs shown, the second opening portion 422b, arranged or positioned between the two first opening portions (not shown), can all have the same shape and the same size. For example, Figure 14A Each of the second opening portions 422b shown can be circular, and the diameters R1 and R2 (or radii) of the second opening portions 422b can be all the same or approximately the same.

[0215] In an embodiment, such as Figure 14B As shown, the size and shape of some second opening portions 422b arranged or disposed between two first opening portions may differ from the size and shape of the other second opening portions 422b. For example, the second opening portion 422b arranged or disposed in the middle of the second opening portion 422b may be elliptical, while the other second opening portions 422b in the second opening portion 422b may be circular.

[0216] In an embodiment, such as Figure 14C As shown, the dimensions of the second openings 422b arranged or disposed between the two first openings can all be different from each other. In this case, the distances between the second openings 422b can also be different from each other. The second openings 422b can all be circular, and the diameter R2 of the second opening 422b arranged or disposed in the middle of the second openings 422b can be larger or smaller than the diameter R1 of the second opening 422b arranged or disposed in the first second opening. The diameter R3 of the second opening 422b arranged or disposed in the second opening 422b can be smaller than the diameter of the other second openings 422b.

[0217] The arrangement, size, and shape of the second opening 422b are not limited to those described above and can be combined in various ways. For example, it is also possible to select and arrange or set them. Figures 14A to 14C The second opening portion 422b shown has different shapes and different sizes.

[0218] Multiple second opening portions 422b may have different shapes or different sizes, but they may all be arranged or positioned linearly. For example, the center of the second opening portion 422b may be arranged or positioned in a straight line.

[0219] In addition to being arranged or configured linearly, the second opening portion 422b can also be arranged or configured in various ways. For example, the second opening portion 422b can be arranged or configured in a curved shape or a Z-shaped shape. In this case, the arrangement of the second opening portion 422b is not limited to the above, and the second opening portion 422b can be arranged or configured to provide a transmission area of ​​maximum size (not shown).

[0220] Figure 15 This is a perspective view showing a display device according to an embodiment. Figure 16 It is shown Figure 15 The diagram shows a plan view of the counter electrode of the display panel of the display device. Figure 17 It shows the manufacturing process. Figure 16 A plan view of a portion of the mask sheet of the display panel shown.

[0221] Reference Figures 15 to 17 Display device 1 can be with Figure 1 The display device shown is similar. In this case, display device 1 may include a first display area DA1, a second display area DA2, and a non-display area NDA.

[0222] The first display area DA1 can be the same as that of display device 1. Figure 1 The first display area DA1 is a different region from the second display area DA2. In this case, the first display area DA1 can be similar in shape to the second display area DA2. For example, the first display area DA1 can be formed as elongated in the x-axis direction. The first display area DA1 can have a higher transmittance than the second display area DA2, and the resolution of the first display area DA1 can be lower than the resolution of the second display area DA2. In this case, as described above, sub-pixels PXa can be arranged or disposed in the first display area DA1, and main pixels PXm can be arranged or disposed in the second display area DA2. The first display area DA1 may include a transmissive region TA in which sub-pixels PXa may or may not be arranged.

[0223] Components can be arranged or positioned in various locations within the first display area DA1. In this case, at least one component can be arranged or positioned within the first display area DA1. For example, when components can be arranged or positioned within the first display area DA1, they can be arranged or positioned to be spaced apart from each other within the first display area DA1.

[0224] The first display area DA1 may include a first pixel area PA1-1, a second pixel area PA1-2, and a transmissive area TA. In this case, the first pixel area PA1-1 and the second pixel area PA1-2 may alternate with each other, and the transmissive area TA may be defined by the first pixel area PA1-1 and the second pixel area PA1-2 that are adjacent to each other. For example, the transmissive area TA may be shielded by the first pixel area PA1-1 and the second pixel area PA1-2 that are connected to each other. A first pair of electrodes 230a may be arranged or disposed in the first pixel area PA1-1, and a second pair of electrodes 230b may be arranged or disposed in the second pixel area PA1-2. The first pixel area PA1-1 and the second pixel area PA1-2 may be electrically connected to each other through a connecting area CTA. In this case, the first pair of electrodes 230a of the first pixel area PA1-1 and the second pair of electrodes 230b of the second pixel area PA1-2 may be electrically connected through a bridging electrode 230c of the connecting area CTA. The first pixel PXa1 (see...) Figure 9 ) can be arranged or set in the first pixel area PA1-1, and the second pixel PXa2 (see Figure 9 It can be arranged or set in the second pixel area PA1-2.

[0225] The third pair of electrodes 230d can be arranged or disposed in the second display area DA2. In this case, the third pair of electrodes 230d can be arranged or disposed to cover the entire surface of the second display area DA2 or superimpose on the entire surface of the second display area DA2. The third pair of electrodes 230d can be electrically connected to at least one of the first pair of electrodes 230a, the second pair of electrodes 230b, and the bridging electrode 230c. In the following description, for ease of description, a detailed description of the case where the third pair of electrodes 230d can be electrically connected to the bridging electrode 230c will be given primarily.

[0226] It can be done Figure 11 The display device manufacturing equipment 400 shown is used to manufacture the display device 1 described above. In this case, the mask 422 can be used with... Figure 17 The mask 422 shown is the same as or similar to the one shown.

[0227] The mask 422 may include a mask body 422f and a shielding portion 422e. In this case, a third opening portion 422c may be arranged or disposed in the mask body 422f. For example, the third opening portion 422c may have a quadrilateral shape to correspond to the second display area DA2.

[0228] The shielding portion 422e may have a shape corresponding to the first display area DA1. In this case, the first opening portion 422a and the second opening portion 422b may be arranged or disposed in the shielding portion 422e. The first opening portion 422a may have a shape corresponding to each of the first pair of electrodes 230a and the second pair of electrodes 230b and may be arranged or disposed at each position corresponding to each of the first pair of electrodes 230a and the second pair of electrodes 230b. In this case, the edge of the first opening portion 422a may be chamfered. For example, the edge of the first opening portion 422a may be rounded or inclined in a certain direction. At least one second opening portion 422b may be arranged or disposed between the first opening portions 422a. The second opening portions 422b may be formed in a point shape and arranged or disposed linearly. In this case, the shape of the second opening portion 422b may include various shapes such as circular, elliptical, and polygonal shapes. However, the disclosure is not limited thereto.

[0229] In the above scenario, the first pair of electrodes 230a, the second pair of electrodes 230b, the bridging electrode 230c, and the third pair of electrodes 230d can be formed by the display device manufacturing equipment 400. In this case, the first pair of electrodes 230a and the second pair of electrodes 230b can be spaced apart from each other so as not to overlap, and the bridging electrode 230c can electrically connect the spaced-apart pairs of electrodes in the first display area DA1. The third pair of electrodes 230d can be arranged or disposed in the second display area DA2.

[0230] Therefore, in the display device 1, the counter electrodes formed in the first display area DA1 and the second display area DA2 can be electrically connected to each other.

[0231] Figure 18 This is a plan view showing a portion of the counter electrode of the main pixel of a display device according to an embodiment.

[0232] Reference Figure 18 The display device (not shown) may include a first display area DA1 and a second display area DA2. In this case, the shapes of the first display area DA1 and the second display area DA2 may be similar to... Figure 1 or Figure 12 The shapes shown are the same or similar.

[0233] One of the first pair of electrodes 230a and the second pair of electrodes 230b may be arranged or disposed in each pixel region of the first display area DA1. In this case, the first pair of electrodes 230a and the second pair of electrodes 230b may be spaced apart from each other.

[0234] The first pair of electrodes 230a and the second pair of electrodes 230b described above can be arranged or configured in various shapes. For example, the first pair of electrodes 230a and the second pair of electrodes 230b can be irregularly arranged or configured in the first display area DA1. In an embodiment, the first pair of electrodes 230a can be arranged or configured in the same row and aligned in both the row and column directions, and the second pair of electrodes 230b can be arranged or configured in the same row and aligned in both the row and column directions. In an embodiment, the first pair of electrodes 230a and the second pair of electrodes 230b can be arranged or configured in a zigzag shape relative to each other.

[0235] As described above, the first pair of electrodes 230a and the second pair of electrodes 230b, which are spaced apart from each other, can be electrically connected by a bridging electrode 230c. In this case, the bridging electrode 230c can be a straight line, a curve, a partially curved line, etc., within the disclosed spirit and scope. Figure 18 As shown, the bridging electrode 230c may not connect adjacent counter electrodes. However, for ease of description, the following will primarily focus on... Figure 18 The example shown is described in detail, in which the bridging electrode 230c electrically connects adjacent counter electrodes to each other.

[0236] The bridging electrode 230c can electrically connect adjacent first pair of electrodes 230a. In this case, the bridging electrode 230c can be arranged or positioned in the same direction as the arrangement of the first pair of electrodes 230a. The bridging electrode 230c can also electrically connect adjacent first pair of electrodes 230a and second pair of electrodes 230b. In this case, the bridging electrode 230c can electrically connect the edge of the first pair of electrodes 230a to the edge of the second pair of electrodes 230b.

[0237] Counter electrodes arranged or set on the entire surface of the master pixel described above can be integrally formed by connecting them to each other.

[0238] Therefore, in the display device, all the counter electrodes formed in the first display area DA1 and the second display area DA2 can be electrically connected to each other via the bridging electrode 230c. The display device can increase light transmittance by ensuring a sufficient transmission area TA in the first display area DA1.

[0239] In the display device according to the embodiment, the display area can be extended so that images can also be represented in an area where components can be arranged or set.

[0240] The display device manufacturing apparatus and method according to the embodiments can simplify the manufacturing process by simultaneously connecting the counter electrodes of the display area in which components can be arranged or disposed.

[0241] The display device manufacturing apparatus and method according to the embodiments can arrange or set various types of components in the display device and can improve the transmittance of the area in which the components can be arranged or set.

[0242] However, the scope of disclosure is not limited to these effects.

[0243] It should be understood that the embodiments described herein should be considered only in a descriptive sense and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope defined by the following claims.

Claims

1. A display device, the display device comprising: The substrate includes: a first display area, including a transmissive area and a plurality of pixel areas spaced apart from each other; and a second display area, adjacent to the first display area; A pixel, disposed on each of the plurality of pixel regions and comprising: a pixel electrode; a counter electrode; and an intermediate layer disposed between the pixel electrode and the counter electrode of each pixel in the plurality of pixels; and A bridging electrode electrically connects the counter electrodes of pixels in two pixel regions that are spaced apart from each other. The thickness of the bridging electrode varies between the counter electrodes that are electrically connected to each other through the bridging electrode.

2. The display device according to claim 1, wherein, The thickest portion of the bridging electrode is disposed between the counter electrodes that are electrically connected to each other through the bridging electrode.

3. The display device according to claim 1, wherein, Each of the counter electrodes electrically connected to each other via the bridging electrode is integral with the bridging electrode.

4. The display device according to claim 1, wherein, The bridging electrode electrically connects adjacent counter electrodes among the multiple counter electrodes of the plurality of pixels.

5. The display device according to claim 1, wherein the display device further comprises a component disposed in the first display area.

6. The display device according to claim 1, wherein, The transmittance of the first display area is different from that of the second display area.

7. An apparatus for manufacturing a display device, the apparatus comprising: A chamber, in which the display substrate is disposed; A deposition source is disposed in the chamber and supplies deposition material to the display substrate; as well as A mask assembly is disposed within the chamber and between the deposition source and the display substrate. The mask assembly includes a mask frame and a mask sheet, the mask sheet being disposed at the mask frame and including a plurality of first openings through which the deposited material passes and at least one second opening between two of the plurality of first openings, the at least one second opening having an area different from the area of ​​the plurality of first openings.

8. The device according to claim 7, wherein, The at least one second opening portion includes a plurality of second opening portions, and The plurality of second opening portions are linearly disposed between the two first opening portions.

9. The device according to claim 7, wherein, The at least one second opening portion includes a plurality of second opening portions, and At least two of the plurality of second opening portions have different areas.

10. The device according to claim 7, wherein, The plurality of first opening portions have an area larger than the area of ​​the at least one second opening portion.

11. The device according to claim 7, wherein, The plurality of first openings are quadrilateral, and the at least one second opening is circular.

12. The device according to claim 11, wherein, The at least one second opening portion includes a plurality of second opening portions, and The plurality of second openings are linearly arranged between the adjacent and facing edges of the two first openings.

13. The device according to claim 7, wherein, The at least one second opening portion includes a plurality of second opening portions, and The mask sheet has a portion located between adjacent second opening portions of the plurality of second opening portions, wherein the thickness of said portion of the mask sheet is less than the thickness of another portion of the mask sheet.

14. A method for manufacturing a display device, the method comprising: The substrate and mask assembly will be displayed within the chamber; Align the position of the display substrate with the position of the mask assembly; Multiple counter electrodes, each corresponding to a plurality of pixel regions spaced apart from each other, are formed in the first display area of ​​the display substrate; as well as A bridging electrode is formed that electrically connects two of the plurality of counter electrodes.

15. The method of claim 14, wherein the step of forming the bridging electrode comprises: The bridging electrode with varying thickness is formed between the electrically connected counter electrodes.

16. The method of claim 14, wherein the step of forming the bridging electrode comprises: The thickest portion of the bridging electrode is formed between the electrically connected counter electrodes.

17. The method of claim 14, further comprising: When the plurality of electrode pairs and the bridging electrode are formed in the first display area, another electrode pair is formed in the second display area of ​​the display substrate.

18. The method of claim 14, wherein the steps of forming the plurality of counter electrodes and forming the bridging electrode comprise: Each of the plurality of counter electrodes is integrally formed with the bridging electrode.

19. The method of claim 17, wherein, The transmittance of the first display area is different from that of the second display area.

20. The method of claim 14, further comprising setting a component in the first display area.

Images