Dual-redundancy design-based circuit integration device for plasma ignition

Abstract

The invention discloses a plasma ignition circuit integration device adopting a dual-redundancy design, relates to the technical field of combustion chambers of gas turbines, and aims to solve the problems that an existing plasma ignition circuit adopting a multi-redundancy or dual-redundancy power supply is long in switching time and poor in current sharing precision. The device comprises a detection module, an intelligent selection module, a load balancing module and a super capacitor compensation module, the detection module is used for collecting state data of two power supplies, sending the state data to the load balancing module, generating a switching control signal according to the state data, and sending the switching control signal to the intelligent selection module; the intelligent selection module executes power supply switching based on the MOSFET switch according to the switching control signal; the load balancing module generates a trigger signal according to the state data and dynamically adjusts the output impedance of the double-path power supply to realize current balanced distribution; and the super capacitor compensation module provides instantaneous energy injection for the load under the action of the trigger signal.

Description

Technical Field

[0001] This invention relates to the field of gas turbine combustion chamber technology, and more specifically to a plasma ignition circuit integrated device with a dual-redundancy design. Background Technology

[0002] Plasma ignition technology uses high-energy pulses to break down air, causing the working fluid between electrodes to decompose and ionize, forming a large number of active particles. This generates a high-temperature, high-speed plasma jet, forming an initial ignition nucleus, thereby achieving rapid and stable ignition in the combustion chamber. As a novel ignition technology, plasma ignition overcomes many disadvantages of traditional electric ignition technology. Especially in the application of high-altitude secondary ignition in aero-engines, it offers advantages such as a large ignition area, high ignition energy, better coupling of ignition energy with the fuel-air mixture, short ignition delay time, and high ignition success rate.

[0003] To improve the stability of plasma ignition devices, dual-redundant or multi-redundant power supplies are typically used, switching to another power supply when one fails. However, current redundant power supply designs generally suffer from long switching times and poor current sharing accuracy. The root causes lie in three major technical bottlenecks: first, reliance on slow switching devices such as mechanical relays; second, the use of open-loop or simulated current sharing techniques; and third, compensation schemes based on large-capacity electrolytic capacitors. These architectural flaws prevent the system from achieving timely dynamic responses. Summary of the Invention

[0004] The purpose of this invention is to solve or alleviate the above-mentioned defects of the prior art and to provide a plasma ignition circuit integrated device with a dual redundancy design.

[0005] The plasma ignition circuit integration device of the present invention, employing a dual-redundancy design, includes a detection module, an intelligent selection module, a load balancing module, and a supercapacitor compensation module. The detection module collects status data from two power supplies and sends this data to the load balancing module. Simultaneously, it generates a switching control signal based on the status data and sends this signal to the intelligent selection module. The intelligent selection module performs power switching based on a MOSFET switch according to the switching control signal. The load balancing module generates a trigger signal based on the status data and dynamically adjusts the output impedance of the two power supplies to achieve balanced current distribution. The supercapacitor compensation module provides instantaneous energy injection to the load under the action of the trigger signal.

[0006] Optionally, the intelligent selection module includes a gate drive circuit, two MOSFET switches, and two ideal diode controllers; the two MOSFET switches are respectively located on the power paths of two power supplies; the enable terminal of the gate drive circuit is connected to the switching signal output terminal of the detection module, the two output terminals of the gate drive circuit are respectively connected to the gates of the two MOSFET switches, the two diode controllers are respectively connected in parallel across the two MOSFET switches, and the currents output from the two power supplies enter the load balancing module through the two MOSFET switches.

[0007] Optionally, the load balancing module includes an MCU microcontroller and a load balancer. The power status data input terminal of the MCU microcontroller is connected to the power status data output terminal of the detection module. The trigger signal output terminal of the MCU microcontroller is connected to the trigger signal input terminal of the supercapacitor compensation module. The PWM control signal output terminal of the MCU microcontroller is connected to the PWM control signal input terminal of the load balancer. The switching signal input terminal of the load balancer is connected to the switching signal output terminal of the intelligent selection module.

[0008] Optionally, the load balancer includes a PWM generator and a dual Buck-Boost converter; the PWM control signal input terminal of the PWM generator serves as the PWM control signal input terminal of the load balancer, and the PWM generator generates two complementary PWM drive signals according to the PWM control signal to drive the two Buck-Boost converters respectively, and the two Buck-Boost converters respectively output current to the load.

[0009] Optionally, the supercapacitor compensation module includes a supercapacitor bank, a low-resistance MOSFET switch, and a gate drive circuit. Both the load balancing module and the supercapacitor compensation module supply power to the load via a bus. The positive terminal of the supercapacitor bank is connected to the bus via the low-resistance MOSFET switch. The input terminal of the gate drive circuit is connected to the trigger signal, and the output terminal drives the gate of the low-resistance MOSFET switch.

[0010] Optionally, the PWM generator is implemented using an LM5117 controller.

[0011] Optionally, the MCU microcontroller includes a PID controller, and the MCU microcontroller generates the PWM control signal through the PID controller.

[0012] Optionally, the PID controller generates the PWM control signal based on the current data of the two power supplies.

[0013] This invention achieves seamless switching and load balancing between primary and backup power supplies through dual-power redundancy design, intelligent selectors, load balancers, and supercapacitor compensators. MOSFET switches are used to perform power switching, improving switching speed. A digital PID controller in conjunction with a Buck-Boost converter achieves current sharing, and real-time monitoring of load current during the current sharing process enables closed-loop control, improving current sharing accuracy. Replacing large-capacity electrolytic capacitors with supercapacitor banks allows for rapid load compensation during switching, resulting in timely dynamic response. These features collectively enhance the reliability and stability of the power system, making the device promising for a wide range of applications. Attached Figure Description

[0014] Figure 1 This is a front view of the housing according to an embodiment of the present invention;

[0015] Figure 2 yes Figure 1 Side view;

[0016] Figure 3 This is a schematic diagram of a plasma ignition circuit integrated device with dual redundancy design according to an embodiment of the present invention;

[0017] Figure 4 This is a schematic diagram of the structure of the intelligent selection module according to an embodiment of the present invention;

[0018] Figure 5 This is a schematic diagram of the control logic of the intelligent selection module according to an embodiment of the present invention;

[0019] Figure 6 This is a schematic diagram of the structure of a load balancing module according to an embodiment of the present invention;

[0020] Figure 7 This is a schematic diagram of the control logic of a load balancing module according to an embodiment of the present invention;

[0021] Figure 8 This is a schematic diagram of the structure of a supercapacitor compensation module according to an embodiment of the present invention;

[0022] Figure 9 This is a schematic diagram of the control logic of a supercapacitor compensation module according to an embodiment of the present invention. Detailed Implementation

[0023] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, unless otherwise specified, the following embodiments and features described therein can be combined with each other.

[0024] As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context indicates otherwise. It should be further understood that the terms “comprising,” “including,” indicate the presence of the stated feature, operation, element, component, item, kind, and / or group, but do not preclude the presence, occurrence, or addition of one or more other features, operations, elements, components, items, kinds, and / or groups. The terms “or” and “and / or” as used herein are interpreted as inclusive, or mean any one or any combination thereof. Thus, “A, B, or C” or “A, B, and / or C” means “any one of: A; B; C; A and B; A and C; B and C; A, B, and C.” Exceptions to this definition occur only when combinations of elements, functions, or operations are inherently mutually exclusive in some manner.

[0025] To address the issues of long switching times and poor current sharing accuracy in existing plasma ignition circuits that employ multiple or dual redundant power supplies, this invention provides a plasma ignition circuit integrated device with a dual redundant design. When one power supply fails, it can quickly switch power supplies or adjust the output current of the two power supplies in a timely and precise manner.

[0026] The plasma ignition circuit integration device with dual redundancy design in this application embodiment can be installed inside the housing. For example... Figure 1 and Figure 2 As shown, the housing 5 is equipped with feet 6, foot pads 7, a cover 8, a control input port 5b, a power input port 5c, a first output port 5a, and a second output port 5d. The housing 5 is made of 1.5mm thick stainless steel plate, with internal threads machined at its four corners. The feet 6 are made of flexible rubber material, and their connection to the housing 5 is provided with a rigid stainless steel internal thread structure. The bent portion of the foot pad 7 forms a 135° angle with the horizontal direction; during installation, its bent side is parallel to the long side of the bottom surface of the housing 5. The foot pad 7 is connected to the housing 5 and feet 6 by external hexagonal bolts, which mate with the internal threads of both. Ordinary washers and spring washers are sequentially placed at the connection points. Multiple ports are arranged on the side of the housing 5, such as the control input port 5b, the power input port 5c, the first output port 5a, and the second output port 5d; each port has external threads for pluggable connection of the ignition cable and input power.

[0027] Figure 3 This is a schematic diagram of a plasma ignition circuit integration device employing a dual-redundancy design according to an embodiment of the present invention. Figure 3 As shown, the plasma ignition circuit integrated device with dual redundancy design in this embodiment includes a detection module 1, an intelligent selection module 2, a load balancing module 3, and a supercapacitor compensation module 4. The detection module 1 collects real-time status data (including electrical and thermal parameters) of the dual power supplies, as well as data such as bus voltage and load current.

[0028] The load balancing module 3 includes an MCU microcontroller 31 and a load balancer 32.

[0029] The detection module 1 includes a voltage detection circuit, a current detection circuit, a temperature detection circuit, a high-speed voltage comparator, and a current-temperature comparison unit. The voltage detection circuit includes a power supply voltage divider sampling network for detecting the output voltage of two power supplies (power supply A and power supply B) and a circuit for detecting the bus voltage. The current detection circuit uses a high-precision current sampling circuit to detect the output current and load current of the two power supplies. The temperature detection circuit is used to detect the operating temperature of the two power supplies.

[0030] The detection module 1 generates a switching control signal based on the collected status data of the dual power supplies. This status data mainly includes the power supply output voltage, output current, and temperature. A high-speed voltage comparator determines whether the power supply output voltage is within a preset range. If the output voltage exceeds the preset range, a switching signal is output to the intelligent selection module 2. The current and temperature comparison unit of the detection module 1 can be implemented in hardware or software. In one implementation, the current and temperature comparison unit is implemented using a firmware algorithm embedded in the MCU microcontroller 31. The MCU microcontroller 31 samples the power supply's output current and operating temperature using an ADC and compares the sampled data with preset current and temperature ranges. If the current value exceeds the preset current range or the temperature value exceeds the preset temperature range, the MCU microcontroller 31 outputs a switching signal to the intelligent selection module 2 to ensure nanosecond-level emergency response in the event of a power supply failure.

[0031] The intelligent selection module 2 uses a MOSFET switch to switch between the main and backup power supplies according to the switching control signal. The power outputs from the two power supplies enter the load balancer 32 through the intelligent selection module 2. The MCU microcontroller 31 generates a PWM control signal and a trigger signal based on the power status data collected by the detection module 1. The load balancer 32 dynamically adjusts the output impedance of the two power supplies according to the PWM control signal to achieve balanced current distribution. Under the action of the trigger signal, the supercapacitor compensation module 4 provides instantaneous energy injection to the load at the moment of switching.

[0032] Figure 4 This is a structural schematic diagram of the intelligent selection module according to an embodiment of the present invention. Figure 4 As shown, the intelligent selection module 2 includes a first gate drive circuit 21, two first MOSFET switching transistors 22, and two diode controllers 23.

[0033] One first MOSFET switch 22 is connected in series between the load balancer 32 and one power supply, and another first MOSFET switch 22 is connected in series between the load balancer 32 and another power supply. The two first MOSFET switches 22 are used to turn the two power supply paths on or off. The input terminal of the high-speed voltage comparator is connected to the power supply voltage divider sampling network of the detection module 1, and the output terminal is connected to the enable terminal of the first gate drive circuit 21. The two output terminals of the first gate drive circuit 21 are respectively connected to the gates of the two first MOSFET switches 22. The diode controller 23 adopts an ideal diode controller, and the two diode controllers 23 are respectively connected in parallel across the two first MOSFET switches 22. The current output from the two power supplies enters the load balancer 32 through the two first MOSFET switches 22.

[0034] The power switching process is as follows Figure 5 As shown. When the detection module 1 detects that the main power supply voltage, main power supply current, or main power supply temperature exceeds the preset range, it immediately outputs a switching control signal. The intelligent selection module 2 includes a CPLD or FPGA, and detects and confirms the switching control signal through hardware logic gates (such as OR gates / NAND gates) integrated inside the CPLD or FPGA. If the confirmation is correct, it outputs a switching enable command to the state machine, which triggers the first gate drive circuit 21 to turn off the first MOSFET switch 22 of the main path and turn on the first MOSFET switch 22 of the backup path within a microsecond. At the same time, two diode controllers 23 provide hardware-level backup switching protection. Seamless switching between the two power supplies is achieved through a logic sequence of first disconnect and then turn on. The entire switching process is completed based on a pure hardware link, which can ensure no response delay and absolute reliability.

[0035] Figure 6 This is a structural schematic diagram of a load balancing module according to an embodiment of the present invention. Figure 6As shown, the load balancing module includes an MCU microcontroller 31 and a load balancer 32. The current sampling input terminal of the MCU microcontroller 31 is connected to the current sampling data output terminal of the detection module 1. The current sampling data includes the load current and the power supply output current. The MCU microcontroller 31 generates a control signal based on the power supply output current. Under the action of the control signal, the load balancer 32 changes the equivalent output impedance of the two power supply paths, thereby changing the current output from the two power supplies to the load.

[0036] The MCU microcontroller 31 acquires the load current in real time and implements feedforward control based on the load current change rate to compensate the PWM duty cycle in advance to suppress voltage fluctuations. Specifically, the MCU microcontroller 31 acquires the load current signal in real time through an ADC converter and uses a differential calculation method to obtain the load current change rate. When the feedforward controller built into the MCU microcontroller 31 detects that the load current change rate exceeds a preset threshold, it calls the feedforward compensation parameter table and calculates the PWM duty cycle compensation amount in real time through a linear interpolation algorithm. When the MCU microcontroller 31 detects that the load current exceeds a preset multi-level threshold through real-time current sampling, it immediately triggers a graded protection process: first, it achieves rapid soft shutdown within microseconds through a hardware comparator; if it is determined to be a continuous overcurrent, it executes hardware PWM blocking and switches to the backup power supply, while recording fault characteristic parameters. If the load current difference acquired in multiple consecutive sampling cycles exceeds a preset threshold, it is determined that the sensor (i.e., the high-precision current sampling circuit) has failed; at the same time, it monitors multiple parameters such as the voltage ripple coefficient, temperature rise slope, and current sharing accuracy of the two power supplies in real time. When the MCU microcontroller 31 detects that the detection module 1 sends a switching control signal to the intelligent selection module 2, it reads the current load current value. If the load current is lower than the light load threshold, it uses millisecond-level fast switching. If the load current exceeds the heavy load threshold, it calls the preset S-curve algorithm and dynamically adjusts the slope of the PWM duty cycle through interpolation calculation, so that the current transitions smoothly according to the exponential decay law in a short time. This ensures that the switching process under high current conditions does not generate voltage overshoot and electromagnetic interference, thereby achieving comprehensive optimization of system efficiency, dynamic response and reliability.

[0037] In one implementation, the load balancer 32 includes a PWM generator and a dual-channel Buck-Boost converter; the PWM generator can be implemented using an LM5117 chip. Figure 6 As shown, the MCU microcontroller 31 generates a PWM control signal based on the current data. The PWM generator generates two complementary PWM drive signals based on the PWM control signal. The two PWM drive signals drive two Buck-Boost converters respectively, and the two Buck-Boost converters output current to the load respectively.

[0038] In one implementation, the MCU microcontroller 31 embeds a software-implemented digital PID controller, such as... Figure 6 As shown. The output of the high-precision current sampling circuit of detection module 1 is connected to the ADC input channel of the PID controller. The high-precision current sampling circuit collects the output current of the two power supplies in real time and feeds the collected current data back to the digital PID controller. The load current distribution process is as follows: Figure 7 As shown, the ADC input channel of the digital PID controller acquires the output currents I1 and I2 of the two power supplies, then calculates the current error ΔI, ΔI = I1 - I2, and performs proportional-integral-derivative operations according to the PID algorithm to generate the PWM duty cycle adjustment. The PWM duty cycle adjustment is the PWM control signal. The PWM generator outputs two complementary PWM drive signals based on the PWM duty cycle adjustment to drive the gates of the switching transistors of the two Buck-Boost converters, thereby changing the output voltage of the two Buck-Boost converters and thus changing the equivalent output impedance of each power supply branch. Based on the physical characteristic that current naturally distributes to the low impedance path, the load current of the two power supplies is automatically balanced, ultimately achieving a current sharing control accuracy of ±1%. The proportional component of the PID controller can quickly respond to current deviations, the integral component can eliminate steady-state errors, and the derivative component can suppress current oscillations. When ΔI > 0, the output voltage of power supply 1 is reduced to decrease its current; when ΔI < 0, the output voltage of power supply 2 is reduced to decrease its current. Through negative feedback closed-loop control, ΔI is forced to approach zero, thereby achieving precise balanced distribution of the current between the two power supplies.

[0039] Power supply A and power supply B serve as primary and backup power supplies to each other. When both power supplies are operating normally, they supply power to the load simultaneously, meaning each power supply outputs 50% of the current to the load. When one power supply fails, its output current decreases. The MCU microcontroller 31 detects the current fluctuation and updates the PWM duty cycle adjustment. The load balancer 32 updates the equivalent output impedance of the two power supply branches, causing the output current of the two power supplies to be redistributed to ensure that the load can operate normally. If one power supply fails, for example, if the output current drops to 0 or the operating temperature rises beyond the normal range, the intelligent selection module 2 cuts off the path of that power supply, and the other power supply bears all the current required by the load.

[0040] Figure 8 This is a schematic diagram of the structure of a supercapacitor compensation module according to an embodiment of the present invention. Figure 8As shown, the supercapacitor compensation module 4 includes a supercapacitor bank 41, a low-resistance MOSFET switch 42, and a second gate drive circuit 43. Both the load balancing module and the supercapacitor compensation module supply power to the load via a bus. The voltage monitoring circuit of the detection module 1 is connected in parallel to the bus. The positive terminal of the supercapacitor bank 41 is connected to the bus through the low-resistance MOSFET switch 42. The input terminal of the second gate drive circuit 43 is connected to the trigger signal output by the MCU microcontroller 31, and the output terminal of the second gate drive circuit 43 is connected to the gate of the low-resistance MOSFET switch 42.

[0041] The process of supercapacitor bank 41 performing current compensation on the load during power switching is as follows: Figure 9 As shown. The voltage monitoring circuit monitors the bus voltage in real time. The MCU microcontroller 31 determines whether the bus voltage drops or experiences transient disturbances based on the monitored voltage data. If the bus voltage drops or experiences transient disturbances, the MCU microcontroller 31 immediately triggers the second gate drive circuit 43 to turn on the low internal resistance MOSFET switch 42 within microseconds, allowing the supercapacitor group 41 to inject a large current into the bus instantaneously due to its ultra-low equivalent series resistance (ESR) characteristics. During the discharge process of the supercapacitor group 41, the MCU microcontroller 31 determines whether the bus voltage has returned to stability based on the voltage data monitored by the voltage monitoring circuit. If it has not returned to stability, the supercapacitor group 41 continues to discharge. If it has returned to stability, the MCU microcontroller 31 controls and triggers the second gate drive circuit 43 to determine whether the low internal resistance MOSFET switch 42 has returned to stability.

[0042] The aforementioned second gate drive circuit 43 can turn on the low internal resistance MOSFET switch 42 within microseconds, enabling the supercapacitor group 41 to inject a large current into the bus instantly with its ultra-low equivalent series resistance (ESR) characteristics, filling the power gap during the main and backup power switching process, and maintaining the stability of the output voltage through closed-loop control to achieve seamless energy compensation.

[0043] In summary, the plasma ignition circuit integration device of the present invention, which adopts a dual-redundancy design, achieves seamless switching and load balancing between the main and backup power supplies through dual power supply redundancy design, intelligent selection module and load balancing module, and supercapacitor, thereby improving the reliability and stability of the power system and having broad application prospects.

[0044] The various techniques described herein can be implemented in combination with hardware or software, or a combination thereof. Thus, the methods and apparatus of the present invention, or certain aspects or portions thereof, can take the form of program code (i.e., instructions) embedded in a tangible medium, such as a removable hard disk, USB flash drive, floppy disk, CD-ROM, or any other machine-readable storage medium, wherein when the program is loaded into and executed by a machine such as a computer, the machine becomes an apparatus for practicing the present invention.

Claims

1. A plasma ignition circuit integrated device employing a dual-redundancy design, characterized in that, It includes a detection module, an intelligent selection module, a load balancing module, and a supercapacitor compensation module; The detection module is used to collect status data of the two power supplies and send the status data to the load balancing module. At the same time, it generates a switching control signal based on the status data and sends the switching control signal to the intelligent selection module. The intelligent selection module performs power switching based on the MOSFET switch according to the switching control signal; The load balancing module generates a trigger signal based on the status data and dynamically adjusts the output impedance of the dual power supplies to achieve balanced current distribution. The supercapacitor compensation module provides instantaneous energy injection to the load under the action of the trigger signal.

2. The apparatus as claimed in claim 1, characterized in that, The intelligent selection module includes a gate drive circuit, two MOSFET switches, and two ideal diode controllers. The two MOSFET switches are located on the power paths of the two power supplies, respectively; The enable terminal of the gate drive circuit is connected to the switching signal output terminal of the detection module. The two output terminals of the gate drive circuit are respectively connected to the gates of the two MOSFET switches. The two diode controllers are respectively connected in parallel across the two MOSFET switches. The currents output by the two power supplies enter the load balancing module through the two MOSFET switches.

3. The apparatus as described in claim 1 or 2, characterized in that, The load balancing module includes an MCU microcontroller and a load balancer. The power status data input terminal of the MCU microcontroller is connected to the power status data output terminal of the detection module. The trigger signal output terminal of the MCU microcontroller is connected to the trigger signal input terminal of the supercapacitor compensation module. The PWM control signal output terminal of the MCU microcontroller is connected to the PWM control signal input terminal of the load balancer. The switching signal input terminal of the load balancer is connected to the switching signal output terminal of the intelligent selection module.

4. The apparatus as described in claim 3, characterized in that, The load balancer includes a PWM generator and a dual-channel Buck-Boost converter; The PWM control signal input terminal of the PWM generator serves as the PWM control signal input terminal of the load balancer. The PWM generator generates two complementary PWM drive signals according to the PWM control signal to drive two Buck-Boost converters respectively. The two Buck-Boost converters output current to the load respectively.

5. The apparatus as claimed in claim 1, characterized in that, The supercapacitor compensation module includes a supercapacitor bank, a low internal resistance MOSFET switch, and a gate drive circuit. Both the load balancing module and the supercapacitor compensation module supply power to the load via a bus. The positive terminal of the supercapacitor group is connected to the bus through the low-resistance MOSFET switch. The input terminal of the gate drive circuit is connected to the trigger signal, and the output terminal drives the gate of the low-resistance MOSFET switch.

6. The apparatus as claimed in claim 4, characterized in that, The PWM generator is implemented using an LM5117 controller.

7. The apparatus as claimed in claim 3, characterized in that, The MCU microcontroller includes a PID controller, which generates the PWM control signal.

8. The apparatus as claimed in claim 7, characterized in that, The PID controller generates the PWM control signal based on the current data of the two power supplies.

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