Multi-scene-oriented intelligent rail signal timing optimization method and device

Abstract

The invention provides a multi-scene-oriented intelligent rail signal timing optimization method and device, and relates to the technical field of intelligent public transportation, and the method comprises the steps: building a basic signal model according to the total number of current arriving vehicles and a signal constraint condition, and carrying out the calculation of each lane operation scene, and obtaining the optimal period duration; calculating the priority buffer time according to the parameters of the lane operation scene and the geometric parameters of the intelligent rail, and constructing the unified period duration through the priority buffer time and the optimal period duration; inputting the unified period duration into the basic signal optimization model, and respectively solving each lane operation scene to generate a signal timing scheme; optimizing signal timing in the remaining time of the current period based on the signal timing scheme to obtain a transition scheme; and performing signal timing switching on the signal timing scheme of the current scene according to the transition scheme to obtain a signal timing result. According to the invention, the problem that the signal timing scheme cannot be smoothly switched in a complex traffic scene is solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of intelligent public transportation, in particular to a multi-scene-oriented rail transit signal timing optimization method and device. BACKGROUND

[0002] In the existing intelligent public transportation technology, the rail transit priority strategy is usually adopted, such as the exclusive lane and signal priority control. These strategies are based on the Webster delay model and the like, and parameters such as signal cycle length are optimized under the static lane layout and traffic demand to reduce vehicle delay. However, this method has limitations and cannot adapt to dynamic changes in lane state. The signal scheme optimized by the existing technology for maximizing traffic efficiency is very compact and has little redundancy. When the phase time needs to be extended or an additional phase needs to be inserted, the system will squeeze out time in the compact cycle to reduce the green light time of other phases, affecting the traffic efficiency of social vehicles and the travel experience of passengers, resulting in the problem that the signal timing scheme cannot be smoothly switched under complex traffic scenarios.

[0003] Therefore, there is an urgent need for a multi-scene-oriented rail transit signal timing optimization method and device to solve the problem that the signal timing scheme cannot be smoothly switched under complex traffic scenarios. SUMMARY

[0004] The purpose of the present application is to provide a multi-scene-oriented rail transit signal timing optimization method and device to improve the above problems. In order to achieve the above purpose, the technical scheme adopted by the present application is as follows:

[0005] In a first aspect, the present application provides a multi-scene-oriented rail transit signal timing optimization method, comprising:

[0006] obtaining a plurality of lane operation scenarios and a total number of currently arrived vehicles;

[0007] constructing a basic signal model according to the total number of currently arrived vehicles and a preset signal constraint condition, and calculating the optimal cycle length through the basic signal model for each lane operation scenario;

[0008] calculating the priority buffer time according to the parameters of the lane operation scenario and the rail transit geometric parameters, and constructing the unified cycle length through the priority buffer time and the optimal cycle length;

[0009] inputting the unified cycle length into the basic signal optimization model, and generating a signal timing scheme by solving each lane operation scenario respectively;

[0010] optimizing the signal timing in the remaining time of the current cycle based on the signal timing scheme to obtain a transition scheme;

[0011] Switch the signal timing in the remaining time of the current cycle according to the transition scheme to obtain a signal timing result.

[0012] In a second aspect, the application further provides a multi-scene-oriented intelligent rail signal timing optimization device, comprising:

[0013] An acquisition module is configured to acquire a plurality of lane operation scenarios and a total number of currently arrived vehicles.

[0014] A construction module is configured to construct a basic signal model according to the total number of currently arrived vehicles and a preset signal constraint condition, and calculate an optimal cycle length through the basic signal model for each of the lane operation scenarios.

[0015] A calculation module is configured to calculate a priority buffer time according to parameters of the lane operation scenarios and intelligent rail geometric parameters, and construct a unified cycle length through the priority buffer time and the optimal cycle length.

[0016] A solution module is configured to input the unified cycle length into a basic signal optimization model, and generate a signal timing scheme by solving each of the lane operation scenarios.

[0017] An optimization module is configured to perform smooth transition optimization on the signal timing in the remaining time of the current cycle based on the signal timing scheme, and obtain a transition scheme.

[0018] A switching module is configured to switch the signal timing in the remaining time of the current cycle according to the transition scheme to obtain a signal timing result.

[0019] The application has the following beneficial effects:

[0020] The application calculates the optimal cycle length through different lane scenarios, accurately matches the lane demand, avoids the cases of invalid green light and insufficient green light, and thus reduces the average waiting time of vehicles. At the same time, the priority buffer time is calculated to reserve sufficient start, passing and braking space for the intelligent rail, so as to avoid the intelligent rail from stopping at the intersection or colliding with social vehicles due to too short green light or signal mutation. The unified cycle length is constructed through the priority buffer time and the optimal cycle length, so as to avoid the confusion and superposition of different lane cycles, solve the traffic congestion problem, and improve the overall smoothness of the intersection. In addition, the transition scheme is constructed to perform smooth transition optimization on the remaining time of the current cycle, realize seamless connection from the old cycle to the transition cycle and then to the new cycle, and avoid traffic disturbance during switching. In summary, the application solves the problem of unable to smoothly switch the signal timing scheme under complex traffic scenarios.

[0021] Other features and advantages of the present application will be set forth in the following specification, and in part will be apparent from the description, or can be learned by practice of the application. The objects and other advantages of the application will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings. BRIEF DESCRIPTION OF DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly introduced as follows. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be considered as limiting the scope. For those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0023] Figure 1 A flowchart of the multi-scene-oriented intelligent rail signal timing optimization method described in the embodiments of the present application;

[0024] Figure 2 A schematic diagram of the urban intelligent rail operation system described in the embodiments of the present application.

[0025] Figure 3 A schematic diagram in which all intelligent rail lanes are in a shared state, as described in the embodiments of the present application.

[0026] Figure 4 A schematic diagram in which the intelligent rail lanes in the city-entering direction are in a dedicated state, as described in the embodiments of the present application.

[0027] Figure 5 A schematic diagram in which the intelligent rail lanes in the city-exiting direction are in a dedicated state, as described in the embodiments of the present application.

[0028] Figure 6 A schematic diagram in which all intelligent rail lanes are in a dedicated state, as described in the embodiments of the present application.

[0029] Figure 7 A vehicle congestion analysis diagram at a signalized intersection, as described in the embodiments of the present application.

[0030] Figure 8 A schematic diagram of the signal timing scheme switching in the prior art, as described in the embodiments of the present application.

[0031] Figure 9 A schematic diagram of the multi-scene-oriented intelligent rail signal timing optimization device, as described in the embodiments of the present application.

[0032] In the figure, the marks are: 800, multi-scene-oriented intelligent rail signal timing optimization device; 801, processor; 802, memory; 803, multimedia component; 804, I / O interface; 805, communication component. DETAILED DESCRIPTION

[0033] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art without creative efforts based on the embodiments in the present application belong to the scope of protection of the present application.

[0034] It should be noted that similar reference numerals and letters represent similar items in the following drawings, and therefore, once an item is defined in one drawing, it need not be further defined and explained in subsequent drawings. Meanwhile, in the description of the present application, the terms "first", "second", and the like are only used to distinguish description, and cannot be understood as indicating or implying relative importance.

[0035] Embodiment 1

[0036] The embodiment provides a multi-scene-oriented intelligent rail signal timing optimization method.

[0037] Referring to Figure 1 , the method includes steps S1 to S6, including:

[0038] S1: acquiring a plurality of lane running scenarios and a total number of currently arrived vehicles;

[0039] As shown in Figures 2 to 6 , in the lane allocation strategy, the intelligent rail lane will switch between "intelligent rail dedicated" and "social vehicle sharing" according to real-time traffic conditions. Therefore, the intelligent rail lane has two running states. Since the two import directions of the main line direction of the intersection are provided with intelligent rail lanes, the intelligent rail lanes on both sides are combined, and the lane running scenarios include a first scenario, a second scenario, a third scenario and a fourth scenario;

[0040] The first scenario is that all intelligent rail lanes are in a shared state (no dedicated lane);

[0041] The second scenario is that the intelligent rail lane in the city direction is dedicated, and the intelligent rail lane in the out-of-city direction is shared;

[0042] The third scenario is that the intelligent rail lane in the out-of-city direction is dedicated, and the intelligent rail lane in the city direction is shared;

[0043] The fourth scenario is that the intelligent rail lanes in the city and out-of-city directions are both in a dedicated state.

[0044] For the above four scenarios, the corresponding import lane number, saturation flow rate (traffic capacity) and other traffic parameters are determined respectively.

[0045] S2: According to the total number of current arriving vehicles and the preset signal constraint condition, a basic signal model is constructed, and the optimal cycle length is obtained by calculating each lane operation scenario through the basic signal model;

[0046] As shown in Figure 7 , each lane operation scenario independently runs a basic signal model, and the basic signal model is a nonlinear integer programming model, and the objective function is to minimize the total vehicle delay.

[0047] The signal constraint conditions include cycle length constraint, phase saturation constraint, green light start time constraint, green light duration constraint, green light end time constraint, phase sequence constraint, etc. The basic signal model is solved by existing branch and bound algorithm and quadratic programming algorithm to obtain the optimal cycle length.

[0048] Further, the objective function is:

[0049] The objective of the basic signal model is to minimize the vehicle delay of all phases. Through Figure 7 (signal intersection vehicle congestion analysis diagram) to evaluate the vehicle delay of a single phase. In the Figure 7 , the horizontal axis is time, and the vertical axis is the number of vehicles. The vehicle arrival rate is q i , and the saturation flow rate is s i . In order to ensure that the phase is in an under-saturated state, it is necessary to ensure that the cumulative queuing vehicles during the effective red light r i can be completely dissipated within the subsequent effective green light period g i . Therefore, Figure 7 The area of the shaded area in the

[0050] To clarify the specific way to obtain the optimal cycle length, steps S21 to S23 are included in step S2, specifically:

[0051] S21: According to the total number of current arriving vehicles, the vehicle arrival rate of each phase is converted, combined with the saturation flow rate of each phase, signal constraint conditions and signal control parameters to construct a basic signal model;

[0052] In this step, when the signal cycle length is C=r i +g i , where r i is the effective red light time of phase i, and g i is the green light time of phase i. The total number of vehicles arriving in a cycle is q iC. Accordingly, the average vehicle delay of the phase in a complete signal cycle is calculated.

[0053] First, define Figure 7 the area d of the shaded part in Fig. 2, according to the geometric relationship, we have where τ is a certain time parameter, s i is the saturation flow rate of phase i, and q i is the arrival rate of phase i. i +τ)=s i τ, substituting the above formula can be obtained

[0054] Further derivation, according to the definition of the effective red light time r i of phase i, it is equal to the sum of the displayed red light time R i and the phase loss time L i , that is, r i =R i +L i , and the displayed red light time R i is equal to the signal cycle length C minus the displayed green light time G i and the displayed yellow light time Y i , that is, R i =C-G i -Y i . Therefore, the average vehicle delay of a phase is represented as

[0055] Based on the above derivation, the objective function is represented as where C is the signal cycle length, Ψ is the set of signal phases, G i is the green light length of phase i, Y i is the yellow light length of phase i, L i is the loss time of phase i; q i is the arrival rate of phase i, s i is the saturation flow rate of phase i.

[0056] The constraint conditions include:

[0057] The cycle length constraint: the cycle length is within a preset range, that is, greater than or equal to the minimum cycle length C min and less than or equal to the maximum cycle length C max . That is: C min ≤C≤C max .

[0058] The saturation constraint: in order to ensure that the green light length is sufficient to empty the queued vehicles, the vehicles leaving the intersection within the effective green light time (that is, s i (G i +Y iL i q i C) is the set of vehicles that arrive at the intersection during the current cycle. where, is the green start time constraint for all i, the green start time θ i of each phase is limited within the cycle. That is:

[0059] The green duration constraint is that the green duration of each phase is limited within a predefined limit, i.e., greater than or equal to the minimum green duration and less than or equal to the maximum green duration That is:

[0060] The green end time constraint is that the green end time (θ i + G i + Y i ) of each phase is limited within the cycle. That is:

[0061] The phase order constraint is that the set of conflicting phases with phase i is denoted by Λ The order of conflicting phases is managed by binary variables, where Λ i,j = 1 means that phase i starts before phase j.

[0062] That is:

[0063] where M is a large enough positive number to ensure the correctness of the logical relationship.

[0064] The decision variable domain is that all time-related decision variables are defined as integers, while the variables identifying the phase order are binary variables. That is:

[0065] S22: Solving each lane running scenario based on the basic signal model to generate cycle lengths of multiple different scenarios;

[0066] S23: Maximum value screening of cycle lengths of multiple different scenarios to obtain an optimal cycle length.

[0067] S3: Calculating a priority buffer time according to the parameters of the lane running scenario and the smart track geometric parameters, constructing a unified cycle length by the priority buffer time and the optimal cycle length;

[0068] To clarify the specific acquisition method of the unified cycle length, steps S31 to S33 are included in step S3, specifically:

[0069] S31: According to the intersection parameters of the lane operation scene, the smart track geometric parameters and the average speed of the smart track passing through the intersection, the smart track passing time is obtained by analysis and calculation;

[0070] In this step, the smart track passing time is:

[0071] In the above formula (1), t pass is the smart track passing time, D is the intersection width, l is the smart track train length, and v is the average speed of the smart track passing through the intersection.

[0072] S32: According to the smart track signal priority strategy, the priority buffer time is obtained by constructing the smart track passing time and the preset additional safety distance.

[0073] In this step, the smart track signal priority strategy includes green light extension, red light early break and phase insertion. Specifically as follows:

[0074] The green light extension refers to when the smart track reaches the intersection when the green light is about to end or has just ended, the current green light phase is extended to ensure the smooth passing of the smart track.

[0075] The red light early break refers to when the smart track reaches the intersection within a short time before the next cycle green light starts, the next cycle green light is turned on in advance to avoid the smart track stopping and waiting.

[0076] The phase insertion refers to when the smart track reaches during the red light and cannot pass through the green light extension or obtain the right of way in advance, an additional green light time window sufficient for the smart track to pass through the intersection is inserted.

[0077] In order to realize these strategies, the green light time length of the phase used by the smart track needs to be increased. In order to ensure that other phases are not affected or as little affected as possible, the signal cycle length needs to be appropriately extended, that is, the buffer time is increased. Considering that the phase insertion needs the longest additional green light time, and under the premise of not excessively increasing the cycle length, the length of the buffer time should be set to be greater than or slightly greater than the time required for the smart track to pass through the intersection, and the priority buffer time greatly improves the success rate and effect of the smart track signal priority strategy.

[0078] That is, the priority buffer time is

[0079] In the above formula (2), t buffer is the smart track passing time, D is the intersection width, l is the smart track train length, and v is the average speed of the smart track passing through the intersection.

[0080] S33: Based on the priority buffer time and the optimal cycle length, the unified cycle length is obtained by construction.

[0081] In this step, the expression of the uniform cycle length is:

[0082]

[0083] In the above formula (3), C unified is the uniform cycle length, t buffer is the smart track passing time, is the optimal cycle length of different lane operation scenarios, is the cycle length of the first scenario, is the cycle length of the second scenario, is the cycle length of the third scenario, is the cycle length of the fourth scenario.

[0084] S4: input the uniform cycle length into the basic signal optimization model, solve each lane operation scenario respectively to generate a signal timing scheme;

[0085] To clarify the specific acquisition method of the signal timing scheme, steps S41 to S44 are included in step S4, specifically:

[0086] S41: input the uniform cycle length as a fixed cycle length into the basic signal optimization model for model calculation to obtain basic signal timing parameters;

[0087] In this step, the uniform cycle length C unified is input as a fixed cycle length (C min =C max =C unified ) into the basic signal optimization model for calculation of the basic green light time and red light time of each phase to obtain the basic signal timing parameters.

[0088] S42: based on the branch and bound algorithm and the quadratic programming algorithm, optimize and solve the basic signal timing parameters under each lane operation scenario to determine the phase green light start time of each lane and the green light duration of each lane;

[0089] In this step, the branch and bound algorithm is used to determine the green light start time and green light duration of each phase, which is used to solve integer programming problems and is suitable for discrete decision variables in signal timing. The quadratic programming algorithm is used to handle quadratic terms in the objective function to ensure the optimization results of signal timing, which not only meets the actual needs of traffic flow but also maximizes the road traffic efficiency.

[0090] The traffic flow includes the vehicle arrival rate of each lane, and the road conditions include the lane width, the number of lanes, and the intersection geometric parameters.

[0091] S43: integration is performed based on the phase green light start time of each lane and the green light duration of each lane, a yellow light duration and a red light duration are combined to construct a signal timing scheme.

[0092] In this step, the signal timing scheme under the unified cycle length ensures that the intersection will not be oversaturated even when part of the lanes are designated as exclusive and the traffic capacity decreases. Meanwhile, the re-optimization of the signal timing scheme based on the unified cycle length can take into account the changes in the traffic capacity of the intersection approach under different scenarios and reasonably allocate the green light time of each phase accordingly.

[0093] S5: based on the signal timing scheme, the signal timing in the remaining time of the current cycle is smoothly transitioned and optimized to obtain a transition scheme;

[0094] To clarify the specific acquisition method of the transition scheme, steps S51 to S53 are included in step S5, specifically:

[0095] S51: based on the determined start time in the signal timing scheme, the determined green light time in the signal timing scheme, and the unified cycle length of the current cycle, a non-finished phase target function is constructed to obtain a non-finished phase target function;

[0096] In this step, the non-finished phase target function is:

[0097]

[0098] In the above formula (4), to sum all phases i that satisfy the condition Ψ is the set of signal phases, is the unified cycle length of the current cycle, is the start time of phase i in the current signal timing scheme, is the green light time of phase i in the current signal scheme, τ is a certain time parameter, L i is the loss time of phase i, G i is the green light duration of phase i, Y i is the yellow light duration of phase i, s i is a time-dependent parameter, q i is the arrival rate of phase i.

[0099] S52: based on the non-finished phase target function, the non-finished phases in the smart rail signal cycle are re-optimized to obtain a non-finished phase model;

[0100] In this step, by re-optimizing the non-finished phases, the green light time is dynamically adjusted, improving the flexibility and adaptability of signal control.

[0101] S53: smoothing transition optimization of signal timing in the remaining time of the current cycle according to the unfinished phase model and preset unfinished phase constraints, to obtain a transition scheme.

[0102] In this step, the unfinished phase constraints include green start time constraints, green duration constraints, green end time constraints, phase sequence constraints and decision variable definition domain.

[0103] The green start time constraints are:

[0104] If the phase has started in the current cycle The green start time is consistent with the actual start time. For the phase that has not started The green start time must be within the time period between the current time and the end of the cycle. That is:

[0105]

[0106] In the above formula (5), θ i is the green start time of each phase, is the start time of phase i determined in the current signal timing scheme, τ is a certain time parameter, Ψ is the set of signal phases, is for all i, is the uniform cycle length of the current cycle.

[0107] The green duration constraints are:

[0108] If the phase has ended The green duration is consistent with the actual duration.

[0109] When the phase has started but is still running and , the green duration must meet the minimum green time requirement, at least extend to the current time, and not exceed the maximum allowed green time.

[0110] For the phase that has not started The green duration is limited within the preset range, that is:

[0111]

[0112] In the above formula (6), θ i is the green start time of each phase, is the start time of phase i determined in the current signal timing scheme, τ is a certain time parameter, is the minimum green time requirement of phase i, Ψ is the set of signal phases, is for all i, is the green time of phase i determined in the current signal scheme, Gi The green light duration for phase i. Let i be the maximum allowed green light time for phase i.

[0113] Green light end time constraint:

[0114] The green light end time for each phase plus the yellow light duration must be included within the cycle time. That is:

[0115]

[0116] In equation (7) above, θ i G is the start time of the green light for each phase. i Y represents the green light duration for phase i. i The duration of the yellow light for phase i. Let Ψ be the uniform period duration of the current period, and Ψ be the set of signal phases. For all i.

[0117] Phase order constraint:

[0118] use This represents the set of phases that conflict with phase i. The order of the conflicting phases is managed by a binary variable, where Λ i,j =1 means that phase i begins before phase j. That is:

[0119]

[0120] In equation (8) above, θ i G is the start time of the green light for each phase. i Y represents the green light duration for phase i. i Let θ be the duration of the yellow light for phase i. j G is the start time of the green light for phase j. j Y represents the green light duration for phase j. j Let be the duration of the yellow light for phase j, M be a sufficiently large constant, and Λ i,j Let phase i begin before phase j, and Ψ be the set of signal phases. For all i, Λ is the set of phases that conflict with phase i. j,i Phase j begins before phase i.

[0121] Domain of decision variables:

[0122] All time-related decision variables are defined as non-negative integers, while the variable indicating phase order is a binary variable. That is:

[0123]

[0124] In the above formula (9), C is the signal cycle length, θ i is the green light start time of each phase, G j is the green light duration of phase j, Λ i,j is the phase i starts before phase j.

[0125] S6: Switching the signal timing within the remaining time of the current cycle according to the transition scheme to obtain a signal timing result.

[0126] To make the specific acquisition method of the signal timing result, steps S61 to S63 are included in step S6, specifically:

[0127] S61: Real-time monitoring of the traffic scene in which the current lane is located according to the transition scheme to obtain a monitoring result;

[0128] As shown in Figure 8 The transition scheme is mainly used to handle the signal timing scheme switching problem when the lane operating scene switches from the first operating scene to the second operating scene. The signal timing scheme in the prior art cannot achieve seamless connection when switching. When the signal timing scheme is directly switched from the current time, it will cause phase ③ to directly terminate and skip the yellow light time, and the timing scheme of scene two can only start from the next signal cycle.

[0129] To solve this problem, the transition scheme will consider the remaining time of the current signal cycle when switching the signal timing scheme. Specifically, the transition scheme will dynamically adjust the signal timing scheme according to the remaining time before the current signal cycle ends, ensuring smooth transition from the first operating scene to the second operating scene, avoiding signal interruption and skipping of yellow light time caused by direct switching. In this way, the transition scheme can effectively solve the discontinuity problem of the signal timing scheme switching in the prior art, improving the efficiency and safety of traffic signal control.

[0130] S62: When the monitoring result is that the first direction has a tram train approaching and the second direction has no tram, determine by a preset rule that the first operating scene in the lane operating scene is switched to the second operating scene, and generate a switching instruction;

[0131] S63: Based on the switching instruction, the signal timing within the remaining time of the current cycle is optimized and adjusted by the transition scheme to obtain a signal timing result.

[0132] Embodiment 2:

[0133] A representative section of Yibin tram T1 line is selected as a case study: from the south of Times Square Station to the north of Xufu Road, about 3 kilometers long, containing six intersections and three tram stations. The comparison scheme includes:

[0134] Baseline: The baseline scheme does not consider lane state transition and does not reserve buffer time when formulating the basic signal timing scheme, and only determines a unique signal timing scheme according to the basic signal optimization model.

[0135] Considering lane state: The lane state transition is considered when formulating the basic signal timing scheme, but no buffer time is reserved, and a set of signal timing schemes for different lane scenarios is determined according to the basic signal optimization model.

[0136] Reserve buffer time: Reserve buffer time when formulating the basic signal timing scheme, but do not consider lane state transition, and determine a unique signal timing scheme according to the basic signal optimization model.

[0137] The present application: When formulating the basic signal timing scheme, both lane state transition and buffer time are considered, and a set of signal timing schemes for different lane scenarios is determined according to the basic signal optimization model.

[0138] A micro-simulation software SUMO is used to build a simulation platform. The performance indicators of the four schemes are compared, including social vehicle delay, queue length, smart rail delay and smart rail average speed. The simulation results are shown in Table 1. Compared with the baseline strategy which does not consider lane state and buffer time: considering lane state can reduce social vehicle delay by 7.01%, reduce queue length by 6.90%, reduce smart rail delay by 15.31%, and increase smart rail average speed by 0.74%; reserving buffer time can reduce social vehicle delay by 1.34%, reduce queue length by 0.51%, reduce smart rail delay by 20.03%, and increase smart rail average speed by 0.86%; the present application can reduce social vehicle delay by 12.04%, reduce queue length by 13.12%, reduce smart rail delay by 38.07%, and increase smart rail average speed by 1.75%.

[0139] Analysis shows that the lane state consideration strategy ensures that the intersection will not become excessively saturated due to the reduction of traffic capacity under different smart rail lane configurations (i.e. exclusive or shared), thereby ensuring the operation performance of social vehicles. The buffer time reservation strategy improves the possibility of successful insertion of green light window for smart rail, and therefore has greater advantages in improving the operation efficiency of fast smart rail. Further, the combination of the two strategies, i.e. the complete content of the present application, significantly improves the operation performance of smart rail and social vehicles.

[0140] Table 1:

[0141]

[0142]

[0143] Example 3:

[0144] The embodiment provides a smart rail signal timing optimization device for multiple scenarios, which comprises:

[0145] an acquisition module, configured to acquire a plurality of lane operation scenarios and a current total number of arriving vehicles;

[0146] a construction module, configured to construct a basic signal model according to the current total number of arriving vehicles and a preset signal constraint condition, and to calculate, through the basic signal model, an optimal cycle length for each of the lane operation scenarios;

[0147] To make the specific acquisition manner of the construction module clear, the following is specifically provided:

[0148] a first construction unit, configured to convert the current total number of arriving vehicles into a vehicle arrival rate for each phase, and to construct, in combination with a saturated flow rate of each phase, a signal constraint condition and a signal control parameter, the basic signal model;

[0149] a solving unit, configured to solve each of the lane operation scenarios based on the basic signal model, and to generate cycle lengths for a plurality of different scenarios;

[0150] a screening unit, configured to perform maximum value screening on the cycle lengths for the plurality of different scenarios, and to obtain the optimal cycle length.

[0151] a calculation module, configured to calculate a priority buffer time according to parameters of the lane operation scenarios and geometric parameters of the smart track, and to construct, through the priority buffer time and the optimal cycle length, a unified cycle length;

[0152] To make the specific acquisition manner of the calculation module clear, the following is specifically provided:

[0153] a first calculation unit, configured to analyze and calculate a smart track passing time according to intersection parameters of the lane operation scenarios and geometric parameters of the smart track and an average speed of the smart track passing through the intersection;

[0154] a second construction unit, configured to construct, according to a smart track signal priority strategy, the priority buffer time through the smart track passing time and a preset additional safety distance;

[0155] a third construction unit, configured to construct, based on the priority buffer time and the optimal cycle length, the unified cycle length.

[0156] a solving module, configured to input the unified cycle length into a basic signal optimization model, and to generate a signal timing scheme by solving each of the lane operation scenarios respectively;

[0157] To make the specific acquisition manner of the solving module clear, the following is specifically provided:

[0158] a second calculation unit, configured to input the unified cycle length as a fixed cycle length into the basic signal optimization model for model calculation, and to obtain basic signal timing parameters.

[0159] an optimization solving unit configured to perform optimization solving on the basic signal timing parameters in each lane operation scenario based on a branch and bound algorithm and a quadratic programming algorithm, to determine the phase green start time of each lane and the green time duration of each lane;

[0160] an integration unit configured to integrate based on the phase green start time of each lane and the green time duration of each lane, construct in combination with the yellow light duration and the red light duration, and obtain a signal timing scheme.

[0161] an optimization module configured to perform smooth transition optimization on the signal timing in the remaining time of the current cycle based on the signal timing scheme, and obtain a transition scheme;

[0162] To make the specific acquisition manner of the optimization module clear, the following is specifically provided:

[0163] a fourth construction unit configured to construct based on the determined start time in the signal timing scheme, the determined green light time in the signal timing scheme, and the uniform cycle duration of the current cycle, and obtain an unfinished phase target function;

[0164] an optimization unit configured to perform re-optimization on the phase that has not been finished in the smart rail signal cycle based on the unfinished phase target function, and obtain an unfinished phase model;

[0165] a transition optimization unit configured to perform smooth transition optimization on the signal timing in the remaining time of the current cycle according to the unfinished phase model and a preset unfinished phase constraint condition, and obtain a transition scheme.

[0166] a switching module configured to switch the signal timing in the remaining time of the current cycle according to the transition scheme, and obtain a signal timing result.

[0167] It should be noted that, as for the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be described in detail here.

[0168] Embodiment 4:

[0169] Corresponding to the above method embodiment, the embodiment also provides a smart rail signal timing optimization device for multiple scenarios. The smart rail signal timing optimization device described below can be mutually corresponding and referred to with the smart rail signal timing optimization method described above.

[0170] Figure 9 is a block diagram of a smart rail signal timing optimization device 800 according to an exemplary embodiment. As shown in Figure 9As shown, the multi-scene-oriented intelligent rail signal timing optimization device 800 can include a processor 801, a memory 802. The multi-scene-oriented intelligent rail signal timing optimization device 800 can also include one or more of a multimedia component 803, an I / O interface 804, and a communication component 805.

[0171] The processor 801 is configured to control overall operation of the multi-scene oriented intelligent rail signal timing optimization device 800 to complete all or part of the steps in the multi-scene oriented intelligent rail signal timing optimization method described above. The memory 802 is configured to store various types of data to support the operation of the multi-scene oriented intelligent rail signal timing optimization device 800, which can include, for example, instructions for any application or method operating on the multi-scene oriented intelligent rail signal timing optimization device 800, and application-related data, such as contact data, sent and received messages, pictures, audio, video, and the like. The memory 802 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk or optical disk. The multimedia component 803 can include a screen and an audio component. The screen can be a touch screen, for example, and the audio component is configured to output and / or input audio signals. For example, the audio component can include a microphone configured to receive external audio signals. The received audio signals can be further stored in the memory 802 or transmitted through the communication component 805. The audio component also includes at least one speaker configured to output audio signals. The I / O interface 804 provides an interface between the processor 801 and other interface modules, which can be a keyboard, a mouse, a button, and the like. The buttons can be virtual buttons or physical buttons. The communication component 805 is configured to enable wired or wireless communication between the multi-scene oriented intelligent rail signal timing optimization device 800 and other devices. Wireless communication, such as Wi-Fi, Bluetooth, near field communication (NFC), 2G, 3G or 4G, or a combination of one or more of them, so the corresponding communication component 805 can include a Wi-Fi module, a Bluetooth module, an NFC module.

[0172] In an example embodiment, the multi-scene-oriented intelligent rail signal timing optimization device 800 can be implemented by one or more Application Specific Integrated Circuit (ASIC), Digital Signal Processor (DSP), Digital Signal Processing Device (DSPD), Programmable Logic Device (PLD), Field Programmable Gate Array (FPGA), controller, microcontroller, microprocessor or other electronic elements for executing the above-mentioned multi-scene-oriented intelligent rail signal timing optimization method.

[0173] Embodiment 4:

[0174] Corresponding to the above method embodiments, the present embodiment also provides a medium, and the medium described below can be mutually corresponding with reference to the above-mentioned multi-scene-oriented intelligent rail signal timing optimization method.

[0175] A medium, the medium stores a computer program, and the computer program is executed by a processor to implement the steps of the multi-scene-oriented intelligent rail signal timing optimization method of the above-mentioned method embodiments.

[0176] The medium can be a U disk, a mobile hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and various program code storage media.

[0177] The above only describes the preferred embodiments of the present application and is not used to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. within the spirit and principles of the present application should be included in the protection scope of the present application.

[0178] The above only describes the preferred embodiments of the present application and is not used to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. within the spirit and principles of the present application should be included in the protection scope of the present application.

[0178] The above only describes the preferred embodiments of the present application and is not used to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A method for optimizing intelligent rail transit signal timing for multiple scenarios, characterized in that, include: Obtain information on various lane operation scenarios and the total number of currently arriving vehicles; A basic signal model is constructed based on the total number of arriving vehicles and preset signal constraints. The optimal cycle time is obtained by calculating each lane operation scenario using the basic signal model. The priority buffer time is calculated based on the parameters of the lane operation scenario and the geometric parameters of the intelligent rail system. The uniform cycle length is obtained by constructing the cycle length using the priority buffer time and the optimal cycle length. A unified cycle duration is input into the basic signal optimization model, and a signal timing scheme is generated by solving each lane operation scenario separately. Based on the aforementioned signal timing scheme, a smooth transition optimization is performed on the signal timing within the remaining time of the current cycle to obtain a transition scheme; The signal timing is switched according to the transition scheme for the remaining time of the current cycle to obtain the signal timing result.

2. The intelligent rail transit signal timing optimization method for multiple scenarios according to claim 1, characterized in that, A basic signal model is constructed based on the total number of arriving vehicles and preset signal constraints. The optimal cycle time is then calculated for each lane operation scenario using this basic signal model, including: The basic signal model is constructed by converting the total number of arriving vehicles into the vehicle arrival rate for each phase, and combining the saturation flow rate of each phase, signal constraints, and signal control parameters. Based on the aforementioned basic signal model, each lane operation scenario is solved to generate the cycle duration of multiple different scenarios; The optimal cycle duration is obtained by filtering the maximum value of the cycle duration for multiple different scenarios.

3. The intelligent rail transit signal timing optimization method for multiple scenarios according to claim 1, characterized in that, The priority buffer time is calculated based on the parameters of the lane operation scenario and the geometric parameters of the intelligent rail transit system. A unified cycle length is then constructed using the priority buffer time and the optimal cycle length, including: The passage time of the intelligent rail system is obtained by analyzing and calculating the intersection parameters, intelligent rail geometric parameters, and the average speed of the intelligent rail system through the intersection in the lane operation scenario. According to the intelligent rail signal priority strategy, the priority buffer time is obtained by constructing the intelligent rail transit time and the preset additional safety distance; A unified cycle duration is obtained by constructing a system based on the preferred buffer time and the optimal cycle duration.

4. The intelligent rail transit signal timing optimization method for multiple scenarios according to claim 1, characterized in that, A uniform cycle duration is input into the basic signal optimization model. By solving for each lane operation scenario, a signal timing scheme is generated, including: The uniform period duration is input as a fixed period duration into the basic signal optimization model for model calculation to obtain the basic signal timing parameters; The basic signal timing parameters for each lane operation scenario are optimized and solved using the branch and bound algorithm and the quadratic programming algorithm to determine the green light start time and green light duration for each lane. The signal timing scheme is constructed by integrating the phase green light start time and green light duration of each lane, and combining them with the yellow light and red light durations.

5. The intelligent rail transit signal timing optimization method for multiple scenarios according to claim 1, characterized in that, Based on the aforementioned signal timing scheme, a smooth transition optimization is performed on the signal timing for the remaining time of the current cycle to obtain a transition scheme, including: Based on the determined start time, the determined green light time, and the uniform cycle duration of the current cycle in the signal timing scheme, the target function for the unfinished phase is constructed. Based on the objective function of the unfinished phase, the phases in the intelligent rail signal cycle that have not yet ended are re-optimized to obtain the unfinished phase model; Based on the unfinished phase model and the preset unfinished phase constraints, the signal timing within the remaining time of the current cycle is optimized for a smooth transition, resulting in a transition scheme.

6. A smart rail signal timing optimization device for multiple scenarios, characterized in that, include: The acquisition module is used to acquire information on various lane operation scenarios and the total number of currently arriving vehicles. The construction module is used to build a basic signal model based on the total number of arriving vehicles and preset signal constraints, and to calculate the optimal cycle time for each lane operation scenario using the basic signal model. The calculation module is used to calculate the priority buffer time based on the parameters of the lane operation scenario and the geometric parameters of the intelligent rail system. The unified cycle length is obtained by constructing the priority buffer time and the optimal cycle length. The solution module is used to input a uniform cycle duration into the basic signal optimization model, and generate a signal timing scheme by solving each lane operation scenario separately. The optimization module is used to perform smooth transition optimization on the signal timing within the remaining time of the current cycle based on the signal timing scheme, so as to obtain a transition scheme; The switching module is used to switch the signal timing for the remaining time of the current cycle according to the transition scheme, so as to obtain the signal timing result.

7. The intelligent rail transit signal timing optimization device for multiple scenarios according to claim 6, characterized in that, The building module includes: The first building unit is used to convert the current total number of arriving vehicles into the vehicle arrival rate of each phase, and to build the basic signal model by combining the saturation flow rate of each phase, signal constraints and signal control parameters. The solving unit is used to solve each lane operation scenario based on the basic signal model, and generate the cycle duration of multiple different scenarios; The filtering unit is used to filter the maximum value of the cycle duration for multiple different scenarios to obtain the optimal cycle duration.

8. The intelligent rail transit signal timing optimization device for multiple scenarios according to claim 6, characterized in that, The computing module includes: The first calculation unit is used to analyze and calculate the passage time of the intelligent rail based on the intersection parameters and the geometric parameters of the intelligent rail in the lane operation scenario and the average speed of the intelligent rail through the intersection. The second construction unit is used to construct a priority buffer time based on the intelligent rail signal priority strategy, using the intelligent rail transit time and a preset additional safety distance. The third construction unit is used to construct based on the priority buffer time and the optimal cycle duration to obtain a unified cycle duration.

9. The intelligent rail transit signal timing optimization device for multiple scenarios according to claim 6, characterized in that, The solution module includes: The second calculation unit is used to input the uniform period duration as a fixed period duration into the basic signal optimization model to perform model calculations and obtain the basic signal timing parameters. The optimization and solution unit is used to optimize and solve the basic signal timing parameters for each lane operation scenario based on the branch and bound algorithm and the quadratic programming algorithm, and to determine the phase green light start time and green light duration of each lane. The integration unit is used to integrate the green light start time of each lane and the green light duration of each lane, and combine them with the yellow light duration and red light duration to construct a signal timing scheme.

10. The intelligent rail transit signal timing optimization device for multiple scenarios according to claim 6, characterized in that, The optimization module includes: The fourth construction unit is used to construct, based on the determined start time in the signal timing scheme, the determined green light time in the signal timing scheme, and the unified cycle duration of the current cycle, to obtain the target function of the unfinished phase; The optimization unit is used to re-optimize the unfinished phases in the intelligent rail signal cycle based on the unfinished phase objective function to obtain the unfinished phase model. The transition optimization unit is used to perform smooth transition optimization on the signal timing within the remaining time of the current cycle based on the unfinished phase model and the preset unfinished phase constraint conditions, so as to obtain a transition scheme.

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