Anti-radiation power device and manufacturing method thereof

Abstract

The invention provides an anti-radiation power device and a manufacturing method thereof. The anti-radiation power device comprises a first conductive type epitaxial layer, a first conductive type region, a second conductive type region, a gate structure and a source metal layer, wherein the first conductive type region and the second conductive type region are formed in the first conductive type epitaxial layer; the gate structure and the source metal layer are formed on the first conductive type epitaxial layer; and an anti-radiation layer is formed on the source metal layer and the oxide layer of the partial gate structure. According to the invention, a material capable of adsorbing charges is added between the oxide layer and the metal layer to form an anti-radiation layer structure, so as to prevent charged particles in cosmic rays from attacking areas which are not covered by metal in an electronic component, solve the problem that an original power device is weak in anti-radiation capability, and play a role in protecting the device; meanwhile, due to the characteristic that the material can adsorb charges, the material can generate a capacitance structure with the epitaxial layer and a high-concentration ion implantation region on the voltage dividing ring after adsorbing the charges, and meanwhile, the effect of stabilizing the voltage dividing ring is achieved, so that the voltage stabilizing effect can be achieved even if the device is slightly damaged.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power devices, in particular to an anti-radiation power device and a manufacturing method thereof. BACKGROUND

[0002] Modern technology continues to put higher requirements on the volume, reliability, voltage resistance and power consumption of semiconductor power devices, and silicon carbide has a series of advantages that traditional silicon materials do not have, such as higher breakdown electric field, higher thermal conductivity and larger band gap, so that silicon carbide is more suitable for high-voltage power applications.

[0003] However, the anti-radiation capability of the power device in the prior art is insufficient, and the attack of charged particles in cosmic rays on the area not covered by metal in the electronic component will cause a large number of charged particles to be ionized in the oxide layer and cannot be led out, resulting in the formation of an electric field peak in the oxide layer, thereby reducing the dielectric constant of the oxide layer, and ultimately reducing the voltage resistance of the power device.

[0004] The patent document with publication number CN111180316A discloses a preparation method of a thick bottom oxide layer trench MOS, which has the following advantages: the preparation of the thick oxide layer is realized by polycrystalline silicon or amorphous silicon at the bottom of the trench, so that the thickness of the oxide layer at the bottom of the MOS structure trench is obviously thicker than that of the sidewall, thereby effectively reducing the electric field intensity and improving the reliability of the SiC trench MOSFET. At the same time, it is helpful to reduce the gate-drain capacitance of the trench MOSFET device, thereby reducing the dynamic loss of the device and improving the switching speed of the device. The above scheme has basic structure and performance, but it fails to effectively solve the problems of electric field concentration and injection at the SIC interface barrier oxide of the carbonized silicon material, and the characteristics of material defects. SUMMARY

[0005] In view of the defects in the prior art, the purpose of the present application is to provide an anti-radiation power device and a manufacturing method thereof.

[0006] The anti-radiation power device provided by the present application comprises a first conductive type epitaxial layer, a first conductive type region and a second conductive type region formed in the first conductive type epitaxial layer, a gate structure and a source metal layer formed on the first conductive type epitaxial layer. An anti-radiation layer is formed on the oxide layer of the source metal layer and part of the gate structure.

[0007] Preferably, the first conductive type epitaxial layer is an N-epitaxial layer, the first conductive type region is an N+ region, and the second conductive type region is a P+ region.

[0008] Preferably, the P+ region and the N+ region are both formed in a P-well region, and the P-well region is formed in the first conductive type epitaxial layer.

[0009] Preferably, the gate structure comprises a polysilicon layer and an oxide layer outside the polysilicon layer.

[0010] Preferably, a plurality of gate structures are sequentially formed on the N-epitaxial layer, and a gate metal layer is arranged on the gate structure at the edge. The gate metal layer is formed on the polysilicon layer and simultaneously contacts the polysilicon layer and the oxide layer.

[0011] Preferably, the source metal layer is formed on the gate structure. In the plurality of gate structures, the source metal layer contacts the oxide layer of the gate structure at the edge, and does not contact the gate metal layer of the gate structure at the edge, and the source metal layer contacts the oxide layer of the remaining gate structures.

[0012] Preferably, a P+ voltage division ring region is further formed on the N-epitaxial layer, and an oxide layer is formed on the P+ voltage division ring region. The oxide layer formed on the P+ voltage division ring region contacts the oxide layer of the gate structure at the edge through the source metal layer, and the source metal layer and the oxide layer of the gate structure at the edge both contact the P+ voltage division ring region. The radiation resistance layer covers the oxide layer formed on the P+ voltage division ring region, the source metal layer, the oxide layer of the gate structure at the edge, and the gate metal layer, and a part of the radiation resistance layer on the source metal layer is etched to form a source region window.

[0013] Preferably, a protective layer covers the radiation resistance layer, and the protective layer completely covers the radiation resistance layer.

[0014] The manufacturing method of the radiation resistance power device provided by the present application is used for manufacturing the radiation resistance power device, and comprises the following steps. Step 1: preparing a metal layer on the surface of the power device; Step 2: after the preparation of the metal layer is completed, growing a radiation resistance material on the surface of the power device to form a radiation resistance layer; Step 3: etching the radiation resistance layer through a photoresist coating, exposure and development process to expose a part of the upper surface of the source metal layer to form a source region window; Step 4: covering a protective layer on the radiation resistance layer.

[0015] Preferably, in step 3, the radiation resistance layer completely covers the voltage division ring region and all the areas without metal coverage, and a part of the radiation resistance layer is connected with the source metal layer to form a common electric field protective layer.

[0016] Compared with the prior art, the present application has the following beneficial effects: 1. The application has simple structure and convenient operation. The anti-radiation layer made of non-metallic material (including but not limited to amorphous silicon) capable of adsorbing electric charge is added between the oxide layer and the metal layer or on the metal layer to block the attack of charged particles in cosmic rays on the area not covered by metal in the electronic components, solve the problem of weak anti-radiation ability of the original power device, and protect the device.

[0017] 2. The anti-radiation layer of the application has the characteristics of adsorbing electric charge. In the area of the voltage dividing ring not covered by metal, the anti-radiation layer after adsorbing electric charge and the epitaxial layer will form a capacitor structure, which can stabilize the voltage dividing ring, so that the device can stabilize the voltage even if there is a small damage.

[0018] 3. The anti-radiation layer of the application directly contacts with the metal, part of the electric charge will be transferred into the metal, prolonging the service life of the anti-radiation layer, and finally achieving the good effect of small power device leakage, short device off time, fast voltage step-up and step-down electric field balance speed, and long service life. BRIEF DESCRIPTION OF DRAWINGS

[0019] Other features, objects and advantages of the application will become more apparent after reading the detailed description of the non-limiting embodiments with reference to the following drawings: Figure 1 It is the overall structure diagram of the anti-radiation power device in the application; Figure 2 It is the structure diagram of the power device after the related process of the metal layer in step 1 of the application is completed; Figure 3 It is the structure diagram of the power device after the anti-radiation layer is grown on the surface of the chip in step 2 of the application; Figure 4 It is the structure diagram of the power device after the source region window is formed in step 3 of the application.

[0020] The drawings show: DETAILED DESCRIPTION

[0021] The application will be described in detail below in combination with specific embodiments. The following embodiments will help those skilled in the art to further understand the application, but do not limit the application in any form. It should be pointed out that those skilled in the art can make several changes and improvements without departing from the concept of the application. These all belong to the protection scope of the application.

[0022] This innovation involves adding a charge-adsorbing material (including but not limited to amorphous silicon) between the oxide layer and the metal layer to form a radiation-resistant layer structure. This blocks charged particles from cosmic rays from attacking areas of electronic components not covered by metal, solving the problem of weak radiation resistance in traditional power devices and protecting them. Simultaneously, due to the charge-adsorbing properties of the material, after adsorbing the charge, it creates a capacitance structure with the high-concentration ion-implanted region on the epitaxial layer and its voltage divider ring, stabilizing the voltage divider ring and ensuring voltage regulation even with minor damage. Ultimately, this achieves excellent performance in power devices, including radiation resistance, low leakage current, fast voltage ramp-up / buck field equalization, and long lifespan.

[0023] The radiation-resistant power device provided by the present invention, such as Figure 1 As shown, the structure includes an N-epitaxial layer 1, an N+ region 5 and a P+ region 4 formed in the N-epitaxial layer 1, a gate structure and a source metal layer 7 formed on the N-epitaxial layer 1; a radiation-resistant layer 10 is formed on the source metal layer 7 and the oxide layer 6 of the partial gate structure. Both the P+ region 4 and the N+ region 5 are formed in a P-well region 2, which is formed in a first conductivity type epitaxial layer. A protective layer 11 covers the radiation-resistant layer 10, completely covering it.

[0024] The gate structure includes a polysilicon layer 9 and an oxide layer 6 located outside the polysilicon layer 9. Multiple gate structures are sequentially formed on the N-epitaxial layer 1, with a gate metal layer 8 disposed on the edge gate structures. The gate metal layer 8 is formed on the polysilicon layer 9 and simultaneously contacts both the polysilicon layer 9 and the oxide layer 6. A source metal layer 7 is formed on the gate structures. In the multiple gate structures, the source metal layer 7 contacts a portion of the oxide layer 6 of the edge gate structures but does not contact the gate metal layer 8 of the edge gate structures. The source metal layer 7 contacts the oxide layers 6 of the remaining gate structures.

[0025] A P+ voltage divider ring region 3 is also formed on the N- epitaxial layer 1, and an oxide layer 6 is formed on the P+ voltage divider ring region 3. The oxide layer 6 formed on the P+ voltage divider ring region 3 is in contact with the oxide layer 6 of the gate structure located at the edge through the source metal layer 7, and both the source metal layer 7 and the oxide layer 6 of the gate structure located at the edge are in contact with the P+ voltage divider ring region 3. The radiation-resistant layer 10 covers the oxide layer 6 formed on the P+ voltage divider ring region 3, the source metal layer 7, the oxide layer 6 of the gate structure located at the edge, and the gate metal layer 8, and the portion of the radiation-resistant layer 10 on the source metal layer 7 is etched to form a source region window.

[0026] Example 1: The embodiment provides a new design of a silicon carbide device, which comprises adding an anti-radiation layer structure composed of a non-metal material capable of adsorbing electric charges (including but not limited to amorphous silicon) between an oxide layer and a metal layer on the basis of a traditional structure, so as to achieve the good effects of small leakage current of a power device, fast balanced speed of step-up and step-down electric fields and long service life.

[0027] Taking a silicon carbide MOSFET as an example, Step 1. After the end of a traditional metal layer related process, that is, when a chip profile is as shown in Figure 2 , an anti-radiation material such as amorphous silicon is grown on the surface of the chip to form a structure as shown in Figure 3 , and then etching treatment is performed to form a structure as shown in Figure 4 , which is used for blocking the attack of charged particles in cosmic rays on the area not covered by the metal in the device, and generating a capacitive effect in the voltage division ring 3 area to stabilize the voltage division ring. More specifically, the anti-radiation material includes but is not limited to amorphous silicon and other non-metal materials capable of adsorbing electric charges.

[0028] More specifically, the thickness of the anti-radiation layer 10 ranges from greater than 500A, and the specific thickness and maximum thickness depend on the design and simulation results and the process equipment process capability.

[0029] Step 2. The etching treatment is performed on the protective layer 11 through a coating, exposure and development process of photoresist to form a source window structure of the protective layer 11 as shown in Figure 1 .

[0030] More specifically, the specific range of the anti-radiation layer is that the voltage division ring part is fully covered, and the anti-radiation layer 10 covers as many chip areas without metal coverage as possible without affecting the metal connection window left by the protective layer 11, that is, the part not covered by the protective layer 11, including but not limited to the effective area of the chip and the scribing channel area; the structure of the anti-radiation layer 10 must be connected together, and part of it is connected with the metal layer to form a common electric field protective layer 11. The specific shape, size, line width and coverage range need to be referred to the specific design needs and simulation results and equipment process capability.

[0031] Step 3. The subsequent steps are performed on the anti-radiation layer 10 according to the traditional process of the protective layer 11. More specifically, the protective layer 11 should completely cover and protect the anti-radiation layer 10.

[0032] It should be noted that the anti-radiation layer power device structure provided by the embodiment can be used in the range including but not limited to MOSFET, SBD, BJT, and power devices such as silicon-based, silicon carbide, gallium nitride and gallium arsenide.

[0033] In the description of the present application, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0034] The specific embodiments of the present application are described above. It should be understood that the present application is not limited to the specific embodiments described above, and various changes or modifications can be made by those skilled in the art within the scope of the claims, which do not affect the essential content of the present application. The embodiments of the present application and the features in the embodiments can be arbitrarily combined with each other in the case of no conflict.

Claims

1. A radiation-resistant power device, characterized in that, It includes a first conductivity type epitaxial layer, a first conductivity type region and a second conductivity type region formed in the first conductivity type epitaxial layer, and a gate structure and a source metal layer formed on the first conductivity type epitaxial layer (7). Radiation-resistant layers (10) are formed on the source metal layer (7) and the oxide layer (6) of the partial gate structure.

2. The radiation-resistant power device according to claim 1, characterized in that, The first conductivity type epitaxial layer is an N- epitaxial layer (1), the first conductivity type region is an N+ region (5), and the second conductivity type region is a P+ region (4).

3. The radiation-resistant power device according to claim 2, characterized in that, Both the P+ region (4) and the N+ region (5) are formed in the P-well region (2), which is formed in the first conductivity type epitaxial layer.

4. The radiation-resistant power device according to claim 2, characterized in that, The gate structure includes a polysilicon layer (9) and an oxide layer (6) located outside the polysilicon layer (9).

5. The radiation-resistant power device according to claim 4, characterized in that, Multiple gate structures are sequentially formed on the N-epi-epi-layer (1), and a gate metal layer (8) is disposed on the gate structure located at the edge. The gate metal layer (8) is formed on the polysilicon layer (9) and is in contact with both the polysilicon layer (9) and the oxide layer (6).

6. The radiation-resistant power device according to claim 5, characterized in that, The source metal layer (7) is formed on the gate structure; In multiple gate structures, the source metal layer (7) forms contact with a portion of the oxide layer (6) of the gate structure located at the edge, but does not form contact with the gate metal layer (8) of the gate structure located at the edge. The source metal layer (7) forms contact with the oxide layer (6) of the remaining gate structures.

7. The radiation-resistant power device according to claim 5, characterized in that, A P+ pressure dividing ring region (3) is also formed on the N- epitaxial layer (1), and an oxide layer (6) is formed on the P+ pressure dividing ring region (3). The oxide layer (6) formed on the P+ voltage divider ring region (3) is in contact with the oxide layer (6) of the gate structure located at the edge through the source metal layer (7), and both the source metal layer (7) and the oxide layer (6) of the gate structure located at the edge are in contact with the P+ voltage divider ring region (3). The radiation-resistant layer (10) covers the oxide layer (6), source metal layer (7), oxide layer (6) of the gate structure located at the edge, and gate metal layer (8) formed on the P+ voltage divider ring region (3), and the portion of the radiation-resistant layer (10) on the source metal layer (7) is etched to form a source region window.

8. The radiation-resistant power device according to claim 1, characterized in that, The radiation-resistant layer (10) is covered by a protective layer (11), which completely covers the radiation-resistant layer (10).

9. A method for manufacturing a radiation-resistant power device, characterized in that, The method for manufacturing the radiation-resistant power device according to any one of claims 1-8 comprises the following steps: Step 1: Fabrication of a metal layer on the surface of the power device; Step 2: After the metal layer is fabricated, a radiation-resistant material is grown on the surface of the power device to form a radiation-resistant layer (10). Step 3: The anti-radiation layer (10) is etched by the photoresist coating, exposure and development process to expose part of the upper surface of the source metal layer (7) and form a source region window; Step 4: Cover the radiation-resistant layer (10) with a protective layer (11).

10. The method for manufacturing a radiation-resistant power device according to claim 9, characterized in that, In step 3, the radiation-resistant layer (10) fully covers the voltage divider ring area and all areas without metal coverage, and part of the radiation-resistant layer (10) is connected to the source metal layer (7) to form a protective layer for the common electric field.

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