Display device

Abstract

A display device is provided. A display device according to one exemplary embodiment includes: a substrate including a display area including a plurality of sub-pixels and a non-display area adjacent to the display area; an anode electrode disposed in each of the sub-pixels on the substrate; a bank disposed on the anode at a boundary between adjacent sub-pixels, covering a periphery of an upper surface of the anode, and including a first bank on the anode and a second bank on the first bank; and an organic layer disposed on the anode and the bank and disposed across the plurality of sub-pixels, the first bank includes an overlapping portion overlapping with the second bank, a first exposed portion exposed by the second bank and including a side surface, and a second exposed portion exposed by the second bank and disposed between the overlapping portion and the first exposed portion, the second exposed portion being disposed as a plurality of second exposed portions, and the plurality of adjacent second exposed portions are spaced apart from each other in a plan view.

Description

Technical Field

[0001] This disclosure relates to a display device, and more specifically, for example, but not limited to, a display device that can improve the spreadability of a second encapsulation layer. Background Technology

[0002] With the development of the information society, the demand for display devices for displaying images is increasing, and various types of display devices such as liquid crystal display (LCD) devices and organic light-emitting diode (OLED) display devices are being utilized.

[0003] The display device includes multiple pixels and multiple switching elements for driving and controlling the multiple pixels.

[0004] The descriptions provided in the discussion of the Related Art section should not be considered prior art merely because they are mentioned in or associated with that section. The discussion of the Related Art section may include information describing one or more aspects of the subject matter art, and the descriptions in this section do not limit this disclosure. Summary of the Invention

[0005] Exemplary embodiments of this disclosure are intended to provide a display device in which lateral leakage current between adjacent sub-pixels can be prevented or reduced.

[0006] Exemplary embodiments of this disclosure are also intended to provide a display device in which the embankment may include a black base material to absorb external light incident on the lower portion of the embankment.

[0007] Exemplary embodiments of this disclosure also aim to provide a display device in which the spreadability of a second encapsulation layer (or organic encapsulation layer) can be improved because the first embankment includes a second exposed portion exposed through the second embankment and disposed between the overlapping portion and the first exposed portion, and the second exposed portions are configured to be spaced apart from each other (protrusion structures or inclined structures are applied to the embankment).

[0008] Exemplary embodiments of this disclosure are also intended to provide a display device in which an organic layer is integrally formed across all sub-pixels; however, by forming trenches in a protective layer and guiding the organic layer to separate from the trenches, lateral leakage current between adjacent sub-pixels can be prevented or reduced.

[0009] The purpose of this disclosure is not limited to the above-described purposes, and other technical purposes can be deduced from the following embodiments.

[0010] According to an exemplary embodiment, a display device is provided, the display device comprising: a substrate, the substrate including a display area comprising a plurality of sub-pixels and a non-display area adjacent to the display area; an anode disposed in each of the plurality of sub-pixels on the substrate; a dam disposed on the anode at a boundary between adjacent sub-pixels, covering the periphery of an upper surface of the anode, and including a first dam on the anode and a second dam on the first dam, wherein the first dam includes: an overlapping portion overlapping with the second dam; a first exposed portion exposed through the second dam and including a side surface; and a second exposed portion exposed through the second dam and disposed between the overlapping portion and the first exposed portion, the second exposed portion being configured as a plurality of second exposed portions, and the plurality of adjacent second exposed portions being spaced apart from each other in a plan view.

[0011] According to an exemplary embodiment, a display device is provided, the display device comprising: a substrate, the substrate including a display area comprising a plurality of sub-pixels and a non-display area adjacent to the display area; an anode disposed in the display area in each of the sub-pixels on the substrate; a dam disposed in the display area on the anode, located at a boundary between adjacent sub-pixels, covering the periphery of an upper surface of the anode, and including a first dam on the anode and a second dam on the first dam; and an organic layer disposed on the anode and the dam, and disposed across the plurality of sub-pixels, wherein the first dam includes an overlapping portion overlapping the second dam and an exposed portion exposed through the second dam, and the outline of the exposed portion has a plurality of curved portions in a plan view.

[0012] According to an exemplary embodiment, a display device is provided, the display device comprising: a substrate, the substrate including a display area comprising a plurality of sub-pixels and a non-display area adjacent to the display area; an anode disposed in each of the plurality of sub-pixels on the substrate; a dam disposed on the anode, located at the boundary between adjacent sub-pixels, and covering the periphery of the upper surface of the anode; an organic layer disposed on the anode and the dam, and spanning the plurality of sub-pixels; and a protective layer disposed below the organic layer, and including a groove overlapping the dam and extending through the protective layer in the thickness direction.

[0013] Details of other embodiments are included in the detailed description and accompanying drawings.

[0014] It should be understood that the foregoing general description and the following detailed description of this disclosure are exemplary and explanatory, and are intended to provide further explanation of the claimed disclosure. Attached Figure Description

[0015] The accompanying drawings, which are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this application, illustrate embodiments of the disclosure and, together with the specification, serve to explain the principles of the disclosure. In the drawings:

[0016] Figure 1 This is a plan view of a display device according to an exemplary embodiment.

[0017] Figure 2 It shows the basis Figure 1 A cross-sectional view of the display panel in a bent state.

[0018] Figure 3 It is along Figure 1 The cross-sectional view taken by line A-A' in the diagram.

[0019] Figure 4 yes Figure 3 A detailed cross-sectional view of the light-emitting part.

[0020] Figure 5 It is a specific cross-sectional view of the light-emitting part based on the modified example.

[0021] Figure 6 It is based on Figure 3 A cross-sectional view of the touch portion.

[0022] Figure 7 It is along Figure 1 The cross-sectional view taken by line B-B' in the diagram.

[0023] Figure 8 It is along Figure 1 The cross-sectional view taken from line C-C' in the diagram.

[0024] Figure 9 yes Figure 1 A planar layout diagram of the sub-pixels of the display area.

[0025] Figure 10 It is along Figure 9 The cross-sectional view taken by line D-D' in the diagram.

[0026] Figure 11 It is along Figure 9 The cross-sectional view taken from line E-E' in the diagram.

[0027] Figure 12 This is a planar arrangement diagram of the sub-pixels of the display area of ​​a display device according to another exemplary embodiment.

[0028] Figure 13 This is a planar arrangement diagram of the sub-pixels of the display area of ​​a display device according to yet another exemplary embodiment.

[0029] Figure 14 This is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0030] Figure 15 This is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0031] Figure 16 This is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0032] Figure 17 This is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0033] Figure 18 This is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0034] Throughout the accompanying drawings and detailed description, unless otherwise stated, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustration, and convenience, the relative sizes and descriptions of these elements may be exaggerated.

[0035] Explanation of reference numerals in the attached figures

[0036] 1: Display device

[0037] 100, 100_1, 100_2, 100_3, 100_4, 100_5: Display panel

[0038] D1, D2: Weir Detailed Implementation

[0039] Reference will now be made in detail to embodiments of this disclosure, examples of which are illustrated in the accompanying drawings. The described progression of processing steps and / or operations is an example; however, the order of steps and / or operations is not limited to that set forth herein and can be varied as is known in the art, except for steps and / or operations that must occur in a specific order. The names of the various elements used in the following explanation may have been chosen only for the convenience of writing this specification and may therefore differ from the names used in actual products.

[0040] In the following description, embodiments will be described with reference to the accompanying drawings.

[0041] The same reference numerals denote the same parts. Furthermore, in the accompanying drawings, the thickness, scale, and dimensions of parts may be exaggerated for the purpose of effectively depicting the technical content. For ease of description, the scale of the parts shown in the drawings differs from the actual scale, and therefore, the drawings are not limited to the scales shown.

[0042] In this specification, when a first component (or region, layer, part, etc.) is described as “on,” “connected,” or “attached to” a second component, it means that the first component may be directly connected to / attached to the second component, or that a third component may be arranged between them.

[0043] The term "and / or" includes all one or more combinations that can be defined by the associated configuration. The term "at least one" includes all combinations that relate to any one of the items. For example, "at least one of the first element, the second element, and the third element" can include all combinations of two or more elements selected from the first element, the second element, and the third element, as well as each individual element of the first element, the second element, and the third element.

[0044] Terms such as first, second, A, B, (a), (b), etc., may be used to describe various components, but the component is not limited by these terms. These terms are only used to distinguish one component from another. For example, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component without departing from the scope of the exemplary embodiment. Unless the context clearly indicates otherwise, the singular includes the plural. For example, unless the context clearly indicates otherwise, an element described in the singular is intended to include multiple elements, and vice versa.

[0045] Terms such as “below,” “under,” “on the lower side,” “above,” “above,” “over,” and “on the upper side” are used to describe the relationships between the components shown in the accompanying drawings. These terms are relative concepts and are described with reference to the directions marked in the drawings. For example, one or more additional parts may be positioned between two parts, provided that “immediately following” or “directly” is not used. For example, a third element or layer may be inserted between one element or layer that is positioned “on” another element or layer. As shown, spatially relative terms such as “below” or “under,” “lower,” “above,” and “upper” can be used to readily describe the relationship between one or more elements and another element or component. Spatially relative terms should be understood to include terms for different orientations of elements in use or operation, in addition to those shown in the drawings. For example, when the elements shown in the drawings are inverted, an element described as positioned “below” or “under” another element may be positioned “above” another element. Thus, the exemplary term “below” can include both downward and upward directions.

[0046] It should be understood that terms such as “comprising,” “having,” “including,” “constituting,” “forming,” or “formed from” are intended to specify the presence of the features, quantities, steps, operations, components, parts, or combinations thereof described in this specification, and do not preclude the presence or addition of one or more other features, quantities, steps, operations, components, parts, or combinations thereof.

[0047] Features of the various embodiments of this disclosure can be joined or combined in part or in whole, and various technologies can be interconnected and driven. Furthermore, exemplary embodiments can be implemented independently of each other or together in a related relationship.

[0048] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiments pertain. It will also be understood that terms such as those defined in common dictionaries shall be interpreted as having a meaning consistent with the context of the relevant field, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein. For example, as understood by one of ordinary skill in the art, the terms “part” or “unit” may be applied to, for example, a single circuit or structure, an integrated circuit, a computational block of a circuit device, or any structure configured to perform the functions described herein.

[0049] Features of the various embodiments of this disclosure can be combined in part or in whole, and can be technically related to or operable on each other. Embodiments can be implemented independently of each other, or can be implemented together in an associated relationship.

[0050] The display device of this disclosure will be described below with reference to the accompanying drawings and embodiments.

[0051] Figure 1 This is a plan view of a display device according to an exemplary embodiment.

[0052] Reference Figure 1A display device 1 according to an exemplary embodiment may include a display panel 100. The display panel 100 may include a display area DA for displaying images and a non-display area NDA for not displaying images. The display area includes a plurality of pixels PX, and the non-display area is adjacent to (e.g., surrounding) the display area DA. The flat surface shape of the display area DA may be rectangular. However, the exemplary embodiments of this disclosure are not limited thereto, and the flat surface shape of the display area DA may be square, circular, elliptical, or other polygonal shapes. For example, the display area DA may have a rectangular shape with rounded corners, but is not limited thereto, and may also have a rectangular shape with beveled corners. The non-display area NDA may also be referred to as an edge area or border area.

[0053] In an exemplary embodiment, the first direction DR1 and the second direction DR2 are different directions and intersect each other, for example, they are vertically intersecting directions in a plan view. Figure 1 In this embodiment, the first direction DR1 may be substantially the same as the extension direction of the short side of the display panel 100, while the second direction DR2 may be the same as the extension direction of the long side of the display panel 100. However, the directions described in the exemplary embodiments should be understood as indicating relative directions, and the embodiments are not limited to the described directions.

[0054] The display area DA may include a short side extending along the first direction DR1 and a long side extending along the second direction DR2. The non-display area NDA may refer to the area outside the display area DA. The non-display area NDA may surround the display area DA. The non-display area NDA may be located on one side and the other side of the display area DA along the first direction DR1, and on one side and the other side of the display area DA along the second direction DR2. Several types of signal lines may be provided in the non-display area NDA, and several types of drive circuits may be connected to it.

[0055] The display panel 100 may further include a sensor non-display area NDA_S and sensor holes SH surrounded by the sensor non-display area NDA_S. In a plan view, sensor holes SH1 and SH2 may be surrounded by the display area DA. For example, sensor holes SH1 and SH2 may be as follows: Figure 1The two sensor holes in the display area are not limited to this. For example, the sensor holes can be configured as a single sensor hole. For example, the sensor holes can be configured as two or more sensor holes. Both sensor holes SH1 and SH2 may include a sensor hole containing an infrared sensor and a sensor hole containing a camera sensor, but the embodiments of this disclosure are not limited to this. The sensor non-display area NDA_S can be disposed between the sensor holes SH1 and SH2 and the display area DA. The sensor non-display area NDA_S can completely surround the sensor holes SH1 and SH2, but the embodiments of this disclosure are not limited to this. Pixel PX may not be disposed in the sensor non-display area NDA_S.

[0056] The gating drive unit GIP can be located in the non-display area NDA on one side and the other side of the display area DA in the first direction DR1. The gating drive unit GIP can be a circuit for driving multiple gating lines and can provide gating signals to multiple gating lines. The low potential voltage line VSSL can be located outside the gating drive unit GIP on the non-display area NDA. For example, as... Figure 1 As shown, the low potential voltage line VSSL can extend from the printed circuit board FPCB, through the sub-region SR and the curved region BR, and can be located outside the gating drive unit GIP on the non-display region NDA, and is configured to surround the display region DA.

[0057] The non-display area NDA located on the other side of the display area DA in the second direction DR2 can extend further from the center portion of the other side toward the other side of the display area DA in the second direction DR2. The width of the non-display area NDA extending further from the center portion of the other side toward the other side of the display area DA in the second direction DR2 in the first direction can be smaller than the width of the non-display area NDA adjacent to the other side of the display area DA in the second direction DR2 in the first direction DR1.

[0058] Display device 1 may include a main region MR, a sub-region SR, and a curved region BR between the main region MR and the sub-region SR. A display region DA and a non-display region NDA surrounding the four surfaces of the display region DA may form the main region MR, and a portion extending from the center portion on one side toward the display region DA on the other side in a second direction DR2 may form the curved region BR and the sub-region SR. The curved region BR may be disposed between the sub-region SR and the main region MR. The sub-region SR may include a first pad region PA1 and a second pad region PA2 located at the end portion of the sub-region SR on the other side in the second direction DR2. Display device 1 may also include a data driving unit DIC and a printed circuit board FPCB. The data driving unit DIC may be a unit for driving multiple data lines and can supply data signals to the multiple data lines. The data driving unit DIC may be disposed in the first pad region PA1, and the printed circuit board FPCB may be attached to the second pad region PA2. For example, the sub-region SR and the curved region BR may be disposed between the main region MR and the printed circuit board FPCB. Multiple pads connecting the data driver 300 and the printed circuit board 500 can be provided in each of the first pad area PA1 and the second pad area PA2. Multiple pads connecting the data driver unit DIC and the printed circuit board FPCB can be provided in each of the first pad area PA1 and the second pad area PA2. The data driver unit DIC can be configured, for example, in the form of a driver chip (IC), but is not limited thereto. In one exemplary embodiment, a case is described where the data driver unit DIC is configured by directly mounting it onto the display panel 100 using a chip-on-plastic method; however, embodiments of this disclosure are not limited thereto, and the data driver unit DIC can be configured using a chip-on-glass or chip-on-film method.

[0059] In one or more aspects, the data drive unit (DIC) may be connected to the display panel 100 via tape auto-bonding (TAB) technology, or to conductive pads such as bonding pads of the display panel 100 via chip-on-glass (COG) technology or chip-on-panel (COP) technology, or to the display panel 100 via chip-on-film (COF) technology, but is not limited thereto.

[0060] According to one exemplary embodiment, the display panel 100 may also include a crack sensing pattern CSP surrounding a low-potential voltage line VSSL. For example... Figure 1As shown, the crack sensing pattern CSP can be configured to completely surround the display area DA, but is not limited thereto. For example, the crack sensing pattern CSP can be disposed outside the low potential voltage line VSSL. However, exemplary embodiments of this disclosure are not limited thereto, and the crack sensing pattern CSP can be configured to partially surround the display area DA. For example, a portion of the crack sensing pattern CSP may not be disposed in the non-display area NDA on the other side of the display area DA in the second direction DR2. For example, the crack sensing pattern CSP can be configured to completely or partially surround the display area DA in the non-display area NDA.

[0061] Figure 2 It shows the basis Figure 1 A cross-sectional view of the display panel in a bent state.

[0062] Reference Figure 2 According to an exemplary embodiment, the curved region BR of the display panel 100 of the display device 1 can be curved in the thickness direction (or the third direction DR3). Therefore, the main region MR and the sub-region SR can overlap each other in the thickness direction. For example, the curved region BR can be disposed between the main region MR and the sub-region SR. The display panel 100 can be curved such that the lower surface of the main region MR faces the upper surface of the sub-region SR. A printed circuit board (FPCB) can be attached to the end portion of the sub-region SR. For example, the main region MR and the printed circuit board (FPCB) can overlap each other in the thickness direction, but are not limited thereto.

[0063] Figure 3 It is along Figure 1 The cross-sectional view taken by line A-A' in the diagram.

[0064] Reference Figure 3 The pixel count (PX) of the display panel 100 (see...) Figure 1 A display panel 100 may include multiple sub-pixels. For example, the pixels PX of the display panel 100 (see...) Figure 1 The pixel PX1 may include, but is not limited to, subpixels PX1, PX2, and PX3. It may include more or fewer subpixels. For example, subpixels PX1, PX2, and PX3 may include a first subpixel PX1, a second subpixel PX2, and a third subpixel PX3. Subpixels PX1, PX2, and PX3 may be selected from red, green, and blue subpixels. The first subpixel PX1 may be a red subpixel, the second subpixel PX2 may be a green subpixel, and the third subpixel PX3 may be a blue subpixel, but embodiments of this disclosure are not limited to this. In some exemplary embodiments, pixel PX may also include a fourth subpixel, and this fourth subpixel may be a white subpixel, but embodiments of this disclosure are not limited to this.

[0065] The display panel 100 may include a substrate 101, a first thin-film transistor 120, a second thin-film transistor 130, a light-emitting portion 150, a package portion 170, a touch portion 180, a color filter insulating layer 114, a black matrix BM, color filters 191, 192, and 193, and a planarization layer OC, but is not limited thereto. The display panel 100 may include at least one panel insulating layer between the substrate 101 and the light-emitting portion 150. This at least one panel insulating layer may include at least one of a buffer layer 102, a first insulating layer 103, a second insulating layer 104, a 3-1 insulating layer 105-1, a 3-2 insulating layer 105-2, a fourth insulating layer 106, a fifth insulating layer 108, a sixth insulating layer 109, a first protective layer 111, and a second protective layer 112, but is not limited thereto. At least one touch insulating layer may be disposed above the light-emitting portion 150. At least one touch insulating layer may include at least one of a touch buffer layer 181, a first touch insulating layer 183, and a second touch insulating layer 184.

[0066] The substrate 101 may include one or more plastic materials, but is not limited thereto. For example, the substrate 101 may be a multi-substrate comprising multiple plastic materials (e.g., polyimide, etc.). For example, the substrate 101 may include a first substrate portion 101a and a second substrate portion 101b, both comprising plastic materials, and a third substrate portion 101c comprising an inorganic insulating material between the first substrate portion 101a and the second substrate portion 101b, but the embodiments of this disclosure are not limited thereto.

[0067] For example, substrate 101 may include glass or a flexible polymer film. The flexible polymer film may be made of any of the following: polyethylene terephthalate (PET), polycarbonate (PC), acrylonitrile-butadiene-styrene copolymer (ABS), polymethyl methacrylate (PMMA), polyethylene naphthalate (PEN), polyethersulfone (PES), cyclic olefin copolymer (COC), triacetyl cellulose (TAC) film, polyvinyl alcohol (PVA) film, polyimide (PI) film, and polystyrene (PS). This is merely an example and is not necessarily limited thereto.

[0068] A buffer layer 102 may be disposed on a substrate 101. The buffer layer 102 can minimize or delay the diffusion of moisture or oxygen that permeates into the substrate 101. The buffer layer 102 may be formed of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but embodiments of this disclosure are not limited thereto. For example, the buffer layer 102 may be formed by alternately stacking silicon nitride (SiNx) and silicon oxide (SiOx) at least once, but embodiments of this disclosure are not limited thereto. For example, the buffer layer 102 may be formed of a single-layer inorganic film, and the single-layer inorganic film may be a silicon oxide (SiO) film or a silicon nitride (SiN) film, but embodiments of this disclosure are not limited thereto.

[0069] The first light-shielding layer 126 can be disposed on the buffer layer 102. The first light-shielding layer 126 can prevent or reduce light transmission through the first semiconductor layer 123 of the first thin-film transistor 120, thereby extending the lifetime of the first thin-film transistor 120. For example, the first semiconductor layer 123 can be disposed overlapping the first light-shielding layer 126. The first light-shielding layer 126 can be formed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), nickel (Ni), neodymium (Nd) and copper (Cu) or their alloys, but the embodiments of this disclosure are not limited thereto.

[0070] A first insulating layer 103 may be disposed on the buffer layer 102 and the first light-shielding layer 126. For example, the first insulating layer 103 may be disposed on a portion of the buffer layer 102 and the first light-shielding layer 126. The first insulating layer 103 may be disposed between the first thin-film transistor 120 and the first light-shielding layer 126. The first insulating layer 103 may prevent or reduce short circuits between components of the first thin-film transistor 120 and the first light-shielding layer 126. The first insulating layer 103 may be formed of the same or substantially the same material as the buffer layer 102, but embodiments of the present disclosure are not limited thereto. For example, the first insulating layer 103 may be formed of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but embodiments of the present disclosure are not limited thereto. For example, the first insulating layer 103 may be formed by alternately stacking silicon nitride (SiNx) and silicon oxide (SiOx) at least once, but embodiments of the present disclosure are not limited thereto.

[0071] The first thin-film transistor 120 may be disposed on the first insulating layer 103. The first thin-film transistor 120 may include a first source electrode 121, a first gate electrode 122, a first semiconductor layer 123, and a first drain electrode 124.

[0072] The first semiconductor layer 123 may be disposed on the first insulating layer 103. The first semiconductor layer 123 may include metal oxide semiconductors such as indium gallium zinc oxide (IGZO) and silicon-based semiconductor materials such as amorphous silicon and polycrystalline silicon, but the embodiments disclosed herein are not limited thereto. The first semiconductor layer 123 may include a source region, a drain region, and a channel region between the source region and the drain region.

[0073] Because polycrystalline semiconductor layers have higher mobility than amorphous semiconductor layers and oxide semiconductor layers, power consumption can be lower and reliability can be better. Therefore, driving transistors can be formed from polycrystalline semiconductor layers.

[0074] The second insulating layer 104 may be disposed on the first semiconductor layer 123. The second insulating layer 104 may be formed of the same or substantially the same material as the first insulating layer 103, but embodiments of the present disclosure are not limited thereto. The second insulating layer 104 may be formed of the same or substantially the same material as the buffer layer 102, but embodiments of the present disclosure are not limited thereto. The second insulating layer 104 can prevent or reduce short circuits between the first semiconductor layer 123 and another component of the first thin-film transistor 120.

[0075] The first gate electrode 122 may be disposed on the second insulating layer 104. The first gate electrode 122 may be disposed on the second insulating layer 104 to overlap with the channel region of the first semiconductor layer 123. The first gate electrode 122 may be formed of a conductive material such as a metallic material. For example, the first gate electrode 122 may be formed of a single layer or multiple layers of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd) or compounds thereof, but embodiments of the present disclosure are not limited thereto.

[0076] The first gate electrode 122 may be disposed together with the gate line. For example, the gate line may be formed of the same or substantially the same material as the first gate electrode 122 and formed on the same layer as the first gate electrode 122, but the embodiments of this disclosure are not limited thereto.

[0077] Third insulating layers 105-1 and 105-2 may be disposed on the first gate electrode 122. The third insulating layers 105-1 and 105-2 may be formed by alternately layering silicon nitride (SiNx) and silicon oxide (SiOx) at least once, but embodiments of the present disclosure are not limited thereto. For example, insulating layer 105-1 may include silicon oxide (SiOx), and insulating layer 105-2 may include silicon nitride (SiNx), but embodiments of the present disclosure are not limited thereto.

[0078] The first source electrode 121 and the first drain electrode 124 can be disposed on the third insulating layers 105-1 and 105-2.

[0079] The first source electrode 121 and the first drain electrode 124 can be electrically connected to the first semiconductor layer 123 through contact holes. The first source electrode 121 and the first drain electrode 124 can be formed of a conductive material such as a metallic material. For example, the first source electrode 121 and the first drain electrode 124 can be formed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or their alloys, but the embodiments of this disclosure are not limited thereto.

[0080] The first source electrode 121 and the first drain electrode 124 can be disposed together with the data line. For example, the data line can be formed of the same or substantially the same material as the first source electrode 121 and the first drain electrode 124, and formed on the same layer as the first source electrode 121 and the first drain electrode 124, but the embodiments of this disclosure are not limited thereto.

[0081] The storage electrode 140 may be spaced apart from the first thin-film transistor 120. The storage electrode 140 may include a first storage electrode 141 and a second storage electrode 142, but embodiments of this disclosure are not limited thereto.

[0082] The first storage electrode 141 may be formed of the same or substantially the same material as the first gate electrode 122 and disposed on the same layer as the first gate electrode 122, but the embodiments of this disclosure are not limited thereto.

[0083] The second storage electrode 142 may be disposed on the first storage electrode 141. The second storage electrode 142 may be disposed on third insulating layers 105-1 and 105-2, and the third insulating layers 105-1 and 105-2 between the first storage electrode 141 and the second storage electrode 142 may serve as a dielectric to generate capacitance. The second storage electrode 142 may be formed of the same or substantially the same material as the first storage electrode 141, but embodiments of this disclosure are not limited thereto. For example, the second storage electrode 142 may be disposed overlapping the first storage electrode 141, but embodiments of this disclosure are not limited thereto.

[0084] The second thin-film transistor 130 may be configured to be spaced apart from the first thin-film transistor 120 and the storage electrode 140. The second thin-film transistor 130 may include a second source electrode 131, a second gate electrode 132, a second semiconductor layer 133, and a second drain electrode 134.

[0085] The second light-shielding layer 136 can be disposed on the same layer as the second storage electrode 142.

[0086] Similar to the first light-shielding layer 126, the second light-shielding layer 136 can prevent or reduce light propagation to the second semiconductor layer 133 of the second thin-film transistor 130, thereby extending the lifetime of the second thin-film transistor 130. For example, the second semiconductor layer 133 can be configured to overlap with the second light-shielding layer 136. The second light-shielding layer 136 can be formed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), nickel (Ni), neodymium (Nd), and copper (Cu) or their alloys, but the embodiments of this disclosure are not limited thereto.

[0087] A fourth insulating layer 106 may be disposed on the second light-shielding layer 136. The fourth insulating layer 106 may be formed of the same or substantially the same material as the first insulating layer 103, the second insulating layer 104, or the third insulating layers 105-1 and 105-2, but embodiments of this disclosure are not limited thereto. For example, the fourth insulating layer 106 may be formed of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but embodiments of this disclosure are not limited thereto.

[0088] The second semiconductor layer 133 may be disposed on the fourth insulating layer 106. The second semiconductor layer 133 may include a source region, a drain region, and a channel region between the source region and the drain region.

[0089] The second semiconductor layer 133 may include metal oxide semiconductors such as indium gallium zinc oxide (IGZO) and silicon-based semiconductor materials such as amorphous silicon and polycrystalline silicon, but the embodiments disclosed herein are not limited thereto.

[0090] The fifth insulating layer 108 may be disposed on the second semiconductor layer 133. The fifth insulating layer 108 may be formed of the same or substantially the same material as the first insulating layer 103, the second insulating layer 104, the third insulating layers 105-1 and 105-2 or the fourth insulating layer 106, but the embodiments of this disclosure are not limited thereto.

[0091] The second gate electrode 132 can be disposed on the fifth insulating layer 108. The second gate electrode 132 can be disposed on the fifth insulating layer 108 to overlap with the channel region of the second semiconductor layer 133.

[0092] The second gate electrode 132 may be formed of the same or substantially the same material as the first gate electrode 122, but embodiments of the present disclosure are not limited thereto. The second gate electrode 132 may be formed of a conductive material such as a metallic material. For example, the second gate electrode 132 may be formed of a single layer or multiple layers of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), or compounds thereof, but embodiments of the present disclosure are not limited thereto.

[0093] The sixth insulating layer 109 may be disposed on the second gate electrode 132. The sixth insulating layer 109 may be formed of the same or substantially the same material as the first insulating layer 103, the second insulating layer 104, the third insulating layers 105-1 and 105-2, the fourth insulating layer 106 or the fifth insulating layer 108, but the embodiments of this disclosure are not limited thereto.

[0094] The first source electrode 121, the first drain electrode 124, the second source electrode 131, and the second drain electrode 134 can be disposed on the sixth insulating layer 109.

[0095] The second source electrode 131 and the second drain electrode 134 may be formed of the same or substantially the same material as the first source electrode 121 and the first drain electrode 124, and disposed on the same layer as the first source electrode 121 and the first drain electrode 124, but the embodiments of this disclosure are not limited thereto. For example, the second source electrode 131 and the second drain electrode 134 may be formed of a single layer or multiple layers of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or their alloys, but the embodiments of this disclosure are not limited thereto. For example, the second source electrode 131 may be electrically connected to the second storage electrode 142. The second source electrode 131 may pass through the sixth insulating layer 109, the fifth insulating layer 108 and the fourth insulating layer 106, and may be electrically connected to the second storage electrode 142. For example, the second source electrode 131 may be electrically connected to the second storage electrode 142 through contact holes formed in the sixth insulating layer 109, the fifth insulating layer 108 and the fourth insulating layer 106.

[0096] The first thin-film transistor 120 and the second thin-film transistor 130 can be either a driving transistor or a switching transistor. For example, the first thin-film transistor 120 can be a driving transistor and the second thin-film transistor 130 can be a switching transistor, but the embodiments of this disclosure are not limited thereto.

[0097] At least one protective layer may be disposed on the first source electrode 121 and the first drain electrode 124. For example, multiple protective layers may include a first protective layer 111 and a second protective layer 112, but embodiments of this disclosure are not limited thereto. More or fewer protective layers may be included.

[0098] The first protective layer 111 can be disposed on the first source electrode 121 and the first drain electrode 124.

[0099] The first protective layer 111 can planarize the upper portion of the first thin-film transistor 120 and protect the first thin-film transistor 120. For example, the first protective layer 111 can planarize the steps caused by the first thin-film transistor 120. The first protective layer 111 can be formed of an organic material. For example, the first protective layer 111 can be formed of an organic material comprising acrylic resin, epoxy resin, phenolic resin, polyamide resin or polyimide resin, but the embodiments of this disclosure are not limited thereto.

[0100] The second protective layer 112 may be disposed on the first protective layer 111. The second protective layer 112 may be formed of the same or substantially the same material as the first protective layer 111, but the embodiments of this disclosure are not limited thereto.

[0101] In some exemplary embodiments, a third protective layer may also be disposed on the upper surface of the second protective layer 112, but the embodiments disclosed herein are not limited thereto.

[0102] The connecting electrode 145 can be disposed between the first protective layer 111 and the second protective layer 112.

[0103] The connecting electrode 145 can electrically connect the first thin-film transistor 120 to the light-emitting portion 150. The connecting electrode 145 can be formed of the same or substantially the same material as the first source electrode 121 and the first drain electrode 124, but the embodiments of this disclosure are not limited thereto.

[0104] The connecting electrode 145 may be formed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or their alloys, but the embodiments disclosed herein are not limited thereto.

[0105] The light-emitting part 150 may be disposed on the second protective layer 112. The light-emitting part 150 may include an anode 151, an organic layer 152, and a cathode 153.

[0106] The anode 151 may be disposed on the second protective layer 112. The anode 151 may be electrically connected to the first thin-film transistor 120 through a contact hole formed in the second protective layer 112. The anode 151 may be a reflective electrode that reflects light, but the embodiments of this disclosure are not limited thereto. The anode 151 may comprise a metallic material with high reflectivity, such as a stacked structure of aluminum (Al) and titanium (Ti) (Ti / Al / Ti), a stacked structure of aluminum (Al) and indium tin oxide (ITO) (ITO / Al / ITO), or an APC alloy, and may be formed from a single layer or multiple layers, but the embodiments of this disclosure are not limited thereto.

[0107] Organic layer 152 may be disposed on anode 151. Organic layer 152 may include one or more light-emitting structures (or light-emitting elements) stacked on anode 151 in the order of hole transfer layer and electron transfer layer or in reverse order. For example, hole transfer layer may include hole transport layer, hole injection layer, electron blocking layer, p-type charge generation layer, etc., but the embodiments of this disclosure are not limited thereto. For example, electron transfer layer may include electron transport layer, electron injection layer, hole blocking layer, n-type charge generation layer, etc., but the embodiments of this disclosure are not limited thereto. Organic layer 152 may be organic light-emitting layer, inorganic light-emitting layer, quantum dot light-emitting layer, micro light-emitting diode, micro mini light-emitting diode, etc., but the embodiments of this disclosure are not limited thereto. For example, the organic layer 152 of display panel 100 according to an exemplary embodiment of this disclosure may include organic light-emitting layer. Organic layer 152 may include red light-emitting layer, green light-emitting layer and blue light-emitting layer. Organic layer 152 may be white light-emitting layer, but the embodiments of this disclosure are not limited thereto. Hereinafter, a specific structure of organic layer 152 according to an exemplary embodiment will be described.

[0108] Figure 4 yes Figure 3 A detailed cross-sectional view of the light-emitting part.

[0109] Reference Figure 4 The light-emitting part 150 may include a plurality of sub-pixels, such as a first sub-pixel PX1, a second sub-pixel PX2 and a third sub-pixel PX3, but the embodiments disclosed herein are not limited thereto.

[0110] The thickness of the light-emitting part 150 in each sub-pixel PX1, PX2 or PX3 may be different, but the embodiments disclosed herein are not limited thereto, and the thickness of the light-emitting part 150 in each sub-pixel PX1, PX2 or PX3 may be the same.

[0111] Organic layer 152 may include multiple organic layers respectively disposed in multiple sub-pixels. For example, organic layer 152 may include a first organic layer 152a disposed in a first sub-pixel PX1, a second organic layer 152b disposed in a second sub-pixel PX2, and a third organic layer 152c disposed in a third sub-pixel PX3, but the embodiments of this disclosure are not limited thereto. The light-emitting layers EML1, EML2, and EML3 of organic layers 152a, 152b, and 152c may be physically separated, but the lower and upper layers of light-emitting layers EML1, EML2, and EML3 may be integrally formed across sub-pixels PX1, PX2, and PX3. The thickness of each light-emitting layer EML1, EML2, or EML3 may be different. For example, the thickness of the first light-emitting layer EML1 may be the largest, the thickness of the second light-emitting layer EML2 may be the second largest, and the thickness of the third light-emitting layer EML3 may be the smallest, but the embodiments of this disclosure are not limited thereto.

[0112] A hole injection layer HIL can be disposed on the anode 151. The hole injection layer HIL can be located between the anode 151 and the light-emitting layers EML1, EML2, and EML3. The hole injection layer HIL can be integrally formed across sub-pixels PX1, PX2, and PX3. For example, the hole injection layer HIL can be formed from a hole injection material selected from MTDATA, CuPc, TCTA, NPB (NPD), HATCN, TDAPB, PEDOT / PSS, F4TCNQ, N-(biphenyl-4-yl)-9,9-dimethyl-N-(4-(9-phenyl-9H-carbazol-3-yl)phenyl)-9H-fluorene-2-amine, etc., but the embodiments of this disclosure are not limited thereto.

[0113] The hole transport layer (HTL) can be disposed on the hole injection layer (HIL). The hole transport layer (HTL) can be located between the hole injection layer (HIL) and the light emission layers (EML1, EML2, and EML3). The hole transport layer (HTL) can be integrally formed across sub-pixels (PX1, PX2, and PX3). The hole transport layer (HTL) may be formed from one or more of the following materials: aromatic amine materials (e.g., NPB (N,N-naphthyl-N,N'-phenylbenzidine), TPD (N,N'-bis-(3-methylphenyl)-N,N'-bis(phenyl)-benzidine), PPD, TTBND, FFD, p-dmDPS, and TAPC), star-shaped aromatic amine materials (e.g., TCTA, PTDATA, TDAPB, TDBA, 4-a, and TCTA), and helical and ladder-shaped materials (e.g., helical-TPD, helical-mTTB, helical-2, NPD (N,N-dinaphthyl-N,N'-diphenylbenzidine), s-TAD, and MTDATA (4,4',4”-tris(N-3-methylphenyl-N-phenylamino)-triphenylamine)). However, embodiments of this disclosure are not limited thereto.

[0114] Emitting layers EML1, EML2, and EML3 can be disposed on the hole transport layer HTL. Emitting layers EML1, EML2, and EML3 can include a first emitting layer EML1, a second emitting layer EML2, and a third emitting layer EML3. The first emitting layer EML1 can be disposed in the first sub-pixel PX1, the second emitting layer EML2 can be disposed in the second sub-pixel PX2, and the third emitting layer EML3 can be disposed in the third sub-pixel PX3.

[0115] The thickness of each light-emitting layer EML1, EML2, or EML3 can be different. For example, the first light-emitting layer EML1 can be formed as follows: to The thickness of the second light-emitting layer EML2 can be formed as follows: to The thickness, and the third light-emitting layer EML3 can be formed as to The thickness is not limited to this, but the embodiments disclosed herein are not limited to this.

[0116] Each of the first luminescent layer EML1, the second luminescent layer EML2, and the third luminescent layer EML3 may include a material that can emit light in the visible light range by receiving and combining holes and electrons.

[0117] An electron blocking layer (EBL) can be disposed on each emissive layer (EML1, EML2, or EML3). The EBL can also be disposed integrally across sub-pixels PX1, PX2, and PX.

[0118] An electron transport layer (ETL) can be disposed on an electron blocking layer (EBL). The ETL can be integrally disposed across sub-pixels PX1, PX2, and PX3. The ETL can be formed from anthracene derivatives and lithium quinoline (Liq), or from one or more of oxadiazole, triazole, o-phenanthroline, benzoxazole, benzothiazole, or benzimidazole (e.g., 2-[4-(9,10-di-2-naphthyl-2-anthrayl)phenyl]-1-phenyl-1H-benzimidazole), but embodiments of this disclosure are not limited thereto.

[0119] The cathode 153 can be disposed on the electron transport layer (ETL).

[0120] Figure 5 It is a specific cross-sectional view of the light-emitting part based on the modified example.

[0121] Organic layer 152_1 may include multiple organic layers disposed in multiple sub-pixels. For example, organic layer 152_1 may include organic layers 152a_1, 152b_1, and 152c_1, but embodiments of this disclosure are not limited thereto. See alsoFigure 4 and Figure 5 The organic layer 152_1 may include a first organic layer 152a_1 disposed in the first sub-pixel PX1, a second organic layer 152b_1 disposed in the second sub-pixel PX2, and a third organic layer 152c_1 disposed in the third sub-pixel PX3.

[0122] The light-emitting layers of each organic layer 152a_1, 152b_1, or 152c_1 can be physically separated, but the lower and upper layers of the light-emitting layers can be integrally formed across sub-pixels PX1, PX2, and PX3. The thickness of each light-emitting layer can be different, but the embodiments of this disclosure are not limited to this. For example, the thickness of the first light-emitting layer of the first sub-pixel can be the largest, the thickness of the second light-emitting layer of the second sub-pixel can be the second largest, and the thickness of the third light-emitting layer of the third sub-pixel can be the smallest, but the embodiments of this disclosure are not limited to this. For example, the thickness of the first light-emitting layer EML1a of the first sub-pixel PX1 can be the largest, the thickness of the second light-emitting layer EML2a of the second sub-pixel PX2 can be the second largest, and the thickness of the third light-emitting layer EML3a of the third sub-pixel PX3 can be the smallest, but the embodiments of this disclosure are not limited to this. Furthermore, the light-emitting layers of each organic layer 152a_1, 152b_1, or 152c_1 can be configured as two or more light-emitting layers.

[0123] A hole injection layer HIL can be disposed on the anode 151. The hole injection layer HIL can be located between the anode 151 and the light-emitting layers EML1a, EML2a, and EML3a disposed in sub-pixels PX1, PX2, and PX3. The hole injection layer HIL can be integrally formed across sub-pixels PX1, PX2, and PX3. For example, the hole injection layer HIL can be formed from a hole injection material selected from MTDATA, CuPc, TCTA, NPB (NPD), HATCN, TDAPB, PEDOT / PSS, F4TCNQ, N-(biphenyl-4-yl)-9,9-dimethyl-N-(4-(9-phenyl-9H-carbazol-3-yl)phenyl)-9H-fluorene-2-amine, etc., but the embodiments of this disclosure are not limited thereto.

[0124] The first hole transport layer HTL1 can be disposed on the hole injection layer HIL. The first hole transport layer HTL1 can be located between the hole injection layer HIL and the light-emitting layers EML1a, EML2a and EML3a of sub-pixels PX1, PX2 and PX3. The first hole transport layer HTL1 can be integrally formed across sub-pixels PX1, PX2 and PX3. The first hole transport layer HTL1 may be formed from one or more of the following materials: aromatic amine materials (e.g., NPB (N,N-naphthyl-N,N'-phenylbenzidine), TPD (N,N'-bis-(3-methylphenyl)-N,N'-bis(phenyl)-benzidine), PPD, TTBND, FFD, p-dmDPS and TAPC), star-shaped aromatic amine materials (e.g., TCTA, PTDATA, TDAPB, TDBA, 4-a and TCTA), and helical and ladder-shaped materials (e.g., helical-TPD, helical-mTTB and helical-2, NPD (N,N-dinaphthyl-N,N'-diphenylbenzidine), s-TAD and MTDATA (4,4',4”-tris(N-3-methylphenyl-N-phenylamino)-triphenylamine)), but the embodiments of this disclosure are not limited thereto.

[0125] Emitting layers EML1a, EML2a, and EML3a can be disposed on the first hole transport layer HTL1. Emitting layer EML1a (1-1) can be disposed in the first sub-pixel PX1, emitting layer EML2a (2-1) can be disposed in the second sub-pixel PX2, and emitting layer EML3a (3-1) can be disposed in the third sub-pixel PX3. Each of the emitting layers EML1a, EML2a, and EML3a can be coupled with… Figure 4 Each of the light-emitting layers EML1, EML2 and EML3 is the same.

[0126] The thickness of each light-emitting layer EML1a, EML2a, or EML3a can be different. For example, the thickness of light-emitting layer EML1a (1-1) can be the largest, the thickness of light-emitting layer EML2a (2-1) can be the second largest, and the thickness of light-emitting layer EML3a (3-1) can be the smallest, but the embodiments of this disclosure are not limited thereto. For example, light-emitting layer EML1a (1-1) can be formed as follows: to The thickness of the 2-1 light-emitting layer EML2a can be formed as to The thickness, and the 3-1 light-emitting layer EML3a can be formed as to The thickness is not limited to this, but the embodiments disclosed herein are not limited to this.

[0127] The hole blocking layer HBL can be set on each emissive layer EML1a, EML2a, or EML3a. The hole blocking layer HBL can be set uniformly across sub-pixels PX1, PX2, and PX3.

[0128] The second hole transport layer HTL2 can be disposed on the hole blocking layer HBL. The second hole transport layer HTL2 can be disposed between the hole blocking layer HBL and the light-emitting layers EML1b, EML2b, and EML3b. The second hole transport layer HTL2 can be integrally formed across sub-pixels PX1, PX2, and PX3. The material of the second hole transport layer HTL2 can be the same as the material of the first hole transport layer HTL1, but the embodiments disclosed herein are not limited thereto.

[0129] Emitting layers EML1b, EML2b, and EML3b can be disposed on the second hole transport layer HTL2. Emitting layers EML1b, EML2b, and EML3b can include 1-2 emitting layers EML1b, 2-2 emitting layers EML2b, and 3-2 emitting layers EML3b. 1-2 emitting layers EML1b can be disposed in the first sub-pixel PX1, 2-2 emitting layers EML2b can be disposed in the second sub-pixel PX2, and 3-2 emitting layers EML3b can be disposed in the third sub-pixel PX3. Each of the emitting layers EML1b, EML2b, and EML3b can be identical to each of the emitting layers EML1a, EML2a, and EML3a.

[0130] The thickness of each light-emitting layer EML1b, EML2b, or EML3b can be different. For example, the thickness of the 1-2 light-emitting layer EML1b can be the largest, the thickness of the 2-2 light-emitting layer EML2b can be the second largest, and the thickness of the 3-2 light-emitting layer EML3b can be the smallest, but the embodiments of this disclosure are not limited thereto. For example, the 1-2 light-emitting layer EML1b can be formed as follows: to With a thickness of 2-2, the light-emitting layer EML2b can be formed as to The thickness, and the 3-2 light-emitting layer EML3b can be formed as to The thickness is not limited to this, but the embodiments disclosed herein are not limited to this.

[0131] An electron blocking layer (EBL) can be disposed on each emissive layer (EML1b, EML2b, or EML3b). The EBL can also be disposed integrally across sub-pixels PX1, PX2, and PX3.

[0132] An electron transport layer (ETL) can be disposed on an electron blocking layer (EBL). The ETL can be integrally disposed across sub-pixels PX1, PX2, and PX3. The ETL can be formed from anthracene derivatives and lithium quinoline (Liq), or from one or more of oxadiazole, triazole, o-phenanthroline, benzoxazole, benzothiazole, or benzimidazole (e.g., 2-[4-(9,10-di-2-naphthyl-2-anthrayl)phenyl]-1-phenyl-1H-benzimidazole), but embodiments of this disclosure are not limited thereto.

[0133] The cathode 153 may be disposed on the electron transport layer (ETL). The cathode 153 may be a transparent electrode that transmits light, but the embodiments of this disclosure are not limited thereto. For example, the cathode 153 may comprise a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) or a metal that transmits visible light, but the embodiments of this disclosure are not limited thereto.

[0134] The embankment 154 can be configured to expose the anode 151. The embankment 154 can define openings (or light-emitting regions EA1, EA2, and EA3) of sub-pixels PX1, PX2, and PX3, and can be configured to cover the edge portion (or periphery) of the anode 151. For example, the first sub-pixel PX1 may include a first light-emitting region EA1 and a first non-light-emitting region NEA1 surrounding the first light-emitting region EA1, the second sub-pixel PX2 may include a second light-emitting region EA2 and a second non-light-emitting region NEA2 surrounding the second light-emitting region EA2, and the third sub-pixel PX3 may include a third light-emitting region EA3 and a third non-light-emitting region NEA3 surrounding the third light-emitting region EA3. For example, each non-light-emitting region NEA1, NEA2, or NEA3 may correspond to the boundary between adjacent sub-pixels PX1, PX2, and PX3.

[0135] The dam 154 may include two or more layers. For example, the dam 154 may include a first dam 154a and a second dam 154b between the first dam 154a and the organic layer 152. The first dam 154a may include a black base material. For example, the first dam 154a may be formed of a material containing black pigment or an organic material such as benzocyclobutene resin, polyimide resin, acrylic resin, photosensitive polymer, etc., but embodiments of the present disclosure are not limited thereto. When the first dam 154a is formed of a material containing black pigment or black dye, the first dam 154a may be a black dam. For example, the first dam 154a may be made of an insulating material containing black material. When the first dam 154a is formed of a material containing black pigment or black dye, it can block external light or light reflected from the outside, thereby further improving the brightness of the display device. The first dam 154a may be used to absorb light reflected from the lower portion of the first dam 154a in externally incident light. The second dam 154b may include a transparent base material. The second dam portion 154b may be a transparent dam portion, but the embodiments disclosed herein are not limited thereto. For example, the second dam portion 154b may be made of a transparent insulating material.

[0136] Figure 3 A side surface of a first embankment 154a is shown, which is aligned with the side surface of a second embankment 154b. However, compared to the side surface of the first embankment 154a, the side surface of the second embankment 154b can be positioned closer to the boundary between the non-luminous regions NEA1, NEA2, and NEA3. For example, the second embankment 154b can expose the upper surface of the first embankment 154a. The following will... Figure 9 to Figure 11 The text provides a detailed description of it.

[0137] Spacer 155 may also be disposed on the embankment 154. Spacer 155 may be formed of the same or substantially the same material as the second embankment 154b, but embodiments of the present disclosure are not limited thereto. For example, spacer 155 may be a transparent embankment. For example, spacer 155 may be disposed on at least one of the boundaries of the first sub-pixel PX1 to the third sub-pixel PX3, but embodiments of the present disclosure are not limited thereto. In some exemplary embodiments, the second embankment 154b and spacer 155 may be formed of the same or substantially the same material and formed simultaneously through a halftone mask, but embodiments of the present disclosure are not limited thereto.

[0138] The organic layer 152 can be disposed on the anode 151, the embankment 154, and the spacer 155. The cathode 153 can be disposed on the organic layer 152.

[0139] The encapsulation portion 170 may be disposed on the cathode 153. The encapsulation portion 170 may include one or more insulating layers. For example, the encapsulation portion 170 may include a first encapsulation layer 171, a second encapsulation layer 172 disposed on the first encapsulation layer 171, and a third encapsulation layer 173 disposed on the second encapsulation layer 172, but embodiments of the present disclosure are not limited thereto. More or fewer encapsulation layers may be included. The encapsulation portion 170 may include one or more inorganic insulating material layers and one or more organic material layers. For example, the first encapsulation layer 171 and the third encapsulation layer 173 may include inorganic insulating materials, and the second encapsulation layer 172 may include organic materials, but embodiments of the present disclosure are not limited thereto.

[0140] For example, the first encapsulation layer 171 and the third encapsulation layer 173 may include inorganic insulating materials capable of low-temperature deposition, such as silicon nitride (SiN), silicon oxide (SiO), silicon oxynitride (SiON), and aluminum oxide (Al2O3). For example, the second encapsulation layer 172 may include organic materials, such as acrylic resin, epoxy resin, polyimide, polyethylene, and silicon carbide (SiOC).

[0141] The touch portion 180 may be disposed on the encapsulation portion 170. The touch portion 180 may include multiple layers. For example, the touch portion 180 may include a touch buffer layer 181, a first touch conductive layer, a first touch insulating layer 183, a second touch insulating layer 184, and a second touch conductive layer, but the embodiments of this disclosure are not limited thereto. In some exemplary embodiments, the touch organic layer may also be disposed on the second touch conductive layer, but the embodiments of this disclosure are not limited thereto.

[0142] Figure 6 It is based on Figure 3 A cross-sectional view of the touch portion.

[0143] Reference Figure 3 and Figure 6 The touch buffer layer 181 may be disposed on the encapsulation portion 170. For example, the touch buffer layer 181 may be disposed on the third encapsulation layer 173. The touch buffer layer 181 may be formed of the same or substantially the same material as the buffer layer 102, but the embodiments of this disclosure are not limited thereto.

[0144] A first touch conductive layer may be disposed on the touch buffer layer 181. The first touch conductive layer may include a bridge electrode 182. The bridge electrode 182 and sensor electrode 185, which will be described below, may be disposed at each of the boundaries between adjacent sub-pixels PX1, PX2, and PX3. For example, the bridge electrode 182 and sensor electrode 185 may be disposed in non-light-emitting regions NEA1, NEA2, and NEA3. The bridge electrode 182 and sensor electrode 185 may overlap with the black matrix BM, which will be described below, in the thickness direction. The black matrix BM may be configured to cover the bridge electrode 182 and sensor electrode 185. For example, the length of the black matrix BM may be greater than the length of the bridge electrode 182 and sensor electrode 185. Therefore, the visibility of the bridge electrode 182 and sensor electrode 185 from the outside can be prevented or reduced. For example, the width of the black matrix BM may be less than the width of the embankment 154.

[0145] The first touch insulating layer 183 and the second touch insulating layer 184 disposed on the first touch insulating layer 183 may be disposed on the first touch conductive layer. For example, the first touch insulating layer 183 and the second touch insulating layer 184 disposed on the first touch insulating layer 183 may be disposed on the bridge electrode 182. The first touch insulating layer 183 and the second touch insulating layer 184 disposed on the first touch insulating layer 183 can prevent short circuits between the first touch conductive layer and the second touch conductive layer. The first touch insulating layer 183 may be formed of silicon oxide (SiOx), silicon nitride (SiNx), or multiple layers thereof, but the embodiments of this disclosure are not limited thereto. The second touch insulating layer 184 may include an organic insulating material, but the embodiments of this disclosure are not limited thereto, and the second touch insulating layer 184 may include the same or substantially the same material as the first touch insulating layer 183, but the embodiments of this disclosure are not limited thereto.

[0146] The second touch conductive layer may be disposed on the second touch insulating layer 184. The second touch conductive layer may include a first sensor electrode 185a and a second sensor electrode 185b. The sensor electrode 185a may be disposed in a first direction DR1 (see...). Figure 1 The first sensor electrode 185a extends on the first direction DR1 and in the second direction DR2 (see [reference]). Figure 1 The second sensor electrode 185b extends from the top.

[0147] The bridge electrode 182 can be electrically connected to the first sensor electrode 185a through contact holes formed in the first touch insulating layer 183 and the second touch insulating layer 184. The second sensor electrode 185b can be disposed on the second touch insulating layer 184. For example, the first sensor electrode 185a and the bridge electrode 182 can be in a first direction DR1 (see...). Figure 1 Extending upwards.

[0148] Sensor electrode 185 and bridge electrode 182 may comprise metallic materials. For example, sensor electrode 185 and bridge electrode 182 may be formed of titanium (Ti), nickel (Ni), aluminum (Al) or alloys thereof, and may be formed of a three-layer structure such as titanium (Ti) / aluminum (Al) / titanium (Ti), but embodiments of this disclosure are not limited thereto.

[0149] The color filter insulating layer 114 may be disposed on the second touch conductive layer. The color filter insulating layer 114 may be formed of an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but embodiments of the present disclosure are not limited thereto.

[0150] The black matrix BM can be disposed on the color filter insulating layer 114. For example, the black matrix BM can be disposed on a portion of the color filter insulating layer 114. The black matrix BM can include a black base material. For example, the black matrix BM can include a light-blocking material or a light-absorbing material. For example, the black matrix BM can be formed from a material including black pigments, black dyes, etc. The black matrix BM can be configured to cover the bridge electrode 182 and the sensor electrode 185. The bridge electrode 182 and the sensor electrode 185 can overlap with the black matrix BM. Therefore, the visibility of the bridge electrode 182 and the sensor electrode 185 from the outside can be prevented or reduced. For example, the width of the black matrix BM can be smaller than the width of the embankment 154.

[0151] Color filters 191, 192, and 193 can be set on the black matrix BM.

[0152] Color filters 191, 192, and 193 can be respectively disposed on the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3, and can block specific colors in the light emitted from the light-emitting areas EA1, EA2, and EA3 of the sub-pixels PX1, PX2, and PX3. The first color filter 191 can be configured as the first color filter, the second color filter 192 can be configured as the second color filter, and the third color filter 193 can be configured as the third color filter.

[0153] The first color filter 191 can be configured to block light of colors other than red (R) light. In this case, the first color filter 191 can be configured as a red color filter. The second color filter 192 can be configured to block light of colors other than green (G) light. In this case, the second color filter 192 can be configured as a green color filter. The third color filter 193, configured in the third sub-pixel PX3, can be configured to block light of colors other than blue (B) light. In this case, the third color filter 193 can be configured as a blue color filter. However, the embodiments disclosed herein are not limited thereto.

[0154] For example, each color filter 191, 192, or 193 may be in direct contact with the side and top surfaces of the black matrix BM. Specifically, each color filter 191, 192, and 193 may be in direct contact with a portion of the side and top surfaces of the black matrix BM, but embodiments of this disclosure are not limited thereto. For example, each color filter 191, 192, or 193 may be spaced apart from the boundaries of adjacent sub-pixels PX1, PX2, and PX3, but embodiments of this disclosure are not limited thereto, and color filters 191, 192, and 193 may overlap each other in the thickness direction.

[0155] A planarization layer OC can be disposed on color filters 191, 192, and 193. The planarization layer OC can be used to planarize the steps formed by color filters 191, 192, and 193. For example, the planarization layer OC may include an organic insulating material. For example, the planarization layer OC may be integrally formed across sub-pixels PX1, PX2, and PX3.

[0156] Figure 7 It is along Figure 1 The cross-sectional view taken by line B-B' in the diagram.

[0157] Reference Figure 7 At least one of the inorganic layers 102, 103, 104, 105-1, 105-2, 106, 108, and 109 may not extend to the end portion of the substrate 101. For example, at least one of the inorganic layers 102, 103, 104, 105-1, 105-2, 106, 108, and 109 may expose the end portion of the substrate 101, but embodiments of this disclosure are not limited thereto.

[0158] A display panel 100 according to an exemplary embodiment may further include a crack sensing pattern (CSP), a low-potential voltage line (VSSL), and a gating drive unit (GIP). The gating drive unit (GIP) may be configured, for example, in the form of a driver chip (IC), but is not limited thereto. As described above... Figure 1 As described above, the low potential voltage line VSSL can be located between the crack sensing pattern CSP and the display area DA, and the gating drive unit GIP can be located between the low potential voltage line VSSL and the display area DA.

[0159] For example, such as Figure 7 As shown, the gate drive unit GIP can be composed of a conductive layer located on the same layer as the first gate electrode 122 (see [reference]). Figure 3 ), and the conductive layer located on the same layer as the second light-shielding layer 136 (see Figure 3 Alternatively, a conductive layer may be formed on the same layer as the first source electrode 121, but the embodiments disclosed herein are not limited thereto.

[0160] For example, a crack sensing pattern CSP can be disposed between the first weir D1 and the second weir D2. The crack sensing pattern CSP can be formed by the first gate electrode 122 (see...). Figure 3 The conductive layer located on the same layer or the second light-shielding layer 136 (see...) Figure 3 A conductive layer may be formed on the same layer as the first source electrode 121, but embodiments of this disclosure are not limited thereto. For example, the crack sensing pattern CSP may include a conductive layer on the same layer as the first source electrode 121, but embodiments of this disclosure are not limited thereto.

[0161] A low potential voltage line VSSL can be disposed between the crack sensing pattern CSP and the gating drive unit GIP. The low potential voltage line VSSL can be formed by a conductive layer located on the same layer as the first source electrode 121, but the embodiments of this disclosure are not limited thereto.

[0162] The first protective layer 111 may cover the gated drive unit GIP and partially cover one end portion of the low potential voltage line VSSL, while exposing the other end portion of the low potential voltage line VSSL. The first protective layer 111 may cover the portion of the upper surface of the low potential voltage line VSSL adjacent to one end portion. In this disclosure, one end portion may refer to the area of ​​a component located in the direction from the non-display area NDA toward the display area DA, and the other end portion may refer to the area of ​​a component located in the direction from the display area DA toward the non-display area NDA.

[0163] A first connecting electrode CNE1, located on the same layer as connecting electrode 145, can be disposed on the first protective layer 111. The first connecting electrode CNE1 can be directly connected to the area of ​​the low-potential voltage line VSSL exposed through the first protective layer 111. The first connecting electrode CNE1 can cover another end portion of the low-potential voltage line VSSL, but embodiments of this disclosure are not limited thereto. The first connecting electrode CNE1 can also cover another portion of the upper surface of the low-potential voltage line VSSL adjacent to the other end portion.

[0164] The second protective layer 112 may be disposed on the first connecting electrode CNE1. The second protective layer 112 may be in direct contact with and cover one end portion of the first connecting electrode CNE1, while exposing the other end portion of the first connecting electrode CNE1. The second protective layer 112 may cover a portion of the first connecting electrode CNE1.

[0165] The second protective layer 112 can form the first layer of the first weir D1 and the first layer of the second weir D2. For example, the first weir D1 can overlap with the low potential voltage line VSSL and cover the other end portion of the low potential voltage line VSSL. The first weir D1 can be in direct contact with the first connection electrode CNE1 and cover the other end portion of the first connection electrode CNE1. The second protective layer 112 forming the first layer of the second weir D2 can be in direct contact with the exposed side surface of at least one of the inorganic layers 102, 103, 104, 105, 106, 107 and 109 of the panel, and can be in direct contact with the upper surface of the substrate 101, but the embodiments of this disclosure are not limited thereto. The second protective layer 112 can overlap with the gated drive unit GIP. In this disclosure, for example, two weirs are provided, but the weirs can be provided as three or more weirs or one weir.

[0166] With anode 151 (see) Figure 3 A low-potential connection electrode 151' located on the same layer can be disposed on the second protective layer 112 and the first connection electrode CNE1 exposed through the second protective layer 112. The low-potential connection electrode 151' can be electrically connected to the first connection electrode CNE1 exposed through the second protective layer 112. Figure 3 The cathode 153 mentioned above (see above) Figure 3 For example, a low-potential connection electrode 151' may be disposed on a portion of the second protective layer 112.

[0167] A dam portion 154 may be disposed on the low-potential connection electrode 151' and the second protective layer 112. For example, the dam portion 154 may be disposed on another portion of the second protective layer 112. The dam portion 154 may overlap with the gate drive unit GIP, overlap with the low-potential connection electrode 151', and cover another end portion of the low-potential connection electrode 151'. The dam portion 154 may completely cover the low-potential connection electrode 151', but embodiments of the present disclosure are not limited thereto. The dam portion 154 may expose the central portion and another end portion of the first connection electrode CNE1, but embodiments of the present disclosure are not limited thereto. The first dam portion 154a of the dam portion 154 may form a second layer of the first dam portion D1 and a second layer of the second dam portion D2. In each dam portion D1 or D2, the first dam portion 154a may overlap with the second protective layer 112 forming the first layer and completely cover the second protective layer 112, but embodiments of the present disclosure are not limited thereto. In the second weir portion D2, the first dike portion 154a may contact the side surface of the second protective layer 112 and the upper surface of the substrate 101, but the embodiments of this disclosure are not limited thereto. The second dike portion 154b may form a third layer of the weir portion D1 or D2. The second dike portion 154b forming the third layer of each weir portion D1 or D2 may overlap with the first dike portion 154a forming the second layer and completely cover the first dike portion 154a, but the embodiments of this disclosure are not limited thereto. In the second weir portion D2, the second dike portion 154b may contact the side surface of the first dike portion 154a and the upper surface of the substrate 101, but the embodiments of this disclosure are not limited thereto.

[0168] The spacer 155 can form a fourth layer of the first weir D1 and a fourth layer of the second weir D2. In each of the first weir D1 or the second weir D2, the spacer 155 can overlap with the second embankment 154b forming the third layer. In the second weir D2, the spacer 155 forming the fourth layer can overlap with the second embankment 154b forming the third layer.

[0169] The encapsulation portion 170 may be disposed on the spacer 155. For example, the encapsulation portion 170 may include a first encapsulation layer 171, a second encapsulation layer 172 disposed on the first encapsulation layer 171, and a third encapsulation layer 173 disposed on the second encapsulation layer 172, but the embodiments of this disclosure are not limited thereto.

[0170] The first encapsulation layer 171 extends to the gate drive unit GIP, the low potential voltage line VSSL, the first dam D1, and the second dam D2, and covers the outer surface of the second dam D2. The second encapsulation layer 172 extends to the gate drive unit GIP and the low potential voltage line VSSL. The second encapsulation layer 172 terminates at the first dam D1. The second encapsulation layer 172 overlaps with the gate drive unit GIP and the low potential voltage line VSSL. The third encapsulation layer 173 extends to the gate drive unit GIP, the low potential voltage line VSSL, the first dam D1, and the second dam D2, and directly contacts the first encapsulation layer 171 on the first dam D1, the crack sensing pattern CSP, and the second dam D2.

[0171] The touch buffer layer 181 and the first touch insulating layer 183 may extend to the gating drive unit GIP, the low potential voltage line VSSL, the first dam D1 and the second dam D2, and cover the outer surface of the second dam D2. The second touch insulating layer 184 may extend to the gating drive unit GIP, the low potential voltage line VSSL, the first dam D1 and the crack sensing pattern CSP, and terminate on the second dam D2, but the embodiments of this disclosure are not limited thereto.

[0172] The color filter insulating layer 114 may extend to the gate drive unit GIP, the low potential voltage line VSSL, the first weir D1 and the second weir D2, and be in direct contact with the outer surface of the second touch insulating layer 184, but the embodiments of this disclosure are not limited thereto.

[0173] Figure 8 It is along Figure 1 The cross-sectional view taken from line C-C' in the diagram.

[0174] Reference Figure 3 , Figure 7 and Figure 8 The bending region BR can be disposed between the sub-region SR and the crack sensing pattern CSP. In the bending region BR, layers disposed on the substrate 101 can be removed. For example, in the bending region BR, inorganic layers 102, 103, 104, 105, 106, 107 and 109 of the panel can be removed to expose the upper surface of the substrate 101, but the embodiments disclosed herein are not limited thereto.

[0175] In the first pad area PA1, a connection can be made with the first source electrode 121 (see...). Figure 3 The pad electrode PAD is disposed on the same layer and is connected to the first source electrode 121 (see [link]). Figure 3 The third connecting electrode CNE3, which is set on the same layer, can be set on the crack sensing pattern CSP.

[0176] The first protective layer 111 can be disposed on the pad electrode PAD and the third connection electrode CNE3. The first protective layer 111 can be disposed in the bending region BR, and in the bending region BR, the first protective layer 111 can be disposed on the substrate 101, the first protective layer 111 can be in direct contact with the upper surface of the substrate 101, and in the bending region BR, the first protective layer 111 can be in direct contact with the side surfaces of the inorganic layers 102, 103, 104, 105, 106, 107 and 109 of the panel.

[0177] The second connecting electrode CNE2 can be disposed on the first protective layer 111, and the second connecting electrode CNE2 can be connected to the connecting electrode 145 (see...). Figure 3 The electrodes are disposed on the same layer, but the embodiments disclosed herein are not limited thereto. The second connecting electrode CNE2 can electrically connect the pad electrode PAD to the third connecting electrode CNE3. The second connecting electrode CNE2 can be disposed on the bending region BR, and can also be disposed on the first pad region PA1 and the crack sensing pattern CSP. For example, the second connecting electrode CNE2 can be disposed on the first protective layer 111 in the bending region BR.

[0178] A data drive unit (DIC) can be disposed on a pad electrode (PAD). The DIC may include a bump (BUMP), and an anisotropic conductive film (ACF) can be disposed between the pad electrode (PAD) and the bump (BUMP), electrically connecting the pad electrode (PAD) to the bump (BUMP). The anisotropic conductive film (ACF) may include a resin (RS) and a plurality of conductive balls (CBs) dispersed within the resin (RS). The pad electrode (PAD) and the bump (BUMP) can be electrically connected via the conductive balls (CBs).

[0179] The second protective layer 112 can be disposed on the second connection electrode CNE2. The second protective layer 112 can expose the pad electrode PAD.

[0180] The first encapsulation layer 171 and the third encapsulation layer 173 of the encapsulation portion 170 may extend up to the bending region BR. For example, the first encapsulation layer 171 and the third encapsulation layer 173 may extend up to the crack sensing pattern CSP, but embodiments of the present disclosure are not limited thereto, and the first encapsulation layer 171 and the third encapsulation layer 173 may also overlap with the crack sensing pattern CSP. The first encapsulation layer 171 and the third encapsulation layer 173 may not be arranged in the bending region BR.

[0181] The touch buffer layer 181 and the first touch insulating layer 183 may extend up to the bending region BR. For example, the touch buffer layer 181 and the first touch insulating layer 183 may extend up to the crack sensing pattern CSP, but embodiments of this disclosure are not limited thereto, and the touch buffer layer 181 and the first touch insulating layer 183 may also overlap with the crack sensing pattern CSP. The touch buffer layer 181 and the first touch insulating layer 183 may not be provided in the bending region BR.

[0182] The second touch insulating layer 184 may overlap with the first weir portion D1 and the second weir portion D2. The second touch insulating layer 184 may not be disposed outside the second weir portion D2, but embodiments of this disclosure are not limited thereto. The second touch insulating layer 184 may not be disposed within the bending region BR.

[0183] Touch connection line 185' can be electrically connected to the second connection electrode CNE2. Touch connection line 185' can be used to provide pressure from the pad electrode PAD and the second connection electrode CNE2 to... Figure 3 The signal from the first sensor electrode 185a or the second sensor electrode 185b mentioned above. The touch connection line 185' can connect to the second touch conductive layer ( Figure 3 The first sensor electrode 185a) is located on the same layer, but the embodiments of this disclosure are not limited thereto, and the touch connection line 185' may be located on the same layer as the first touch conductive layer. Figure Three The bridge electrode 182) may be formed on the bridge electrode, or by two first and second touch conductive layers, but the embodiments of this disclosure are not limited thereto. The touch connection line 185' may not be provided in the curved region BR.

[0184] The color filter insulation layer 114 can be disposed on the touch connection line 185', and the color filter insulation layer 114 may not be disposed in the bending area BR.

[0185] Figure 9 yes Figure 1 A planar layout diagram of the sub-pixels of the display area.

[0186] Reference Figure 9 A display panel 100 according to an exemplary embodiment may include a plurality of sub-pixels PX1, PX2, and PX3. First sub-pixels PX1 (or a first sub-pixel column) may be spaced apart from each other in a second direction DR2, second sub-pixels PX2 (or a second sub-pixel column) may be spaced apart from each other in the second direction DR2, and third sub-pixels PX3 (or a third sub-pixel column) may be spaced apart from each other in the second direction DR2. These sub-pixel columns may be arranged adjacent to each other in a first direction DR1, but embodiments of this disclosure are not limited thereto.

[0187] The anode 151 can be exposed through the embankments 154a and 154b. The anode 151 exposed through the embankments 154a and 154b can have a flat surface shape. For example, the flat surface shape of the anode 151 exposed through the embankments 154a and 154b can be circular, but the embodiments of this disclosure are not limited thereto.

[0188] The first dike section 154a can be exposed through the second dike section 154b. Figure 9 Only the area of ​​the first embankment 154a exposed through the second embankment 154b is shown; however, in reality, the first embankment 154a may also include an area overlapping with the second embankment 154b. Figure 10 and Figure 11 The overlapping portion (OVP).

[0189] The first embankment 154a may include a first exposed portion EP1 exposed through the second embankment 154b. In a plan view, the first exposed portion EP1 may surround the anode 151 exposed through the embankments 154a and 154b. For example, in a plan view, the first exposed portion EP1 may completely surround the anode 151 exposed through the embankments 154a and 154b, but embodiments of this disclosure are not limited thereto. The first exposed portion EP1 may overlap with the anode 151 and surround the area exposed through the embankments 154a and 154b in a plan view.

[0190] In the plan view, the second exposed portion EP2 can protrude outward from the first exposed portion EP1. For example, the second exposed portion EP2 can be configured as a plurality of second exposed portions, and the plurality of second exposed portions EP2 can be configured to be spaced apart from each other in the plan view. Figure 9 An exemplary illustration shows a second exposed portion EP2 protruding outward from the first exposed portion EP1 in the direction between the first direction DR1 and the second direction DR2, and the number of second exposed portions EP2 is shown as four; however, embodiments of this disclosure are not limited thereto. The second exposed portions EP2 may be spaced at regular intervals, but embodiments of this disclosure are not limited thereto. In some exemplary embodiments, the second exposed portions EP2 may be positioned along either the first direction DR1 or the second direction DR2. For example, the second exposed portions EP2 may be positioned along the first direction DR1, the second direction DR2, or in the direction between the first direction DR1 and the second direction DR2.

[0191] For example, the flat surface shape of the second exposed portion EP2 can be substantially an equilateral triangle or a right triangle, but embodiments of this disclosure are not limited thereto. For example, each of the side surfaces of the second exposed portion EP2 can be about 5 μm, but embodiments of this disclosure are not limited thereto. In some exemplary embodiments, the length of the lower surface of the second exposed portion EP2 that contacts the first exposed portion EP1 can be about 4 μm, and the length of its side surfaces can be about 8 μm, but embodiments of this disclosure are not limited thereto.

[0192] For example, the outline of the flat surface shape of the first embankment 154a exposed by the second embankment 154b may include at least one outwardly projecting protrusion. This protrusion may be the same as the second exposed portion EP2.

[0193] In the embankments 154a and 154b according to an exemplary embodiment, since the first embankment 154a includes an OVP exposed through the second embankment 154b and disposed at the overlapping portion (see...) Figure 10 The second exposed portion EP2 is located between the first exposed portion EP1 and the second exposed portion EP2, and the second exposed portions EP2 are spaced apart from each other (protrusions or inclined structures are applied to the embankment), thereby improving the spreadability of the second encapsulation layer (or organic encapsulation layer). Figure 9 The application of a protruding structure to a levee is illustrated. In this disclosure, when a protruding or inclined structure is applied to a levee, it means that the shape formed by the contours of the first exposed portion EP1 and the second exposed portion EP2 of the levee has a protruding shape or an inclined shape (or a polygon). Figure 13 In this context, the shape formed by the outline of the exposed portion EP_1 can be an inclined shape.

[0194] like Figure 9 As shown, the flat surface shape and flat surface arrangement of the second exposed portion EP2 of all sub-pixels PX1, PX2 and PX3 can be the same, but the embodiments of this disclosure are not limited thereto.

[0195] Figure 10 It is along Figure 9 The cross-sectional view taken by line D-D' in the diagram. Figure 11 It is along Figure 9 The cross-sectional view taken from line E-E' in the diagram. Figure 10 The cross-sectional shapes of the embankment sections 154a and 154b, including the second exposed portion EP2, are shown, and Figure 11 The cross-sectional shapes of the embankments 154a and 154b without the second exposed portion EP2 are shown.

[0196] like Figure 9 to Figure 11As shown, a first dam 154a may cover the periphery of the anode 151 and expose the central portion of the anode 151. A second dam 154b may be disposed on the first dam 154a and may overlap with the first dam 154a. The second dam 154b may expose a portion of the first dam 154a. For example, the first dam 154a may include an overlapping portion OVP that overlaps with the second dam 154b and exposed portions EP1 and EP2 that are exposed through the second dam 154b. Exposed portions EP1 and EP2 may include a first exposed portion EP1 protruding from the end of the second dam 154b toward the central portion of the anode 151 and a second exposed portion EP2 between the first exposed portion EP1 and the overlapping portion OVP. The first exposed portion EP1 may include the inner surface (or side surface) of the first dam 154a. The upper surface of the second exposed portion EP2 may be in direct contact with the organic layer 152, and the side surface of the first exposed portion EP1 may be in direct contact with the organic layer 152.

[0197] Reference Figure 10 and Figure 11The distance between the end of the black matrix BM and the boundary between the first luminous region EA1 and the first non-luminous region NEA1 can be longer than the distance between the end of the dike portion 154 and the boundary between the first luminous region EA1 and the first non-luminous region NEA1. The end of the dike portion 154 can be aligned with the boundary between the first luminous region EA1 and the first non-luminous region NEA1, but the embodiments of this disclosure are not limited thereto. The end of the black matrix BM can be spaced apart from the boundary between the first luminous region EA1 and the first non-luminous region NEA1. The end of the black matrix BM can be positioned further away from the first luminous region EA1 than the end of the first dike portion 154a. In the case of a display panel 100 according to an exemplary embodiment, the dam 154 (first dam 154a) may include a black base material, and since the spacing between the end of the black matrix BM and the boundary between the first light-emitting region EA1 and the first non-light-emitting region NEA1 can be longer than the spacing between the end of the dam 154 and the boundary between the first light-emitting region EA1 and the first non-light-emitting region NEA1, light emitted from the first light-emitting region EA1 can be emitted upward at a larger viewing angle, which is as large as the spacing between the end of the black matrix BM and the boundary between the first light-emitting region EA1 and the first non-light-emitting region NEA1. Therefore, brightness reduction can be minimized or reduced depending on the viewing angle. However, when the spacing between the end of the black matrix BM and the boundary between the first light-emitting region EA1 and the first non-light-emitting region NEA1 is longer than the spacing between the end of the dam 154 and the boundary between the first light-emitting region EA1 and the first non-light-emitting region NEA1, and the dam 154 is formed of a transparent material, light incident from the outside can be reflected by the dam 154, thereby producing visible annular spots. However, in the case of the display panel 100 according to an exemplary embodiment, light incident from the outside can be absorbed or blocked by the embankment 154 comprising a black base material, thereby preventing or reducing the occurrence of ring spots.

[0198] For example, such as Figure 10 and Figure 11 As shown, the black matrix BM may not overlap with the first exposed portion EP1, but the embodiments of this disclosure are not limited thereto. The end of the black matrix BM may be positioned further away from the first light-emitting region EA1 than the end of the first embankment 154a, and as... Figure 10 As shown, the black matrix BM can overlap with the second exposed portion EP2. The black matrix BM can also overlap with the overlapping portion OVP.

[0199] The second encapsulation layer 172 can be disposed on the first encapsulation layer 171 and can include an organic insulating material. Because the second encapsulation layer 172 includes an organic insulating material and has a relatively large thickness, the second encapsulation layer 172 applied to the first light-emitting region EA1 may have difficulty diffusing to the first non-light-emitting region NEA1. Specifically, as...Figure 11 As shown, when the inner surfaces (or side surfaces) of the first dam 154a and the second dam 154b are aligned to form a step, it may be difficult for the second encapsulation layer 172 to diffuse across the step to the first non-luminescent region NEA1.

[0200] When a structure such as a raised film is applied to the surface of the first encapsulation layer 171, the surface tension between the second encapsulation layer 172 and the first encapsulation layer 171 can increase. Therefore, the second encapsulation layer 172 can diffuse over the corresponding step. However, in this case, the function of the first encapsulation layer 171 in blocking external moisture may be degraded. In this situation, the second encapsulation layer 172 can diffuse over the step into the first non-luminescent region NEA1, and the function of the first encapsulation layer 171 in blocking external moisture may be degraded.

[0201] However, according to a display panel 100 of an exemplary embodiment, the first embankment 154a may include a second embankment 154b exposed and disposed at the overlapping portion OVP (see [link to original text]). Figure 10 A second exposed portion EP2 is provided between the first exposed portion EP1 and the second exposed portion EP2, and the second exposed portions EP2 can be spaced apart from each other (the protruding structure can be applied to the embankment). For example, as... Figure 10 As shown, by arranging the inner surfaces of the first embankment 154a and the second embankment 154b spaced apart from each other in the area where the second exposed portion EP2 is applied, the size can be minimized or reduced. Figure 11 The step difference between the inner surfaces of the first dike portion 154a and the second dike portion 154b in the middle. Therefore, the spreadability of the second encapsulation layer (or organic encapsulation layer) can be improved.

[0202] In the following description, a display device according to other embodiments will be described. In the following embodiments, details will be omitted or briefly described. Figure 1 to Figure 11 The accompanying drawings or parts described in detail may omit or briefly describe any repeated descriptions.

[0203] Figure 12 This is a planar arrangement diagram of the sub-pixels of the display area of ​​a display device according to another exemplary embodiment.

[0204] Reference Figure 12 The display panel 100_1 according to this embodiment and according to Figure 9 The difference in the display panel 100 is that the arrangement of the second exposed portion EP2 in each sub-pixel PX1, PX2 or PX3 can be different.

[0205] More specifically, display panel 100_1 and Figure 9 The difference between the display panel 100 and the display panel 100 is that... Figure 9The arrangement of the second exposed portion EP2 is applied to the first sub-pixel PX1 (first sub-pixel row), and the second exposed portion EP2 of the second sub-pixel PX2 extends in the first direction DR1 or the second direction DR2. For example, Figure 9 The arrangement of the second exposed portion EP2 is applied to the first sub-pixel PX1 (first sub-pixel row) and the third sub-pixel PX3 (or third sub-pixel column), and the second exposed portion EP2 of the second sub-pixel PX2 extends in the first direction DR1 or the second direction DR2. For example, the second exposed portion EP2 of the first sub-pixel PX1 (first sub-pixel row) and the third sub-pixel PX3 (or third sub-pixel column) protrudes in the direction between the first direction DR1 and the second direction DR2.

[0206] According to this embodiment, since the arrangement of the second exposed portion EP2 is different in each sub-pixel PX1, PX2 or PX3, the external visibility of the pattern due to the arrangement of the second exposed portion EP2 can be minimized or reduced.

[0207] Since the above has already been Figure 1 to Figure 11 The rest of the text is described in the previous section, so its detailed description will be omitted or briefly given below.

[0208] Figure 13 This is a planar arrangement diagram of the sub-pixels of the display area of ​​a display device according to yet another exemplary embodiment.

[0209] Reference Figure 13 According to this embodiment, the first embankment 154a_1 of the embankment 154_1 of the display panel 100_2 and according to Figure 9 The difference of the display panel 100 is that it includes an exposed portion EP_1 exposed through the second embankment 154b_1.

[0210] More specifically, the first embankment 154a_1 may include an exposed portion EP_1, and the outline of the flat surface shape of the exposed portion EP_1 may include a plurality of curved portions. Figure 13 The outline of the exposed portion EP_1, which includes six curved sections, is shown, but the outline may include one to five or seven or more curved sections.

[0211] In this embodiment, the first dam 154a_1 may include an exposed portion EP2_1 exposed through the second dam 154b_1, and the curved portions of the outline of the exposed portion EP2_1 may be spaced apart from each other (an inclined structure may be applied to the dam). Therefore, the spreadability of the second encapsulation layer (or organic encapsulation layer) can be improved.

[0212] Since the above has already been Figure 1 to Figure 11The rest of the text is described in the previous section, so its detailed description will be omitted or briefly given below.

[0213] Figure 14 This is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0214] Reference Figure 14 The display panel 100_3 of the display device according to this embodiment and the display panel 100_3 according to this embodiment Figure 3 The difference in the display panel 100 is that the organic layer 152_1 of the light-emitting part 150_1 can be physically separated from the trench TRP.

[0215] According to this embodiment, since the second protective layer 112 on the non-light-emitting regions NEA1, NEA2 and NEA3 includes a trench TRP, the organic layer 152_1 integrally formed across sub-pixels PX1, PX2 and PX3 can be separated, thereby preventing or reducing lateral leakage current between adjacent sub-pixels PX1, PX2 and PX3.

[0216] Since the above has already been Figure 3 The rest is described in the text, so its detailed description will be omitted or given only briefly.

[0217] Figure 15 This is a cross-sectional view of a display device according to yet another exemplary embodiment. Figure 16 This is a cross-sectional view of a display device according to yet another exemplary embodiment. Figure 17 This is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0218] Reference Figure 15 to Figure 17 The display panel 100_4 of the display device according to this embodiment and the display panel 100_4 according to this embodiment Figure 3 , Figure 7 and Figure 8 The difference with the display panel 100 is that it may also include a third protective layer 113 on the second protective layer 112.

[0219] More specifically, the display panel 100_4 according to this embodiment may further include a third protective layer 113 between the second protective layer 112 and the anode 151. For example, the third protective layer 113 may be configured to surround the trench TRP. The third protective layer 113 and the trench TRP may be disposed on the second protective layer 112. The material of the third protective layer 113 may include at least one of the materials exemplified as the material of the second protective layer 112, but embodiments of this disclosure are not limited thereto.

[0220] like Figure 15As shown, the trench TRP can penetrate the third protective layer 113 in the non-luminescent regions NEA1, NEA2, and NEA3. The trench TRP may not penetrate the second protective layer 112. For example, the trench TRP may be configured to expose a portion of the second protective layer 112. The first embankment 154a can directly contact the upper surface of the second protective layer 112 within the trench TRP. For example, the first embankment 154a can directly contact the portion of the upper surface of the second protective layer 112 exposed by the trench TRP.

[0221] Each of the first weir section D1_1 and the second weir section D2_1 may include a third protective layer 113 as a first layer, and may not include a second protective layer 112, but the embodiments of this disclosure are not limited thereto.

[0222] Since the above has already been Figure 3 , Figure 7 and Figure 8 The rest of the text is described in the previous section, so its detailed description will be omitted or briefly given below.

[0223] Figure 18 This is a cross-sectional view of a display device according to yet another exemplary embodiment.

[0224] Reference Figure 18 According to this embodiment, the color filters 191_1, 192_1, and 193_1 of the display panel 100_5 of the display device are consistent with those of the display device according to this embodiment. Figure 3 The difference with the display panel 100 is that it can overlap with each other in the non-light-emitting areas NEA1, NEA2 and NEA3. For example, color filters 191_1, 192_1 and 193_1 can overlap with each other at the boundaries between sub-pixels.

[0225] Figure 18 It is shown that in each non-luminescent region NEA1, NEA2, or NEA3, the second color filter 192_1 is located at the top, the first color filter 191_1 is located below the second color filter 192_1, and finally the third color filter 193_1 is located at the bottom. However, the stacking order of each color filter 191_1, 192_1, or 193_1 in the non-luminescent regions NEA1, NEA2, and NEA3 can vary according to the process sequence.

[0226] Since the above has already been Figure 3 The rest is described in the text, so its detailed description will be omitted or given only briefly.

[0227] The display device according to various embodiments of the present disclosure can be described as follows.

[0228] A display device according to an embodiment of the present disclosure includes: a substrate, the substrate including a display area comprising a plurality of sub-pixels and a non-display area surrounding the display area; an anode disposed in each of the plurality of sub-pixels on the substrate; a dam disposed on the anode at a boundary between adjacent sub-pixels, covering the periphery of an upper surface of the anode, and including a first dam on the anode and a second dam on the first dam, wherein the first dam includes: an overlapping portion overlapping with the second dam; a first exposed portion exposed through the second dam and including a side surface; and a second exposed portion exposed through the second dam and disposed between the overlapping portion and the first exposed portion, the second exposed portions being configured as a plurality of second exposed portions, and the plurality of adjacent second exposed portions being spaced apart from each other in a plan view.

[0229] In the display device according to various embodiments of the present disclosure, the plurality of sub-pixels may include a first sub-pixel, a second sub-pixel, and a third sub-pixel, and the display device may further include an organic layer disposed on the anode and the embankment, and disposed across the plurality of sub-pixels.

[0230] In the display device according to various embodiments of the present disclosure, the first embankment may include a black base material, and the second embankment may include a transparent base material.

[0231] In a display device according to various embodiments of the present disclosure, the organic layer may include a first light-emitting layer on the first sub-pixel, a second light-emitting layer on the second sub-pixel, and a third light-emitting layer on the third sub-pixel.

[0232] In a display device according to an exemplary embodiment of the present disclosure, in each sub-pixel, each of the first light-emitting layer, the second light-emitting layer, and the third light-emitting layer may be stacked into two or more layers.

[0233] The display device according to various embodiments of the present disclosure may further include: a cathode on the organic layer; and a black matrix located on the cathode at the boundary between adjacent sub-pixels, wherein the width of the black matrix may be smaller than the width of the first embankment.

[0234] In various embodiments of the display device according to this disclosure, the ends of the black matrix may be closer to the boundary between the adjacent sub-pixels than the ends of the first embankment.

[0235] In the display device according to various embodiments of the present disclosure, the black matrix may overlap with the second exposed portion.

[0236] The display device according to various embodiments of the present disclosure may further include a touch portion on the cathode, wherein the touch portion may include a bridge electrode and a sensor electrode on the bridge electrode, and the black matrix may overlap with the bridge electrode and the sensor electrode.

[0237] The display device according to various embodiments of the present disclosure may further include the touch portion and a color filter on the black matrix, wherein the color filter may include a first color filter on the first sub-pixel, a second color filter on the second sub-pixel, and a third color filter on the third sub-pixel.

[0238] In various embodiments of the display device according to the present disclosure, the first color filter, the second color filter and the third color filter may overlap each other at the boundary between the adjacent sub-pixels.

[0239] In various embodiments of the display device according to the present disclosure, the first color filter, the second color filter and the third color filter may be spaced apart from the boundary between the adjacent sub-pixels.

[0240] The display device according to various embodiments of the present disclosure may further include: a first transistor between the substrate and the anode; and a second transistor between the first transistor and the anode.

[0241] The display device according to various embodiments of the present disclosure may further include: a first protective layer between the second transistor and the anode; a first connecting electrode disposed on the first protective layer; and a second protective layer on the first connecting electrode, wherein the first connecting electrode can electrically connect the second transistor to the anode.

[0242] In the display device according to various embodiments of the present disclosure, the second protective layer may further include a groove that may overlap with the embankment and pass through the second protective layer in the thickness direction.

[0243] In various embodiments of the display device according to this disclosure, the trench may be configured to separate the organic layer disposed across the plurality of sub-pixels.

[0244] The display device according to various embodiments of the present disclosure may further include a third protective layer between the second protective layer and the anode, wherein the third protective layer may further include a trench that overlaps with the embankment and passes through the third protective layer in the thickness direction.

[0245] In various embodiments of the display device according to this disclosure, the patterns of the plurality of second exposed portions of the first sub-pixel, the patterns of the plurality of second exposed portions of the second sub-pixel, and the patterns of the plurality of second exposed portions of the third sub-pixel may be different from each other.

[0246] In various embodiments of the display device according to this disclosure, the pattern of the plurality of second exposed portions provided with the first sub-pixel may be different from the pattern of the plurality of second exposed portions provided with the second sub-pixel.

[0247] A display device according to various embodiments of the present disclosure includes: a substrate including a display area and a non-display area surrounding the display area, the display area including a plurality of sub-pixels including a first sub-pixel, a second sub-pixel, and a third sub-pixel; an anode disposed in the display area in each of the plurality of sub-pixels on the substrate; and a dam disposed in the display area on the anode, located at the boundary between adjacent sub-pixels, covering the periphery of the upper surface of the anode, and including a first dam on the anode and a second dam on the first dam, wherein the first dam includes: an overlapping portion overlapping the second dam; and an exposed portion exposed through the second dam, the exposed portion having a plurality of curved portions in a plan view, and the plurality of adjacent curved portions being spaced apart from each other in a plan view.

[0248] In the display device according to various embodiments of the present disclosure, the first embankment may include a black base material, and the second embankment may include a transparent base material.

[0249] In various embodiments of the display device according to this disclosure, the pattern of the plurality of curved portions provided with the first sub-pixel may be different from the pattern of the plurality of curved portions provided with the second sub-pixel.

[0250] The display device according to various embodiments of the present disclosure may further include: a cathode on the organic layer; and a black matrix on the cathode located at the boundary between adjacent sub-pixels, wherein the width of the black matrix may be less than the width of the first dam, and the ends of the black matrix may be closer to the boundary between the adjacent sub-pixels than the ends of the first dam.

[0251] In a display device according to an exemplary embodiment, the embankment may include a black base material to absorb external light directed to the lower portion of the embankment.

[0252] In a display device according to an exemplary embodiment, an organic layer is integrally formed across all sub-pixels. However, by forming trenches in a protective layer and guiding the organic layer to separate from the trenches, lateral leakage current between adjacent sub-pixels can be prevented or reduced.

[0253] In a display device according to an exemplary embodiment, since the first embankment includes a second exposed portion exposed through the second embankment and disposed between the overlapping portion and the first exposed portion, and the second exposed portions are configured to be spaced apart from each other (a protruding structure or an inclined structure is applied to the embankment), the spreadability of the second encapsulation layer (or organic encapsulation layer) can be improved.

[0254] In a display device according to an exemplary embodiment, by applying protrusions or inclined structures to the embankment, the spreadability of the second encapsulation layer (or organic encapsulation layer) can be improved even when the thickness of the second encapsulation layer (or organic encapsulation layer) is reduced.

[0255] In a display device according to an exemplary embodiment, by applying protrusions or inclined structures to the embankment, the spreadability of the second encapsulation layer (or organic encapsulation layer) can be improved even when the slope of the side surface of the embankment is large.

[0256] In a display device according to an exemplary embodiment, a low-reflection display device can be provided by absorbing external light incident on the lower part of the embankment.

[0257] According to an exemplary embodiment, a display device is provided, the display device comprising: a substrate, the substrate including a display area comprising a plurality of sub-pixels and a non-display area surrounding the display area; an anode disposed in each of the plurality of sub-pixels on the substrate; a dam disposed on the anode, located at a boundary between adjacent sub-pixels, and covering the periphery of an upper surface of the anode; an organic layer disposed on the anode and the dam, and spanning the plurality of sub-pixels; and a protective layer disposed below the organic layer, and including a groove overlapping the dam and extending through the protective layer in the thickness direction.

[0258] In a display device according to an exemplary embodiment, a trench can be configured to separate an organic layer that spans multiple sub-pixels.

[0259] However, the effects that can be obtained by this disclosure are not limited to those described above, and those skilled in the art to which this disclosure pertains will be able to clearly understand other effects not mentioned through a detailed description.

[0260] Although embodiments of the present disclosure have been described above with reference to the accompanying drawings, those skilled in the art will understand that the above-described technical configurations of the present disclosure can be implemented in other specific forms without altering its technical concept or essential characteristics. Therefore, it should be understood that the above embodiments are illustrative in all respects and not restrictive. Furthermore, the scope of this disclosure is described by the described claims rather than the detailed description. Moreover, the meaning and scope of the claims, as well as all changes or modifications derived from equivalent concepts, should be construed as being included within the scope of this disclosure.

[0261] Cross-reference to related applications

[0262] This application claims priority and benefit to Korean Patent Application No. 10-2024-0103933, filed on August 5, 2024, the entire contents of which are incorporated herein by reference for all purposes, as if fully set forth herein.

Claims

1. A display device, the display device comprising: A substrate, the substrate including a display area comprising a plurality of sub-pixels and a non-display area adjacent to the display area; An anode is disposed in each of the plurality of sub-pixels on the substrate; A dam portion, disposed on the anode at the boundary between adjacent sub-pixels, covers the periphery of the upper surface of the anode, and includes a first dam portion on the anode and a second dam portion on the first dam portion. The first embankment includes: The overlapping portion overlaps with the second embankment portion; A first exposed portion, the first exposed portion being exposed through the second embankment and including a side surface; and The second exposed portion is exposed through the second embankment and is disposed between the overlapping portion and the first exposed portion. The second exposed portion is configured as a plurality of second exposed portions, and Multiple adjacent second exposed portions are spaced apart from each other in the plan view.

2. The display device according to claim 1, wherein, The plurality of sub-pixels includes a first sub-pixel, a second sub-pixel, and a third sub-pixel, and The display device further includes an organic layer disposed on the anode and the embankment, and extending across the plurality of sub-pixels.

3. The display device according to claim 1, wherein, The first embankment comprises a black base material, and the second embankment comprises a transparent base material.

4. The display device according to claim 2, wherein, The organic layer includes a first light-emitting layer on the first sub-pixel, a second light-emitting layer on the second sub-pixel, and a third light-emitting layer on the third sub-pixel.

5. The display device according to claim 4, wherein, In each sub-pixel, each of the first light-emitting layer, the second light-emitting layer, and the third light-emitting layer is stacked into two or more layers.

6. The display device according to claim 2, further comprising: The cathode on the organic layer; And a black matrix, which is located on the cathode at the boundary between the adjacent sub-pixels, wherein the width of the black matrix is ​​smaller than the width of the first embankment.

7. The display device according to claim 6, wherein, The ends of the black matrix are closer to the boundary between the adjacent sub-pixels than the ends of the first embankment.

8. The display device according to claim 6, wherein, The black matrix overlaps with the second exposed portion.

9. The display device according to claim 6, further comprising a touch portion on the cathode, wherein, The touch portion includes a bridge electrode and a sensor electrode on the bridge electrode, and the black matrix overlaps with the bridge electrode and the sensor electrode.

10. The display device according to claim 9, further comprising the touch portion and a color filter on the black matrix, wherein, The color filter includes a first color filter on the first sub-pixel, a second color filter on the second sub-pixel, and a third color filter on the third sub-pixel.

11. The display device according to claim 10, wherein, The first color filter, the second color filter, and the third color filter overlap each other at the boundary between adjacent sub-pixels.

12. The display device according to claim 10, wherein, The first color filter, the second color filter, and the third color filter are spaced apart from the boundaries between the adjacent sub-pixels.

13. The display device according to claim 2, further comprising: A first transistor, wherein the first transistor is located between the substrate and the anode; And a second transistor, which is located between the first transistor and the anode.

14. The display device according to claim 13, further comprising: A first protective layer is located between the second transistor and the anode; A first connecting electrode is disposed on the first protective layer; And a second protective layer, which is on the first connection electrode, wherein the first connection electrode electrically connects the second transistor to the anode.

15. The display device according to claim 14, wherein, The second protective layer also includes a trench that overlaps with the embankment and passes through the second protective layer in the thickness direction.

16. The display device according to claim 15, wherein, The trench is configured to separate the organic layer that spans the plurality of sub-pixels.

17. The display device according to claim 14, further comprising a third protective layer between the second protective layer and the anode, wherein, The third protective layer also includes a trench that overlaps with the embankment and passes through the third protective layer in the thickness direction.

18. The display device according to claim 2, wherein, The pattern of the plurality of second exposed portions having the first sub-pixel is different from the pattern of the plurality of second exposed portions having the second sub-pixel.

19. The display device according to claim 2, wherein, The patterns of the plurality of second exposed portions of the first sub-pixel, the plurality of second exposed portions of the second sub-pixel, and the plurality of second exposed portions of the third sub-pixel are different from each other.

20. A display device, the display device comprising: A substrate, the substrate including a display area and a non-display area adjacent to the display area, the display area including a plurality of sub-pixels including a first sub-pixel, a second sub-pixel and a third sub-pixel; An anode is disposed in each of the plurality of sub-pixels on the substrate in the display area; A dam portion, disposed on the anode at the boundary between adjacent sub-pixels, covers the periphery of the upper surface of the anode, and includes a first dam portion on the anode and a second dam portion on the first dam portion. The first embankment includes: The overlapping portion overlaps with the second embankment portion; and The exposed portion, which is exposed through the second embankment, and The outline of the exposed portion has multiple curved sections in the plan view.

21. The display device according to claim 20, wherein, Multiple adjacent curved sections are spaced apart from each other in the plan view.

22. The display device according to claim 20, wherein, The first embankment comprises a black base material, and the second embankment comprises a transparent base material.

23. The display device according to claim 20, wherein, The pattern of the plurality of curved portions provided with the first sub-pixel is different from the pattern of the plurality of curved portions provided with the second sub-pixel.

24. The display device according to claim 20, further comprising: An organic layer is disposed on the anode and the embankment, and spans the plurality of sub-pixels; Cathode, the cathode being located on the organic layer; And a black matrix located on the cathode at the boundary between the adjacent sub-pixels, wherein the width of the black matrix is ​​less than the width of the first dam, and the ends of the black matrix are closer to the boundary between the adjacent sub-pixels than the ends of the first dam.

25. A display device, the display device comprising: A substrate, the substrate including a display area comprising a plurality of sub-pixels and a non-display area adjacent to the display area; An anode is disposed in each of the plurality of sub-pixels on the substrate; A dam is disposed on the anode, located at the boundary between adjacent sub-pixels, and covering the periphery of the upper surface of the anode; An organic layer disposed on the anode and the embankment, and extending across the plurality of sub-pixels; and A protective layer is disposed beneath the organic layer and includes grooves that overlap with the embankment and extend through the protective layer in the thickness direction.

26. The display device according to claim 25, wherein, The trench is configured to separate the organic layer that spans the plurality of sub-pixels.

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