Method and system for balancing cloud service resources of arm server
By tiering CPU and memory configurations and establishing PDP configurations, performance limits can be dynamically adjusted, solving the problem of server performance degradation and shortened lifespan caused by uneven tenant resource demands, thus achieving service fairness and extending server lifespan.
Patent Information
- Application Number
- CN202511602182.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-04
- Publication Date
- 2026-02-10
AI Technical Summary
In the existing technology, the resource allocation method of ARM servers causes tenants with high CPU core counts and high memory resources to be unnecessarily restricted when resource demand is low, which affects the performance of cloud services and shortens the lifespan of the server due to long-term high load operation.
The CPU and memory configurations are divided into multiple tiers, and a Performance Defined Power (PDP) configuration is established. The performance limits of the CPU and memory are dynamically adjusted according to the configuration requirements purchased by the tenants. Performance constraints are implemented at the micro-architecture level to ensure service fairness and extend server life.
It enables the provision of the best service experience based on tenant needs, avoids long-term high-load operation of servers, and improves server lifespan and resource utilization efficiency.
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Figure CN121501488A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of cloud computing, and particularly relates to an arm server cloud service resource balancing method and system. BACKGROUND
[0002] In the field of cloud computing, tenants can purchase different servers in different ways. For an arm server, assuming that there are 160 cores, the cores can be rented and sold to tenants in units of cores, such as 2G for a single core, 8G for a dual core, 16G for a quad core, and the like. For the server, so many resources are allocated to the tenants.
[0003] As the number of purchases increases, a server can have up to hundreds of tenants. Some tenants buy to build websites, some tenants buy to store data, some tenants buy to play games, and some tenants buy to do AI data processing. Generally, a fixed physical CPU is allocated to the tenants. However, the SLC and DDR on the SOC are public resources corresponding to all CPUs. Some tenants who consume more resources will inevitably affect the use of other tenants, because the SLC and DDR are public resources and must be accessed by all. Therefore, when the number of tenants using the resources is too large, the CPU and memory resources of the server need to be limited according to the demand of the tenants and the amount of resources.
[0004] However, for some tenants who purchase high CPU core numbers and high memory resources, the performance of the cloud service will be unnecessarily limited due to the current low resource demand, resulting in a poor experience. Moreover, this allocation method often causes the server cloud to be in a high running state for a long time, increasing the wear and tear of the server hardware and affecting the service life of the server.
[0005] Therefore, there is an urgent need for a service resource balancing method and system that can solve the above problems. SUMMARY
[0006] The present application aims to provide an arm server cloud service resource balancing method and system. The PDP performance corresponding to the CPU configuration and memory configuration purchased by the tenant is configured according to the configuration purchased by the tenant. The corresponding service experience is provided according to the configuration demand purchased by the tenant. The service fairness is taken into account, and the service life of the server cloud is effectively improved.
[0007] In order to achieve the above object, the application provides an arm server cloud service resource balancing method, comprising the following steps: setting and storing the constraint relationship between the CPU configuration, the memory configuration and the PDP performance of a tenant in advance; dividing the CPU configuration into multiple levels according to the number of CPUs purchased by the tenant, wherein each level of the CPU configuration corresponds to a level of the first PDP configuration, and the higher the CPU configuration, the better the performance of the first PDP configuration; dividing the memory configuration into multiple levels according to the size of the memory purchased by the tenant, wherein each level of the memory configuration corresponds to a level of the second PDP configuration, and the higher the memory configuration, the better the performance of the second PDP configuration; the PDP performance includes the first PDP configuration related to the CPU performance and the second PDP configuration related to the DDR performance; reading the CPU configuration and the memory configuration of the tenant when the tenant logs in; converting the read CPU configuration and the memory configuration of the tenant into corresponding PDP performance according to the constraint relationship; configuring all CPUs allocated to the current tenant according to the corresponding PDP performance, and fixing the configuration of the PDP performance during the use of the tenant.
[0008] Preferably, the step of setting and storing the constraint relationship between the CPU configuration, the memory configuration and the PDP performance of a tenant in advance comprises: taking the CPU configuration as the first coordinate and establishing the first coordinate axis x, taking the memory configuration as the second coordinate and establishing the second coordinate axis y, establishing the performance constraint coordinate system, and setting the PDP performance corresponding to the configuration (x, y) of each level of the tenant.
[0009] Preferably, the first PDP configuration corresponding to the highest level of the CPU configuration does not limit the CPU performance, and the first PDP configuration corresponding to each lower level of the CPU configuration at least increases one performance constraint; the second PDP configuration corresponding to the highest level of the memory configuration does not limit the processing core memory access width, and the second PDP configuration corresponding to each lower level of the memory configuration at least increases one performance constraint.
[0010] Specifically, the first PDP configuration is implemented based on the micro-architecture level, and the performance constraints of the first PDP configuration include disabling the transmission queue, reducing the transmission queue virtual large, and disabling the speculation execution; the second PDP configuration is implemented based on the micro-architecture level, and the performance constraints of the second PDP configuration include reducing the instruction prefetch and reducing the instruction out-of-order execution.
[0011] The application further provides an arm server cloud service resource balancing system, which comprises a setting module, a storage module, a reading module and a configuration module.
[0012] Preferably, the setting module sets the CPU configuration as a first coordinate and establishes a first coordinate axis x, sets the memory configuration as a second coordinate and establishes a second coordinate axis y, and establishes a performance constraint coordinate system, and sets the PDP performance corresponding to the configuration (x, y) of each gear of the tenant.
[0013] Preferably, the first PDP configuration corresponding to the highest gear of the CPU configuration does not limit the CPU performance, and the first PDP configuration corresponding to each lower gear of the CPU configuration at least increases one performance constraint; the second PDP configuration corresponding to the highest gear of the memory configuration does not limit the processing core memory access width, and the second PDP configuration corresponding to each lower gear of the memory configuration at least increases one performance constraint.
[0014] Specifically, the first PDP configuration is realized based on a micro-architecture level, and the performance constraints of the first PDP configuration include disabling a transmission queue, reducing a transmission queue virtual large, and disabling a speculation execution; the second PDP configuration is realized based on a micro-architecture level, and the performance constraints of the second PDP configuration include reducing instruction prefetching and reducing instruction out-of-order execution.
[0015] The application further provides an arm server cloud service resource balancing system, which comprises a processor, a memory, one or more operation instructions, the one or more operation instructions are stored in the memory and executed by the processor to realize the arm server cloud service resource balancing method.
[0016] Compared with the prior art, the application divides the CPU configuration into multiple gears, divides the memory configuration into multiple gears, and then matches the corresponding PDP configuration for different CPU configurations and memory configurations, configures the corresponding PDP performance for the tenant according to the CPU configuration and memory configuration purchased by the tenant, so that the tenant obtains the corresponding service experience according to the configuration demand purchased by the tenant, and the service fairness is taken into account. Furthermore, the application also makes the server not provide the optimal service for the tenant according to the resources that can be provided by the server according to the demand of the current tenant, but provide the service according to the corresponding configuration purchased by the tenant, so that the server will not run at high utilization for a long time, and the service life of the server cloud is effectively improved. BRIEF DESCRIPTION OF DRAWINGS
[0017] Figure 1 is a structure diagram of a SOC system of an arm server cloud.
[0018] Figure 2 is a flowchart of an arm server cloud service resource balancing method implemented by the application.
[0019] Figure 3 is a performance coordinate of the constraint relationship between CPU configuration, memory configuration and PDP performance.
[0020] Figure 4 is a structure block diagram of an arm server cloud service resource balancing system implemented in an embodiment of the application.
[0021] Figure 5 is a structure block diagram of an arm server cloud service resource balancing system implemented in another embodiment of the application. DETAILED DESCRIPTION
[0022] To explain the technical content, structural features, achieved purposes and effects of the application in detail, the following will be described in detail in combination with the embodiments and the accompanying drawings.
[0023] Reference Figure 2 The application discloses an arm server cloud service resource balancing method, which comprises steps S1 to S4.
[0024] Reference Figure 1 The SOC system of the arm server cloud comprises a CPU processing module 101, a DDR storage module 102, an SCP control module 103, and a system bus 104, wherein the system bus 104 communicates between the CPU processing module 101, the DDR storage module 102 and the SCP control module 103.
[0025] In this embodiment, the CPU processing module 101 comprises multiple CPUs, and the DDR storage module 102 provides 500G of memory.
[0026] S1, pre-set and store the constraint relationship between CPU configuration, memory configuration of the tenant and PDP performance, the PDP performance includes first PDP configuration related to CPU performance and second PDP configuration related to DDR performance.
[0027] PDP, Performance Defined Power, performance defined power consumption. This feature limits CPU performance from the micro-architecture perspective and limits the CPU access bandwidth to the memory.
[0028] Among them: the CPU configuration is divided into multiple gears according to the number of CPUs purchased by the tenant, and each gear of the CPU configuration corresponds to a level of first PDP configuration, and the higher the CPU configuration, the better the performance of the first PDP configuration.
[0029] For example, the CPU configuration (number of processing core configurations) is divided into a first gear corresponding to 2 cores, a second gear corresponding to 4 cores, a third gear corresponding to 8 cores, and a fourth gear corresponding to 16 cores. In this embodiment, the fourth gear is the highest gear of the CPU configuration.
[0030] The memory configuration is divided into multiple gears according to the size of the memory purchased by the tenant, and each gear of the memory configuration corresponds to a level of second PDP configuration, and the higher the CPU configuration, the better the performance of the second PDP configuration. The memory configuration (memory configuration) is divided into a first gear corresponding to 4G, a second gear corresponding to 8G, a third gear corresponding to 16G, and a fourth gear corresponding to 32G. In this embodiment, the fourth gear is the highest gear of the memory configuration.
[0031] Reference Figure 3 , step S1 includes: taking the CPU configuration as the first coordinate and establishing the first coordinate axis x, taking the memory configuration as the second coordinate y and establishing the second coordinate axis y, establishing the performance constraint coordinate system, setting the PDP performance corresponding to the configuration (x, y) of each gear of the tenant, the PDP performance includes first PDP configuration and second PDP configuration.
[0032] For example, reference Figure 3 , the fourth gear corresponds to coordinate 0, the third gear corresponds to coordinate 1, the second gear corresponds to coordinate 2, and the first gear corresponds to coordinate 3. The larger the gear, the smaller the coordinate value, and the smaller the corresponding PDP configuration, the larger the coordinate value, and the smaller the corresponding PDP configuration.
[0033] If a user (referred to as a tenant) purchases a CPU of 16 cores and a DDR memory of 4G, its configuration coordinate is (0, 3), and the PDP performance is the fourth gear of 16 cores corresponding to the first PDP configuration, and the first gear of 3G corresponding to the second PDP configuration.
[0034] The above covers 16 application scenarios from two dimensions of XY axes, and can effectively alleviate the performance decline problem caused by mixed deployment of cloud scenarios and business resource competition.
[0035] The CPU configuration of the highest gear corresponds to the first PDP configuration without CPU performance limitation, and the memory configuration of the highest gear corresponds to the second PDP configuration without limitation on the memory access width of the processing core. Then, for each gear reduction, the PDP configuration is more constrained at least one performance point.
[0036] Specifically, the first PDP configuration is implemented based on the micro-architecture level, and contains constraints of disabling the transmission queue, reducing the transmission queue virtual large, disabling the speculative execution, etc. The second PDP configuration is implemented based on the micro-architecture level, and contains constraints of reducing instruction prefetching, reducing instruction out-of-order execution, etc.
[0037] S2, reading the CPU configuration and memory configuration of the tenant when the tenant logs in.
[0038] S3, converting the read CPU configuration and memory configuration of the tenant into corresponding PDP performance according to the constraint relationship.
[0039] S4, configuring all CPUs of the current tenant according to the corresponding PDP performance, and fixing the PDP performance configuration during the use of the tenant.
[0040] Preferably, the CPU configuration and memory configuration of the current tenant are read in real time, and if the CPU configuration and memory configuration are updated, the updated CPU configuration and memory configuration of the tenant are converted into new PDP performance according to the constraint relationship, and the PDP performance configuration of all CPUs of the tenant is updated.
[0041] Reference Figure 4 The application further discloses an arm server cloud business resource balancing system, which comprises a setting module 11, a storage module 12, a reading module 13 and a configuration module 14.
[0042] The setting module 11 sets the constraint relationship between the CPU configuration, memory configuration and PDP performance of the tenant; the storage module 12 stores the constraint relationship between the CPU configuration, memory configuration and PDP performance of the tenant; the reading module 13 reads the CPU configuration and memory configuration of the tenant when the tenant logs in; and the configuration module 14 converts the read CPU configuration and memory configuration of the tenant into corresponding PDP performance according to the constraint relationship, configures all CPUs of the current tenant according to the corresponding PDP performance, and fixes the PDP performance configuration during the use of the tenant.
[0043] The setting module 11 sets the CPU configuration as a first coordinate and establishes a first coordinate axis x, sets the memory configuration as a second coordinate y and establishes a second coordinate axis y, establishes a performance constraint coordinate system, and sets the PDP performance corresponding to the configuration (x, y) of each gear of the tenant, the PDP performance including a first PDP configuration and a second PDP configuration.
[0044] Preferably, the reading module 13 also reads the CPU configuration and the memory configuration of the current tenant in real time, and the configuration module converts the updated CPU configuration and the memory configuration of the tenant into new PDP performance according to the constraint relationship when the CPU configuration and the memory configuration are updated, and updates the PDP performance configuration of all CPUs of the tenant.
[0045] The first PDP configuration corresponding to the highest gear of the CPU configuration does not limit the CPU performance, and the second PDP configuration corresponding to the highest gear of the memory configuration does not limit the memory access width of the processing core.
[0046] Reference Figure 5 The application further discloses an arm server cloud service resource balancing system, which comprises a processor 21, a memory 22, and one or more operation instructions 23.
[0047] Compared with the prior art, the application divides the CPU configuration into multiple gears, divides the memory configuration into multiple gears, then matches the corresponding PDP configuration for different CPU configurations and memory configurations, configures the corresponding PDP performance for the tenant according to the CPU configuration and the memory configuration purchased by the tenant, so that the tenant can obtain the corresponding service experience according to the configuration demand purchased by the tenant, which not only takes into account the service fairness, but also effectively improves the service life of the server cloud.
[0048] DSU: DynamIQ Shared Unit, a new multicore management system unit. SOC: System on a Chip, a system integrated with multiple cores and on-chip peripherals. SCP: System Control Processor, a microprocessor used for soc system control and power management. Cache: cache, access speed is much faster than accessing DDR. LLC: Last Level Cache, the last level cache, the cache closest to the DDR controller. SLC: System Level Cache, system-level cache, also known as L3 Cache, here and LLC are the same concept. RDT: Resource Director Technology, provides LLC and memory bandwidth allocation and monitoring capabilities. MPAM: Memory System Resource Partitioning and Monitoring, a memory resource management solution on SOC. PDP: Performance Defined Power, a micro-architecture level CPU performance and memory bandwidth access restriction.
[0049] The above disclosure is only the preferred embodiment of the present application, of course, cannot be limited by this to limit the scope of the present application, therefore, the equivalent changes made in the scope of the present application, still belongs to the scope of the present application.
Claims
1. A method for achieving cloud-based service resource balancing on an ARM server, characterized in that: include: The constraints between the tenant's CPU configuration, memory configuration, and PDP performance are pre-set and stored: the CPU configuration is divided into multiple tiers according to the number of CPUs purchased by the tenant, and each tier of CPU configuration corresponds to a first-level PDP configuration. The higher the CPU configuration, the better the performance of the first-level PDP configuration. The memory configuration is divided into multiple tiers according to the amount of memory purchased by the tenant, and each tier of memory configuration corresponds to a second-level PDP configuration. The higher the memory configuration, the better the performance of the second-level PDP configuration. The PDP performance includes the first-level PDP configuration related to CPU performance and the second-level PDP configuration related to DDR performance. Read the tenant's CPU and memory configurations when the tenant logs in; Based on the aforementioned constraints, the read tenant's CPU and memory configurations are converted into corresponding PDP performance. All CPUs allocated to the current tenant are configured according to the corresponding PDP performance, and the configuration of the PDP performance is fixed during the tenant's use.
2. The method for achieving cloud service resource balancing on an ARM server as described in claim 1, characterized in that: The steps of pre-setting and storing the constraint relationship between the tenant's CPU configuration, memory configuration and PDP performance include: using the CPU configuration as the first coordinate and establishing a first coordinate axis x, using the memory configuration as the second coordinate and establishing a second coordinate axis y, establishing a performance constraint coordinate system, and setting the PDP performance corresponding to each level of the tenant's configuration (x, y).
3. The method for achieving cloud service resource balancing on an ARM server as described in claim 1, characterized in that: The first PDP configuration corresponding to the highest CPU configuration tier does not impose CPU performance limitations. For each CPU configuration tier that is lowered, the corresponding first PDP configuration adds at least one performance constraint. The second PDP configuration corresponding to the highest memory configuration tier does not impose limitations on the memory access width of the processing cores. For each memory configuration tier that is lowered, the corresponding second PDP configuration adds at least one performance constraint.
4. The method for achieving cloud service resource balancing on an ARM server as described in claim 3, characterized in that: The first PDP configuration is implemented at the microarchitecture level, and the performance constraints of the first PDP configuration include disabling the launch queue, reducing the virtual size of the launch queue, and disabling speculative execution. The second PDP configuration is implemented at the microarchitecture level, and the performance constraints of the second PDP configuration include reducing instruction prefetching and reducing out-of-order instruction execution.
5. A system for balancing cloud-based business resources on an ARM server, characterized in that: It includes a setting module, a storage module, a reading module, and a configuration module. The setting module sets the constraint relationship between the tenant's CPU configuration, memory configuration, and PDP performance. The CPU configuration is divided into multiple tiers according to the number of CPUs purchased by the tenant. Each tier of CPU configuration corresponds to a first-level PDP configuration, and the higher the CPU configuration, the better the performance of the first-level PDP configuration. The memory configuration is divided into multiple tiers according to the amount of memory purchased by the tenant. Each tier of memory configuration corresponds to a second-level PDP configuration, and the higher the memory configuration, the better the performance of the second-level PDP configuration. The PDP performance includes the first-level PDP configuration related to CPU performance and the second-level PDP configuration related to DDR performance. The storage module stores the constraints between the tenant's CPU configuration, memory configuration, and PDP performance. The reading module reads the tenant's CPU and memory configurations when the tenant logs in; The configuration module converts the read tenant's CPU and memory configurations into corresponding PDP performance based on the constraint relationship, configures all CPUs allocated to the current tenant according to the corresponding PDP performance, and fixes the PDP performance configuration during the tenant's use.
6. The system for balancing cloud-based business resources on an ARM server as described in claim 5, characterized in that: The setting module uses the CPU configuration as the first coordinate and establishes a first coordinate axis x, and the memory configuration as the second coordinate and establishes a second coordinate axis y, to establish a performance constraint coordinate system and set the PDP performance corresponding to each configuration (x, y) of the tenant.
7. The system for balancing cloud-based business resources on an ARM server as described in claim 5, characterized in that: The first PDP configuration corresponding to the highest CPU configuration tier does not impose CPU performance limitations. For each CPU configuration tier that is lowered, the corresponding first PDP configuration adds at least one performance constraint. The second PDP configuration corresponding to the highest memory configuration tier does not impose limitations on the memory access width of the processing cores. For each memory configuration tier that is lowered, the corresponding second PDP configuration adds at least one performance constraint.
8. The system for balancing cloud-based business resources on an ARM server as described in claim 7, characterized in that: The first PDP configuration is implemented at the microarchitecture level, and the performance constraints of the first PDP configuration include disabling the launch queue, reducing the virtual size of the launch queue, and disabling speculative execution. The second PDP configuration is implemented at the microarchitecture level, and the performance constraints of the second PDP configuration include reducing instruction prefetching and reducing out-of-order instruction execution.
9. A system for balancing cloud-based business resources on an ARM server, characterized in that: The method includes a processor, a memory, and one or more operation instructions, wherein the one or more operation instructions are stored in the memory and executed by the processor as described in any one of claims 1-4 to implement the method for balancing cloud services on an ARM server.