Control of hybrid multiphase DC-DC converter

Abstract

Aspects of the present disclosure relate to a controller for a hybrid multiphase DC-DC converter comprising a plurality of switched inductor current paths and a method of controlling the hybrid multiphase DC-DC converter, the method comprising: comparing an output voltage to an output reference voltage; adjusting a respective current control parameter for each current path in response to a difference between the output voltage and the output reference voltage; comparing a first voltage across the first flying capacitor with a first capacitor reference voltage; and modifying the respective current control parameter of one of the current paths in response to a difference between the first voltage across the first flying capacitor and the first capacitor reference voltage.

Description

Technical Field

[0001] This disclosure relates to a hybrid multiphase DC-DC converter and a control method thereof. Background Technology

[0002] Applications such as electronic control units (ECUs) in automotive environments are becoming increasingly prevalent and important, presenting challenging requirements. For example, there are typically stringent transient requirements for the power supply voltage of the digital core that powers the processor in such ECUs, allowing the voltage to deviate from its nominal value (typically between 0.8V and 1.2V) by more than, for example, 5%. Furthermore, the proliferation of onboard electronics has led to a shift towards 48V voltage distribution networks, and both trends increase the demand for point-of-load (PoL) converters to meet the power requirements of automotive processors, which can typically range from 40 to 50W. Additionally, the high-voltage bus used in such applications can vary considerably, often ranging from 24V to 60V. Hybrid DC-DC converters are well-suited for converting high input voltages to low output voltages without requiring bulky transformers, thus enabling efficient 48V PoL converters. Hybrid DC-DC converters typically use several parallel phases, each employing an inductor, to reduce total current ripple and distribute output power between phases through interleaving. However, fast transient response remains a challenge. Any one or both of a load step and a supply voltage step can cause phase imbalance in a hybrid DC-DC converter. This imbalance can lead to only slightly damped resonance between phases, especially when the input and output decoupling capacitors and flying capacitors are small. While increasing the series resistance can increase damping, this will reduce efficiency. Summary of the Invention

[0003] According to a first aspect of this disclosure, a method is provided for controlling a hybrid multiphase DC-DC converter including multiple switched inductor current paths, the method comprising: comparing an output voltage with an output reference voltage; adjusting a corresponding current control parameter for each current path in response to a difference between the output voltage and the output reference voltage; comparing a first voltage across a first flying capacitor with a first capacitor reference voltage; and modifying the corresponding current control parameter of one of the current paths in response to a difference between the first voltage across the first flying capacitor and the first capacitor reference voltage.

[0004] Since the deviation of the voltage across the flying capacitor from its expected or reference voltage value can be caused by transients in the input voltage or output load current, these deviations can be observed and used to control the switching timing of the switching inductor current path. This can result in a rapid response to transients, particularly those caused by load current steps or supply-side voltage steps, and a reduction in resonances that might otherwise occur between current paths, which degrade converter efficiency. Component sizes, such as the capacitance rating of the flying capacitor, can be reduced, thereby reducing the converter's "footprint" or area requirements.

[0005] In one or more embodiments, the current control parameter for each current path is one of a group consisting of the peak current setpoint of the corresponding current path, the valley current setpoint of the corresponding current path, and the average current setpoint of the corresponding current path.

[0006] In one or more embodiments, the current path of each switching inductor can switch between an on-time and an off-time, and the current in the switching inductor increases during the on-time and decreases during the off-time. Those skilled in the art will understand that during the "off-time," the inductor is not completely isolated from the supply voltage, but is disconnected from the supply voltage on the supply side, and is typically connected to a low voltage or ground during this portion of the switching cycle. In hybrid multiphase DC-DC converters, the supply voltage for one or more phases is typically the voltage across one or more flying capacitors.

[0007] In one or more embodiments, the hybrid multiphase DC-DC converter is configured to operate in a fixed frequency mode. A fixed frequency means that the period of the switching cycle is controlled. Those skilled in the art will understand that the frequency controlled in the fixed frequency mode can be modified or changed by the controller. In other embodiments, the operating frequency of the converter is not fixed but can vary periodically.

[0008] In one or more embodiments, the current control parameter for each current path is a peak current setpoint; and modifying the peak current setpoint includes delaying the end of the on-time in response to a negative difference between the first voltage across the first flying capacitor and the first capacitor reference voltage, and advancing the end of the on-time in response to a positive difference between the first voltage across the first flying capacitor and the first capacitor reference voltage. It should be understood that the end of the on-time is controlled indirectly by modifying the peak current setpoint (because the control method is current-mode control), rather than directly, whereas PWM control directly controls the end of the on-time. Since the voltage across the flying capacitor typically only affects one or both (depending on the converter design) of the switching inductor counterparts in the flying capacitor voltage, it can be used to control individual (or only two) current paths in the current path.

[0009] In one or more embodiments, the current control parameter for each current path is a valley current setpoint; and modifying the valley current setpoint includes advancing the start of the turn-on time in response to a negative difference between the first voltage across the first flying capacitor and a reference voltage of the first capacitor, and delaying the start of the turn-on time in response to a positive difference between the first voltage across the first flying capacitor and a reference voltage of the first capacitor.

[0010] In one or more other embodiments, the current control parameter for each current path is a hysteresis setpoint corresponding to the difference between the peak current and the valley current, and the hybrid multiphase DC-DC converter is configured to operate in hysteresis mode.

[0011] In one or more embodiments, the hybrid multiphase DC-DC converter further includes at least one additional flying capacitor, and the method further includes: comparing a corresponding voltage across each of the at least one additional flying capacitor with a corresponding capacitor reference voltage, and modifying a corresponding control parameter of a corresponding current path in the current path in response to the difference between the corresponding voltage of the corresponding flying capacitor and the corresponding capacitor reference voltage. Therefore, it can be advantageous to periodically compare each of the flying capacitors with its corresponding capacitor reference value and modify the corresponding current control parameters of one or more current paths in response to any deviation.

[0012] In one or more embodiments, the method further includes: comparing a second voltage across the second flying capacitor with a second capacitor reference voltage; and modifying a corresponding control parameter of one of the current paths in the current paths by modifying the control parameter by an amount depending on the difference between a first offset and a second offset, wherein: the first offset is the difference between the first voltage across the first flying capacitor and the first capacitor reference voltage, and the second offset is the difference between the second voltage across the second capacitor and the second capacitor reference voltage. Since in some types of hybrid DC-DC converters, each flying capacitor directly affects the current in two adjacent current paths, the current through each current path is directly affected by the voltage across each of the two flying capacitors. In such converters, directly modifying or adjusting the switching timing of those switching inductor current paths in response to the difference between two deviations between a measured value and a reference or expected value of the voltage across the flying capacitor may be more efficient and provide a faster response.

[0013] In one or more embodiments, the hybrid multiphase DC-DC converter further includes at least one additional flying capacitor, i.e., at least one additional flying capacitor in addition to the first and second flying capacitors, and the method further includes: comparing a corresponding voltage across each of the at least one additional flying capacitor with a corresponding capacitor reference voltage; and, in response to the difference therebetween, modifying a corresponding control parameter of each current path having an inductor input voltage at least partially defined by the voltage across the corresponding flying capacitor. Therefore, it may be useful to check for deviations from the expected voltage across each or all of the flying capacitors and to adjust the control parameters of any or all associated or linked current paths (i.e., any current path whose inductor current is partially set by the voltage from the flying capacitors). Typically, and especially for series capacitor buck converters, most current paths in any design are defined by the voltage across the two flying capacitors, except for one or two of the outermost current paths (i.e., the current paths from a wiring perspective where the input is closest to ground or supply level); those current paths are typically defined by the voltage across only one of the flying capacitors. Those skilled in the art will appreciate that for some converters, such as dual-inductor hybrid converters, some inductors may be affected by or associated with more than two capacitors.

[0014] In one or more embodiments, the DC-DC converter is one of an N:1 series capacitor buck hybrid converter, a dual-inductor hybrid converter, and a multi-inductor hybrid converter.

[0015] According to a second aspect of this disclosure, a controller is provided for a hybrid multiphase DC-DC converter including multiple switched inductor current paths, the controller comprising: an external comparator configured to compare an output voltage of the converter with an output reference voltage; an external loop adjustment circuit configured to adjust a corresponding current control parameter for each current path in response to a difference between the output voltage and the output reference voltage; a first internal comparator configured to compare a first voltage across a first flying capacitor with a first capacitor reference voltage; and an internal loop adjustment circuit configured to modify the corresponding current control parameter of one of the current paths in response to a difference between the first voltage across the first flying capacitor and the first capacitor reference voltage.

[0016] In one or more embodiments, the current control parameter for each current path is one of a group consisting of the peak current setpoint of the corresponding current path, the valley current setpoint of the corresponding current path, and the average current setpoint of the corresponding current path.

[0017] In one or more embodiments, the controller further includes a plurality of gate control circuits configured to switch the current path of each respective switching inductor between an on-state during an on-time and an off-state during an off-time, wherein the current in the switching inductor increases during the on-time and decreases during the off-time.

[0018] In one or more embodiments, the controller is configured to operate the hybrid multiphase DC-DC converter in a fixed frequency mode.

[0019] In one or more embodiments, the current control parameter for each current path is a peak current setpoint; and modifying the peak current setpoint includes delaying the end of the turn-on time in response to a negative difference between the first voltage across the first flying capacitor and a reference voltage of the first capacitor, and advancing the end of the turn-on time in response to a positive difference between the first voltage across the first flying capacitor and a reference voltage of the first capacitor.

[0020] In one or more embodiments, the current control parameter for each current path is a valley current setpoint; and modifying the valley current setpoint includes advancing the start of the turn-on time in response to a negative difference between the first voltage across the first flying capacitor and a reference voltage of the first capacitor, and delaying the start of the turn-on time in response to a positive difference between the first voltage across the first flying capacitor and a reference voltage of the first capacitor.

[0021] In one or more embodiments, the current control parameter for each current path is a hysteresis setpoint corresponding to the difference between the peak current and the valley current, and the controller is configured to operate the hybrid multiphase DC-DC converter in hysteresis mode.

[0022] In one or more embodiments, the controller further includes: a second internal comparator configured to compare a second voltage across the second flying capacitor with a second capacitor reference voltage; and modifying a corresponding control parameter of one of the current paths includes modifying the control parameter by an amount depending on the sum of a first offset and a second offset, wherein: the first offset is the difference between the first voltage across the first flying capacitor and the first capacitor reference voltage, and the second offset is the difference between the second voltage across the second capacitor and the second capacitor reference voltage.

[0023] In one or more embodiments, the controller is configured to operate one of an N:1 series capacitor buck hybrid converter, a dual-inductor hybrid converter, and a multi-inductor hybrid converter.

[0024] A computer program may be provided that, when run on a computer, causes the computer to configure any device, including the circuits, controllers, sensors, filters, or devices disclosed herein, or to perform any of the methods disclosed herein. The computer program may be a software implementation, and the computer may be considered any suitable hardware, including, as non-limiting examples, digital signal processors, microcontrollers, and implementations in read-only memory (ROM), erasable programmable read-only memory (EPROM), or electrically erasable programmable read-only memory (EEPROM). The software implementation may be an assembler.

[0025] Computer programs may be provided on a computer-readable medium, which may be a physical computer-readable medium, such as a disk or memory device, or may be embodied in another non-transient signal. Attached Figure Description

[0026] Now refer to the accompanying drawings, which are not necessarily drawn to scale, and in which:

[0027] Figure 1 A conventional control loop for a hybrid DC-DC converter used for multiphase current-mode control is shown.

[0028] Figure 2 A scheme for a hybrid DC-DC converter for multiphase current-mode control according to embodiments of the present disclosure is conceptually illustrated.

[0029] Figure 3A An example of a 4:1 series capacitor buck DC-DC converter configured for conventional PWM control is shown.

[0030] Figure 3B An example of a 4:1 series capacitor buck DC-DC converter configured for conceptual current-based control is shown;

[0031] Figure 4 It shows the control Figure 3B The corresponding waveform of the converter;

[0032] Figure 5A An example of a 4:1 series capacitor buck DC-DC converter configured for control according to an embodiment of the present disclosure is shown.

[0033] Figure 5B It shows the period during a charging phase Figure 5A The converter;

[0034] Figure 6 An example valley current control scheme according to an embodiment of the present disclosure is shown, wherein two adjustment values ​​are used to modify the duty cycle of an individual phase;

[0035] Figure 7 The simulation illustrates the use of Figure 5A The use of conventional voltage-mode control schemes for converters;

[0036] Figure 8 Results of a fixed-frequency valley current-mode control (VCMC) scheme according to one or more embodiments are shown;

[0037] Figure 9 It shows Figure 5A The simulation of the converter's operation shown does not include cross capacitor voltage measurements and adjustment results;

[0038] Figure 10 It shows Figure 5A The simulation of the converter's operation shown includes cross capacitor voltage measurements and adjustment results.

[0039] Figure 11This demonstrates a control method that uses a single adjustment for each stage;

[0040] Figure 12 Simulation results are shown for a 4:1 series capacitor buck hybrid DC-DC converter operating under peak current mode control, where each phase has a single adjustment term; and

[0041] Figure 13 Simulation results are shown for the same 4:1 series capacitor buck hybrid DC-DC converter operating under peak current mode control, with two adjustment terms per phase.

[0042] It should be noted that the accompanying drawings are schematic and not drawn to scale. For clarity and convenience in the drawings, the relative dimensions and scales of the components have been enlarged or reduced. The same reference numerals are generally used to refer to corresponding or similar features in modified and different embodiments. Detailed Implementation

[0043] This disclosure generally relates to a hybrid DC-DC converter with multiphase current-mode control. "Hybrid" means that the converter includes both capacitors and inductors. The hybrid DC-DC converter may have multiple parallel phases, also referred to as current paths, each current path including an inductor, each inductor contributing equally or uniformly to the converter's output power. In addition to the inductors, the hybrid converter also uses flying capacitors to set the voltage across the inductors; the nominal or average operating voltage of these capacitors is typically a defined ratio (e.g., one-quarter, one-half, and three-quarters) of the input voltage.

[0044] This disclosure introduces a current-mode control method in which the individual phase current command can be modified based on the deviation of the flying capacitor voltage from its nominal value, i.e., modifying the timing of the opening and closing of the control phase switches. The method can reduce interphase resonance while achieving a fast transient response even when one or more of the input capacitor, output capacitor, and flying capacitor values ​​are small (i.e., low).

[0045] Figure 1A conventional control loop 100 for a hybrid DC-DC converter used for multiphase current-mode control is conceptually illustrated. At 110, the control scheme periodically compares the measured output voltage Vout with the desired or reference output voltage Vout_ref. When the output voltage matches the reference output voltage, no change to the control parameters is required (although those skilled in the art will recognize that PID control can cause some transient settling variations). However, in the case of an error Verror in the deviation between the measured output voltage and the reference output voltage (which may also be referred to as the output reference voltage), as shown at 120, at 130, the control scheme adjusts the corresponding current setpoint for each phase of the converter, as shown in control loop 140. Depending on the specific control scheme in operation, for fixed-frequency operation, the setpoint for each phase can be any of the peak current, valley current, or average current for each phase. It should be understood that typically the same parameters, such as peak current and valley current, are used to control each phase. Alternatively, the converter can operate under hysteresis control, where the difference between the peak current and the valley current is used as the control parameter. Those skilled in the art will understand that this can result in a variable frequency and is an example of a hysteresis converter. Although the control loop 140 depends on the measured voltage and, in particular, the output voltage Vout, it is a current-mode control loop because the setpoint of the controlled parameter is related to the current of each phase of the multiphase hybrid DC-DC converter.

[0046] Figure 2A conceptual scheme 200 for a hybrid DC-DC converter with multiphase current-mode control according to an embodiment of the present disclosure is illustrated. The controller has the same control loop 140 as described above, which can be considered an external control loop and operates as such. Additionally, the controller has an internal control loop 230. In this control loop, the voltage Vcf,i across one or more flying capacitors of the hybrid converter is measured and compared to the expected or reference voltage value Vcf,i_ref of the corresponding flying capacitor. Those skilled in the art will understand that in a multiphase hybrid DC-DC converter, flying capacitors are switchably connected between individual current paths and charged to corresponding nominal values ​​to define corresponding voltages for charging and discharging the inductor on the power supply side. Disturbances, particularly steps in the input voltage or load current, can cause the voltage across the flying capacitor to deviate from its expected or reference voltage value. In the event of such a disturbance, the current in the current path associated with the flying capacitor changes. This control loop can respond quickly to disturbances such as load steps or power supply voltage steps by individually adjusting the current through each phase on a phase-by-phase basis. This balances the current through each phase, thereby avoiding or minimizing interphase resonance, which might otherwise only decay slowly, as described above. Therefore, this control loop can be considered an internal control loop.

[0047] The aspects of this disclosure will be described in more detail using a non-limiting example of a 4:1 series capacitor buck DC-DC converter. However, those skilled in the art will understand that this disclosure is not limited to such converters but extends to other multiphase hybrid converters with flying capacitors. Another non-limiting example of such a hybrid converter is a dual-inductor hybrid configuration.

[0048] Figure 3A An example of a 4:1 series capacitor step-down DC-DC converter is shown, and Figure 4 The corresponding waveforms used to control the converter are shown. Four current paths or phases can be identified between the input and output. The output includes an output capacitor 302, which is typically provided to power a load shown as a resistive load 304; however, those skilled in the art will understand that the load may not be purely resistive. An input capacitor (not shown) may be present. The four current paths or phases correspond to four inductors (L1-L4) 310, 312, 314, and 316. (In this example) a total of three flying capacitors (C1-C3) 322, 324, and 326 are present. It should be understood that in a more general series capacitor buck converter topology, N phases means the use of N inductors and N-1 capacitors.

[0049] like Figure 4As shown, the converter operates in a series of switching events, wherein during the entire switching cycle (1 / fsw), each of the inductor currents iL1 to iL4 (466, 464, 462, and 460) ramps up once with a controlled on-time ton,1 to ton,4 (430, 432, 434, and 436) or by a duty cycle Di as defined below.

[0050] Di = ton,i / (1 / fsw)

[0051] And during the remainder of this cycle, it ramps down at a slope of -Vout / Li. During the ramp portion of this cycle, the corresponding "low-side" switches (M1 to M4 330, 332, 334, and 336, respectively) connect the left-hand side connector of the corresponding inductor to ground: this forces the current to ramp down with Vout on the right-hand side of each inductor. Typically, all phases use equal inductance, L1 = L2 = L3 = L4, or more generally, Li = L. The ramp occurs by applying (Vin / 4 - Vout) across each inductor Li, which happens continuously in time, as... Figure 4 As shown, each on-time ton,i of inductor Li begins 1 / (4fsw) after the on-time of Li+1. For L4, this is accomplished by executing Vin - Vcf3 = Vin - 3Vin / 4 = Vin / 4; for L3, this is accomplished by executing Vcf3 - Vcf2 = 3Vin / 4 - Vin / 2 = Vin / 4; for L2, this is accomplished by executing Vcf2 - Vcf1 = Vin / 2 - Vin / 4 = Vin / 4; and for L1, this is accomplished by executing Vcf1 = Vin / 4.

[0052] In such Figure 3A In the conventional pulse width modulation (PWM) control of the converter shown, the control loop (e.g.) Figure 1 The loop 140 shown includes monitoring Vout 350 and comparing Vout 350 with a reference output voltage level Vout_ref 352. A PID (proportional-integral-derivative) controller is used to minimize any error Verror. The PID controller is configured to set an appropriate setpoint to control the timing of the on and off switching of each phase in the gate generation module, cell, or block 356.

[0053] Figure 3BThe same 4:1 series capacitor buck DC-DC converter is shown, but configured for conceptual current-based control. The term "conceptual" is used here because current-based control has been found to be unstable in certain cases for hybrid series capacitor buck converters and uses current control methods that are generally unsuitable. In current-based control, the setpoint used will vary depending on the specific current-mode control method implemented. For example, the setpoint could be a peak current setpoint (for peak current-mode control) or a valley current setpoint (for valley current-mode control), an average current setpoint, or even a hysteresis (i.e., the difference between peak and valley values) setpoint for self-oscillating or resonant (i.e., not fixed-frequency) converter operation. Values ​​of the corresponding current parameters are measured or calculated for each of the phase currents i1, i2, i3, and i4, as shown in 360, 362, 364, and 366. Those skilled in the art will understand that, depending on the specific current control mechanism used, values ​​can be measured directly at a specific moment during the switching cycle, or calculated from one or more measurements taken across the switching cycle. In valley or peak current mode control, the switch is controlled based on the comparison between the actual value and the set point. For example, in peak current control, the corresponding one of M5 to M8 (370, 372, 374 and 376 respectively) is disconnected.

[0054] It has been found that load steps or input voltage steps can cause slight damped resonances between phase currents when applying duty cycle-based or current-based control, especially in the case of series capacitor buck converters. One reason is that the change in duty cycle Di during the charging of the inductors Li in the four phases caused by load steps or power-side steps creates an imbalance between the voltages Vcf,1,Vcf,2, and Vcf,3 (322, 324, and 326) of the three flying capacitors, which requires time for the phases to resonate or decay. Since these converters are typically optimized for efficiency, the series damping resistance is low, and therefore, without any other damping mechanism, the resonance between the phase inductors and the flying capacitors can last for a considerable time. This reduces efficiency because the resonance does not generate output power while causing conduction losses, and it may be necessary to over-determine the maximum rated current of the phase inductors L1 to L4 (310, 312, 314, and 316). This resonance is particularly pronounced when small capacitors with low capacitance values ​​are used in flying capacitors, which is often desirable for keeping bill of materials (BoM) costs low.

[0055] This disclosure addresses one or more of the problems described above. While not limited thereto, it addresses issues such as... Figure 5AThe 4:1 series capacitor hybrid buck DC-DC converter shown illustrates an application of this concept. It should be noted that the figure depicts a 4-phase converter. However, where appropriate, this will be summarized as "N-phase" below. This converter is related to... Figure 3B The converters shown are identical; however, according to embodiments of this disclosure, an additional control loop is included in the control. Specifically, the corresponding voltages (Vcf1, Vcf2, and Vcf3) across each of the flying capacitors 322, 324, and 326 are measured. The voltages across the capacitors can be measured directly, or, but not limited to, at more convenient measurement points, such as between the left-hand side of the capacitor and ground. Measurements can be performed at any suitable moment or at any suitable time during the switching cycle. Measurements can be performed simultaneously or continuously. Each voltage is typically measured at least once per complete switching cycle (1 / fsw). As mentioned above, the nominal voltage across each flying capacitor is typically a fixed fraction of the input voltage, the specific fraction depending on the type of converter. For example, in the case of an N:1 series capacitor buck converter (which may also be simply referred to as an N:1 series converter), the ratio of each capacitor (i) in (N-1) capacitors is (i.Vin / N).

[0056] In addition, from Figure 4 As can be seen, the actual voltage across any flying capacitor at any given moment can differ from the nominal voltage because the flying capacitors are configured to cascade from Vin to each voltage node. This is performed by sequentially switching each capacitor to charge the next capacitor in the chain, thus causing the first capacitor to partially discharge. Therefore, flying capacitor 326 partially discharges while charging flying capacitor 324, and subsequently flying capacitor 324 partially discharges while charging flying capacitor 322. Therefore, the expected value of the voltage across the capacitor is not constant throughout the switching cycle. However, the median voltage can be calculated by measuring the peak and valley values ​​of the flying capacitors, or estimated based on the peak or valley capacitor voltages and current information from the inductor.

[0057] Each of the voltages Vcf1, Vcf,2, and Vcf,3 is compared with a corresponding reference value Vcf1_ref, Vcf,2_ref, and Vcf,3_ref. As described above, by selecting an appropriate time (or integration period), the measured value during the switching cycle is a well-defined ratio of the input voltage Vin (e.g., Vcf1_ref could be Vin / 4). Reference values ​​are determined in reference generator unit 358. The inventors have recognized that deviations from these values ​​indicate changes in operating conditions—typically load steps or supply voltage steps. Therefore, deviations can provide an "early warning signal" of disturbances, and the magnitude of the deviation can be used to provide a fast control loop or internal loop that can be used to quickly adapt the converter's control to suppress, reduce, or even eliminate resonance that would otherwise be caused by disturbances.

[0058] More specifically, in the illustrated embodiment, in the balanced PI (proportional-integral) controller 580, reference values ​​Vcf1_ref, Vcf,2_ref, and Vcf,3_ref are compared with the actually measured voltages Vcf1, Vcf,2, and Vcf,3. Therefore, within the balanced PI controller 580, the nominal value ic derived from the external loop of the current-mode control method is converted into individual current-mode control references ic,1,ic,2,ic,3, and ic,4, which are passed to the gate generation unit 356. In steady state, these four reference currents are theoretically equal and, in practical applications, at least approximately equal. However, during transients of the load current or input voltage, the voltage across the flying capacitors will be transient, and therefore, there will be differences between the voltages of these flying capacitors and the references from the flying capacitors in the Vcf reference generation block 358. This will result in individually generated and typically different reference current values ​​ic,1,ic,2,ic,3, and ic,4. Ideally, the voltage used to power each inductor should be (Vin / N) - Vout (or Vin / 4 – Vout in the case of the four-phase converter shown). In the example of a series capacitor buck converter, this voltage is generated by the voltage difference between the two flying capacitors. (Note that when L1 is used in the first stage, this voltage is only the voltage (Vcf) across the first flying capacitor. Furthermore, in this embodiment, when the last phase uses LN = L4, this voltage is only the voltage across the last flying capacitor Vcf,3.)

[0059] Figure 5B This shows the charging process when L3 (i.e., LN-1 in general) is charging. Figure 5A The converter. During this stage, M4 and M3 (=M N and M N-1 ) and M7 (=M N+3The switch is closed (and shown as a solid line), and the remaining switches are open (and therefore not shown). Therefore:

[0060]

[0061] The above equation remains in steady state, where voltages Vcf,N-1 and Vcf,N-2 are equal to their reference voltages (N-1)Vin / N and (N-2)Vin / N, respectively, as indicated in the equation. These references Vcf,N-1_ref, = (N-1)Vin / N and Vcf,N-2_ref = (N-2)Vin / N are generated in cell or block Vcf reference generation 358. The difference between the voltage Vcf,N-1 across the flying capacitor 326 and the reference Vcf,N-1_ref causes the balancing PI block 580 to generate a non-zero value of adj1. Similarly, the difference between the voltage Vcf,N-2 across the flying capacitor 324 and the reference Vcf,N-2_ref causes the balancing PI block 580 to generate a non-zero value of adj2.

[0062] It should be understood that, since adj1-adj2 are calculated, an equal increase in voltage Vcf,N-1 and an equal decrease in voltage Vcf,N-2 will not cause a change in the current-mode control reference current ic,N-1. This is logical because, according to the equation above, the voltage across LN-1 remains Vin / N-Vout. However, any deviation from the steady-state voltage Vin / N-Vout will cause a change in the current-mode control reference current ic,N-1. Therefore, the values ​​of adj1 and adj2 are used to modify or adjust the current control setpoint value of the relevant inductor (ic3 in the example described above).

[0063] The above description and related embodiments typically adjust the current control setpoint based on the difference between two measurements (one for each flying capacitor), the voltage difference of which provides voltage to the inductor. It should be noted that the "first" or lowest inductor L1 310 provides an exception to this generality, as the voltage across the "first" or lowest inductor L1 310 is defined by the voltage difference between the flying capacitor 322 (Vcf,1) and a fixed voltage (ground level). Therefore, L1 depends only on a single adjustment derived from (Vcf,1-Vcf,ref,1).

[0064] It should be understood that in the case of disturbances caused by a step change in the load, the sum of the deviations of the voltages across the capacitors (from their expected values) will be zero, because at least ideally and in steady state, the sum of deviations corresponds to the deviation of the input voltage. However, in practice, due to error tolerances and derating, charge conservation may not result in voltage conservation based on capacitor values. It should also be understood that in the case of a step change in the input voltage, the sum of deviations from the expected value is typically not zero. Specifically, in transient input scenarios, the error will appear across all capacitors at the moment of the Vin step, resulting in a negative voltage error across all capacitors.

[0065] Figure 6 A practical implementation of a control scheme using valley current-mode control according to embodiments of the present disclosure is shown, wherein two adjustment values ​​are used to modify the duty cycle of individual phases. It should be understood that most schemes (aside from slope compensation and specific control circuitry in control block 690) are independent of any particular form of current-mode control (whether peak current-mode control, valley current-mode control, or others).

[0066] The main (external and slower) control loop includes a PID controller 610. As shown, the output voltage Vout at node 602 can be digitized in an analog-to-digital converter (ADC) 604, from which a reference output voltage Vout_ref is subtracted to provide an error signal Verror to the PID controller 610. The PID controller 610 provides a “global” setpoint current ic, which is nominally identical for each of the inductor phases. The global setpoint current is adjusted phase-by-phase to determine setpoint currents ic1, ic2, ic3, and ic4. This adjustment is based on measurements of the voltages across flying capacitors 322, 324, and 326 (Vcf1_meas, Vcf2_meas, and Vcf3_meas) (or measurements associated with the flying capacitors, as described above). The measurements are digitized via ADCs 612, 614, and 616. The input voltage Vin is also digitized at ADC 618. The nominal values ​​of the voltage across the flying capacitor are calculated from the digitized value of Vin to provide the flying capacitor reference voltages Vcf1_ref, Vcf2_ref, and Vcf3_ref.

[0067] The individual PI sub-units 622, 624, and 626 of the balancing PI block or unit 580 determine appropriate adjustment values ​​adj1, adj2, and adj3 from Vcf3_ref and Vcf3_meas, Vcf2_ref and Vcf2_meas, and Vcf1_ref and Vcf1_meas, respectively. These adjustment values ​​are then typically used in pairs to modify the global current setpoint ic_i to derive the individual phase current setpoint. Therefore...

[0068] ic1 = ic - adj3,

[0069] ic2 = ic + adj3 - adj2

[0070] ic3 = ic + adj2 - adj1, and

[0071] ic4 = ic + adj1.

[0072] Then, in the case of valley current control, slope compensation can be added to the corresponding current control setpoints ic1 to ic4, as shown in 640, 642, 644 and 646.

[0073] As shown in 650, 652, 654, and 656, additional filtering or signal processing can be applied to generate valley current control signals ival1 to ival4. The resulting valley current control values ​​are converted into analog signals by corresponding digital-to-analog converters (DACs). These are then compared with sensed currents (valley currents shown in this example) isns1 to isns4 by a comparison unit or comparator (which typically includes some hysteresis or latched outputs, as shown). The outputs from the comparison units or comparators 660, 662, 664, and 666 are input to gate generation block 356, which outputs a gate control signal that is used via gate driver 670 to control the switches in a 4:1 series capacitor buck converter 680. Although this disclosure is not limited thereto, the illustrated embodiment uses valley current measurements in valley current control. In this case, sensed currents isns1 to isns4 are provided by sensing the low-side switch current via a series resistor connected to ground, as schematically shown at 690. Those skilled in the art will understand that although 690 illustrates a current sensing implementation for valley current mode control, alternative sensing methods such as SenseFET and VDS sensing can be used in valley current mode implementations or to implement other types of current mode control techniques, as described above.

[0074] In example Figure 6In the illustrated embodiment, the external control loop is based on a measured output voltage Vout, which is digitized and compared with a reference value Vout_ref to provide an error signal Verror. This can be applied to a single-stage converter or even a two-stage directly coupled converter. However, for some applications, the illustrated converter can be combined with a second auxiliary converter, which also supplies power to the same output 602 in parallel with the hybrid DC-DC converter, while being powered at its input by charge from a buffer capacitor. The hybrid DC-DC converter then delivers most of the output power, while the auxiliary converter assists the hybrid DC-DC converter to deliver transient power to the same output voltage 602, either by drawing transient power from or delivering transient power to the buffer capacitor at the input of the auxiliary converter. The voltage across this input capacitor of the auxiliary converter is referred to as Vaux, and a control output from the auxiliary converter is used to control the output voltage of the main converter, while a control output from the main converter is used to control the input voltage across the buffer capacitor that powers the auxiliary converter. This can be referred to as cross-coupling control. In such applications, Vout can be replaced at node 602 by the input voltage Vaux across the buffer capacitor at the input of the auxiliary converter.

[0075] Those skilled in the art will understand that, although it has been illustratively described Figure 6 To aid the reader's understanding of this disclosure, in practical embodiments, the functions shown as discrete units may be combined or partially combined. Thus, for example, ADCs 604 and 612 through 618, indicated as separate components, may be combined or partially combined, and different signals may be digitized at different times during the conversion cycle using the same digitizer. Similarly, digital-to-analog converters may be combined or partially combined. Furthermore, although some processing (generally depicted by boundary 620) is performed in the digital domain as shown, this is not mandatory, and more or even all control processes may be implemented in the analog domain.

[0076] H1 through H4 (shown at 682, 684, 686, and 688) are optional signal conditioners. Specifically, they can be buffers used to step the voltage of the ADC. H1-4 typically include buck buffers, and H0 692 can be a boost buffer. Additionally, these blocks, especially H0, can provide noise filtering to obtain more accurate voltage readings.

[0077] Figure 7 and 8 The simulation results for a 4:1 series capacitor buck hybrid DC-DC converter are shown, without ( Figure 7 ) and have ( Figure 8Adjustments were made based on the measured and adjusted voltage of the flying capacitor. The simulation was based on a switching frequency fsw of 250kHz, with an inductor value L equal to 0.47μH, an inductor series resistance DCR = 0.8mΩ, and switch on-resistances Rds_on = 1mΩ (high side) and Rds_on = 0.8mΩ (low side). Input capacitors Cin = 10μF, Cout = 800μF, and Cfly = 10μF (equivalent series resistances of 1mΩ, 0.5mΩ, and 1mΩ, respectively). The input resistance was set to 300mΩ, and the line inductance was set to 2.5μH.

[0078] Figure 7 The use of conventional voltage-mode control is illustrated, therefore a pulse-width modulation (PWM) scheme is shown, and Figure 8 Results of a fixed-frequency valley current-mode control (VCMC) scheme according to one or more embodiments are shown. The top plots 710 and 810 show the output voltage (controlled to 0.8V), the second plot shows the four individual phase currents (720, 722, 724, and 726 without flying capacitor-based adjustment, and 820, 822, 824, and 826 with flying capacitor-based adjustment). The third plot shows the three flying capacitor voltages (730, 732, and 734 without flying capacitor-based adjustment, and 830, 832, and 836 with flying capacitor-based adjustment), and the last plot shows the effective voltage at the input of the converter (740, 840). It should be noted that the input distribution network is assumed to have a series connection of a 0.3Ω resistor and a 2.5μH inductor. At simulation time t1, the load current steps from 30A to 60A, while at t2, the input voltage steps from 48V to 60V. In particular, the phase-to-phase resonance is clearly shown when an input voltage step is applied.

[0079] It should be understood that transient specifications for the bus input voltage of 48V systems are beginning to emerge in automotive applications. Simultaneously, the use of hybrid converters for converting large voltage differences (e.g., directly from 48V to 0.8V in these analog systems) is increasing, particularly in, but not limited to, automotive applications. Therefore, especially... Figure 7 The resonance shown at t = 4.9 ms after the input step size urgently needs to be addressed. Figure 8 These resonances have been significantly reduced using a control scheme based on embodiments of the present disclosure.

[0080] Figure 9 and 10Simulation results are shown for a 4:1 series capacitor buck hybrid DC-DC converter configured as a two-stage converter, with the main stage and auxiliary converter cross-coupled such that Vaux from the auxiliary converter is used as a control input to the main converter (instead of Vout), and vice versa. Figure 9 A simulation without flying capacitor voltage measurement and adjustment results is shown, and Figure 10 The simulation results with flying capacitor voltage regulation are shown. The simulation used values ​​Cout = 500 μF, Caux = 60 μF, Cin = 10 μF, Cfly = 10 μF, the on-resistance of the switch was Rds_on = 1 mΩ (high side) and Rds_on = 0.8 mΩ (low side), and the switching frequency of the main converter was fsw,main = 250 kHz. Similar to... Figure 7 and 8 The top plots (910, 1010) show the output voltage (controlled to 0.8V). The second plot shows the four individual phase currents (920, 922, 924, and 926 without flying capacitor-based adjustment, and 1020, 1022, 1024, and 1026 with flying capacitor-based adjustment). The third plot shows the three flying capacitor voltages (930, 932, and 934 without flying capacitor-based adjustment, and 1030, 1032, and 1036 with flying capacitor-based adjustment), and the bottom plot shows the effective voltage at the input of the converter (940, 1040). The auxiliary bus voltages are shown at 950 and 1050. Finally, the auxiliary inductor current is shown at... Figure 9 The value shown is 960, and in Figure 10 It is shown as 1060.

[0081] At t1, the load jumps from 0A to 30A; at t2, the load jumps from 30A to 60A; and at t3, the input voltage jumps from 48V to 60V, with a transient rate of 2.4V / μs. Similar to... Figure 7 In particular, a step change in the input voltage causes significant interphase resonance, such as... Figure 9 These resonances are clearly visible, and by applying VCMC control methods, they can be significantly reduced, such as... Figure 10 As shown.

[0082] Turning Figure 11 The diagram illustrates a control scheme using a single adjustment for each stage. (In fact, as will be discussed further below, one phase is not directly controlled by monitoring changes in the flying capacitors, since for an N-phase converter, there are only N-1 flying capacitors.) Figure 11 The control scheme shown is similar to Figure 6 The control scheme shown is similar to... Figure 6 As shown, the global current control parameter ic is modified only by the value adj1 generated by the balanced PI control subunit 626, as shown at node 1136, to generate the current control setpoint value ic4. However, compared with Figure 6 Conversely, the current control setpoints ic2 and ic3 of the "internal" inductor phases (i.e., all phases except the one closest to ground and the one closest to the supply voltage Vin) are also derived from the global current control setpoint ic by a single adjustment term: for ic3, this is the adjustment value adj2 generated by the balanced PI subunit 624, as shown at 1134, and for ic2, this is the adjustment value adj2 generated by the balanced PI subunit 622, as shown at node 1132. It should be noted that in this control scheme, the global current control setpoint is not adjusted to produce ic1. That is, as shown at 1130, ic1 is a direct copy of ic. Those skilled in the art will understand that in the event of disturbances to the load current or input voltage, it may be necessary to adjust the current control setpoint ic4. However, according to the scheme, this adjustment occurs as a secondary adjustment, rather than directly through measurement of one of the flying capacitors. Therefore, the settling time of the current according to this control scheme is typically longer than... Figure 6 The control scheme shown takes a long time, although Figure 11 Compared to the control scheme shown Figure 6 The proposed solution is not that complicated.

[0083] Turn now Figure 12 and 13 These figures illustrate simulation results for a 4:1 series capacitor buck hybrid DC-DC converter operating under peak current mode control. Figure 12 Each phase is subject to a single adjustment term (from a single flying capacitor), while Figure 13 Two adjustment terms are applied to each phase (i.e., from two adjacent flying capacitors).

[0084] The top plots 1210 and 1310 show the output voltage (controlled to 0.8V), and the second plot shows the four individual phase currents (1220, 1222, 1224 and 1226 with adjustments based on a single flying capacitor, and 1320, 1322, 1324 and 1326 with adjustments based on two flying capacitors). The third curve plots the voltages of the three flying capacitors (1230, 1232, and 1234 with adjustments based on a single flying capacitor, and 1330, 1332, and 1334 with adjustments based on two flying capacitors). The fourth curve plots the voltage Vd across the low-side switch of each phase (1240, 1242, 1244, and 1246 with adjustments based on a single flying capacitor, and 1340, 1342, 1344, and 1346 with adjustments based on two flying capacitors). Finally, the last curve plots the effective voltages at the converter input (1250, 1350). At simulation time t1, the load current steps from 30A to 60A, while at t2, the input voltage steps from 48V to 60V. It can be seen that the interference on the output voltage is clearly visible at 1204. Figure 12 Compared to the two adjustment items, ( Figure 13 The results show that the disturbance to the output voltage is significantly reduced (almost invisible) at 1304. In both cases, the response to the loading step at 1.0 ms is observable at 1202 and 1302 respectively, but the duration is very short.

[0085] As will now be appreciated, embodiments of this disclosure can allow the full functionality of an N-phase hybrid DC-DC converter with current-mode control to be maintained without the need for large flying capacitors. This can contribute to a reduction in size. Furthermore, maintaining phase current balance even when using non-uniform control commands on different phases can improve efficiency and reduce ripple on the output voltage. When using an N-phase hybrid DC-DC converter, allowing individual / non-uniform commands on each phase can reduce response time, typically by a factor of N.

[0086] Phases are monitored by balancing the voltage used to charge each phase inductor, rather than by balancing the current through individual phase current monitoring. For an N-phase series capacitor hybrid buck converter, the steady-state value is Vin / N. The error generated between the flying capacitor voltage measurement and the reference is used to generate the adjustment term for the current command.

[0087] For each individual phase inductor, the two flying capacitors (i.e., the flying capacitor directly connected to the inductor and the capacitor from the higher level) are typically related to the charging slope. The command for the top phase current N will be adjusted only by the deviation of the topmost flying capacitor from (N-1)Vin / N, while the bottom phase current I will be adjusted only by the deviation of the bottommost capacitor voltage from Vin / N.

[0088] While this disclosure is not limited thereto, it may be particularly applicable to hybrid DC-DC converters with valley current mode control. This is because valley current control allows for easier low-side current sensing. Combining this valley current mode with correction based on sensing the flying capacitor voltage can help provide balance without actually reconstructing the actual inductor currents (which are affected by the resonance that occurs and require more sophisticated hardware solutions to measure).

[0089] While the embodiments herein focus on N:1 series capacitor buck hybrid DC-DC converters, this disclosure extends to other hybrid DC-DC converters with parallel phases, where the voltage across an inductor in each phase on one side is determined by the voltage across a flying capacitor or the voltage difference between two or more flying capacitors. Examples include dual-inductor hybrid converters or multi-inductor hybrid converters. The concept of a control scheme applies to such converters, i.e., using an external voltage loop to set a current reference for controlling the peak, average, or valley current in each phase, and adjusting this per-phase reference based on the difference between the voltage determined by the constellation of flying capacitors and an ideal value (typically Vin / N for an N-phase hybrid converter).

[0090] The illustrations of the embodiments described herein are intended to provide a general understanding of the structure of various embodiments, and they are not intended to be used as a complete description of all elements and features of devices and systems that may utilize the structures described herein. Many other embodiments will be apparent to those skilled in the art upon reading the foregoing description. Other embodiments can be utilized and derived therefrom, thereby allowing structural and logical substitutions and changes to be made without departing from the scope of this disclosure. The drawings are also merely representative and may not be drawn to scale. Some scales of the drawings may be enlarged, and others may be minimized. Therefore, the specification and drawings should be considered illustrative rather than restrictive.

[0091] Although specific embodiments have been shown and described herein, it should be understood that any arrangement calculated or constructed to achieve the same or similar purpose may replace the specific embodiments shown. This disclosure is intended to cover any and all adaptations or variations of the various embodiments. This disclosure is prudently considered in combinations of the above embodiments and other embodiments not specifically described herein.

[0092] For example, one or more features or aspects from one or more embodiments may be combined with one or more features or aspects from one or more other embodiments. In one or more embodiments, a feature that is affirmatively referenced may also be negatively referenced and excluded from the embodiments, whether or not it is replaced by another structural and / or functional feature. The steps or functions described with respect to embodiments of this disclosure may be performed in any order. The steps or functions described with respect to embodiments of this disclosure may be performed individually or in combination with other steps or functions of this disclosure, or may be performed according to other embodiments or other steps not described in this disclosure. Furthermore, more or fewer features than all the features described with respect to embodiments may be utilized.

[0093] Fewer than all the steps or functions described with respect to the exemplary process or method may be performed in one or more exemplary embodiments. Furthermore, unless explicitly stated otherwise, the use of numerical terms such as first, second, third, etc., to describe devices, components, steps, or functions is not intended to describe a sequence or function. Unless explicitly stated otherwise, the use of the terms first, second, third, etc., is generally for distinguishing devices, components, steps, or functions. Additionally, one or more devices or components described with respect to exemplary embodiments may facilitate one or more functions, wherein said facilitation (e.g., facilitating access or facilitating connection establishment) may include fewer than each step required to perform the function, or may include all the steps required to perform the function.

[0094] Those skilled in the art will understand that, as used herein, terms such as "first" and "second" in expressions such as "first voltage" and "second voltage" may not refer to a single moment, but rather to a single node or across a single component. Therefore, as used herein, the phrase "first voltage" can be a value that varies over time.

[0095] In providing this abstract, it should be understood that the abstract is not intended to interpret or limit the scope or meaning of the claims. Furthermore, in the above detailed description, it can be seen that various features are grouped together in a single embodiment for the purpose of simplification. The approach of this disclosure should not be construed as reflecting an intention that the claimed embodiment requires more features than are expressly recited in each claim. In fact, as reflected in the appended claims, the inventive subject matter lies in having fewer features than all features in a single disclosed embodiment. Therefore, the appended claims are hereby incorporated into the detailed description, wherein each claim exists independently as a separately claimed subject matter.

Claims

1. A method for controlling a hybrid multiphase DC-DC converter comprising multiple switched inductor current paths, characterized in that, The method includes: Compare the output voltage with the output reference voltage; In response to the difference between the output voltage and the output reference voltage, the corresponding current control parameters for each current path are adjusted; Compare the first voltage across the first flying capacitor with the reference voltage of the first capacitor; and In response to the difference between the first voltage across the first flying capacitor and the first capacitor reference voltage, the corresponding current control parameter of one of the current paths is modified.

2. The method according to claim 1, characterized in that, The current control parameter for each current path is one of a group consisting of the peak current setpoint, the valley current setpoint, and the average current setpoint of the corresponding current path.

3. The method according to claim 1 or 2, characterized in that, Each switching inductor current path can switch between on-time and off-time, wherein the current in the switching inductor increases during the on-time and decreases during the off-time.

4. The method according to claim 3, characterized in that, The hybrid multiphase DC-DC converter is configured to operate in a fixed frequency mode.

5. The method according to claim 4, characterized in that, The current control parameter for each current path is a peak current setpoint; and modifying the peak current setpoint includes delaying the end of the turn-on time in response to a negative difference between the first voltage across the first flying capacitor and the first capacitor reference voltage, and advancing the end of the turn-on time in response to a positive difference between the first voltage across the first flying capacitor and the first capacitor reference voltage.

6. The method according to claim 4, characterized in that, The current control parameter for each current path is a valley current setpoint; and modifying the valley current setpoint includes advancing the start of the turn-on time in response to a negative difference between the first voltage across the first flying capacitor and the first capacitor reference voltage, and delaying the start of the turn-on time in response to a positive difference between the first voltage across the first flying capacitor and the first capacitor reference voltage.

7. The method according to claim 1, characterized in that, The current control parameter for each current path is a hysteresis setpoint corresponding to the difference between the peak current and the valley current, and the hybrid multiphase DC-DC converter is configured to operate in hysteresis mode.

8. The method according to any one of the preceding claims, characterized in that, The hybrid multiphase DC-DC converter further includes at least one additional flying capacitor, and the method further includes: The corresponding voltage across each of at least one additional flying capacitor is compared with the corresponding capacitor reference voltage, and the corresponding control parameter of the corresponding current path in the current path is modified in response to the difference between the corresponding voltage of the corresponding flying capacitor and the corresponding capacitor reference voltage.

9. The method according to any one of claims 1 to 7, characterized in that, In addition, including: Compare the second voltage across the second flying capacitor with the reference voltage of the second capacitor; and Modifying the control parameters of one of the current paths in the current path includes modifying the control parameters by an amount that depends on the difference between the first offset and the second offset. Wherein: the first offset is the difference between the first voltage across the first flying capacitor and the reference voltage of the first capacitor. Furthermore, the second offset is the difference between the second voltage across the second capacitor and the reference voltage of the second capacitor.

10. A controller for a hybrid multiphase DC-DC converter including multiple switched inductor current paths, characterized in that, The controller includes: An external comparison unit is configured to compare the output voltage of the converter with an output reference voltage. An external loop adjustment circuit is configured to adjust the corresponding current control parameters for each current path in response to the difference between the output voltage and the output reference voltage. A first internal comparison unit, configured to compare a first voltage across a first flying capacitor with a first capacitor reference voltage; and An internal loop adjustment circuit is configured to modify the corresponding current control parameter of one of the current paths in response to the difference between the first voltage across the first flying capacitor and the first capacitor reference voltage.

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