Unmanned aerial vehicle communication link analysis method and system for ELRS communication protocol

Abstract

The invention discloses an unmanned aerial vehicle communication link analysis method and system for an ELRS communication protocol, and relates to the technical field of unmanned aerial vehicle communication detection. Modulated electromagnetic waves based on ELRS protocol communication between the unmanned aerial vehicle and the remote controller are obtained from a receiving end; processing and sampling the modulated electromagnetic wave to obtain an original digital data stream; processing according to the original digital data stream to obtain an observation frequency hopping sequence, and determining an analog frequency hopping sequence of each group of enumeration parameters according to a preset algorithm of an ELRS protocol; generating a target frequency hopping sequence based on a comparison result of the observation frequency hopping sequence and the simulation frequency hopping sequence, predicting a target digital signal from the target frequency hopping sequence for analysis to obtain a LoRa modulation parameter, and performing LoRa demodulation on the target digital signal according to the LoRa modulation parameter to obtain a binary data stream; and analyzing the binary data stream according to a protocol format used by the ELRS protocol to obtain a structured ELRS data frame, and uploading the structured ELRS data frame to an upper computer. By implementing the provided technical scheme, resource waste caused by continuous blind scanning is avoided.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of unmanned aerial vehicle communication detection, and particularly relates to an unmanned aerial vehicle communication link analysis method and system for an ELRS communication protocol. BACKGROUND

[0002] With the popularization of unmanned aerial vehicle technology, its application in the fields of logistics, aerial photography, etc. is increasingly widespread. However, the misuse of illegal unmanned aerial vehicles also poses a serious threat to low-altitude safety, airspace regulation, and sensitive area protection. Therefore, in the authorized regulatory scenarios (such as airport clearance protection, large event security, etc.), relevant regulatory departments need to identify ELRS protocol unmanned aerial vehicles technically to distinguish between legal flight and illegal intrusion.

[0003] The existing detection technology for frequency hopping communication unmanned aerial vehicles usually adopts a method based on radio spectrum analysis. This method deploys a wideband spectrum monitoring device to continuously and rapidly scan the entire frequency band in which the unmanned aerial vehicle may operate. When the device detects a signal with energy exceeding a preset threshold at a certain frequency point, it captures the signal and attempts subsequent protocol analysis.

[0004] However, the above-mentioned existing technology based on full-band blind scanning has a fundamental efficiency bottleneck when dealing with unmanned aerial vehicles using complex frequency hopping protocols such as ELRS (ExpressLRS). The frequency hopping sequence of the ELRS protocol is generated by a pseudo-random algorithm, and its hopping points switch rapidly and randomly within a wide frequency band. The blind scanning method cannot predict the next hop frequency and can only passively continuously monitor and search within the entire frequency band. This results in the system having to maintain a very high scanning bandwidth and processing speed, which in turn causes high signal analysis time consumption. SUMMARY

[0005] The present application provides an unmanned aerial vehicle communication link analysis method and system for an ELRS communication protocol, which solves the resource waste of the existing technology for continuously blind scanning the entire frequency band and improves the signal analysis efficiency.

[0006] In a first aspect, the application provides a method for analyzing a UAV communication link based on an ELRS communication protocol, the method comprising: obtaining, from a receiving end, modulated electromagnetic waves based on ELRS protocol communication between a UAV and a remote controller; filtering and amplifying the modulated electromagnetic waves to obtain a processed analog intermediate frequency signal; sampling the processed analog intermediate frequency signal based on an analog-to-digital converter to obtain an original digital data stream; processing the original digital data stream to obtain an observed frequency hopping sequence, and using a preset algorithm of the ELRS protocol to determine an analog frequency hopping sequence of each group of enumeration parameters; determining a cracking parameter based on a comparison result of the observed frequency hopping sequence and the analog frequency hopping sequence, generating a target frequency hopping sequence according to the cracking parameter, and predicting a predicted frequency hopping channel at the next moment from the target frequency hopping sequence; digitally down-converting and channel filtering the original digital data stream according to the predicted frequency hopping channel to extract a target digital signal; analyzing the target digital signal to obtain LoRa modulation parameters, LoRa demodulating the target digital signal according to the LoRa modulation parameters to obtain a symbol sequence; descrambling and error correction decoding the symbol sequence to recover an original binary data stream; performing frame synchronization and field analysis on the binary data stream according to a protocol format used by the ELRS protocol to obtain a structured ELRS data frame, so as to upload the structured ELRS data frame to an upper computer.

[0007] By adopting the above technical solution, the modulated electromagnetic waves of the ELRS protocol are captured at the receiving end, and after multi-stage radio frequency processing and analog-to-digital conversion, an original digital data stream is obtained. The observed frequency hopping sequence is obtained by analyzing the original data stream, and the analog sequence is generated by combining the specific algorithm of the ELRS protocol for matching, and the frequency hopping channel at the next moment is successfully predicted. The signal acquisition efficiency is improved based on the active prediction method, and the resource waste of continuously scanning the entire frequency band in the traditional scheme is avoided. After obtaining the predicted frequency hopping channel, the target signal is accurately extracted through digital down-conversion and channel filtering. The LoRa modulation parameters are determined by analyzing the characteristics of the target signal, and the accurate demodulation of the fast frequency hopping signal is realized. The descrambling and forward error correction decoding mechanism effectively improves the reliability of data recovery, and even in a complex electromagnetic environment, the bit error rate can be kept low. Frame synchronization and field analysis are completed according to the ELRS protocol format, and the standardized data frame structure is output.

[0008] Optionally, the original digital data stream is processed to obtain an observed frequency hopping sequence, and a preset algorithm of the ELRS protocol is used to determine an analog frequency hopping sequence of each group of enumeration parameters, specifically including: the original digital data stream is divided into a plurality of time-continuous data frames, and a fast Fourier transform is performed on each data frame to calculate the power spectrum of each time; all data frames are processed continuously to generate a time-frequency power spectrum matrix; a plurality of frequency peaks with a power energy peak greater than a detection power threshold are selected from the time-frequency power spectrum matrix, the power energy peak being an energy peak existing in the power spectrum of each time point; the center frequencies corresponding to the plurality of frequency peaks are retrieved, and the plurality of center frequencies are sorted according to the chronological order of the time points to obtain the observed frequency hopping sequence; it is determined that the ELRS protocol adopts a linear congruential generator algorithm with a 31-bit internal state as a seed, a known output value is determined according to the output rule of the linear congruential generator algorithm; a high-16-bit value is determined according to the known output value, the low-16-bit value is enumerated according to the high-16-bit value to obtain a first enumeration space; the high-16-bit value is determined as a second enumeration space, and each value in the first enumeration space and the second enumeration space is combined to obtain a plurality of candidate initial seeds; each candidate initial seed is calculated using linear congruential generator inverse element operation to obtain a candidate initial state; a simulated frequency hopping sequence corresponding to the observed frequency hopping sequence is generated according to the linear congruential generator algorithm with each candidate initial state as a seed, to obtain a plurality of simulated frequency hopping sequences corresponding to each group of enumeration parameters.

[0009] By using the above technical solution, the original digital data stream is frame-divided and fast Fourier transformed to generate a time-frequency power spectrum matrix, which can intuitively display the time-frequency characteristics of frequency hopping communication, and by setting a reasonable detection power threshold, the interference of background noise can be effectively filtered out, and the real frequency hopping points can be accurately identified; after obtaining the observed frequency hopping sequence, the characteristics of the linear congruential generator algorithm in the ELRS protocol are used, and the enumeration strategy of separating high-16-bit and low-16-bit based on the structural characteristics of the 31-bit internal state is further proposed. This hierarchical enumeration method significantly reduces the complexity of the search space, and through the inverse element operation of the linear congruential generator, the effectiveness of the candidate initial state can be quickly verified, further improving the cracking efficiency.

[0010] Optionally, the cracking parameter is determined based on a comparison result of the observed frequency hopping sequence and the simulated frequency hopping sequence, and the target frequency hopping sequence is generated according to the cracking parameter, specifically including: point-by-point comparison of the observed frequency hopping sequence and the target simulated frequency hopping sequence to obtain a matching degree score, the matching degree score being the number of points with target frequency values at the same time index position of the target simulated frequency hopping sequence and the observed frequency hopping sequence, the target frequency including the same frequency value and a frequency value with a frequency deviation less than a preset deviation, and the target simulated frequency hopping sequence being any one of the multiple simulated frequency hopping sequences; after the comparison of the multiple simulated frequency hopping sequences and the observed frequency hopping sequence is completed, the maximum matching degree score is selected from the multiple calculated matching degree scores; if the maximum matching degree score is greater than a preset matching degree threshold, it is confirmed that the cracking is successful, and the target candidate initial state corresponding to the simulated frequency hopping sequence with the maximum matching degree score is determined as the cracking parameter; and the target frequency hopping sequence is obtained by iterative calculation based on the linear congruential generator algorithm with the target candidate initial state as a seed.

[0011] By adopting the above technical solution, each simulated frequency hopping sequence is compared point by point and the matching degree score is calculated, the calculation of the matching degree score fully considers the time synchronization requirement, the comparison at the same time index position ensures the accuracy of the frequency hopping timing, the maximum matching degree score is used as a criterion, and a reasonable preset matching degree threshold is set, which not only ensures the reliability of the cracking result, but also avoids false judgments caused by false matching.

[0012] Optionally, the target digital signal is extracted by digital down-conversion and channel filtering of the original digital data stream according to the predicted frequency hopping channel, specifically including: generating a digital complex sine signal according to the frequency value of the predicted frequency hopping channel and the sampling rate of the original digital data stream, the digital complex sine signal being a negative value of the frequency of the predicted frequency hopping channel; performing point-by-point complex multiplication of the original digital data stream and the digital complex sine signal to obtain a wideband zero intermediate frequency signal; performing digital low-pass filtering on the wideband zero intermediate frequency signal to obtain a filtered narrowband baseband signal; and performing down-sampling processing on the filtered narrowband baseband signal to obtain the target digital signal.

[0013] By adopting the above technical solution, the corresponding digital complex sine signal is generated based on the frequency of the predicted frequency hopping channel, and the negative frequency value is designed, which can accurately shift the signal of the target frequency point to the zero intermediate frequency position. The point-by-point operation is used in the complex multiplication process to ensure the phase continuity in the frequency conversion process, effectively avoiding spectrum leakage and sideband interference. The subsequent digital low-pass filtering can effectively suppress the image components and out-of-band interference generated in the frequency conversion process, and extract a clean narrowband baseband signal, and the down-sampling processing further optimizes the data amount, significantly reduces the calculation burden of the subsequent processing link while maintaining the integrity of the signal.

[0014] Optionally, the target digital signal is analyzed to obtain LoRa modulation parameters, specifically including: inputting the target digital signal into a parallel correlator group and performing correlation operation with each ideal template signal to obtain a plurality of sharp peaks, and determining whether there is a sharp peak greater than or equal to a preset decision threshold in the plurality of sharp peaks; when there is a sharp peak greater than or equal to the preset decision threshold in the plurality of sharp peaks, a target time point corresponding to the target sharp peak is confirmed as a starting time, and a timer is started to count; the signal data of the target digital signal is calculated to obtain an instantaneous power, and the instantaneous power is subjected to sliding average filtering to obtain an average power value; when the average power value is less than a preset end threshold, the time corresponding to the average power value is the signal end time, and the final count value corresponding to the counter at the signal end time is obtained; the final count value is multiplied by the timer clock period to obtain a signal air time length; and the LoRa modulation parameters matched with the signal air time length are searched in a preset LoRa parameter table.

[0015] By adopting the above technical solution, the target digital signal is subjected to parallel correlation operation with the preset ideal template, which can accurately capture the characteristic structure of the LoRa signal. The combination of sharp peak detection and preset decision threshold effectively improves the reliability of signal detection, and even under the condition of low signal-to-noise ratio, the starting position of the signal can be accurately identified. The time domain characteristics of the LoRa signal are utilized, and the modulation parameters are inversely deduced by accurately measuring the air time length of the signal. The combination of instantaneous power calculation and sliding average filtering can effectively suppress the influence of instantaneous fluctuation and accurately determine the end time of the signal. This parameter identification method based on time length has higher accuracy and lower computational complexity compared with the traditional frequency spectrum analysis method.

[0016] Optionally, the target digital signal is LoRa demodulated according to the LoRa modulation parameters to obtain a symbol sequence, specifically including: obtaining a spreading factor and a signal bandwidth from the LoRa modulation parameters, generating a LoRa uplink chirp signal according to the spreading factor and the signal bandwidth; generating an ideal baseline downlink chirp signal that is conjugated in the time domain based on the LoRa uplink chirp signal; obtaining a preamble signal from the target digital signal, performing a demodulation frequency processing on the preamble signal according to the ideal baseline downlink chirp signal to obtain a demodulated preamble signal; performing a fast Fourier transform on the demodulated preamble signal to obtain a detection frequency, and performing a synchronization correction on a carrier frequency offset of the target digital signal based on a deviation of the detection frequency from a theoretical frequency; after the synchronization correction is completed, obtaining a synchronization word signal from the target digital signal, the synchronization word signal being a signal arranged after the preamble signal in the target digital signal; performing a demodulation frequency processing and a fast Fourier transform on the synchronization word signal, comparing a demodulated symbol value with a preset synchronization word, and confirming an effective starting position of a data frame; starting from the effective starting position, dividing sampling points of each symbol in the target digital signal according to the spreading factor to obtain a plurality of symbol segments; performing a point-by-point multiplication on a target symbol segment and the ideal baseline downlink chirp signal to obtain a demodulated frequency symbol signal, the target symbol segment being any one of the plurality of symbol segments; performing a fast Fourier transform on the demodulated frequency symbol signal to find a frequency peak value with the largest energy from an output spectrum; directly determining a position index where the frequency peak value is located as an original symbol value of the symbol segment, obtaining a plurality of original symbol values demodulated from the plurality of symbol segments, and sorting the original symbol values in a time sequence to obtain the symbol sequence.

[0017] By adopting the above technical solution, a standard reference signal is generated based on the identified modulation parameters, an ideal baseline signal is generated through time domain conjugation processing, and an accurate demodulation reference is provided for the subsequent demodulation process. Compared with the direct spectrum analysis method, this reference signal-based demodulation method has stronger anti-noise capability and higher demodulation accuracy. In the synchronization process, the preamble signal is used for carrier frequency offset estimation and correction, and through spectrum analysis on the demodulated preamble signal, the deviation between the actual carrier frequency and the theoretical frequency can be accurately measured and compensated in real time. In the symbol demodulation stage, the accurate segmentation based on the spreading factor and the point-by-point multiplication processing ensure the integrity and phase continuity of each symbol. Through the combination of fast Fourier transform and peak value detection, the frequency position can be accurately mapped to the original symbol value. This demodulation scheme fully utilizes the orthogonal characteristics of LoRa modulation, and realizes efficient and reliable symbol recovery.

[0018] Optionally, the carrier frequency offset of the target digital signal is corrected synchronously based on the deviation of the detection frequency from the theoretical frequency, specifically including: taking the difference between the detection frequency and the theoretical frequency as the carrier frequency offset; obtaining a digital compensation signal according to the carrier frequency offset, the digital compensation signal being opposite in phase to the carrier frequency offset; multiplying the digital compensation signal and the target digital signal point by point to obtain a digitally corrected signal.

[0019] By comparing the difference between the detection frequency and the theoretical frequency, the size and direction of the carrier frequency offset can be accurately quantified, and compared with the fixed compensation scheme, the dynamic changes in the actual communication environment can be better adapted. By using the opposite phase digital compensation signal, the carrier frequency offset is accurately corrected, which can effectively eliminate the influence of the frequency offset while maintaining the integrity of the signal, and avoids the quantization error and phase jump problem in the traditional analog compensation scheme.

[0020] In a second aspect of the application, a UAV communication link analysis system for the ELRS communication protocol is provided, the system comprising a receiving unit, a first processing unit, a second processing unit and an analysis unit, The receiving unit obtains modulated electromagnetic waves based on the ELRS protocol communication between the UAV and the remote controller from the receiving end; the first processing unit filters and amplifies the modulated electromagnetic waves to obtain a processed analog intermediate frequency signal; the processed analog intermediate frequency signal is sampled based on an analog-to-digital converter to obtain an original digital data stream; the second processing unit processes the original digital data stream to obtain an observed frequency hopping sequence, and uses a preset algorithm of the ELRS protocol to determine an analog frequency hopping sequence of each group of enumeration parameters; determines the cracking parameters based on the comparison result of the observed frequency hopping sequence and the analog frequency hopping sequence, generates a target frequency hopping sequence according to the cracking parameters, and predicts a predicted frequency hopping channel at the next moment from the target frequency hopping sequence; performs digital down-conversion and channel filtering on the original digital data stream according to the predicted frequency hopping channel to extract a target digital signal; analyzes the target digital signal to obtain LoRa modulation parameters, and performs LoRa demodulation on the target digital signal according to the LoRa modulation parameters to obtain a symbol sequence; the analysis unit descrambles the symbol sequence, and sends the descrambled data into a forward error correction decoder for error correction decoding to recover the original binary data stream; performs frame synchronization and field analysis on the binary data stream according to the protocol format used by the ELRS protocol to obtain a structured ELRS data frame, so as to upload the structured ELRS data frame to an upper computer.

[0021] In a third aspect of the present application, an electronic device is provided, which comprises a processor, a memory, a user interface and a network interface, the memory is configured to store instructions, the user interface and the network interface are configured to communicate with other devices, and the processor is configured to execute the instructions stored in the memory, so that the electronic device executes the method of any one of the above aspects of the present application.

[0022] In a fourth aspect of the present application, a computer readable storage medium is provided, which stores instructions, when the instructions are executed, the method of any one of the above aspects of the present application is executed.

[0023] In summary, the one or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages: 1. In the receiving end, the modulated electromagnetic wave of the ELRS protocol is captured, and after multi-stage radio frequency processing and digital-to-analog conversion, the original digital data stream is obtained. By analyzing the original data stream, the observed frequency hopping sequence is obtained, and the simulation sequence is generated by combining the specific algorithm of the ELRS protocol for matching, so as to successfully predict the frequency hopping channel at the next moment. Based on the active prediction mode, the signal acquisition efficiency is improved, and the resource waste of continuously scanning the entire frequency band in the traditional scheme is avoided. After obtaining the predicted frequency hopping channel, the target signal is accurately extracted through digital down-conversion and channel filtering. By analyzing the characteristics of the target signal, the LoRa modulation parameters are determined, the accurate demodulation of the fast frequency hopping signal is realized, and the data recovery reliability is effectively improved by the descrambling and forward error correction decoding mechanism. Even in a complex electromagnetic environment, a low bit error rate can be maintained. According to the ELRS protocol format, frame synchronization and field analysis are completed, and a standardized data frame structure is output.

[0024] 2. Parallel correlation operation is performed on the target digital signal and the preset ideal template, so that the characteristic structure of the LoRa signal can be accurately captured. The combination of sharp peak detection and preset decision threshold effectively improves the reliability of signal detection, and even in a low signal-to-noise ratio condition, the signal starting position can be accurately identified. The time domain characteristics of the LoRa signal are utilized, and the modulation parameters are inversely deduced by accurately measuring the air time length of the signal. Through the combination of instantaneous power calculation and sliding average filtering, the influence of instantaneous fluctuation can be effectively suppressed, and the end time of the signal can be accurately determined. Compared with the traditional spectrum analysis method, this parameter identification method based on time length has higher accuracy and lower computational complexity. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 FIG. 1 is a first flowchart of a UAV communication link analysis method for an ELRS communication protocol provided by an embodiment of the present application; Figure 2 FIG. 2 is a system framework diagram of a UAV communication link analysis method for an ELRS communication protocol provided by an embodiment of the present application; Figure 3 FIG. 2 is a second flow diagram of a method for analyzing a communication link of a UAV according to an ELRS communication protocol, according to an embodiment of the present application; Figure 4 FIG. 3 is a structural diagram of a system for analyzing a communication link of a UAV according to an ELRS communication protocol, according to an embodiment of the present application; Figure 5 FIG. 4 is a structural diagram of an electronic device, according to an embodiment of the present application.

[0026] The following items are described in the order of their appearance in the drawings: 201, antenna; 202, radio frequency front end; 203, ADC; 204, frequency hopping sequence inversion module; 205, frequency hopping synchronization module; 206, LoRa parameter estimation module; 207, LoRa decoding module; 208, ELRS data analysis module; 209, host computer; 401, receiving unit; 402, first processing unit; 403, second processing unit; 404, analysis unit; 500, electronic device; 501, processor; 502, memory; 503, user interface; 504, network interface; 505, communication bus. DETAILED DESCRIPTION

[0027] In order for those skilled in the art to better understand the technical solutions in the specification, the technical solutions in the specification will be clearly and completely described below in conjunction with the drawings in the embodiments of the specification. Obviously, the described embodiments are only some of the embodiments of the present application, not all the embodiments.

[0028] In the description of the embodiments of the present application, the words such as “for example” or “for instance” are used to represent an example, illustration or description. Any embodiment or design scheme described as “for example” or “for instance” in the embodiments of the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. Rather, the words such as “for example” or “for instance” are intended to present the relevant concept in a specific manner.

[0029] In the description of the embodiments of the present application, the term “a plurality of” means two or more. For example, a plurality of systems means two or more systems, and a plurality of screen terminals means two or more screen terminals. In addition, the terms “first” and “second” are used for description purposes only, and should not be interpreted as indicating or implying relative importance or implicitly indicating the indicated technical features. Therefore, the features defined with “first” and “second” can explicitly or implicitly include one or more of the features. The terms “include”, “contain”, “have” and their variants mean “include but are not limited to”, unless otherwise specifically emphasized.

[0030] ELRS, the full name of which is ExpressLRS, is a high-performance Radio Control (RC) link protocol designed based on the open source concept. The core goal is to provide "the farthest remote control distance, the lowest delay, and the highest refresh rate" for remote control models such as drones. The ELRS communication protocol is a medium for wireless communication transmission between the remote controller and the drone receiver.

[0031] It needs to be specially pointed out that the technical solution of the present embodiment is applicable to the unmanned aerial vehicle supervision subject with legal authorization, including but not limited to: (1) the airport airspace management department authorized by the Civil Aviation Administration; (2) when the radio management agency conducts spectrum monitoring, unauthorized use of the technical solution of the present embodiment may violate relevant laws and regulations. Therefore, the technical solution of the present embodiment needs to be authorized to monitor and crack the communication between the unmanned aerial vehicle and the remote controller.

[0032] Therefore, how to reduce the high time-consuming of the existing blind scanning method is a problem that needs to be solved at present. The unmanned aerial vehicle communication link analysis method for the ELRS communication protocol provided by the present embodiment is applied to a server. Figure 1 is a first flowchart of the unmanned aerial vehicle communication link analysis method for the ELRS communication protocol provided by the present embodiment, referring to Figure 1 The method comprises the following steps S101-S108.

[0033] S101: Obtain the modulated electromagnetic wave based on the ELRS protocol communication between the unmanned aerial vehicle and the remote controller from the receiving end.

[0034] In the above S101, in order to obtain the ELRS protocol communication signal between the unmanned aerial vehicle and the remote controller, a directional antenna is used as the receiving end. The directional antenna includes an array type receiving antenna and a low noise preamplifier. Among them, the working frequency band of the array type receiving antenna covers the 2.4GHz ISM frequency band used by the ELRS protocol, the antenna gain is not less than 12dBi, and has a relatively narrow directional beam, which can effectively suppress the interference signals from other directions. The low noise preamplifier is directly integrated at the back end of the antenna oscillator, and its noise coefficient is less than 1.5dB, which can maximize the reduction of the noise coefficient of the receiving system and improve the signal-to-noise ratio of the signal reception.

[0035] When the unmanned aerial vehicle and the remote controller communicate based on the ELRS protocol, the communication parties will transmit modulated electromagnetic waves in the 2.4GHz frequency band. These modulated electromagnetic waves will attenuate and distort during space propagation. By pointing the main beam of the directional antenna to the unmanned aerial vehicle activity airspace, the modulated electromagnetic waves propagating to the antenna position can be converted into radio frequency electrical signals.

[0036] Due to the combination design of high-gain directional antenna and low-noise preamplifier, the system can still obtain high signal-to-noise ratio radio frequency signals at a long distance, laying a foundation for subsequent signal processing and protocol analysis. See Figure 2 The system framework of the present application includes an antenna 201, a radio frequency front end 202, an analog-to-digital converter ADC 203, a frequency hopping inversion module 204, a frequency hopping synchronization module 205, a LoRa parameter estimation module 206, a LoRa decoding module 207, an ELRS data analysis module 208, and an upper computer 209. The system workflow is as follows: the antenna 201 receives electromagnetic waves, processes the electromagnetic waves through the radio frequency front end 202, and the processed analog intermediate frequency signal enters the ADC 203 (analog-to-digital converter). Subsequently, the ADC 203 samples the analog intermediate frequency signal to obtain an original digital data stream, which is transmitted to the frequency hopping sequence inversion module 204. The frequency hopping inversion module 204 inversely deduces the target frequency hopping sequence generated by the ELRS protocol unmanned aerial vehicle according to the received original digital data stream, and predicts the next time prediction frequency hopping channel from the target frequency hopping sequence. The frequency hopping synchronization module 205 synchronizes according to the target frequency hopping sequence, so that the ADC 203 extracts the target digital signal from the original digital data stream according to the predicted frequency hopping channel, and transmits the target digital signal to the LoRa parameter estimation module 206. The LoRa parameter estimation module 206 analyzes the extracted target digital signal and estimates the LoRa modulation parameters used by the target digital signal, including bandwidth and spreading factor. The target digital signal and LoRa modulation parameters are transmitted to the LoRa decoding module 207, which decodes the target digital signal according to the LoRa modulation parameters, and transmits the decoded binary data stream to the ELRS data analysis module 208. The ELRS data analysis module 208 analyzes the binary data stream and restores the structured ELRS data frame, and transmits it to the upper computer 209 for subsequent processing.

[0037] S102: Filtering and amplifying the modulated electromagnetic wave to obtain a processed analog intermediate frequency signal.

[0038] In the above S102, in order to convert the high-frequency modulated electromagnetic wave received by the antenna into an analog intermediate frequency signal suitable for subsequent processing, a series of signal processing needs to be performed through the radio frequency front end circuit. First, the modulated electromagnetic wave output by the antenna is sent to a band-pass filter for preliminary filtering. The passband range of the band-pass filter is 2.400-2.485GHz, which can effectively filter out interference signals outside the ELRS operating frequency band. The signal strength after filtering is weak and needs to be preliminarily amplified by a low-noise amplifier. The gain of the low-noise amplifier is 20dB, which can amplify the signal to a suitable level range to obtain an amplified high-frequency radio frequency signal.

[0039] Next, the amplified high-frequency radio frequency signal needs to be converted to a lower frequency band for subsequent processing. Specifically, a local oscillator constructed using a phase-locked loop circuit is used, and its output frequency can be tuned within the range of 2.370-2.455 GHz, with a frequency stability better than 1 ppm and a phase noise less than -100 dBc / Hz@100 kHz. The stable signal generated by the local oscillator and the amplified high-frequency radio frequency signal are sent to a mixer for quadrature mixing. By selecting an appropriate local oscillator frequency, the intermediate frequency signal output by the mixer is located near 30 MHz. In order to extract the required signal components and further enhance the signal strength, subsequent processing is performed on the intermediate frequency signal. First, the mixer output is filtered by an intermediate frequency bandpass filter, which has a center frequency of 30 MHz and a bandwidth of 10 MHz, and can effectively suppress the image frequency and other spurious components generated during the mixing process. Subsequently, the filtered signal is sent to an intermediate frequency amplifier for further amplification. The intermediate frequency amplifier is designed with automatic gain control, and the gain range is 0-60 dB. The gain can be automatically adjusted according to the signal strength to ensure that the output signal amplitude is stable within a suitable range, and finally the processed analog intermediate frequency signal is obtained.

[0040] S103: Sampling the processed analog intermediate frequency signal based on an analog-to-digital converter to obtain an original digital data stream.

[0041] In the above S103, in order to convert the processed analog intermediate frequency signal to the digital domain for subsequent processing, an analog-to-digital converter is used to sample the analog intermediate frequency signal. Before sampling, the processed analog intermediate frequency signal is conditioned by a driver amplifier to adjust the signal amplitude to the full-scale range of the analog-to-digital converter. The driver amplifier has high linearity and low noise characteristics, which can maximize the integrity of the signal. Subsequently, the conditioned signal is sent to the in-phase (I) channel and quadrature (Q) channel of the analog-to-digital converter respectively, and the amplitude and phase information of the signal can be obtained through quadrature sampling. The differential input structure and low jitter clock of the analog-to-digital converter can effectively suppress the effects of common mode interference and sampling time uncertainty.

[0042] The digitized samples output by the analog-to-digital converter are real-time cached and preprocessed by the FPGA. The FPGA uses a dual-port RAM design, which can simultaneously perform data writing and reading operations to ensure the continuity of the data stream. After appropriate data format conversion and packaging, the original digital data stream containing I / Q two-way data is formed, with a data bit width of 14 bits and a sampling rate of 80 MHz. This format of digital data stream facilitates subsequent digital signal processing and protocol analysis.

[0043] S104: processing the original digital data stream to obtain an observed frequency hopping sequence, and using a preset algorithm of the ELRS protocol to determine an analog frequency hopping sequence of each group of enumeration parameters; determining a cracking parameter based on a comparison result of the observed frequency hopping sequence and the analog frequency hopping sequence, generating a target frequency hopping sequence according to the cracking parameter, and predicting a predicted frequency hopping channel at the next moment from the target frequency hopping sequence.

[0044] In the above S104, in order to extract the frequency hopping rule from the original digital data stream and predict the next frequency hopping channel, the observation and simulation of the frequency hopping sequence need to be performed first. The original digital data stream is processed to obtain an observed frequency hopping sequence, and a preset algorithm of the ELRS protocol is used to determine an analog frequency hopping sequence of each group of enumeration parameters, which specifically includes: the original digital data stream is divided into a plurality of time-continuous data frames, and fast Fourier transform is performed on each data frame to calculate the power spectrum at each time; all data frames are processed continuously to generate a time-frequency power spectrum matrix; a plurality of frequency peaks with power energy peaks greater than a detection power threshold at time points are screened from the time-frequency power spectrum matrix, the power energy peak being an energy peak existing in the power spectrum at each time point; the center frequencies corresponding to the plurality of frequency peaks are retrieved, and the plurality of center frequencies are sorted according to the chronological order of the time points to obtain the observed frequency hopping sequence; it is determined that the ELRS protocol adopts a linear congruential generator algorithm with a 31-bit internal state as a seed, and a known output value is determined according to the output rule of the linear congruential generator algorithm; a high-16-bit value is determined according to the known output value, the low-16-bit value is enumerated according to the high-16-bit value to obtain a first enumeration space; the high-16-bit value is determined as a second enumeration space, and each value in the first enumeration space and the second enumeration space is combined to obtain a plurality of candidate initial seeds; each candidate initial seed is calculated using linear congruential generator inverse element operation to obtain a candidate initial state; a candidate initial state is used as a seed to generate an analog frequency hopping sequence corresponding to the observed frequency hopping sequence according to the linear congruential generator algorithm, so as to obtain a plurality of analog frequency hopping sequences corresponding to each group of enumeration parameters.

[0045] Specifically, the original digital data stream is divided into multiple temporally continuous data frames at 2.5ms intervals. For each data frame, a 2048-point Fast Fourier Transform (FFT) is performed to obtain power spectrum data at 2048 frequency points. By performing FFT processing on multiple consecutive data frames, the power spectrum of each data frame is used as a row of a time-frequency power spectrum matrix, thus generating a complete time-frequency power spectrum matrix. The number of rows in this matrix equals the number of data frames, and the number of columns is 2048. Each element in the matrix represents the signal power at the corresponding time and frequency point. To extract effective frequency hopping information from the time-frequency power spectrum matrix, a detection power threshold is set to 20dB above the noise floor. Each row in the matrix (i.e., the power spectrum at each time point) is scanned, and when the power value at a certain frequency point exceeds the detection power threshold, that point is marked as a frequency peak. Since the bandwidth of the ELRS signal is fixed, at most one strongest frequency peak is retained at each time point, effectively avoiding false peaks caused by multipath effects. For each marked frequency peak, its accurate center frequency is calculated using parabolic interpolation. Finally, these center frequencies are arranged in order of their corresponding time points to form an observation frequency hopping sequence.

[0046] Next, a simulated frequency hopping sequence is generated using a frequency hopping algorithm based on the ELRS protocol. Since ELRS employs a linear congruential generator algorithm with a 31-bit internal state as the seed, its output rule is: S (i+1) =(a×S i +c)modm, where a=214013, c=2531011, m=2147483648, S i This represents the seed of the current linear congruential generator. First, it is determined based on the first N known output values ​​Y in the observed frequency hopping sequence. (0...N-1） Since there is a modulo relationship between the high 16 bits of the linear congruent generator algorithm output and the actual frequency hopping channel (channel = (S >> 16) mod MAX), the reverse derivation requires considering all possible values ​​of k. Determine the high 16 bits H. (0...N-1) The relationship with the known output value Y0 is: H i =Y0+k×MAX, where k is an integer and satisfies 0≤H i ≤32767 (the range of the high 16 bits of the 31-bit state space), MAX is the number of channels used by ELRS.

[0047] For the state S1 corresponding to the first output value Y0, since only the high 16 bits H0 are known, the low 16 bits L in the range of 0-65535 need to be fully enumerated, which constitutes the first enumeration space. At the same time, by traversing all the k values satisfying the above conditions, a candidate value set of the high 16 bits H0 is obtained, which constitutes the second enumeration space. The values in the first enumeration space and the second enumeration space are combined to obtain multiple possible S1 values, i.e., candidate initial seeds. For each H0 and L combination, a 31-bit state S1 = (H0 << 16) | L is formed.

[0048] Since the linear congruential generator has reversibility, there is an inverse element a -1 satisfying a x a -1 ≡ 1 mod m. For each candidate initial seed S1, the candidate initial state is calculated by inverse element operation S0 = ((S1 - c) x a -1 ) mod m. Using the linear congruential generator algorithm, the observed frequency hopping sequence is iteratively generated forward using each candidate initial state as a seed to generate a simulated frequency hopping sequence of the same length as the observed frequency hopping sequence, and then multiple simulated frequency hopping sequences corresponding to each group of enumeration parameters are obtained.

[0049] In addition, after obtaining the observed frequency hopping sequence and the simulated frequency hopping sequence, the cracking parameter is determined based on the comparison result of the observed frequency hopping sequence and the simulated frequency hopping sequence, and the target frequency hopping sequence is generated according to the cracking parameter, which specifically includes: performing point-by-point comparison on the observed frequency hopping sequence and the target simulated frequency hopping sequence to obtain a matching score, the matching score being the number of points with target frequency values at the same time index position of the target simulated frequency hopping sequence and the observed frequency hopping sequence, the target frequency including the same frequency value and the frequency value with a frequency deviation less than a preset deviation, and the target simulated frequency hopping sequence being any one of the multiple simulated frequency hopping sequences; after completing the comparison of the multiple simulated frequency hopping sequences and the observed frequency hopping sequence, the maximum matching score is selected from the multiple calculated matching scores; if the maximum matching score is greater than a preset matching threshold, it is confirmed that the cracking is successful, and the target candidate initial state corresponding to the simulated frequency hopping sequence generating the maximum matching score is determined as the cracking parameter; the target candidate initial state is used as a seed to perform iterative calculation based on the linear congruential generator algorithm to obtain the target frequency hopping sequence.

[0050] Specifically, to identify the correct frequency-hopping sequence from numerous candidate sequences and determine the cracking parameters, sequence matching and scoring are required. First, each simulated frequency-hopping sequence is compared point-by-point with the observed frequency-hopping sequence. Specifically, a preset deviation of ±100kHz is set, taking into account factors such as receiver frequency error, Doppler effect, and channel bandwidth. For each frequency point in the simulated frequency-hopping sequence, it is compared with the frequency point at the same time index position in the observed frequency-hopping sequence. When two frequency points are identical, or the absolute value of their frequency difference is less than the preset deviation of 100kHz, they are considered a match point. The number of all match points is accumulated to obtain the matching score of the simulated frequency-hopping sequence. For example, if the observed frequency-hopping sequence contains 100 frequency points, and 95 frequency points in the simulated frequency-hopping sequence are the same as or have a deviation within ±100kHz of the corresponding points in the observed sequence, then the matching score of the simulated frequency-hopping sequence is 95. This scoring method not only considers precise frequency matching but also tolerates slight frequency shifts caused by channel conditions and hardware errors, improving the robustness of the system.

[0051] After scoring all simulated frequency-hopping sequences, the maximum match score is selected from all scores. A preset match threshold is set to 90% of the total sequence length; that is, for a sequence of 100 points, the maximum match score must be at least 90. This threshold is based on experimental data and can effectively distinguish between correct frequency-hopping sequences and randomly matched incorrect sequences. If the maximum match score exceeds the preset match threshold, the correct frequency-hopping sequence is considered to have been found, and the target candidate initial state corresponding to the simulated frequency-hopping sequence that generated the maximum match score is marked as the cracking parameter.

[0052] Finally, using the cracked target candidate initial state as a seed, a linear congruence generator algorithm is used for iterative calculation to generate the target frequency hopping sequence. The specific iterative calculation formula is: S i+1 =(a×S i +c)modm, where a=214013, c=2531011, m=2147483648. The state S obtained in each iteration. i+1 After right-shifting the high 16 bits, a modulo operation is performed with the MAX value to obtain the corresponding channel index. Through continuous iterative calculation, a target frequency hopping sequence of arbitrary length can be generated. Then, the predicted frequency hopping sequence for the next time step is predicted from the target frequency hopping sequence. At this time, the predicted frequency hopping sequence is the next frequency hopping channel of the ELRS protocol, providing accurate frequency guidance for subsequent signal demodulation.

[0053] In this embodiment, if the maximum matching score fails to exceed a preset matching threshold, it indicates that the cracking attempt has failed. In this case, the currently captured data frame can be discarded, and the process can return to step S101 to capture a new modulated electromagnetic wave for another attempt.Figure 3 As shown, the original digital data stream is processed to obtain an observed frequency hopping sequence Y and a channel number MAX; a known output value Y0 is determined from the observed frequency hopping sequence, and all possible H0 are determined for the output value Y0; the low 16 bits are enumerated according to all possible H0 to obtain a first enumeration space; a second enumeration space is composed according to the value corresponding to H0; values in the first enumeration space and the second enumeration space are combined to obtain a combined candidate initial seed S1; inverse element operation is performed on each candidate initial seed to obtain a candidate initial state S0; the candidate initial state S0 is used as a seed to iteratively generate a simulated frequency hopping sequence Y'; it is compared whether the observed frequency hopping sequence Y and the simulated frequency hopping sequence Y' match; when the observed frequency hopping sequence and the simulated frequency hopping sequence Y' match, the candidate initial state S0 is output as a cracking parameter, and a target frequency hopping sequence is generated according to the cracking parameter. When the observed frequency hopping sequence and the simulated frequency hopping sequence do not match, a new digital data stream is obtained again, and the new digital data stream is processed.

[0054] It is verified by experiments that, under the ELRS 500Hz frequency hopping rate, the frequency hopping sequence cracking success rate of the scheme reaches more than 95%, and the average cracking time is 80-150ms, which is obviously improved compared with the 500-1000ms of the blind scanning method.

[0055] S105: Digital down-conversion and channel filtering are performed on the original digital data stream according to the predicted frequency hopping channel to extract the target digital signal.

[0056] In the above S105, digital down-conversion and channel filtering are performed on the original digital data stream according to the predicted frequency hopping channel to extract the target digital signal, specifically including: generating a digital complex sine signal according to the frequency value of the predicted frequency hopping channel and the sampling rate of the original digital data stream, the digital complex sine signal being a negative value of the frequency of the predicted frequency hopping channel; performing point-by-point complex multiplication on the original digital data stream and the digital complex sine signal to obtain a wideband zero intermediate frequency signal; performing digital low-pass filtering on the wideband zero intermediate frequency signal to obtain a filtered narrowband baseband signal; performing down-sampling processing on the filtered narrowband baseband signal to obtain the target digital signal.

[0057] Specifically, in order to accurately extract the signal on the predicted frequency hopping channel from the original digital data stream, complex down-conversion and filtering processing are needed. First, a digital complex sinusoidal signal is generated based on the frequency value fc of the predicted frequency hopping channel and the sampling rate fs (80 MHz) of the original digital data stream. The frequency of the digital complex sinusoidal signal is -fc, and the expression is exp(-j2πfcn / fs), where n is the sampling number. The complex sinusoidal signal with a negative frequency can directly shift the target signal to a zero intermediate frequency position, avoiding additional frequency offset. The digital oscillator uses the CORDIC (Coordinate Rotation Digital Computer) algorithm to calculate the value of the trigonometric function through iterative vector rotation, which has high calculation efficiency and accuracy.

[0058] Next, the original digital data stream is multiplied point by point with the generated digital complex sinusoidal signal. The original digital data stream contains I and Q channel data, forming a complex number x(n) = I(n) + jQ(n). Multiplying x(n) and the digital complex sinusoidal signal exp(-j2πfcn / fs) gives the wideband zero intermediate frequency signal y(n). The multiplication operation is realized in parallel by four real multipliers and two adders in the FPGA, and the calculation formula is: y(n) = x(n) x exp(-j2πfcn / fs) = [I(n) + jQ(n)] x [cos(2πfcn / fs) - jsin(2πfcn / fs)].

[0059] Since the wideband zero intermediate frequency signal y(n) after down-conversion contains spectral components in a wide frequency range, a digital low-pass filter is needed to extract the required narrowband signal. A two-stage filter structure is used: the first stage is a CIC (Cascaded Integrator-Comb) filter, which contains 3 integrators and a combiner, with a decimation ratio of 16; the second stage is a 27th-order half-band FIR (Finite Impulse Response) filter, with a cutoff frequency of 625 kHz, a transition bandwidth of 100 kHz, and a stopband attenuation of more than 60 dB, and a delay of 1 per stage. The filtered narrowband baseband signal is downsampled to reduce the sampling rate from 80 MHz to 2.5 MHz. The downsampling process is realized by taking one data point every 32 sampling points at the output of the FIR filter. The reduction of the sampling rate not only reduces the amount of data for subsequent processing, but also improves the spectral efficiency of the signal. After downsampling, the target digital signal has a bandwidth of 1.25 MHz and a sampling rate of 2.5 MHz, meeting the requirements of the Nyquist sampling theorem. Through the above processing, the target digital signal on the preset frequency hopping channel can be accurately extracted from the wideband digital data stream.

[0060] S106: Analyze the target digital signal to obtain the LoRa modulation parameters.

[0061] In S106 above, to accurately demodulate the LoRa signal, its modulation parameters need to be estimated first. The target digital signal is analyzed to obtain the LoRa modulation parameters, specifically including: inputting the target digital signal into a parallel correlator group and performing correlation operations with each ideal template signal to obtain multiple sharp peaks; determining whether any of the multiple sharp peaks is greater than or equal to a preset decision threshold; when a sharp peak is greater than or equal to the preset decision threshold, the target time point corresponding to the target sharp peak is identified as the start time, and a timer is started to count; calculating the signal data of the target digital signal to obtain the instantaneous power; performing a moving average filter on the instantaneous power to obtain the average power value; when the average power value is less than a preset end threshold, the time corresponding to the average power value is taken as the signal end time, and the final count value corresponding to the counter at the signal end time is obtained; multiplying the final count value by the timer clock period to obtain the signal air duration; and searching in the preset LoRa parameter table for the LoRa modulation parameter that matches the signal air duration.

[0062] Specifically, a signal analysis method based on a hybrid parallel correlation and energy detection mode is adopted to determine the LoRa modulation parameters by measuring the time of air (TOA) of the target digital signal. Since each data packet rate in the ELRS protocol corresponds to a fixed combination of LoRa parameters, the complete parameter set can be determined by looking up the TOA value in a table. The input target digital signal is first preliminarily detected. A parallel correlator array is used to process the signal, with each correlator configured with a different ideal chirp signal template corresponding to a different spreading factor (SF). The correlator template signal S... up (t) is generated using standard LoRa up-chirp characteristics, with the frequency increasing linearly with time. Each correlator internally generates an ideal template signal corresponding to SF. The template signal exhibits standard LoRa up-chirp characteristics, with the frequency linearly scanning from -BW / 2 to +BW / 2 within one symbol period T. Its mathematical expression is: S up (t)=exp(j2π(f0t+kt 2 / 2)), where f0 is the starting frequency, k is the frequency modulation slope, k=BW / T, T=2 SF / BW .

[0063] The target digital signal r(t) is simultaneously correlated with these template signals to obtain multiple sharp peaks. The correlation operation is implemented using a sliding window method, with the window length equal to one Chirp symbol period. When eight consecutive sharp peaks highly correlated with a certain template signal are detected, a LoRa preamble sequence is detected. At this time, the reset signal of the high-resolution timer is released, thus marking the time point corresponding to the sharp peak exceeding the preset decision threshold as the start time. The timer begins to accumulate counts with the 80MHz system clock. Simultaneously, the system switches to energy detection mode and calculates the instantaneous power P for the input I / Q data sample points. inst (n) = I(n) 2 +Q(n) 2 To eliminate the effects of noise and instantaneous fluctuations, a 32-point moving average filter is applied to the instantaneous power sequence to obtain the smoothed average power value P. avg The smoothed average power value P avg The signal is compared with a preset end threshold. In this embodiment, the preset end threshold is dynamically determined based on the noise power of the received signal. During the initialization phase, power statistics are performed on the idle period of the received signal to calculate the noise floor power P1. The preset end threshold is set to threshold = a * P1, where a is a safety factor with a value range of 2-5.

[0064] When P avg If the value is not lower than the threshold, the signal transmission is considered not yet complete, so the counter continues to count. When P... avg When the count drops below the threshold, the signal transmission is considered complete, and the timer stops. The final count value N of the timer is... count With system clock period T clk Multiplying by (12.5ns) gives the signal's airtime TOA=N. count ×T clk By matching the measured TOA value with the parameter table predefined by the ELRS protocol, the LoRa parameter combination used by the signal can be determined, including bandwidth (BW) and spreading factor (SF).

[0065] S107: Demodulate the target digital signal using LoRa based on the LoRa modulation parameters to obtain a symbol sequence.

[0066] In S107 above, LoRa demodulation of the target digital signal based on LoRa modulation parameters yields a symbol sequence. Specifically, this includes: obtaining the spreading factor and signal bandwidth from the LoRa modulation parameters; generating a LoRa uplink linear frequency modulated (LFM) signal based on the spreading factor and signal bandwidth; generating a time-domain conjugate ideal baseline downlink LFM signal based on the LoRa uplink LFM signal; obtaining a preamble signal from the target digital signal; demodulating the preamble signal based on the ideal baseline downlink LFM signal to obtain a demodulated preamble signal; performing a fast Fourier transform on the demodulated preamble signal to obtain a detection frequency; performing synchronization correction on the carrier frequency offset of the target digital signal based on the deviation between the detection frequency and the theoretical frequency; and obtaining a synchronization word signal from the target digital signal after synchronization correction. The target digital signal is the signal following the preamble signal. The synchronization word signal is demodulated and subjected to a Fast Fourier Transform (FFT). The demodulated symbol values ​​are compared with a preset synchronization word to confirm the valid start position of the data frame. Starting from the valid start position, the sampling points of each symbol in the target digital signal are divided according to the spreading factor to obtain multiple symbol segments. The target symbol segment is multiplied point-by-point with the ideal baseline downlink linear frequency modulated signal to obtain the demodulated symbol signal. The target symbol segment is any one of the multiple symbol segments. The demodulated symbol signal is subjected to a Fast Fourier Transform (FFT), and the frequency peak with the highest energy is found from the output spectrum. The index of the frequency peak is directly determined as the original symbol value of the symbol segment. Multiple original symbol values ​​demodulated from multiple symbol segments are obtained and sorted in chronological order to obtain a symbol sequence.

[0067] Specifically, to achieve accurate demodulation of the LoRa signal, a reference signal is generated based on the acquired LoRa modulation parameters. The spreading factor SF and signal bandwidth BW are extracted from the modulation parameters to generate a standard LoRa uplink linear frequency modulated signal (up-chirp). This signal has a symbol period T=2... SF / BW A linear scan with a frequency ranging from -BW / 2 to +BW / 2 is completed within the range, expressed as: S up (t)=exp(j2π(f0t+kt 2 / 2)), where f0 is the starting frequency -BW / 2, and k is the frequency modulation slope BW / T. Based on the uplink frequency modulation signal, the ideal baseline downlink linear frequency modulation signal (down-chirp) conjugate in the time domain is generated: S down (t)=S up *(t)=exp(-j2π(f0t+kt 2 / 2)) Synchronous correction of the carrier frequency offset of the target digital signal based on the deviation between the detected frequency and the theoretical frequency includes: taking the difference between the detected frequency and the theoretical frequency as the carrier frequency offset; obtaining a digital compensation signal based on the carrier frequency offset, wherein the digital compensation signal is out of phase with the carrier frequency offset; and multiplying the digital compensation signal with the target digital signal point by point to obtain the synchronously corrected digital signal.

[0068] Next, preamble synchronization is performed on the target digital signal. The preamble consists of 8 standard uplink chirps, which the system extracts from the beginning of the target digital signal. The preamble signal is then multiplied point-by-point by the downlink frequency-modulated signal of the ideal baseline to achieve demodulation: r demod (t)=r(t)×S down (t) Where r(t) is the input signal. The demodulated signal is subjected to 2... SF Point FFT operation yields the frequency domain peak location, i.e., the detection frequency f. det Compare the detection frequency with the theoretical frequency f. theory The difference is taken as the carrier frequency offset Δf=f det -f theory For subsequent frequency correction: r corr (t)=r(t)×exp(-j2πΔft). After frequency correction, the synchronization word signal is processed. The synchronization word signal contains 2 downlink chirps and 2.25 uplink chirps, located after the preamble. The synchronization word signal is subjected to the same demodulation and FFT processing, and the resulting symbol value is compared with the preset synchronization word sequence. When a match is detected, the position is confirmed as the valid start position of the data frame. Starting from the valid start position, the target digital signal is divided into multiple symbol segments according to the symbol period T. For each symbol segment, the following demodulation steps are performed: complex multiplication with the ideal baseline downlink frequency-modulated signal: y(t)=r seg (t)×S down (t), perform 2 on the product result SF Point FFT operation: Y(k) = FFT{y(t)}. Search for the frequency index corresponding to the maximum energy value in the spectrum |Y(k)|: idx = argmax(|Y(k)|). Use this index value directly as the demodulation result of the symbol segment. Collect the demodulation results of all symbol segments in chronological order to obtain the complete symbol sequence.

[0069] In addition, the carrier frequency offset of the target digital signal is synchronously corrected based on the deviation between the detection frequency and the theoretical frequency. Specifically, this includes: taking the difference between the detection frequency and the theoretical frequency as the carrier frequency offset; obtaining a digital compensation signal based on the carrier frequency offset, wherein the digital compensation signal is out of phase with the carrier frequency offset; and multiplying the digital compensation signal and the target digital signal point by point to obtain the synchronously corrected digital signal.

[0070] Specifically, frequency synchronization correction is required to eliminate carrier frequency offset in the received signal. Carrier frequency offset is mainly caused by factors such as local oscillator frequency error of the transmitter and receiver, and Doppler effect, which leads to a decrease in demodulation performance. By analyzing the uplink chirp signal in the LoRa preamble sequence, this frequency offset can be accurately estimated and compensated.

[0071] Frequency offset estimation is performed using the first uplink chirp in the preamble. Theoretically, the instantaneous frequency of a standard uplink chirp increases linearly from -BW / 2 to +BW / 2 within a symbol period. After chirp removal and FFT operations, a peak should be generated at the zero-frequency point of the spectrum. However, due to the carrier frequency offset, the actual detected frequency peak will deviate. This deviation frequency value is recorded as the carrier frequency offset Δf, calculated as: Δf = (k detect -k theory )×BW / 2 SF , where k detect k is the index of the detected frequency. theory Here, BW is the theoretical frequency index (0 in this example), SF is the signal bandwidth, and BW is the spreading factor. To improve estimation accuracy, the frequency offset is estimated for each of the eight consecutive preamble symbols, and the average value is taken as the final frequency offset estimate. After obtaining the frequency offset estimate, a corresponding digital compensation signal is generated. The compensation signal is a complex exponential signal whose phase changes at a rate opposite to the frequency offset: s comp (n) = exp(-j2πΔf·n / fs), where n is the sampling number and fs is the sampling rate (2.5MHz). The compensation signal is generated using the CORDIC algorithm, which calculates the complex exponential value through iterative vector rotation, resulting in high computational efficiency and accuracy. The phase of the compensation signal is then accumulated. φ(n) = φ(n-1) - 2πΔf / fs, s comp (n) = cos(φ(n)) + j·sin(φ(n)). Finally, the generated digital compensation signal is multiplied point-by-point by the target digital signal: s corrected (n)=s in (n)×s comp (n) , where s in(n) represents the target digital signal input. This multiplication operation is implemented in parallel in the FPGA using four real multipliers and two adders.

[0072] Furthermore, to achieve complete synchronization correction, in addition to carrier frequency offset correction, sampling time synchronization correction is also required. Due to clock errors in the transmitter and receiver, the sampling time of the received signal may not be aligned with the ideal symbol boundary, which can lead to inter-symbol interference and degraded demodulation performance. A preamble-based correlation method is used to achieve precise time synchronization. First, coarse time synchronization is performed using eight consecutive uplink chirps in the preamble sequence. Then, a sliding correlation operation is performed between the received signal and the local reference chirp template: R(τ) = ∑r(n+τ)·c*(n), where r(n) is the received signal, c(n) is the local reference chirp, and τ is the time offset. The correlation operation is implemented using FFT: R(τ) = IFFT{FFT[r(n)]·FFT*[c(n)]}.

[0073] Detect the peak positions in the relevant output and record the time intervals between eight consecutive peaks. Theoretically, these intervals should be exactly equal to the symbol period T = 2^SF / BW. The difference between the actual measured value and the theoretical value reflects the sampling clock frequency offset: Δfs / fs = (T measured -T theory ) / T theory Where Δfs is the sampling frequency offset and fs is the nominal sampling frequency. After obtaining the clock frequency offset estimate, a fractional sampling rate conversion method is used for correction. Specifically, a Farrow polyphase filter is used, which consists of an L=4th order polynomial interpolation filter: y(m)=∑[c0(k)·x(n+k)+μ·c1(k)·x(n+k)+μ²·c2(k)·x(n+k)+μ³·c3(k)·x(n+k)], where x(n) is the input signal, cᵢ(k) is the interpolation coefficient, and μ is the fractional interval (0≤μ<1). The fractional interval is updated using an accumulator: μ(m+1)=μ(m)+(1+Δfs / fs)mod1.

[0074] To further improve time synchronization accuracy, fine synchronization is performed using a synchronization word sequence after coarse synchronization. The synchronization word contains 2.25 uplink chirs and 2 downlink chirs; its special structure provides more accurate symbol boundary information. The synchronization word sequence is demodulated, and the optimal sampling phase is determined through maximum likelihood estimation: φ opt =argmax{|FFT[r demod(n+φ)]|}, where φ is the sampling phase offset. By combining coarse synchronization and fine synchronization stages, high-precision time synchronization is achieved, which can control the remaining time error within 1 / 16 of the sampling period, and the synchronized signal has a stable symbol boundary, significantly improving demodulation performance.

[0075] S108: Descramble and correct the symbol sequence to recover the original binary data stream; perform frame synchronization and field parsing on the binary data stream according to the protocol format used by the ELRS protocol to obtain a structured ELRS data frame, so as to upload the structured ELRS data frame to the host computer.

[0076] In step S108 above, to recover the original data from the demodulated symbol sequence, two key steps are required: descrambling and forward error correction decoding. Since noise and interference in the wireless channel can cause data errors, these two processing steps are crucial for ensuring the reliability of data transmission. First, the symbol sequence is descrambled. The ELRS protocol uses a pseudo-random scrambling sequence to disrupt the long-period regularity that may appear in the data stream, improving the spectral characteristics of the signal. The descrambler uses a 32-bit linear feedback shift register (LFSR) with an initial value of 0x74B1, whose characteristic polynomial is: P(x) = x 32 +x 22 +x 2 +x+1. Implement the LFSR descrambling circuit in the FPGA. Perform the following operations in each clock cycle: first, extract the feedback bit from the 32-bit shift register; then calculate the new input bit, update the shift register state, and perform an XOR operation between the input sign and the LFSR output.

[0077] After descrambling, the descrambled data is sent to the forward error correction (FEC) decoder for error correction. The ELRS protocol uses a convolutional code with a code rate of 1 / 4 as the forward error correction code, and the decoding uses the soft-decision Viterbi algorithm. The input soft-decision samples are sent to the branch metric calculation unit (BMU) to calculate the branch metrics for 64 possible state transitions. The path metric accumulation unit (PMU) calculates the cumulative metric values ​​of the two input paths for each state and selects the smaller value as the new path metric. The surviving path selection unit (SMU) updates the contents of the surviving path memory based on the selection result. When the path storage reaches a preset depth, the path backtracking unit (TBU) backtracks from the terminated state and outputs the information bits corresponding to the optimal path, i.e., the binary data stream.

[0078] To extract meaningful ELRS protocol data from a binary data stream, frame synchronization and field parsing are required. Since the ELRS protocol uses a specific data frame format, accurate parsing is crucial for implementing remote control and telemetry functions. First, frame synchronization is performed on the binary data stream. The standard structure of an ELRS data frame includes: a 4-byte synchronization header (0x10, 0x20, 0x30, 0x40), a 1-byte frame length, a 1-byte frame type, N bytes of payload, and a 4-byte CRC checksum. Frame synchronization can be implemented using a state machine. After frame synchronization is complete, the specific type of the frame (e.g., remote control data, telemetry data, etc.) is determined based on the value of the frame type field (0x01-0x0F). For the payload portion, corresponding parsing rules are applied according to different frame types. The remote control data frame (type 0x01) consists of two parts: remote control channel data and status information. The remote control channel data contains values ​​for 10 channels, each represented by 16 bits of data, ranging from 1000 to 2000 microseconds, corresponding to different control inputs on the remote control, such as throttle, pitch, and roll. The status information includes a fail-safe status flag (0 for normal, 1 for fail-safe), link quality percentage (0-100 for signal quality), received signal strength (-120 to -40 dBm), and signal-to-noise ratio (-20 to 20 dB).

[0079] Telemetry data frames (type 0x02) consist of three parts: power information, device status, and statistical data. Power information records battery voltage (millivolts), current (milliamperes), and remaining power (milliampere-hours); device status includes device temperature (accurate to 0.1 degrees Celsius), transmit power level (0-7), and received signal strength; statistical data records operational statistics such as received packet count, packet loss count, and error count.

[0080] The link status frame (type 0x04) contains three parts: connection status, radio frequency (RF) status, and frequency information. The connection status records the current connection condition, operating mode, and antenna diversity status; the RF status includes the signal strength and signal-to-noise ratio of both antennas, as well as the currently used antenna number; the frequency information includes the frequency hopping sequence index, the current RF channel, and the actual transmit power. For example, the system can automatically select the better antenna for communication based on the signal quality of the two antennas.

[0081] Each data frame ends with a 4-byte CRC32 checksum to verify data integrity. By parsing the received binary data stream, the data is filled into the corresponding structure fields to form a complete structured data frame. This structured design allows the host computer to easily access and process various types of data, such as displaying real-time channel values ​​of the remote controller, monitoring aircraft battery power, or recording communication quality statistics.

[0082] This application also provides a UAV communication link parsing system for the ELRS communication protocol. Figure 4 This is a schematic diagram of a UAV communication link resolution system for the ELRS communication protocol provided in an embodiment of this application. (Refer to...) Figure 4 The system includes a receiving unit 401, a first processing unit 402, a second processing unit 403, and a parsing unit 404. Receiver unit 401 acquires modulated electromagnetic waves from the receiver for communication between the UAV and the remote controller based on the ELRS protocol. The first processing unit 402 filters and amplifies the modulated electromagnetic wave to obtain a processed analog intermediate frequency signal; it then samples the processed analog intermediate frequency signal using an analog-to-digital converter to obtain the original digital data stream. The second processing unit 403 processes the original digital data stream to obtain the observed frequency hopping sequence, and uses the preset algorithm of the ELRS protocol to determine the simulated frequency hopping sequence of each set of enumeration parameters; it determines the cracking parameters based on the comparison results between the observed frequency hopping sequence and the simulated frequency hopping sequence, generates the target frequency hopping sequence according to the cracking parameters, and predicts the predicted frequency hopping channel for the next moment from the target frequency hopping sequence; it performs digital down-conversion and channel filtering on the original digital data stream according to the predicted frequency hopping channel to extract the target digital signal; it analyzes the target digital signal to obtain the LoRa modulation parameters, and performs LoRa demodulation on the target digital signal according to the LoRa modulation parameters to obtain the symbol sequence. The parsing unit 404 descrambles and corrects errors in the symbol sequence to recover the original binary data stream; it performs frame synchronization and field parsing on the binary data stream according to the protocol format used by the ELRS protocol to obtain a structured ELRS data frame, which can then be uploaded to the host computer.

[0083] In one possible implementation, the second processing unit 403 is used to divide the original digital data stream into multiple time-sequential data frames, perform a fast Fourier transform on each data frame to calculate the power spectrum at each time point; perform continuous processing on all data frames to generate a time-frequency power spectrum matrix; select multiple frequency peaks from the time-frequency power spectrum matrix whose power energy peaks at each time point are greater than the detection power threshold, the power energy peaks being the energy peaks present in the power spectrum at each time point; retrieve the center frequencies corresponding to each of the multiple frequency peaks, sort the multiple center frequencies according to the chronological order of the time points to obtain the observed frequency hopping sequence; and determine that the ELRS protocol uses a 31-bit internal state as... The linear congruential generator algorithm for seeds determines the known output value according to the output rules of the linear congruential generator algorithm; it determines the high 16-bit value based on the known output value, and enumerates the low 16-bit value based on the high 16-bit value to obtain the first enumeration space; it determines the high 16-bit value as the second enumeration space, and combines the values ​​in the first and second enumeration spaces to obtain multiple candidate initial seeds; it uses the inverse operation of the linear congruential generator to calculate each candidate initial seed to obtain the candidate initial state; using each candidate initial state as a seed, it generates a simulated frequency hopping sequence corresponding to the observed frequency hopping sequence according to the linear congruential generator algorithm to obtain multiple simulated frequency hopping sequences corresponding to each set of enumeration parameters.

[0084] In one possible implementation, the second processing unit 403 is used to perform point-by-point comparison between the observed frequency hopping sequence and the target simulated frequency hopping sequence to obtain a matching score. The matching score is calculated by counting the number of points in the target simulated frequency hopping sequence and the observed frequency hopping sequence that have the target frequency value at the same time index position. The target frequency includes the same frequency value and the frequency value with a frequency deviation less than a preset deviation. The target simulated frequency hopping sequence is any one of multiple simulated frequency hopping sequences. After completing the comparison between multiple simulated frequency hopping sequences and the observed frequency hopping sequence, the maximum matching score is selected from the calculated matching scores. If the maximum matching score is greater than a preset matching threshold, the cracking is confirmed to be successful, and the target candidate initial state corresponding to the simulated frequency hopping sequence that generates the maximum matching score is determined as the cracking parameter. Using the target candidate initial state as a seed, iterative calculation is performed based on the linear congruence generator algorithm to obtain the target frequency hopping sequence.

[0085] In one possible implementation, the first processing unit 402 is used to generate a digital complex sine signal based on the frequency value of the predicted frequency hopping channel and the sampling rate of the original digital data stream, wherein the digital complex sine signal is the negative value of the predicted frequency hopping channel frequency; the second processing unit 403 is used to perform point-by-point complex multiplication of the original digital data stream and the digital complex sine signal to obtain a wideband zero intermediate frequency signal; to perform digital low-pass filtering on the wideband zero intermediate frequency signal to obtain a filtered narrowband baseband signal; and to perform downsampling processing on the filtered narrowband baseband signal to obtain the target digital signal.

[0086] In one possible implementation, the first processing unit 402 is used to input the target digital signal into a parallel correlator group and perform correlation operations with each ideal template signal to obtain multiple sharp peaks, and determine whether there is a sharp peak greater than or equal to a preset decision threshold among the multiple sharp peaks; the second processing unit 403 is used to, when there is a sharp peak greater than or equal to the preset decision threshold among the multiple sharp peaks, confirm the target time point corresponding to the target sharp peak as the start time and start a timer to count; calculate the signal data of the target digital signal to obtain the instantaneous power, perform a moving average filter on the instantaneous power to obtain the average power value; when the average power value is less than a preset end threshold, take the time corresponding to the average power value as the signal end time, obtain the final count value corresponding to the counter at the signal end time; multiply the final count value by the timer clock period to obtain the signal air duration; the parsing unit 404 is used to search for LoRa modulation parameters that match the signal air duration in a preset LoRa parameter table.

[0087] In one possible implementation, the receiving unit 401 is used to obtain the spreading factor and signal bandwidth from the LoRa modulation parameters, and generate a LoRa uplink linear frequency modulated signal based on the spreading factor and signal bandwidth; the first processing unit 402 is used to generate an ideal baseline downlink linear frequency modulated signal that is conjugate in the time domain based on the LoRa uplink linear frequency modulated signal; the receiving unit 401 is used to obtain a preamble signal from the target digital signal, and demodulate the preamble signal based on the ideal baseline downlink linear frequency modulated signal to obtain a demodulated preamble signal; the second processing unit 403 is used to perform a fast Fourier transform on the demodulated preamble signal to obtain a detection frequency, and perform synchronization correction on the carrier frequency offset of the target digital signal based on the deviation between the detection frequency and the theoretical frequency; after synchronization correction, the receiving unit 401 is used to obtain a synchronization word signal from the target digital signal, and the synchronization word... The signal is the signal following the preamble signal in the target digital signal; the parsing unit 404 is used to demodulate the synchronization word signal and perform a fast Fourier transform, compare the demodulated symbol value with the preset synchronization word, and confirm the valid start position of the data frame; starting from the valid start position, the sampling points of each symbol in the target digital signal are divided according to the spreading factor to obtain multiple symbol segments; the target symbol segment is multiplied point by point with the ideal baseline downlink linear frequency modulated signal to obtain the demodulated symbol signal, and the target symbol segment is any one of the multiple symbol segments; a fast Fourier transform is performed on the demodulated symbol signal to find the frequency peak with the highest energy from the output spectrum; the position index of the frequency peak is directly determined as the original symbol value of the symbol segment, and multiple original symbol values ​​demodulated from multiple symbol segments are obtained and sorted in chronological order to obtain a symbol sequence.

[0088] In one possible implementation, the second processing unit 403 is used to take the difference between the detected frequency and the theoretical frequency as the carrier frequency offset; to obtain a digital compensation signal based on the carrier frequency offset, wherein the digital compensation signal is out of phase with the carrier frequency offset; and to multiply the digital compensation signal with the target digital signal point by point to obtain the synchronously corrected digital signal.

[0089] It should be noted that the system provided in the above embodiments is only illustrated by the division of the above functional modules. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the system and method embodiments provided in the above embodiments belong to the same concept, and the specific implementation process can be found in the method embodiments, which will not be repeated here.

[0090] This application also discloses an electronic device. (See reference...) Figure 5 , Figure 5This application provides a schematic diagram of the structure of an electronic device. The electronic device 500 may include: at least one processor 501, at least one network interface 504, a user interface 503, a memory 502, and at least one communication bus 505.

[0091] The communication bus 505 is used to enable communication between these components.

[0092] The user interface 503 may include a display screen and a camera. Optionally, the user interface 503 may also include a standard wired interface and a wireless interface.

[0093] The network interface 504 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface).

[0094] The processor 501 may include one or more processing cores. The processor 501 connects to various parts of the server using various interfaces and lines, and performs various server functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in memory 502, and by calling data stored in memory 502. Optionally, the processor 501 may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 501 may integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), and modem. The CPU primarily handles the operating system, user interface, and application requests; the GPU is responsible for rendering and drawing the content required for display; and the modem handles wireless communication. It is understood that the modem may also not be integrated into the processor 501 and may be implemented as a separate chip.

[0095] The memory 502 may include random access memory (RAM) or read-only memory. Optionally, the memory 502 may include a non-transitory computer-readable storage medium. The memory 502 can be used to store instructions, programs, code, code sets, or instruction sets. The memory 502 may include a program storage area and a data storage area. The program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch functionality, sound playback functionality, image playback functionality, etc.), instructions for implementing the various method embodiments described above, etc.; the data storage area may store data involved in the various method embodiments described above, etc. Optionally, the memory 502 may also be at least one storage device located remotely from the aforementioned processor 501.

[0096] like Figure 5 As shown, the memory 502, which serves as a computer storage medium, may include an operating system, a network communication module, a user interface module, and an application for UAV communication link parsing for the ELRS communication protocol.

[0097] exist Figure 5 In the electronic device 500 shown, the user interface 503 is mainly used to provide an interface for users to input data and obtain user input data; while the processor 501 can be used to call the application program for UAV communication link parsing for the ELRS communication protocol stored in the memory 502. When executed by one or more processors, the electronic device performs one or more methods as described in the above embodiments.

[0098] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0099] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0100] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the shown or discussed mutual couplings or direct couplings or communication connections may be through some service interfaces; indirect couplings or communication connections between apparatuses or units may be electrical or other forms.

[0101] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0102] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0103] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, portable hard drives, magnetic disks, or optical disks.

[0104] The above are merely exemplary embodiments of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Those skilled in the art will readily conceive of other embodiments of this disclosure upon considering the specification and the disclosure of practical truths. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not described in this disclosure.

Claims

1. A method for resolving UAV communication links for the ELRS communication protocol, characterized in that, The methods include: The receiver acquires modulated electromagnetic waves from the communication between the UAV and the remote sensor based on the ELRS protocol. The modulated electromagnetic wave is filtered and amplified to obtain a processed analog intermediate frequency signal; The processed analog intermediate frequency signal is sampled using an analog-to-digital converter to obtain the original digital data stream. The original digital data stream is processed to obtain the observed frequency hopping sequence, and the preset algorithm of the ELRS protocol is used to determine the simulated frequency hopping sequence of each set of enumeration parameters; Based on the comparison results between the observed frequency hopping sequence and the simulated frequency hopping sequence, the cracking parameters are determined, the target frequency hopping sequence is generated according to the cracking parameters, and the predicted frequency hopping channel for the next moment is predicted from the target frequency hopping sequence. The original digital data stream is digitally down-converted and channel filtered according to the predicted frequency hopping channel to extract the target digital signal; The target digital signal is analyzed to obtain LoRa modulation parameters, and the target digital signal is demodulated using LoRa based on the LoRa modulation parameters to obtain a symbol sequence; The symbol sequence is descrambled and error-corrected to recover the original binary data stream; The binary data stream is frame synchronized and field parsed according to the protocol format used by the ELRS protocol to obtain a structured ELRS data frame, which is then uploaded to the host computer.

2. The method according to claim 1, characterized in that, The process of processing the original digital data stream to obtain the observed frequency hopping sequence, and using the preset algorithm of the ELRS protocol to determine the simulated frequency hopping sequence for each set of enumerated parameters, specifically includes: The original digital data stream is divided into multiple time-series continuous data frames, and a fast Fourier transform is performed on each data frame to calculate the power spectrum at each time. All the data frames are processed sequentially to generate a time-frequency power spectrum matrix; Multiple frequency peaks with power energy peaks greater than the detection power threshold are selected from the time-frequency power spectrum matrix, where the power energy peaks are the energy peaks present in the power spectrum at each time point; The center frequencies corresponding to each of the multiple frequency peaks are retrieved, and the multiple center frequencies are sorted according to the chronological order of the time points to obtain the observed frequency hopping sequence; The ELRS protocol is determined to use a linear congruence generator algorithm with a 31-bit internal state as a seed, and the known output value is determined according to the output rules of the linear congruence generator algorithm. The high 16-bit value is determined based on the known output value, and the low 16-bit value is enumerated based on the high 16-bit value to obtain the first enumeration space. The high 16 bits are determined as the second enumeration space. The values ​​in the first enumeration space and the second enumeration space are combined to obtain multiple candidate initial seeds. The candidate initial seed is calculated using the inverse operation of a linear congruence generator to obtain the candidate initial state; Using each candidate initial state as a seed, a simulated frequency hopping sequence corresponding to the observed frequency hopping sequence is generated according to the linear congruence generator algorithm, so as to obtain multiple simulated frequency hopping sequences corresponding to each set of enumeration parameters.

3. The method according to claim 2, characterized in that, The step of determining the cracking parameters based on the comparison results between the observed frequency hopping sequence and the simulated frequency hopping sequence, and generating the target frequency hopping sequence based on the cracking parameters, specifically includes: The observed frequency hopping sequence is compared point by point with the target simulated frequency hopping sequence to obtain a matching score. The matching score is the number of points in the target simulated frequency hopping sequence and the observed frequency hopping sequence that have the target frequency value at the same time index position. The target frequency includes the same frequency value and the frequency value with a frequency deviation less than a preset deviation. The target simulated frequency hopping sequence is any one of the multiple simulated frequency hopping sequences. After comparing multiple simulated frequency hopping sequences with the observed frequency hopping sequences, the maximum matching score is selected from the calculated matching scores. If the maximum matching score is greater than the preset matching threshold, the cracking is confirmed to be successful, and the target candidate initial state corresponding to the simulated frequency hopping sequence that generates the maximum matching score is determined as the cracking parameter; Using the initial state of the target candidate as a seed, the target frequency hopping sequence is obtained by iterative calculation based on the linear congruence generator algorithm.

4. The method according to claim 1, characterized in that, The step of performing digital down-conversion and channel filtering on the original digital data stream based on the predicted frequency hopping channel to extract the target digital signal specifically includes: A digital complex sine signal is generated based on the frequency value of the predicted frequency hopping channel and the sampling rate of the original digital data stream, wherein the digital complex sine signal is the negative value of the frequency of the predicted frequency hopping channel; The original digital data stream is multiplied point-by-point by the digital complex sine signal to obtain a wideband zero-IF signal; The broadband zero-IF signal is subjected to digital low-pass filtering to obtain the filtered narrowband baseband signal. The filtered narrowband baseband signal is downsampled to obtain the target digital signal.

5. The method according to claim 1, characterized in that, The analysis of the target digital signal to obtain LoRa modulation parameters specifically includes: The target digital signal is input into a parallel correlator group and correlated with each ideal template signal to obtain multiple sharp peaks. It is then determined whether there is a sharp peak that is greater than or equal to a preset decision threshold among the multiple sharp peaks. When there is a sharp peak value among the multiple sharp peak values ​​that is greater than or equal to the preset decision threshold value, the target time point corresponding to the target sharp peak value is identified as the start time, and a timer is started to count. The instantaneous power is obtained by calculating the signal data of the target digital signal, and the instantaneous power is then subjected to moving average filtering to obtain the average power value. When the average power value is less than the preset end threshold, the time corresponding to the average power value is taken as the signal end time, and the final count value corresponding to the counter at the signal end time is obtained. Multiply the final count value by the timer clock period to obtain the signal duration in the air; The LoRa modulation parameter that matches the signal's airtime is found in the preset LoRa parameter table.

6. The method according to claim 5, characterized in that, The step of performing LoRa demodulation on the target digital signal according to the LoRa modulation parameters to obtain a symbol sequence specifically includes: The spreading factor and signal bandwidth are obtained from the LoRa modulation parameters, and a LoRa uplink linear frequency modulation signal is generated based on the spreading factor and the signal bandwidth. A time-domain conjugate ideal baseline downlink linear frequency modulation signal is generated based on the LoRa uplink linear frequency modulation signal. The preamble signal is obtained from the target digital signal, and the preamble signal is demodulated according to the downlink linear frequency modulation signal of the ideal baseline to obtain the demodulated preamble signal. The demodulated preamble signal is subjected to a fast Fourier transform to obtain the detection frequency, and the carrier frequency offset of the target digital signal is synchronously corrected based on the deviation between the detection frequency and the theoretical frequency. After the synchronization correction is completed, a synchronization word signal is obtained from the target digital signal. The synchronization word signal is the signal in the target digital signal that is located after the preamble signal. The synchronization word signal is demodulated and subjected to fast Fourier transform. The demodulated symbol value is compared with the preset synchronization word to confirm the valid start position of the data frame. Starting from the effective starting position, the sampling points of each symbol in the target digital signal are divided according to the spreading factor to obtain multiple symbol segments; The target symbol segment is multiplied point by point with the ideal baseline downlink linear frequency modulated signal to obtain the demodulated symbol signal, wherein the target symbol segment is any one of the multiple symbol segments; Perform a Fast Fourier Transform on the demodulated symbol signal and find the frequency peak with the highest energy from the output spectrum; The location index of the frequency peak is directly determined as the original symbol value of the symbol segment. Multiple original symbol values ​​demodulated from multiple symbol segments are obtained and sorted in chronological order to obtain the symbol sequence.

7. The method according to claim 6, characterized in that, The synchronous correction of the carrier frequency offset of the target digital signal based on the deviation between the detected frequency and the theoretical frequency specifically includes: The difference between the detected frequency and the theoretical frequency is used as the carrier frequency offset; A digital compensation signal is obtained based on the carrier frequency offset, and the digital compensation signal is out of phase with the carrier frequency offset; The digital compensation signal is multiplied point by point with the target digital signal to obtain the synchronously corrected digital signal.

8. A UAV communication link parsing system for the ELRS communication protocol, characterized in that, The system includes a receiving unit, a first processing unit, a second processing unit, and a parsing unit. The receiving unit acquires modulated electromagnetic waves from the receiving end for communication between the UAV and the remote controller based on the ELRS protocol. The first processing unit filters and amplifies the modulated electromagnetic wave to obtain a processed analog intermediate frequency signal; and samples the processed analog intermediate frequency signal using an analog-to-digital converter to obtain the original digital data stream. The second processing unit processes the original digital data stream to obtain an observed frequency hopping sequence, and uses a preset algorithm of the ELRS protocol to determine the simulated frequency hopping sequence for each set of enumeration parameters; it determines the cracking parameters based on the comparison result between the observed frequency hopping sequence and the simulated frequency hopping sequence, generates a target frequency hopping sequence according to the cracking parameters, and predicts the predicted frequency hopping channel for the next moment from the target frequency hopping sequence; it performs digital down-conversion and channel filtering on the original digital data stream according to the predicted frequency hopping channel to extract the target digital signal; it analyzes the target digital signal to obtain LoRa modulation parameters, and performs LoRa demodulation on the target digital signal according to the LoRa modulation parameters to obtain a symbol sequence. The parsing unit descrambles and performs error correction decoding on the symbol sequence to recover the original binary data stream; The binary data stream is frame synchronized and its fields are parsed according to the protocol format used by the ELRS protocol to obtain structured ELRS data frames, which are then uploaded to the host computer.

9. An electronic device, characterized in that, The device includes a processor, a memory, a user interface, and a network interface. The memory is used to store instructions, the user interface and the network interface are used to communicate with other devices, and the processor is used to execute the instructions stored in the memory to cause the electronic device to perform the method as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores instructions that, when executed, perform the method as described in any one of claims 1-7.

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