Power cycle test system and method based on driving signal and capable of automatically bypassing failed device

Abstract

The invention discloses a power cycle test system and method based on a driving signal and capable of automatically bypassing a failed device. The system comprises a control driving unit, a power applying unit, a temperature regulation and control unit, a signal acquisition unit and an automatic bypass unit. The on-off state of a to-be-tested device is managed by controlling a driving signal, a real working condition is simulated, the reliability of a grid electrode is checked, and meanwhile, a thyristor connected with each device in parallel is utilized to realize failure automatic bypass. During testing, temperature calibration is firstly carried out to establish a voltage drop-junction temperature relation model, then shell temperature and conduction voltage drop are periodically collected in power circulation, and junction temperature and thermal resistance are calculated in real time. When the parameter of any device exceeds the failure threshold value set based on the initial value, the system automatically triggers the corresponding thyristor to be conducted, and the failure device is short-circuited and cut out of the test loop, so that the test of other devices is ensured not to be interfered, and the full automation and high reliability of the test process are realized.

Description

Technical Field

[0001] This invention relates to semiconductor power device testing technology, and in particular to a power cycle testing system and method based on a drive signal and automatically bypassing failed devices. Background Technology

[0002] In the research, development, production, and reliability assessment of semiconductor power devices (such as IGBTs, IGCTs, and MOSFETs), power cycling testing is a core experimental method for accelerating device aging and verifying their long-term operational stability. This test simulates the cyclic thermal stress changes of devices under actual operating conditions, characterized by "current flow heating up - current flow interruption cooling down," accelerating the aging and failure of the device's internal packaging structure (such as solder layers and bonding wires). This allows for the early exposure of potential performance degradation issues during long-term use, providing crucial data support for device lifetime prediction and reliability optimization.

[0003] In power cycling testing, thermal resistance (Rth) and on-state voltage drop (Von) are core parameters characterizing the aging state of devices. Thermal resistance reflects the device's ability to transfer heat from the junction to the case; aging leads to increased thermal resistance, resulting in excessively high junction temperatures. On-state voltage drop is directly related to the device's conduction losses; aging failure causes a significant increase in on-state voltage drop, affecting device efficiency and safety. Therefore, the industry typically sets specific thresholds for thermal resistance and on-state voltage drop as device failure criteria. When both reach these thresholds, the device is considered to no longer meet normal operating requirements.

[0004] However, current traditional power cycling test schemes have the following shortcomings in practical applications, which seriously restrict test efficiency and result accuracy: 1. Failed devices cannot be automatically bypassed, interfering with test continuity: In traditional test systems, even if the thermal resistance and on-state voltage drop of a device have reached the failure threshold, the device will continue to operate in the test loop and cannot be automatically disconnected. The abnormal operating state of failed devices (such as abnormal heating or uneven current distribution) will disrupt the stability of the test loop, affecting not only the test environment of other normal devices under test, but also potentially causing overall test data distortion and even test system failure.

[0005] 2. Current source control methods do not conform to real-world operating conditions and cannot assess gate reliability: Traditional solutions generally employ "current source switching" control logic, which achieves periodic current flow and interruption of the device by frequently switching the current source on and off. Simultaneously, to ensure stable current flow through the device, the gate of the power device is typically kept in a continuously positive bias state. This control method differs significantly from the actual operating scenario of the device—in real-world applications, the device's switching is achieved through the switching of the gate / gate drive signal, not the switching of the current source; furthermore, the continuously positively biased gate state cannot simulate the dynamic switching process of the gate under real-world operating conditions. This makes it impossible to assess the long-term reliability of the gate / gate and to expose potential aging failure risks in the gate drive circuit.

[0006] 3. Failed components must be manually removed, which is cumbersome and affects testing efficiency: Due to the lack of an automatic bypass mechanism, when aging failure is detected during testing, the entire testing process must be paused. Personnel must manually remove the failed component and re-adjust the circuit before testing can continue. This process not only interrupts the continuity of testing and prolongs the overall testing cycle, but manual operation may also introduce new circuit interference (such as changes in contact resistance or temperature fluctuations), leading to decreased consistency in the test data and further affecting the accuracy of the reliability assessment results.

[0007] In summary, the shortcomings of traditional power cycling test schemes in handling failed devices, simulating real operating conditions, and ensuring the continuity of the test process can no longer meet the requirements for high reliability and high efficiency testing of semiconductor power devices. There is an urgent need for a new test scheme that can automatically bypass failed devices, closely match real operating conditions, and ensure the continuity of the test process to solve the pain points of existing technologies.

[0008] It should be noted that the information disclosed in the background section above is only for understanding the background of this application, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0009] The main objective of this invention is to overcome the deficiencies in the aforementioned background technology and provide a power cycle testing system and method based on a drive signal and automatically bypassing failed devices.

[0010] To achieve the above objectives, the present invention adopts the following technical solution: In a first aspect of the invention, a power cycling test system based on a drive signal and automatically bypassing a failed device includes: The control drive unit is used to generate and output drive signals for the device under test and drive signals for the thyristors, and to receive and process sensor data. A power application unit, connected to the control drive unit, is used to provide heating current and measurement current to multiple devices under test connected in parallel in response to the drive signal of the device under test. A temperature control unit is used to adjust the ambient temperature of the device under test in order to realize the heating and cooling process of the power cycle; The signal acquisition unit is used to acquire the case temperature signal and on-state voltage drop signal of each of the devices under test, and transmit them to the control and drive unit; An automatic bypass unit includes a thyristor connected in parallel with each of the devices under test, the thyristor being controlled by a thyristor drive signal; The control drive unit is configured to: calculate the junction temperature and thermal resistance of each device under test based on the case temperature signal and the on-state voltage drop signal; and when any device under test is determined to be faulty, switch the corresponding thyristor drive signal to drive the thyristor to conduct, thereby realizing automatic bypass of the faulty device.

[0011] In a second aspect of the invention, a power cycling test method using the system includes the following steps: S1. Perform temperature calibration and establish a linear relationship model between the on-state voltage drop and junction temperature of each device under test; S2. Start the power cycle test. By controlling the drive unit to output the drive signal of the device under test and the heating switch signal, the power application unit periodically applies heating current and measurement current to the device under test, while the temperature control unit performs cooling operation. S3. The case temperature and on-state voltage drop of each device under test are periodically collected by the signal acquisition unit. S4. The control drive unit calculates the junction temperature and thermal resistance of each device under test based on the data collected in step S3, and compares them with their initial values. S5. When any device under test is determined to be faulty, the control drive unit switches the corresponding thyristor drive signal to drive the thyristor in the automatic bypass unit to conduct, thereby bypassing the faulty device.

[0012] The present invention has the following beneficial effects: Addressing a core pain point in traditional power cycling testing—where, when the thermal resistance and on-state voltage drop characterizing the aging state of a device reach default failure values, the failed device remains in the test circuit and cannot be bypassed, thus interfering with the testing environment of other normal devices and causing data distortion—this invention effectively solves this critical defect through innovative system design and testing methods. Specifically, this invention equips each device under test (DUT) with a parallel bypass thyristor. During normal operation of the test system, this thyristor is always in the cutoff state, ensuring that the heating current and measurement current flow stably through the DUT, guaranteeing that the testing process conforms to the preset procedure. When the system detects that a DUT has reached an aging failure state through its control algorithm, it first controls the power device to switch to the cutoff state, simultaneously triggering its corresponding bypass thyristor to conduct, short-circuiting the failed device. This automatically disconnects the failed device from the test circuit without interfering with other normal devices still under testing, ensuring the stability of the testing environment and the accuracy of the test data.

[0013] Furthermore, this invention optimizes the traditional power cycle test for shortcomings in control logic and operating condition simulation: Traditional solutions generally use the "current source switching" method to achieve periodic current flow and interruption of the device, and to ensure current stability, the gate / terminal of the power device is often kept in a positive bias state. This control method not only differs significantly from the actual working scenario of the device, but also cannot assess the long-term reliability of the gate / terminal. In contrast, this invention regulates the flow state of the heating current by controlling the drive signal—setting the heating current to always be on, and achieving the device's own conduction and cutoff only by switching the drive signal of the device under test. This design is more in line with the working mode of power devices in actual applications, and can simultaneously verify the reliability of the gate / terminal during the test, exposing the potential aging failure risk of the drive electrode in advance, further improving the reference value of the test results for the actual performance of the device.

[0014] Meanwhile, the automatic bypass mechanism of this invention provides a perfect solution to the problems of manual removal of devices after aging in traditional testing, which leads to test process interruption, reduced efficiency and easy introduction of loop interference (such as contact resistance changes and temperature field fluctuations). Without pausing the test process or performing manual operation, the system can automatically complete short-circuit bypass immediately after detecting device failure, avoiding the damage to the working environment of other devices under test caused by manual removal of devices, ensuring the continuity of testing and the consistency of data before and after, and significantly improving test efficiency and the accuracy of reliability assessment results.

[0015] Other beneficial effects of the embodiments of the present invention will be further described below. Attached Figure Description

[0016] Figure 1This is a schematic diagram of the power cycling test system according to an embodiment of the present invention.

[0017] Figure 2 This is a schematic diagram of the heating signal and the junction temperature of the power device in an embodiment of the present invention.

[0018] Figure 3 This is a flowchart of the power cycle test according to an embodiment of the present invention. Detailed Implementation

[0019] The embodiments of the present invention will be described in detail below. It should be emphasized that the following description is merely exemplary and not intended to limit the scope and application of the present invention.

[0020] It should be noted that when a component is referred to as "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as "connected to" another component, it can be directly connected to or indirectly connected to that other component. Furthermore, a connection can be used for fixing, coupling, or communication.

[0021] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention.

[0022] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of the present invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0023] This invention aims to address the pain points of traditional power cycling tests, such as the inability to automatically bypass failed devices, deviations from real-world operating conditions, and the need for manual removal of failed devices. It proposes a power cycling test system and method based on a drive signal and automatic bypass of failed devices. This system can automatically bypass devices by switching the thyristor drive signal when a device failure is detected; it automatically disconnects failed devices to avoid interfering with other devices; and the on / off control of devices via the drive signal more closely reflects real-world operating conditions. It can simultaneously verify gate / gate reliability without the need for manual removal of failed devices, ensuring test continuity and data accuracy.

[0024] See Figure 1 This invention provides a power cycling test system based on a drive signal and automatically bypassing failed devices, comprising a control drive unit, a power application unit, a temperature control unit, a signal acquisition unit, and an automatic bypass unit. The control drive unit generates and outputs drive signals for the device under test (DUT) and thyristors, and receives and processes sensor data. The power application unit is connected to the control drive unit and, in response to the DUT drive signal, provides a heating current I to multiple DUTs connected in parallel. 加热 With the measured current I 测量 The temperature control unit is used to adjust the ambient temperature of the device under test (DUT) to achieve the heating and cooling process of the power cycle; the signal acquisition unit is used to acquire the case temperature signal and on-state voltage drop signal of each DUT and transmit them to the control drive unit; the automatic bypass unit includes a thyristor connected in parallel with each DUT, and the thyristor is controlled by the thyristor drive signal; wherein, the control drive unit is configured to: calculate the junction temperature and thermal resistance of each DUT based on the case temperature signal and on-state voltage drop signal, and when any DUT is determined to be faulty, switch the corresponding thyristor drive signal to drive the thyristor to conduct, thereby realizing the automatic bypass of the faulty device.

[0025] In some embodiments, the control drive unit includes a PC controller; the device under test drive signal includes a positive bias voltage +V for turning on the device under test. ge and the reverse bias voltage -V used to turn off the device under test ge The thyristor drive signal includes a normal state voltage -V used to maintain the thyristor turn-off. th and the bypass trigger voltage +V used to trigger the thyristor to turn on th .

[0026] In some embodiments, the power application unit includes a heating power supply and a measuring power supply; the heating power supply is configured to provide the heating current I. 加热 Its value is set to the rated current of the device under test or less; the measuring power supply is configured to provide the measuring current I. 测量 Its value is set to one-thousandth of the heating current or a small current value that does not affect the heat dissipation process of the device under test.

[0027] In some embodiments, the temperature control unit includes a condenser and a temperature sensor disposed thereon; the temperature sensor is used to detect the case temperature T of the device under test. c The condenser is configured to adjust the temperature at preset temperature intervals during the temperature calibration phase, and to cooperate with the power application unit during the power cycling phase to achieve periodic heating and cooling of the device under test.

[0028] In some embodiments, the control drive unit is further configured to perform a temperature calibration process: controlling the temperature regulation unit to achieve a stable equilibrium between the junction temperature of the device under test (DUT) and the ambient temperature, and, under the measurement state where the DUT drive signal is positively biased and only the measurement current is applied, acquiring a series of on-state voltage drops V at different equilibrium temperature points. 标定 To establish a linear relationship model between on-state voltage drop and junction temperature.

[0029] In some embodiments, the control drive unit is further configured to: based on a first specific time window t after the heating phase of the signal acquisition unit. measure_hot With the second specific time window t after the cooling phase measure_cold Internally acquired on-state voltage drop V onhot V oncold Based on the established linear relationship model, the highest operating junction temperature T of the device under test is calculated respectively. j_max With the lowest operating junction temperature T j_min And taking into account the highest operating junction temperature T j_max Real-time collected shell temperature T c and the power loss P obtained during the heating stage loss Calculate the thermal resistance R of the device under test. th In addition, the lowest operating junction temperature T can be considered. j_min Perform temperature range analysis and cycle effectiveness verification.

[0030] In some embodiments, the control drive unit determines the failure of the device under test based on the following criteria: the real-time on-state voltage drop V of the device. on Relative to its initial reference value V on0 An increase exceeding a first preset threshold (e.g., 105%) occurs, or its real-time thermal resistance R... th Relative to its initial reference value R th0 An increase exceeding the second preset threshold (e.g., 120%) occurs.

[0031] A power cycling test method using the system includes the following steps: S1. Perform temperature calibration and establish a linear relationship model between the on-state voltage drop and junction temperature of each device under test; S2. Start the power cycle test. By controlling the drive unit to output the drive signal of the device under test and the heating switch signal, the power application unit periodically applies heating current and measurement current to the device under test, while the temperature control unit performs cooling operation. S3. The case temperature and on-state voltage drop of each device under test are periodically collected by the signal acquisition unit. S4. The control drive unit calculates the junction temperature and thermal resistance of each device under test based on the data collected in step S3, and compares them with their initial values. S5. When any device under test is determined to be faulty, the control drive unit switches the corresponding thyristor drive signal to drive the thyristor in the automatic bypass unit to conduct, thereby bypassing the faulty device.

[0032] In some embodiments, the temperature calibration in step S1 specifically includes: controlling the temperature control unit to make the ambient temperature experience a series of different preset stable temperature points; at each stable temperature point, controlling the heating current to be turned off, and applying a positive bias drive signal +V to the device under test. ge The measured current is used to ensure that the device under test is in a conducting state to receive the measured current; the forward voltage drop V at this stable temperature point is collected. 标定 Based on the on-state voltage drop data collected at all stable temperature points, a linear relationship model V between the on-state voltage drop and the junction temperature was obtained by fitting. 标定 = f( T ).

[0033] In some embodiments, the thermal resistance R is calculated in step S4. th The specific process includes: based on a specific time window t after the heating phase measure_hot Internally acquired on-state voltage drop V onhot And using the aforementioned linear relationship model, calculate the device's highest operating junction temperature T. j_max Based on the on-state voltage drop V measured when heating current is applied during the heating stage. on With heating current I 加热 The power loss P of the computing device loss Based on the highest operating junction temperature T j_max Real-time collected shell temperature T c and the power loss P loss Calculate the thermal resistance of the device.

[0034] The power cycling test system and method proposed in this invention, based on a drive signal and automatically bypassing failed devices, addresses the pain points of traditional power cycling tests and has the following significant technical advantages: First, by configuring a parallel bypass thyristor for each device under test, when device failure is detected, the thyristor drive signal can be switched to turn it on, automatically short-circuiting the failed device and cutting it out of the test loop, thus avoiding interference from the abnormal operation of the failed device to the test environment of other normal devices under test; Second, it abandons the traditional "current source interruption" control logic and the design of continuous positive bias of the gate / gate. By setting the heating current to always be on and controlling the device's on / off state with the drive signal, it more closely matches the actual working scenario of the device and can simultaneously verify the reliability of the gate / gate; Third, it eliminates the need for manual removal after device aging. The automatic bypass mechanism ensures the continuity of the test process, avoids loop interference introduced by manual operation, and improves test efficiency and data accuracy.

[0035] The following further describes specific embodiments and working principles of the present invention.

[0036] Power cycling test system such as Figure 1 As shown, the system includes a heating power supply that outputs heating current (heating), a measuring power supply that outputs measuring current (measurement), a controlled heating signal corresponding switch, a device under test (DUT) group consisting of n DUTs (such as IGBTs, IGCTs, MOSFETs, etc., with packages including TO and modules), a bypass voltage-resistant thyristor connected in parallel with each DUT, a condenser for regulating ambient temperature, and a PC controller as the control center. The DUTs are simply referred to as devices under test (DUTs).

[0037] The heating signal corresponding switch is controlled by the PC controller to switch the transmission path of the heating current on and off; each power device under test is equipped with +V ge (Positive bias gate drive signal) and -V ge (Reverse bias gate drive signal) to control the on and off of the device, and the thyristors connected in parallel for each device are controlled by -V th (Disconnect drive signal) and +V th (Conduction drive signal) controls its state; the condenser cooperates with the heating process to realize the cooling stage of the power cycle and adjust the ambient temperature of the device under test; the PC controller has bidirectional interactive signals, sending control signals (such as heating switch control, gate drive signal, thyristor drive signal) to the outside, and receiving measurement signals (such as case temperature, on-state voltage drop and other sensor data) from the device under test.

[0038] During operation, the PC controller outputs control signals, which on one hand control the on / off state of the switch corresponding to the heating signal, determining whether heating flows into the circuit of the device under test (DUT); on the other hand, it sends +V signals to each DUT. ge or -V ge To control its on / off state, a -V signal is sent to the thyristor. th Or +V th To control its on / off state. During the heating phase, the heating signal corresponds to the switch being turned on, and the device under test is powered by +V. ge When the drive is turned on, heating current flows through the device to raise its temperature; the measuring power supply provides measurement to the device in scenarios requiring detection of on-state voltage drop. The condenser works in conjunction with the heating process to achieve a "heating-cooling" power cycle. The signal acquisition unit (including temperature sensors and on-state voltage drop acquisition points) collects the case temperature and on-state voltage drop signals of each device under test and transmits them to the PC controller; the PC controller calculates the junction temperature and thermal resistance based on these signals, and if a device is determined to have failed, it switches the corresponding thyristor drive signal to +V. th This allows the thyristor to conduct, short-circuiting the failed device and ensuring that the testing of other devices is not disturbed.

[0039] The following further elaborates on the workflow of automatic bypass power cycling test of aged samples based on drive signals. The main logic of this process can be achieved through... Figure 3 A visual presentation. The core of power cycling is to mimic the module thermal cycling process of power devices during operation, where the temperature rises when current is applied and cools down when current is cut off.

[0040] Power cycling test procedure based on drive signal: (1) Set the heating current I 加热 The rated current I of the power device rated Or smaller, set the measurement current to I 加热 / 1000, or a small current value that does not affect the heat dissipation process of the DUT when only this current flows.

[0041] (2) Set the heating signal waveform and the driving signal waveform of each DUT as follows: Figure 2 As shown in the middle and at the top.

[0042] (3) A temperature sensor is placed near the DUT on the condenser plate, and the detected temperature is recorded as the DUT shell temperature T. c .

[0043] (4) Then perform device calibration: control the condenser temperature to rise and fall sequentially at preset intervals (usually 5 or 10 degrees), and hold for 2 minutes after reaching the target temperature to make the DUT junction temperature consistent with the condenser plate temperature; at this time, turn off the heating switch, set the DUT drive signal to positive bias and apply the measurement current, and collect the on-state voltage drop V. 标定 Establish a linear relationship model between conduction voltage drop and temperature: V 标定 = f (T1, T2, ..., T) n ) The junction temperature T can then be calculated by measuring the on-state voltage drop under current. j .

[0044] (5) During the power cycle, the time interval between the DUT drive waveform and the heating switch drive waveform is set to t. measure_hot and t measure_cold : in t measure_hot During the period, read V1~V n Potential, obtain the on-state voltage drop V of each DUT. onhot ; in t measure_cold During the period, read V1~V n Potential, obtain the on-state voltage drop V of each DUT. oncold Based on the above linear relationship, the highest operating junction temperature T is calculated. j_max and minimum operating junction temperature T j_min During this stage, the thyristor drive signal needs to be controlled to -V. thThe thyristor is turned off.

[0045] (6) When both the DUT drive signal and the heating switch drive signal are positively biased, the heating current flows through the DUT, and the on-state voltage drop V is measured at this time. on Calculate the power loss P of the DUT at this time. loss =V on I 加热 .

[0046] Automatic bypass control process: (1) First calculate the thermal resistance R of each device. th : R th =(T j_max -T c ) / P loss。

[0047] (2) Record T j _ max and T c 100 groups of V after stabilization (fluctuation <2%) on and R th Calculate their mean as the initial value: .

[0048] (3) Real-time acquisition of the thermal resistance and on-state voltage drop of each DUT, and when they reach the failure criterion (e.g., when the real-time on-state voltage drop is greater than V), the failure criterion is triggered. on0 105% or real-time thermal resistance greater than R th0 When the value is 120%, the corresponding thyristor drive signal is set to +V. th This short-circuits the failed DUT, enabling automatic bypass.

[0049] In summary, this invention proposes a power cycling test system and method based on a drive signal and automatic bypass of failed devices. By controlling the coordinated operation of the drive unit, power application unit, temperature control unit, signal acquisition unit, and automatic bypass unit containing parallel thyristors, it effectively solves the pain points of traditional power cycling tests, such as the inability to automatically bypass failed devices, deviation of operating conditions from real-world scenarios, and the need for manual removal of failed devices. Its core advantages are: automatic short-circuiting of failed devices to avoid interfering with the testing environment of other devices; a design that controls the on / off state of devices through drive signals to better reflect real-world operating conditions, while also verifying gate / gate reliability; and the elimination of the need for manual removal of failed devices, ensuring the continuity of the testing process and data accuracy, providing an efficient and accurate solution for the reliability assessment of power devices.

[0050] This invention also provides a storage medium for storing a computer program, which, when executed, performs at least the methods described above.

[0051] This invention also provides a control device, including a processor and a storage medium for storing a computer program; wherein the processor executes the computer program by performing at least the method described above.

[0052] This invention also provides a processor that executes a computer program, at least performing the methods described above.

[0053] The storage medium can be implemented by any type of non-volatile storage device, or a combination thereof. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic random access memory (FRAM), flash memory, magnetic surface memory, optical disc or CD-ROM; magnetic surface memory can be disk storage or magnetic tape storage. The storage media described in the embodiments of this invention are intended to include, but are not limited to, these and any other suitable types of memory.

[0054] In the several embodiments provided by this invention, it should be understood that the disclosed systems and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0055] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0056] In addition, in the various embodiments of the present invention, each functional unit can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0057] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0058] Alternatively, if the integrated units of this invention are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this invention, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, RAM, magnetic disks, or optical disks.

[0059] The methods disclosed in the several method embodiments provided by this invention can be arbitrarily combined without conflict to obtain new method embodiments.

[0060] The features disclosed in the several product embodiments provided by this invention can be arbitrarily combined without conflict to obtain new product embodiments.

[0061] The features disclosed in the several method or device embodiments provided by the present invention can be arbitrarily combined without conflict to obtain new method or device embodiments.

[0062] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various equivalent substitutions or obvious modifications can be made without departing from the concept of the present invention, and all such modifications, achieving the same performance or application, should be considered within the scope of protection of the present invention.

Claims

1. A power cycling test system based on a drive signal and automatically bypassing failed devices, characterized in that, include: The control drive unit is used to generate and output drive signals for the device under test and drive signals for the thyristors, and to receive and process sensor data. A power application unit, connected to the control drive unit, is used to provide heating current and measurement current to multiple devices under test connected in parallel in response to the drive signal of the device under test. A temperature control unit is used to adjust the ambient temperature of the device under test in order to realize the heating and cooling process of the power cycle; The signal acquisition unit is used to acquire the case temperature signal and on-state voltage drop signal of each of the devices under test, and transmit them to the control and drive unit; An automatic bypass unit includes a thyristor connected in parallel with each of the devices under test, the thyristor being controlled by a thyristor drive signal; The control drive unit is configured to: calculate the junction temperature and thermal resistance of each device under test based on the case temperature signal and the on-state voltage drop signal; and when any device under test is determined to be faulty, switch the corresponding thyristor drive signal to drive the thyristor to conduct, thereby realizing automatic bypass of the faulty device.

2. The system according to claim 1, characterized in that, The control drive unit includes a PC controller; the device under test drive signal includes a positive bias voltage for turning on the device under test and a reverse bias voltage for turning off the device under test; the thyristor drive signal includes a normal state voltage for maintaining the thyristor off and a bypass trigger voltage for triggering the thyristor to turn on.

3. The system according to claim 1, characterized in that, The power application unit includes a heating power supply and a measuring power supply; the heating power supply is configured to provide the heating current, the value of which is set to the rated current of the device under test or less; the measuring power supply is configured to provide the measuring current, the value of which is set to one-thousandth of the heating current or a small current value that does not affect the heat dissipation process of the device under test.

4. The system according to any one of claims 1 to 3, characterized in that, The temperature control unit includes a condenser and a temperature sensor mounted thereon; the temperature sensor is used to detect the case temperature of the device under test; the condenser is configured to adjust the temperature at preset temperature intervals during the temperature calibration phase, and to cooperate with the power application unit during the power cycling phase to realize the periodic heating and cooling of the device under test.

5. The system according to any one of claims 1 to 3, characterized in that, The control drive unit is further configured to execute a temperature calibration process: control the temperature regulation unit to make the junction temperature of the device under test reach a stable equilibrium with the ambient temperature, and in the measurement state where the drive signal of the device under test is positively biased and only the measurement current is applied, collect a series of on-state voltage drops at different equilibrium temperature points to establish a linear relationship model between the on-state voltage drop and the junction temperature.

6. The system according to any one of claims 1 to 3, characterized in that, The control drive unit is further configured to: calculate the highest and lowest operating junction temperatures of the device under test based on the on-state voltage drop collected by the signal acquisition unit within the first specific time window after the heating stage and the second specific time window after the cooling stage, combined with the established linear relationship model. The thermal resistance of the device under test is calculated by combining the highest operating junction temperature, the real-time collected case temperature, and the power loss obtained during the heating stage.

7. The system according to claim 6, characterized in that, The control drive unit determines the failure of the device under test based on the following criteria: the real-time on-state voltage drop of the device increases by more than a first preset threshold relative to its initial reference value, or the real-time thermal resistance increases by more than a second preset threshold relative to its initial reference value.

8. A power cycling test method using the system according to any one of claims 1 to 7, characterized in that, Includes the following steps: S1. Perform temperature calibration and establish a linear relationship model between the on-state voltage drop and junction temperature of each device under test; S2. Start the power cycle test. By controlling the drive unit to output the drive signal of the device under test and the heating switch signal, the power application unit periodically applies heating current and measurement current to the device under test, while the temperature control unit performs cooling operation. S3. The case temperature and on-state voltage drop of each device under test are periodically collected by the signal acquisition unit. S4. The control drive unit calculates the junction temperature and thermal resistance of each device under test based on the data collected in step S3, and compares them with their initial values. S5. When any device under test is determined to be faulty, the control drive unit switches the corresponding thyristor drive signal to drive the thyristor in the automatic bypass unit to conduct, thereby bypassing the faulty device.

9. The method according to claim 8, characterized in that, The temperature calibration described in step S1 specifically includes: The temperature control unit causes the ambient temperature to experience a series of different preset stable temperature points. At each stable temperature point, the heating current is turned off, and the device under test is kept in a conducting state to allow the measurement current to flow through it. Collect the on-state voltage drop at this stable temperature point; Based on the on-state voltage drop data collected at all stable temperature points, a linear relationship model between the on-state voltage drop and the junction temperature was obtained by fitting.

10. The method according to claim 8 or 9, characterized in that, The specific process of calculating thermal resistance in step S4 includes: The maximum operating junction temperature of the device is calculated based on the on-state voltage drop collected within a specific time window after the heating phase and the linear relationship model. The power loss of the device is calculated based on the on-state voltage drop measured when heating current is applied during the heating stage and the heating current. The thermal resistance of the device is calculated based on the highest operating junction temperature, the real-time collected case temperature, and the power loss.

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