Photomask layout correction method, photomask layout correction system, photomask layout correction equipment, storage medium and program product
By performing Manhattanization processing and electron beam proximity effect correction on the optical correction pattern of the photomask, combined with photolithography imaging verification, the problem of reduced imaging quality during photolithography was solved, and the imaging quality of the photomask was improved.
Patent Information
- Application Number
- CN202411109831.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-13
- Publication Date
- 2026-02-13
AI Technical Summary
During the photolithography process, nonlinear spatial filtering in partial coherent imaging causes distortion of the image intensity spectrum and phase distribution, resulting in reduced image quality and phenomena such as linewidth shift, line end shortening, and foot rounding, which can easily lead to missed pattern connections.
By performing Manhattanization processing and electron beam proximity effect correction on the optical correction pattern of the mask, combined with photolithography imaging verification, the edge placement error is iteratively optimized until the preset conditions are met, thereby improving the Manhattan level and imaging quality of the mask pattern.
It improves the Manhattan level of the curved photomask pattern, enhances the imaging quality of the photomask, and reduces proximity effect errors during photomask manufacturing.
Smart Images
Figure CN121522948A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of semiconductor manufacturing, and particularly relates to a photomask layout correction method and system, device, storage medium and program product. BACKGROUND
[0002] In a photolithography process, due to the existence of nonlinear spatial filtering in a partial coherent imaging process, the energy distribution and phase distribution of an image intensity spectrum will be distorted to a certain extent relative to an ideal image spectrum, resulting in a decrease in imaging quality. For example, the imaging pattern has phenomena such as line width offset, line end shortening and foot rounding, and is easy to miss the pattern, thereby causing an undefined pattern connection. SUMMARY
[0003] Based on this, the present disclosure provides a photomask layout correction method and system, device, storage medium and program product, which can improve the Manhattan level of a curved photomask layout to maximize the imaging quality of the curved photomask layout.
[0004] To achieve the above-mentioned purpose, in a first aspect, some embodiments of the present disclosure provide a photomask layout correction method, comprising the following steps.
[0005] Obtaining a curved photomask optical training layout.
[0006] Performing Manhattan processing on the photomask optical training layout to obtain a Manhattan correction layout.
[0007] Performing electron beam proximity effect correction on the Manhattan correction layout to obtain an electron beam correction layout.
[0008] Performing photolithography imaging verification on the electron beam correction layout.
[0009] Judging whether a verification result of the photolithography imaging verification meets a preset condition; if yes, outputting the Manhattan correction layout; if no, performing edge movement iterative optimization on the Manhattan correction layout until the verification result of the photolithography imaging verification corresponding to the electron beam correction layout meets the preset condition.
[0010] In some embodiments of the present disclosure, the obtaining of the curved photomask optical training layout comprises: obtaining a photomask design layout; and performing inverse pixelized optical proximity correction on the photomask design layout to obtain the curved photomask optical training layout.
[0011] In some embodiments of the present disclosure, the Manhattanizing the photomask optical correction version to obtain a Manhattanized correction version includes: Manhattanizing the photomask optical correction version to obtain a Manhattanized initial version; and performing inverse optical proximity correction on the Manhattanized initial version to obtain the Manhattanized correction version.
[0012] In some embodiments of the present disclosure, the lithographic imaging verification of the electron beam correction version includes the following steps.
[0013] performing electron beam writing on the electron beam correction version, or performing electron beam writing model simulation based on the electron beam correction version to obtain a pattern profile of the photomask version.
[0014] performing lithographic development model simulation based on the pattern profile of the photomask version to obtain a lithographic imaging result of the photomask version.
[0015] In some embodiments of the present disclosure, the lithographic imaging verification of the electron beam correction version further includes: determining a key imaging indicator based on the lithographic imaging result of the photomask version.
[0016] In some embodiments of the present disclosure, the key imaging indicator includes at least one of a pattern edge placement error and / or a process window.
[0017] In some embodiments of the present disclosure, the preset condition includes a cost function defined according to the key imaging indicator.
[0018] The cost function includes: ;
[0019] wherein, is an edge placement error adjustment coefficient, is a total sum of all evaluation positions, is an evaluation position, is a profile of a corresponding lithographic imaging result of the Manhattanized correction version, is a profile of a corresponding lithographic imaging result of the curved photomask optical correction version, is a process window, is a process window adjustment coefficient.
[0020] In a second aspect, some embodiments of the present disclosure further provide a photomask version correction system for implementing the photomask version correction method as described in some embodiments above. The photomask version correction system includes an optical correction module, a Manhattanization processing module, an electron beam correction module, and an imaging verification module.
[0021] The optical correction module is configured to obtain a curved photomask optical correction version.
[0022] The Manhattan processing module is connected with the optical correction module and is configured to perform Manhattan processing on the optical correction layout to obtain a Manhattan correction layout.
[0023] The e-beam correction module is connected with the Manhattan processing module and is configured to perform e-beam proximity effect correction on the Manhattan correction layout to obtain an e-beam correction layout.
[0024] The imaging verification module is connected with the Manhattan processing module and the e-beam correction module and is configured to perform photolithography imaging verification on the e-beam correction layout, and output the Manhattan correction layout when a verification result of the photolithography imaging verification meets a preset condition, or perform edge movement iterative optimization on the Manhattan correction layout until the verification result of the photolithography imaging verification of the Manhattan correction layout corresponding to the e-beam correction layout meets the preset condition when the verification result of the photolithography imaging verification does not meet the preset condition.
[0025] In a third aspect, the embodiments of the present disclosure further provide a computer device. The computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the method steps of any of the embodiments of the first aspect when executing the computer program.
[0026] In a fourth aspect, the embodiments of the present disclosure further provide a computer readable storage medium. The computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement the method steps of any of the embodiments of the first aspect.
[0027] In a fifth aspect, the embodiments of the present disclosure further provide a program product, including a computer program, and the computer program is executed by a processor to implement the method steps of any of the embodiments of the first aspect.
[0028] The embodiments of the present disclosure can have / possess at least the following advantages:
[0029] In the embodiments of the present disclosure, after obtaining the curve-shaped optical correction layout, the optical correction layout is first subjected to Manhattan processing to obtain a Manhattan correction layout, and then the Manhattan correction layout is subjected to e-beam proximity effect correction to obtain an e-beam correction layout. In this way, by performing photolithography imaging verification on the e-beam correction layout and determining whether a verification result of the photolithography imaging verification meets a preset condition, the Manhattan correction layout can be output when the verification result of the photolithography imaging verification meets the preset condition, or the edge placement error of the Manhattan correction layout can be iteratively optimized when the verification result of the photolithography imaging verification fails to meet the preset condition, until the verification result of the photolithography imaging verification of the Manhattan correction layout meets the preset condition.
[0030] From the above, the embodiments of the present disclosure can consider the proximity effect error possibly brought in during the manufacture of the mask writing version by performing electron beam proximity effect correction, photolithography imaging verification and iterative optimization when the verification result does not meet the preset condition on the Manhattan correction layout, so as to maximize the quality of the Manhattan graph, i.e. improve the Manhattan level of the curved mask layout, so as to maximize the imaging quality of the mask while facilitating the manufacture of the mask.
[0031] The details of one or more embodiments of the present disclosure are presented in the following drawings and description. Other features, objects, and advantages of the present disclosure will become apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF DRAWINGS
[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or in the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and other drawings can also be obtained by those skilled in the art without creative labor on the basis of these drawings.
[0033] Figure 1 A flowchart of a mask layout correction method provided in some embodiments;
[0034] Figure 2 A flowchart of another mask layout correction method provided in some embodiments;
[0035] Figure 3 A correction flowchart of a mask optical correction layout to a Manhattan correction layout provided in some embodiments;
[0036] Figure 4 A flowchart of another mask layout correction method provided in some embodiments;
[0037] Figure 5 A flowchart of another mask layout correction method provided in some embodiments;
[0038] Figure 6 A structural block diagram of a mask layout correction system provided in some embodiments;
[0039] Figure 7 An internal structure diagram of a computer device provided in some embodiments. DETAILED DESCRIPTION
[0040] For the purposes of the present disclosure, certain terms will now be defined, summarized or otherwise described. These terms are intended to have the meanings set forth below. These terms are intended to have the meanings set forth below. These terms are intended to have the meanings set forth below.
[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the disclosure.
[0042] It should be understood that although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present disclosure.
[0043] It should be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element, or connected to the other element with intervening elements. Also, "connected" in the following embodiments, if there is a transmission of electrical signals or data between the connected objects, should be understood as "electrically connected", "communicatively connected" and the like.
[0044] It should be understood that the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. It should be further understood that the terms "comprises", "comprising", "includes", "including", or "has", "having" and the like, when used herein, specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.
[0045] For the purposes of the present disclosure, certain terms will now be defined, summarized or otherwise described. These terms are intended to have the meanings set forth below. These terms are intended to have the meanings set forth below. These terms are intended to have the meanings set forth below.
[0046] It can be understood that in the semiconductor manufacturing process, the photolithography process is in the central position, and is the most important process step in the production of integrated circuits. Among them, the pixelized inverse lithography technology (ILT) as one of the advanced technologies for correcting optical proximity effect can be applied to many advanced process technologies. Compared with the traditional optical proximity correction technology realized by edge cutting movement, ILT has a larger process window and smaller pattern edge placement error in photolithography imaging. However, the mask correction version obtained by the ILT technology is generally a curved pattern, which has great challenges in mask writing, including in writing time and pattern fidelity. Figure 1
[0047] In some embodiments, the Manhattanization processing of the curved pattern can obtain a Manhattanization pattern with pattern edges extending along the 0° direction and the 90° direction, so as to make a compromise in mask manufacturing and imaging quality through the Manhattanization pattern, for example, it will be easier to manufacture the mask, but at the same time, it will also lose a certain degree of imaging quality.
[0048] Based on this, the embodiments of the present disclosure provide a mask layout correction method and system, device, storage medium and program product, which can improve the Manhattan level of the curved mask layout to maximize the imaging quality of the curved mask layout.
[0049] Please refer to Figure 1 Some embodiments of the present disclosure provide a mask layout correction method, which includes the following steps S100-S500.
[0050] S100, a curved mask optical correction layout is obtained.
[0051] S200, Manhattanization processing is performed on the mask optical correction layout to obtain a Manhattanization correction layout.
[0052] S300, electron beam proximity effect correction is performed on the Manhattanization correction layout to obtain an electron beam correction layout.
[0053] S400, photolithography imaging verification is performed on the electron beam correction layout.
[0054] S500, it is judged whether the verification result of the photolithography imaging verification meets a preset condition:
[0055] If yes, the Manhattanization correction layout is output.
[0056] If not, edge movement iterative optimization is performed on the Manhattanization correction layout until the verification result of the photolithography imaging verification of the Manhattanization correction layout corresponding to the electron beam correction layout meets the preset condition.
[0057] In the embodiments of the present disclosure, after the curve-shaped photomask optical correction version is obtained, the Manhattan correction version can be obtained by performing Manhattan processing on the photomask optical correction version, and then performing electron beam proximity effect correction on the Manhattan correction version to obtain an electron beam correction version. In this way, by performing photolithography imaging verification on the electron beam correction version and determining whether the verification result of the photolithography imaging verification meets the preset condition, the Manhattan correction version can be output when the verification result of the photolithography imaging verification meets the preset condition, or the edge placement error of the Manhattan correction version can be iteratively optimized when the verification result of the photolithography imaging verification fails to meet the preset condition, until the verification result of the photolithography imaging verification corresponding to the Manhattan correction version meets the preset condition.
[0058] From the above, by performing electron beam proximity effect correction, photolithography imaging verification, and iterative optimization when the verification result fails to meet the preset condition on the Manhattan correction version, the proximity effect error possibly introduced during the manufacturing of the photomask writing version can be considered on the Manhattan correction version, so as to maximize the quality of the Manhattan pattern, that is, to improve the Manhattan level of the curve-shaped photomask version, thereby maximizing the imaging quality of the photomask while facilitating the manufacturing of the photomask.
[0059] Please refer to Figure 2 In some embodiments of the present disclosure, obtaining the curve-shaped photomask optical correction version in step S100 can include the following steps S110 and S120.
[0060] S110, obtaining a photomask design version.
[0061] S120, performing inverse optical proximity correction on the photomask design version to obtain the curve-shaped photomask optical correction version.
[0062] Here, the inverse optical proximity correction is the ILT technology introduced above.
[0063] Please refer to Figure 3 and Figure 4 In some embodiments of the present disclosure, performing Manhattan processing on the photomask optical correction version in step S200 to obtain the Manhattan correction version can include the following steps S210 and S220.
[0064] S210, performing Manhattan processing on the photomask optical correction version to obtain a Manhattan initial version.
[0065] Here, the edges of the patterns in the Manhattan initial version are lines extending along 0° and 90°.
[0066] S220, performing inverse optical proximity correction on the Manhattan initial version to obtain the Manhattan correction version.
[0067] Here, the inverse optical proximity correction is the aforementioned ILT technique.
[0068] For example, as shown in FIG. 1A, a curve pattern F1 in a mask design layout is pixelated to obtain a pixelated initial layout. Figure 3 Figure 3 For example, as shown in FIG. 1A, a curve pattern F1 in a mask design layout is pixelated to obtain a pixelated initial layout. Figure 3 For example, as shown in FIG. 1A, a curve pattern F1 in a mask design layout is pixelated to obtain a pixelated initial layout. Figure 3 For example, as shown in FIG. 1A, a curve pattern F1 in a mask design layout is pixelated to obtain a pixelated initial layout.
[0069] For example, as shown in FIG. 1A, a curve pattern F1 in a mask design layout is pixelated to obtain a pixelated initial layout. Figure 5 In some embodiments of the present disclosure, the step S400 of performing lithography imaging verification on the electron beam corrected layout includes steps S410 and S420.
[0070] S410, performing electron beam writing on the electron beam corrected layout, or performing electron beam writing model simulation based on the electron beam corrected layout to obtain a pattern profile of the mask layout.
[0071] S420, performing lithography development model simulation based on the pattern profile of the mask layout to obtain a lithography imaging result of the mask layout.
[0072] Here, it can be understood that the lithography imaging result of the mask layout obtained based on the electron beam corrected layout can effectively evaluate the imaging quality of the electron beam corrected layout.
[0073] For example, as shown in FIG. 1A, a curve pattern F1 in a mask design layout is pixelated to obtain a pixelated initial layout. Figure 5 In some embodiments of the present disclosure, the step S400 of performing lithography imaging verification on the electron beam corrected layout further includes a step S430.
[0074] S430, determining a key imaging indicator based on the lithography imaging result of the mask layout.
[0075] For example, the key imaging indicator includes at least one of a pattern edge placement error and / or a process window.
[0076] Accordingly, in some embodiments of the present disclosure, the preset condition in step S500 can include a cost function defined according to the aforementioned key imaging indicators. For example, the cost function can be defined by matching the requirements of the lithography process through the combination of the aforementioned key imaging indicators.
[0077] For example, the cost function includes but is not limited to: ;
[0078] wherein, is an edge placement error adjustment coefficient, is the sum of all evaluation position serial numbers, is the evaluation position, is the profile of the corresponding lithography imaging result of the Manhattanized corrected layout, is the profile of the corresponding lithography imaging result of the curved mask optical correction layout, is the process window, is a process window adjustment coefficient.
[0079] It should be noted that in some embodiments described above, when the verification result of the lithography imaging verification does not meet the preset condition, the iterative optimization of the edge placement error of the Manhattanized corrected layout can be implemented by using any of the following embodiments.
[0080] In some possible embodiments, please refer to Figure 4 When the verification result of the lithography imaging verification does not meet the preset condition, the iterative optimization of the Manhattanization processing of the mask optical correction layout can be returned to step S210, and the subsequent steps are executed accordingly until the verification result of the Manhattanized corrected layout corresponding to the lithography imaging verification meets the preset condition.
[0081] In some possible embodiments, please refer to Figure 5 When the verification result of the lithography imaging verification does not meet the preset condition, the iterative optimization of the inverse optical proximity correction of the Manhattanized initial layout can be returned to step S220, and the subsequent steps are executed accordingly until the verification result of the Manhattanized corrected layout corresponding to the lithography imaging verification meets the preset condition.
[0082] It should be understood that although the steps in the flowcharts involved in the embodiments described above are shown in sequence according to the arrows, the steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, the execution of the steps is not strictly limited in sequence, and the steps can be executed in other orders. Moreover, at least some of the steps in the flowcharts involved in the embodiments described above can include multiple steps or multiple stages, which are not necessarily executed at the same time, but can be executed at different times, and the execution order of the steps or stages is not necessarily sequential, but can be alternately or alternately executed with at least part of other steps or steps or stages in other steps.
[0083] Based on the same inventive concept, the embodiments of the present disclosure also provide a photomask layout correction system for implementing the photomask layout correction method described above. The implementation scheme for solving the problem provided by the photomask layout correction system is similar to the implementation scheme described in the above method, so the specific limitations in one or more photomask layout correction system embodiments provided below can refer to the related limitations of the photomask layout correction method described above, which will not be repeated here.
[0084] Please refer to Figure 6 The photomask layout correction system provided by the embodiments of the present disclosure includes an optical correction module, a Manhattan processing module, an electron beam correction module and an imaging verification module.
[0085] The optical correction module is configured to obtain a curved photomask optical correction layout.
[0086] The Manhattan processing module is connected with the optical correction module and is configured to perform Manhattan processing on the photomask optical correction layout to obtain a Manhattan correction layout.
[0087] The electron beam correction module is connected with the Manhattan processing module and is configured to perform electron beam proximity effect correction on the Manhattan correction layout to obtain an electron beam correction layout.
[0088] The imaging verification module is connected with the Manhattan processing module and the electron beam correction module and is configured to perform photolithography imaging verification on the electron beam correction layout, and output the Manhattan correction layout when the verification result of the photolithography imaging verification meets a preset condition, and perform edge movement iterative optimization on the Manhattan correction layout until the verification result of the photolithography imaging verification of the Manhattan correction layout corresponding to the electron beam correction layout meets the preset condition when the verification result of the photolithography imaging verification does not meet the preset condition.
[0089] In some embodiments of the present disclosure, the optical correction module obtains the curved optical mask correction layout, which can be implemented by: obtaining a mask design layout, performing inverse pixel-based optical proximity correction on the mask design layout, and obtaining the curved optical mask correction layout.
[0090] In some embodiments of the present disclosure, the imaging verification module performs lithographic imaging verification on the electron beam correction layout, which can be implemented by: performing electron beam writing on the electron beam correction layout, or performing electron beam writing model simulation based on the electron beam correction layout to obtain a pattern profile of the mask layout; and performing lithographic development model simulation based on the pattern profile of the mask layout to obtain a lithographic imaging result of the mask layout.
[0091] In some embodiments of the present disclosure, the imaging verification module performs lithographic imaging verification on the electron beam correction layout, which can be implemented by: performing electron beam writing on the electron beam correction layout, or performing electron beam writing model simulation based on the electron beam correction layout to obtain a pattern profile of the mask layout; and performing lithographic development model simulation based on the pattern profile of the mask layout to obtain a lithographic imaging result of the mask layout.
[0092] For example, the critical imaging indicators include at least one of a pattern edge placement error and / or a process window.
[0093] Correspondingly, the preset condition for judging the verification result of the lithographic imaging verification in the imaging verification module can be characterized by a cost function defined according to the above-mentioned critical imaging indicators.
[0094] For example, the cost function is generally defined as: ;
[0095] wherein, is an edge placement error adjustment coefficient, is a total sum of all evaluation positions, is an evaluation position, is a profile of a lithographic imaging result corresponding to the Manhattan correction layout, is a profile of a lithographic imaging result corresponding to the curved optical mask correction layout, is a process window, is a process window adjustment coefficient.
[0096] Here, the edge placement error adjustment coefficient α1 and the process window adjustment coefficient α2 are adjustable coefficients. The profile of the lithographic imaging result corresponding to the Manhattan correction layout refers to the profile of the lithographic imaging result of the electron beam correction layout obtained after the Manhattan correction layout is subjected to electron beam proximity effect correction. The profile of the lithographic imaging result corresponding to the curved optical mask correction layout refers to the profile of the lithographic imaging result of the electron beam correction layout obtained after the curved optical mask correction layout is subjected to electron beam proximity effect correction. The process window PW can be defined as the imaging depth of focus under a 5% energy threshold deviation corresponding to a (-5%~+5%) margin target of a critical dimension CD.
[0097] In the photomask layout correction system provided by some of the above embodiments, the term "module" and the like used in the specification can be used to represent a computer-related entity, hardware, firmware, a combination of hardware and software, software, or software in execution. For example, the "module" can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. For example, the "module" can be executed from various computer readable media on which various data structures are stored. Moreover, in the above embodiments provided by the present disclosure, it should be understood that the disclosed "module" can be implemented in other ways. For example, the above-described modules are only schematic. For example, the division of the modules is only a logical function division, and actual implementation can have other division manners, for example, a plurality of modules can be combined or integrated into another module, or some features can be omitted or not executed. The connection between the described modules can be through some interfaces, indirect coupling or communication connection between the modules, which can be electrical, mechanical or other forms. The modules described separately can be or can not be physically separated. Part or all of the modules can be selected according to actual needs to achieve the purpose of the embodiments of the present disclosure.
[0098] In some embodiments, the present disclosure further provides a computer device including a memory and a processor, the memory stores a computer program, and the processor executes the computer program to realize the steps of the photomask layout correction method involved in the above embodiments.
[0099] For example, the computer device can be a terminal, and its internal structure diagram can be as shown in Figure 7 .
[0100] The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. The processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operating system and the computer program in the non-volatile storage medium to run. The input / output interface of the computer device is configured to exchange information between the processor and external devices. The communication interface of the computer device is configured to perform wired or wireless communication with external terminals. The wireless communication can be achieved through WIFI, mobile cellular network, NFC (Near Field Communication) or other technologies. The computer program is executed by the processor to implement the photomask layout correction method described above. The display unit of the computer device is configured to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen. The input device of the computer device can be a touch layer overlaid on the display screen, or a key, trackball or touchpad arranged on the shell of the computer device, or an external keyboard, touchpad or mouse, etc.
[0101] Those skilled in the art can understand that, Figure 7 The skilled in the art can understand that,
[0102] In some embodiments, the embodiments of the present disclosure also provide a computer readable storage medium having a computer program stored thereon, and the computer program is executed by the processor to implement the steps of the photomask layout correction method described above.
[0103] In some embodiments, the embodiments of the present disclosure also provide a program product having a computer program stored thereon, and the computer program is executed by the processor to implement the steps of the photomask layout correction method described above.
[0104] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer readable storage medium, and when the computer program is executed, the processes of the above-mentioned embodiments of each method can be included. Any reference to memory, database or other medium used in each embodiment provided by the present disclosure can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical storage, high-density embedded non-volatile memory, resistive memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration but not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The database involved in each embodiment provided by the present disclosure can include at least one of a relational database and a non-relational database. The non-relational database can include a distributed database based on a block chain, etc., without being limited thereto. The processor involved in each embodiment provided by the present disclosure can be a general-purpose processor, a central processing unit, a graphics processing unit, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., without being limited thereto.
[0105] Each technical feature of the above-mentioned embodiments can be combined arbitrarily. In order to make the description simple, all possible combinations of each technical feature of the above-mentioned embodiments are not described, however, as long as the combination of these technical features does not exist contradictory, it should be considered as the scope of the present disclosure.
[0106] The above-mentioned embodiments only express several implementation manners of the present disclosure, and the description is more specific and detailed, but it should not be understood as a limitation on the scope of the patent application. It should be noted that for those skilled in the art, without departing from the concept of the present disclosure, a number of modifications and improvements can be made, which are within the scope of the present disclosure. Therefore, the protection scope of the patent of the present disclosure should be subject to the appended claims.
Claims
1. A method for correcting a photomask layout, characterized in that, include: Obtain a curved optical correction pattern for the photomask; The optical correction pattern of the photomask is subjected to Manhattanization processing to obtain a Manhattanized correction pattern; Electron beam proximity correction is applied to the Manhattan correction pattern to obtain the electron beam correction pattern; The electron beam correction pattern was verified by photolithographic imaging. Determine whether the verification result of the photolithography imaging verification meets the preset conditions; If so, output the Manhattan correction layout; If not, the Manhattan correction pattern is iteratively optimized by edge movement until the verification result of the lithography imaging verification of the Manhattan correction pattern corresponding to the electron beam correction pattern meets the preset conditions.
2. The photomask layout correction method according to claim 1, characterized in that, The obtained curve-shaped optical correction pattern of the mask includes: Obtain the photomask design layout; The photomask design layout is subjected to pixelated reverse optical proximity correction to obtain the curved photomask optical correction layout.
3. The photomask layout correction method according to claim 1, characterized in that, The Manhattanization process of the optical correction pattern of the photomask to obtain the Manhattanized correction pattern includes: The optical correction pattern of the photomask is subjected to Manhattanization to obtain an initial Manhattanized pattern; The Manhattanized initial layout is subjected to reverse optical proximity correction to obtain the Manhattanized corrected layout.
4. The photomask layout correction method according to any one of claims 1 to 3, characterized in that, The step of performing photolithographic imaging verification on the electron beam correction pattern includes: Electron beam writing is performed on the electron beam correction pattern, or an electron beam writing model simulation is performed based on the electron beam correction pattern to obtain the pattern outline of the photomask pattern; Based on the pattern outline of the photomask, a photolithography development model simulation is performed to obtain the photolithographic imaging result of the photomask.
5. The photomask layout correction method according to claim 4, characterized in that, The step of performing photolithographic imaging verification on the electron beam correction pattern also includes: Key imaging parameters are determined based on the lithographic imaging results analysis of the aforementioned photomask pattern. The key imaging metrics include at least one of the following: graphic edge placement error and / or process window.
6. The photomask layout correction method according to claim 5, characterized in that, The preset conditions include a cost function defined based on the key imaging indicators; The cost function includes: ; in, Here, n is the edge placement error adjustment coefficient, n is the sum of the ordinal numbers of all evaluation positions, and i is the evaluation position. This refers to the outline of the lithographic imaging result corresponding to the Manhattan correction pattern. The outline of the lithographic imaging result corresponding to the curved photomask optical correction pattern. For the process window, This is the process window adjustment coefficient.
7. A photomask layout correction system, characterized in that, include: The optical correction module is configured to acquire a curved optical correction pattern for the photomask. The Manhattanization processing module, connected to the optical correction module, is configured to perform Manhattanization processing on the optical correction pattern of the photomask to obtain a Manhattanized correction pattern. An electron beam correction module, connected to the Manhattanization processing module, is configured to perform electron beam proximity effect correction on the Manhattanization correction pattern to obtain an electron beam correction pattern. An imaging verification module, connected to the Manhattanization processing module and the electron beam correction module, is configured to: perform lithographic imaging verification on the electron beam correction pattern; output the Manhattanization correction pattern when the verification result of the lithographic imaging verification meets a preset condition; and perform edge-moving iterative optimization on the Manhattanization correction pattern when the verification result of the lithographic imaging verification does not meet the preset condition, until the verification result of the lithographic imaging verification of the Manhattanization correction pattern corresponding to the electron beam correction pattern meets the preset condition.
8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method as described in any one of claims 1 to 6.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method as described in any one of claims 1 to 6.
10. A program product comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method as described in any one of claims 1 to 6.