Power module and method for manufacturing power module

Abstract

The invention provides a power module and a preparation method thereof, and the power module comprises the components of a substrate which is provided with a first circuit layer and a second circuit layer which are arranged on an insulating layer side by side; the first pre-packaged power chip is located on the substrate and provided with a source electrode and a signal electrode which are located on the same face and a drain electrode arranged on the other face opposite to the source electrode, and the source electrode and the signal electrode of the first pre-packaged power chip face and are attached to the first circuit layer to form electric connection; the second pre-packaged power chip is located on the substrate and provided with a drain electrode and a signal electrode which are located on the same face and a source electrode arranged on the other face opposite to the drain electrode, and the source electrode and the signal electrode of the second pre-packaged power chip face and are attached to the second circuit layer to form electric connection; the alternating current terminal is attached to the drain electrode of the first pre-packaged power chip and the source electrode of the second pre-packaged power chip to form electric connection; and a plastic package housing.

Description

Technical Field

[0001] This application mainly relates to the field of power chips, and in particular to a power module and a method for fabricating the power module. Background Technology

[0002] Traditional single-sided copper-exposed power modules typically package the power chip directly as a bare die. The source and gate of the bare power chip are located on the same side of the chip, while the drain is on the opposite side. During packaging, the drain faces and is electrically connected to the substrate, while the source and gate face away from the substrate. A wire-bonding process is needed to electrically connect the source and gate to other components (such as other chips or terminals of the power module). The wires used in the wire-bonding process increase the thickness of the power module. Reducing the thickness of the power module is one of the research directions in this field. Summary of the Invention

[0003] The technical problem to be solved by this application is to provide a power module and a method for fabricating the power module, wherein the power module and the method for fabricating the power module have the advantage of small thickness.

[0004] This application discloses a power module, comprising: a substrate having a first circuit layer and a second circuit layer arranged side-by-side on an insulating layer; a first pre-packaged power chip located on the substrate, having a source and a signal electrode on the same side and a drain electrode disposed on the opposite side of the source electrode, the source and signal electrodes of the first pre-packaged power chip facing and bonded to the first circuit layer to form an electrical connection; a second pre-packaged power chip located on the substrate, having a drain and a signal electrode on the same side and a source electrode disposed on the opposite side of the drain electrode, the drain and signal electrode of the second pre-packaged power chip facing and bonded to the second circuit layer to form an electrical connection; an AC terminal bonded to the drain electrode of the first pre-packaged power chip and the source electrode of the second pre-packaged power chip to form an electrical connection; and a plastic encapsulation housing.

[0005] This application also proposes a method for fabricating a power module, comprising: providing a substrate having a first circuit layer and a second circuit layer arranged side-by-side on an insulating layer; aligning and bonding the source and signal electrodes of a first pre-packaged power chip located on the same side to the first circuit layer to form an electrical connection; aligning and bonding the drain and signal electrodes of a second pre-packaged power chip located on the same side to the second circuit layer to form an electrical connection, wherein the drain and source electrodes of the first pre-packaged power chip are located on opposite sides, and the drain and source electrodes of the second pre-packaged power chip are located on opposite sides; bonding an AC terminal to the drain electrode of the first pre-packaged power chip and the source electrode of the second pre-packaged power chip to form an electrical connection; and encapsulating the substrate, the first pre-packaged power chip, the second pre-packaged power chip, and the AC terminal.

[0006] The technical solution of this application has the following technical advantages: In conventional technology, wire bonding is used to electrically connect the drain, source, and signal terminals of a bare power chip to other components. The wires used to form these connections increase the thickness of the power module. The power module of this application uses a pre-packaged power chip, and the drain, source, and signal terminals of the pre-packaged power chip are electrically connected to other components through bonding, thus reducing the thickness of the power module. Attached Figure Description

[0007] The accompanying drawings are included to provide a further understanding of this application; they are incorporated into and constitute a part of this application. The drawings illustrate embodiments of this application and, together with this specification, serve to explain the principles of this application. In the drawings:

[0008] Figure 1 This is a perspective view of a power module in one embodiment of this application;

[0009] Figure 2 yes Figure 1 A three-dimensional schematic diagram of the power module from another perspective;

[0010] Figure 3 yes Figure 1 An exploded view of the power module in the diagram;

[0011] Figure 4 This is a three-dimensional schematic diagram of the substrate in one embodiment of this application;

[0012] Figure 5 This is a top view of the first pre-packaged power chip and the second pre-packaged power chip after they are bonded to the substrate.

[0013] Figure 6 These are top and bottom views of the first pre-packaged power chip;

[0014] Figure 7 These are top and bottom views of the second pre-packaged power chip;

[0015] Figure 8 This is a top view of the AC terminals after they are bonded to the first pre-packaged power chip and the second pre-packaged power chip.

[0016] Figure 9 This is a schematic flowchart illustrating the fabrication method of a power module according to one embodiment of this application.

[0017] Reference numerals: The power module includes a substrate 110, an insulating layer 111, a first circuit layer 112, a first circuit 112a, a second circuit 112b, a third circuit 112c, a second circuit layer 113, a first circuit 113a, a second circuit 113b, a third circuit 113c, a heat dissipation layer 114, a first pre-packaged power chip 120, a second pre-packaged power chip 130, an AC terminal 140, a plastic encapsulation shell 150, a DC negative terminal 161, a DC positive terminal 162, a connection layer 170, a first conductive post 181, a second conductive post 182, a third conductive post 183, a fourth conductive post 184, and a fifth conductive post 185. Detailed Implementation

[0018] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are merely some examples or embodiments of this application. For those skilled in the art, these drawings can be applied to other similar scenarios without creative effort. Unless obvious from the context or otherwise specified, the same reference numerals in the drawings represent the same structures or operations.

[0019] As indicated in this application, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" do not specifically refer to the singular and may also include the plural. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of explicitly identified steps and elements, which do not constitute an exclusive list, and the method or apparatus may also include other steps or elements.

[0020] Unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of this application. It should also be understood that, for ease of description, the dimensions of the various parts shown in the drawings are not drawn to actual scale. Techniques, methods, and devices known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and devices should be considered part of the specification. In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters in the following drawings denote similar items; therefore, once an item is defined in one drawing, it need not be further discussed in subsequent drawings.

[0021] In the description of this application, it should be understood that the orientation or positional relationship indicated by directional terms such as "front, back, up, down, left, right", "horizontal, vertical, horizontal" and "top, bottom" is generally based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing this application and simplifying the description. Unless otherwise stated, these directional terms do not indicate or imply that the device or component referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the scope of protection of this application; the directional terms "inner" and "outer" refer to the inner and outer contours relative to the outline of each component itself.

[0022] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein will be interpreted accordingly.

[0023] Furthermore, it should be noted that the use of terms such as "first" and "second" to define components is merely for the purpose of distinguishing the corresponding components. Unless otherwise stated, these terms have no special meaning and therefore should not be construed as limiting the scope of protection of this application. In addition, although the terminology used in this application is selected from commonly known and used terms, some terms mentioned in this application's specification may have been chosen by the applicant according to his or her judgment, and their detailed meanings are explained in the relevant sections of this description. Moreover, this application should be understood not only through the actual terms used, but also through the meaning implied by each term.

[0024] Flowcharts are used in this application to illustrate the operations performed by the system according to embodiments of this application. It should be understood that the preceding or following operations are not necessarily performed in exact order. Instead, various steps can be processed in reverse order or simultaneously. Furthermore, other operations may be added to these processes, or one or more steps may be removed from these processes.

[0025] The power module and its fabrication method (hereinafter referred to as the fabrication method) of this application will be described below through specific embodiments.

[0026] refer to Figures 1 to 3 The power module includes a substrate 110, a first pre-packaged power chip 120, a second pre-packaged power chip 130, an AC terminal 140, and a plastic encapsulation housing 150.

[0027] For details, please refer to Figure 4 The substrate 110 has an insulating layer 111 and a first circuit layer 112 and a second circuit layer 113 disposed side-by-side on the insulating layer 111. The first insulating layer 111 may be a ceramic insulating layer; the first circuit layer 112 has a circuit with a specific layout, wherein the DC negative terminal, the source terminal on the first pre-packaged power chip 120, and the signal terminal are respectively electrically connected to the corresponding circuit; the second circuit layer 113 has a circuit with a specific layout, wherein the DC positive terminal, the drain terminal on the second pre-packaged power chip 130, and the signal terminal are respectively electrically connected to the corresponding circuit. Specific details regarding these electrical connections are provided below.

[0028] In one embodiment, reference Figure 1 and Figure 4The substrate 110 has a heat dissipation layer 114, which is disposed opposite to the first circuit layer 112 and the second circuit layer 113 on the other side of the insulating layer 111. The molding compound 150 exposes at least a portion of the heat dissipation layer 114, which facilitates heat dissipation through the heat dissipation layer 114. The material of the heat dissipation layer 114 may include copper. The heat dissipation layer 114 is electrically insulated from the first circuit layer 112 and the second circuit layer 113 located on the other side of the substrate 110, thereby preventing undesirable electrical connections between the internal circuitry and the outside through the heat dissipation layer 114.

[0029] The substrate 110 can be a direct bonded copper substrate (DBC), a copper-clad ceramic substrate, a copper substrate, or an aluminum substrate. It is understood that the substrate 110 is not limited to the above-mentioned substrates and can also be other types of substrates.

[0030] exist Figure 4 In one embodiment, the first circuit layer 112 and the second circuit layer 113 are located on the same insulating layer 111. In other embodiments, the first circuit layer 112 and the second circuit layer 113 are located on two separate insulating layers, which are arranged side by side and joined together as shown. Figure 4 The insulating layer 111 shown can be spaced apart from the two insulating layers and can be misaligned in the length direction. The circuit layout of the first circuit layer 112 can be axially symmetrical with the circuit layout of the second circuit layer 113, that is, either circuit layout can be rotated 180° about the gap between the first circuit layer 112 and the second circuit layer 113 as the axis of symmetry and then coincide with the other circuit layout.

[0031] refer to Figure 5 The first pre-packaged power chip 120 and the second pre-packaged power chip 130 are located on the substrate 110 and are electrically connected to the corresponding circuits in the first circuit layer 112 and the second circuit layer 113, respectively. The details are as follows.

[0032] First, refer to Figure 6 The diagrams shown are a top view and a bottom view of the first pre-packaged power chip 120. The first pre-packaged power chip 120 is formed from at least one bare die through a pre-packaging process. After pre-packaging, the source and signal terminals of the first pre-packaged power chip 120 are located on the same surface of the chip, while the drain is located on the opposite surface from the source. (Reference) Figure 7The diagrams shown are a top view and a bottom view of the second pre-packaged power chip 130. The second pre-packaged power chip 130 is formed from at least one bare die through a pre-packaging process. After pre-packaging, the drain and signal terminals of the second pre-packaged power chip 130 are located on the same surface of the chip, while the source terminal is located on the opposite surface to the drain. The signal terminals of the first pre-packaged power chip 120 and the second pre-packaged power chip 130 include a gate and a Kelvin source.

[0033] In addition to rearranging the source, drain, and signal terminals of the bare power chip, the pre-packaging process can also increase the size of the pads and make them protrude from the surface of the pre-packaged chip, which facilitates the connection between the pads and external components (e.g., circuitry). In one embodiment, the first pre-packaged power chip 120 includes a redistribution layer substrate (RDL substrate) and at least one bare power chip packaged on the redistribution layer substrate. The positions of the drain, signal, and source terminals of the bare power chip are rearranged using the redistribution layer substrate, and the solder joint dimensions are adjusted. The second pre-packaged power chip 130 may also include a redistribution layer substrate and at least one bare power chip packaged on the redistribution layer substrate.

[0034] refer to Figure 4 , Figure 5 and Figure 6 The first pre-packaged power chip 120 is located on the first circuit layer 112, with its source and signal terminals facing and attached to the first circuit layer 112 to form electrical connections with corresponding circuits in the first circuit layer 112. For example... Figure 4 As shown, the first circuit layer 112 has a first circuit 112a, a second circuit 112b, and a third circuit 112c. The source electrode is attached to the first circuit 112a to form an electrical connection, the gate electrode is attached to the second circuit 112b to form an electrical connection, and the Kelvin source electrode is attached to the third circuit 112c to form an electrical connection. In one embodiment, the attachment method can be direct contact—that is, the signal electrode and source electrode of the first pre-packaged power chip 120 are in direct contact with the corresponding circuit; or indirect connection—that is, as shown in the figure. Figure 4 As shown, indirect connections are made through connection layers 170 (e.g., a silver layer, solder layer, or tin layer) located between the signal electrode and the corresponding circuit, and between the source electrode and the corresponding circuit. Both direct and indirect connections can be achieved through sintering or soldering processes.

[0035] To simplify the illustrations, reference numerals are not used. Figure 3 , Figure 4 , Figure 5 All connection layers 170.

[0036] exist Figure 5 In the first circuit layer 112, four first pre-packaged power chips 120 are bonded together. It can be understood that the number of first pre-packaged power chips 120 bonded together with the first circuit layer 112 is not limited to four. For example, it can also be one, three or six, etc.

[0037] refer to Figure 4 , Figure 5 and Figure 7 The drain and signal terminals of the second pre-packaged power chip 130 are oriented towards and attached to the second circuit layer 113 to form electrical connections with corresponding circuits in the second circuit layer 113, respectively. For example... Figure 4 As shown, the second circuit layer 113 has a first circuit 113a, a second circuit 113b, and a third circuit 113c. The drain is attached to the first circuit 113a to form an electrical connection, the gate is attached to the second circuit 113b to form an electrical connection, and the Kelvin source is attached to the third circuit 113c to form an electrical connection. In one embodiment, the attachment method can be direct contact—that is, the signal electrode and drain of the second pre-packaged power chip 130 are in direct contact with the corresponding circuit; or indirect connection—that is, as shown in the figure. Figure 4 As shown, the circuit is indirectly connected via a connection layer 170 located between the signal electrode and the corresponding circuit, and another connection layer 170 located between the drain electrode and the corresponding circuit. Both direct and indirect connections can be achieved through sintering or welding processes.

[0038] exist Figure 5 In the middle, four second pre-packaged power chips 130 are bonded to the second circuit layer 113. It can be understood that the number of second pre-packaged power chips 130 bonded to the second circuit layer 113 is not limited to four. For example, it can also be one, three or six, etc.

[0039] In one embodiment, the power module further includes a plurality of conductive posts (Z-PINs) extending along the thickness direction of the power module. These conductive posts may be copper posts. Specifically, refer to... Figures 2 to 4The first conductive post 181 is electrically connected to the third circuit 113c. The first conductive post 181 can be electrically connected to the third circuit 113c through direct contact or through the connecting piece 170. The second conductive post 182 is electrically connected to the second circuit 113b. The second conductive post 182 can be electrically connected to the second circuit 113b through direct contact or through the connecting piece 170. The third conductive post 183 is electrically connected to the second circuit 112b. The third conductive post 183 can be electrically connected to the second circuit 112b through direct contact or through the connecting piece 170. The fourth conductive post 184 is electrically connected to the third circuit 112c. The fourth conductive post 184 can be electrically connected to the third circuit 112c through direct contact or through the connecting piece 170. The fifth conductive post 185 is electrically connected to the first circuit 113a. The fifth conductive post 185 can be electrically connected to the first circuit 113a through direct contact or through the connecting piece 170.

[0040] refer to Figures 5 to 8 The AC terminal 140 is bonded to the drain of the first pre-packaged power chip 120 and the source of the second pre-packaged power chip 130 to form an electrical connection. For example... Figure 3 As shown, in the thickness direction of the power module, the first pre-packaged power chip 120 and the second pre-packaged power chip 130 are located between the AC terminal 140 and the substrate 110. A detailed explanation is provided here regarding the "attachment of the AC terminal 140 to the drain of the first pre-packaged power chip 120 and the source of the second pre-packaged power chip 130". (Refer to...) Figure 5 and Figure 8 The AC terminal 140 can be directly connected to the drain of the first pre-packaged power chip 120 and the source of the second pre-packaged power chip 130 to achieve bonding. Alternatively, the AC terminal 140 can be indirectly connected to the drain of the first pre-packaged power chip 120 through the connection layer 170 located between the AC terminal 140 and the drain of the first pre-packaged power chip 120 to achieve bonding with the drain of the first pre-packaged power chip 120, and indirectly connected to the source of the second pre-packaged power chip 130 through the connection layer 170 located between the AC terminal 140 and the source of the second pre-packaged power chip 130 to achieve bonding with the source of the second pre-packaged power chip 130.

[0041] In one embodiment, such as Figure 8 As shown, the AC terminal 140 is strip-shaped, and the drain of the first pre-packaged power chip 120 and the source of the second pre-packaged power chip 130 are attached to the same side of the strip-shaped AC terminal 140.

[0042] In one embodiment, reference Figure 5 and Figure 8The DC negative terminal 161 of the power module is attached to the first circuit layer 112 through a connection layer 170 that is either in direct contact with or located between the two, so as to form an electrical connection with the first circuit layer 112, and / or the DC positive terminal 162 of the power module is attached to the second circuit layer 113 through a connection layer 170 that is either in direct contact with or located between the two, so as to form an electrical connection with the second circuit layer 113.

[0043] refer to Figures 1 to 3 The molding compound 150 encapsulates the substrate 110, the first pre-packaged power chip 120, the second pre-packaged power chip 130, the terminals, and the conductive posts. At least a portion of the heat dissipation layer 114 is not covered by the molding compound 150; at least a portion of the surface of each conductive post is not covered by the molding compound 150, and the exposed conductive posts are used for connection to external circuits (such as...). Figure 2 (As shown); a portion of each terminal is located inside the plastic-encapsulated housing 150, and another portion is located outside the plastic-encapsulated housing 150, for connection to external circuits.

[0044] In conventional technologies, wire bonding is used to electrically connect the drain, source, and signal terminals of a bare power chip to other components (substrate, AC terminals). The leads used to form these connections have a certain height, which increases the thickness of the power module. In contrast, the power module of this application uses a pre-packaged power chip, and the drain, source, and signal terminals of the pre-packaged power chip are electrically connected to other components (substrate, AC terminals) through a bonding method. This solves the problem of increased power module thickness caused by wire bonding and also improves the power density of the power module. In one embodiment, the thickness of the power module is 2mm to 3mm, for example, 2mm, 2.5mm, or 3mm. Furthermore, compared to wire bonding, the bonding method provides higher reliability for the electrical connections.

[0045] This application also proposes a method for fabricating a power module, one embodiment of which includes... Figure 9 The steps S210~S240 are shown.

[0046] S210: A substrate is provided, the substrate having a first circuit layer and a second circuit layer arranged side by side on an insulating layer;

[0047] S220: The source and signal electrodes on the same side of the first pre-packaged power chip are oriented towards and bonded to the first circuit layer to form an electrical connection. The drain and signal electrodes on the same side of the second pre-packaged power chip are oriented towards and bonded to the second circuit layer to form an electrical connection. The drain and source electrodes of the first pre-packaged power chip are located on opposite sides. The drain and source electrodes of the second pre-packaged power chip are located on opposite sides.

[0048] S230: The AC terminal is attached to the drain of the first pre-packaged power chip and the source of the second pre-packaged power chip to form an electrical connection;

[0049] S240: Perform plastic encapsulation on the substrate, the first pre-packaged power chip, the second pre-packaged power chip, and the AC terminals.

[0050] The following sections will explain steps S210 to S240 in detail.

[0051] refer to Figure 4 In step S210, a substrate 110 is provided, the substrate 110 having a first circuit layer 112 and a second circuit layer 113 arranged side by side on an insulating layer 111.

[0052] refer to Figure 1 and Figure 4 The substrate 110 may have a heat dissipation layer 114, which is disposed opposite to the first circuit layer 112 and the second circuit layer 113 on the other side of the insulating layer 111.

[0053] refer to Figure 4 , Figure 5 and Figure 6 In step S220, the source and signal electrodes on the same side of the first pre-packaged power chip 120 are aligned and bonded to the first circuit layer 112, so that the source and signal electrodes form an electrical connection with the corresponding circuits in the first circuit layer 112. (Reference) Figure 4 , Figure 5 and Figure 7 The drain and signal electrodes on the same side of the second pre-packaged power chip 130 are aligned and bonded to the second circuit layer 113 so that the drain and signal electrodes are electrically connected to the corresponding circuits.

[0054] In one embodiment, the method of bonding the signal electrode and source electrode of the first pre-packaged power chip 120 to the first circuit layer 112 includes: using a sintering process or a soldering process to bond the signal electrode and source electrode of the first pre-packaged power chip 120 to the corresponding circuit in the first circuit layer 112; and / or, the method of bonding the signal electrode and drain electrode of the second pre-packaged power chip 130 to the second circuit layer 113 includes: using a sintering process or a soldering process to bond the signal electrode and drain electrode of the second pre-packaged power chip 130 to the corresponding circuit in the second circuit layer 113. In the sintering and soldering processes, the signal electrode and source electrode of the first pre-packaged power chip 120 can be directly contacted to the corresponding circuit in the first circuit layer 112, or indirectly connected through a connection layer, without the need for wire bonding. The second pre-packaged power chip 130 is similar and will not be discussed further.

[0055] like Figure 6As shown, the drain and source of the first pre-packaged power chip 120 are located on opposite sides, while the source, gate, and Kelvin source are located on the same side. Figure 7 As shown, the drain and source of the second pre-packaged power chip 130 are located on opposite sides, with the drain, gate, and Kelvin source being the gate and source, respectively. In one embodiment, the method for fabricating the first pre-packaged power chip 120 includes: packaging at least one bare power chip on a redistribution substrate using a chip embedded panel-level package (CIP) process, and / or the method for fabricating the second pre-packaged power chip 130 includes: packaging at least one bare power chip on a redistribution substrate using an embedded panel-level package (CIP) process. Further details regarding the pre-packaged chips can be found above and will not be elaborated upon here.

[0056] refer to Figure 5 and Figure 8 In step S230, the AC terminal 140 is bonded to the drain of the first pre-packaged power chip 120 and the source of the second pre-packaged power chip 130 to form an electrical connection with the drain and source. In one embodiment, the method of bonding the AC terminal 140 to the drain of the first pre-packaged power chip 120 and the source of the second pre-packaged power chip 130 includes using a sintering process or a soldering process to bond the same side of the AC terminal 140 to the drain of the first pre-packaged power chip 120 and the source of the second pre-packaged power chip 130. In the sintering and soldering processes, the AC terminal 140 can be directly contacted to the drain of the first pre-packaged power chip 120 and the source of the second pre-packaged power chip 130, or indirectly connected through a connection layer, without the need for a wire bonding process.

[0057] refer to Figures 1 to 3 In step S240, the substrate 110, the first pre-packaged power chip 120, the second pre-packaged power chip 130, and the AC terminal 140 are encapsulated. When the power module includes a DC negative terminal 161 and a DC positive terminal 162, the DC negative terminal 161 and the DC positive terminal 162 can be encapsulated.

[0058] For further details regarding the fabrication method of this application, please refer to the preceding description of the power module; these details will not be elaborated upon here.

[0059] This application uses specific terms to describe embodiments of the application. Terms such as "an embodiment," "one embodiment," and / or "some embodiments" refer to a particular feature, structure, or characteristic associated with at least one embodiment of the application. Therefore, it should be emphasized and noted that references to "an embodiment," "one embodiment," or "an alternative embodiment" in different locations throughout this specification do not necessarily refer to the same embodiment. Furthermore, certain features, structures, or characteristics in one or more embodiments of the application can be appropriately combined.

[0060] It should be noted that, in order to simplify the description of the present application and thus aid in the understanding of one or more embodiments of the invention, the foregoing description of the embodiments of the present application sometimes combines multiple features into a single embodiment, drawing, or description thereof. However, this disclosure method does not imply that the subject matter of the application requires more features than those mentioned. In fact, the embodiments contain fewer features than all the features of the single embodiments disclosed above.

[0061] In some embodiments, numbers describing the quantity of components and attributes are used. It should be understood that such numbers used to describe embodiments are sometimes modified by the terms "approximately," "approximately," or "generally." Unless otherwise stated, "approximately," "approximately," or "generally" indicates that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in this application are approximate values, which may be changed depending on the characteristics required by individual embodiments. In some embodiments, numerical parameters should take into account specified significant digits and employ a general method of digit reservation. Although the numerical ranges and parameters used to confirm their breadth of range in some embodiments of this application are approximate values, in specific embodiments, such values ​​are set as precisely as feasible.

Claims

1. A power module, characterized by Comprising: a substrate (110) having a first circuit layer (112) and a second circuit layer (113) side by side on an insulating layer (111); a first pre-packaged power chip (120) on the substrate (110) having a source and a signal on the same side and a drain on the other side opposite to the source, the source and the signal of the first pre-packaged power chip (120) facing and adhering to the first circuit layer (112) to form an electrical connection; a second pre-packaged power chip (130) on the substrate (110) having a drain and a signal on the same side and a source on the other side opposite to the drain, the drain and the signal of the second pre-packaged power chip (130) facing and adhering to the second circuit layer (113) to form an electrical connection; an AC terminal (140) adhering to the drain of the first pre-packaged power chip (120) and the source of the second pre-packaged power chip (130) to form an electrical connection; and a plastic encapsulation housing (150). The substrate (110) has a heat dissipation layer (114) on the other side of the insulating layer (111) opposite to the first circuit layer (112) and the second circuit layer (113).

2. The power module of claim 1, wherein, The first pre-packaged power chip (120) comprises a re-wiring substrate and at least one bare power chip encapsulated on the re-wiring substrate, and / or the second pre-packaged power chip (130) comprises a re-wiring substrate and at least one bare power chip encapsulated on the re-wiring substrate.

3. The power module of claim 1, wherein, The signal and the source of the first pre-packaged power chip (120) adhere to the first circuit layer (112) through direct contact or a connecting layer, and / or the signal and the drain of the second pre-packaged power chip (130) adhere to the second circuit layer (113) through direct contact or a connecting layer.

4. The power module of claim 1, wherein, The AC terminal (140) is in a strip shape, and the drain of the first pre-packaged power chip (120) and the source of the second pre-packaged power chip (130) adhere to the same side of the strip-shaped AC terminal (140).

5. The power module of claim 1, wherein, The AC terminal (140) adheres to the drain of the first pre-packaged power chip (120) through direct contact or a connecting layer, and adheres to the source of the second pre-packaged power chip (130) through direct contact or a connecting layer.

6. The power module of claim 1 or 5, wherein, A DC negative terminal (161) of the power module adheres to the first circuit layer (112) through direct contact or a connecting layer to form an electrical connection, and / or a DC positive terminal (162) of the power module adheres to the second circuit layer (113) through direct contact or a connecting layer to form an electrical connection.

7. The power module of claim 1, wherein, Further comprising:

8. The power module of claim 1, wherein, ​ A first conductive pillar (181), a second conductive pillar (182) and a fifth conductive pillar (185) are respectively electrically connected with corresponding circuits in the second circuit layer (113), and a third conductive pillar (183) and a fourth conductive pillar (184) are respectively electrically connected with corresponding circuits in the first circuit layer (112).

9. The power module of claim 1, wherein, The thickness of the power module is 2mm-3mm.

10. A method of manufacturing a power module, characterized by, The method comprises: providing a substrate (110) having a first circuit layer (112) and a second circuit layer (113) arranged side by side on an insulating layer (111); attaching the source and signal electrodes on the same surface of the first pre-packaged power chip (120) to the first circuit layer (112) to form an electrical connection, and attaching the drain and signal electrodes on the same surface of the second pre-packaged power chip (130) to the second circuit layer (113) to form an electrical connection, wherein the drain and source electrodes of the first pre-packaged power chip (120) are on opposite surfaces, and the drain and source electrodes of the second pre-packaged power chip (130) are on opposite surfaces; attaching the AC terminal (140) to the drain of the first pre-packaged power chip (120) and the source of the second pre-packaged power chip (130) to form an electrical connection; and attaching the AC terminal (140) to the drain of the first pre-packaged power chip (120) and the source of the second pre-packaged power chip (130) to form an electrical connection; and encapsulating the substrate (110), the first pre-packaged power chip (120), the second pre-packaged power chip (130) and the AC terminal (140).

11. The method of producing a power module according to claim 10, wherein The method for preparing the first pre-packaged power chip (120) comprises: packaging at least one bare power chip on a re-routed substrate using an embedded panel-level packaging process; and / or the method for preparing the second pre-packaged power chip (130) comprises: packaging at least one bare power chip on a re-routed substrate using an embedded panel-level packaging process.

12. The method of producing a power module according to claim 10, wherein The method for attaching the signal and source electrodes of the first pre-packaged power chip (120) to the first circuit layer (112) comprises: attaching the signal and source electrodes of the first pre-packaged power chip (120) to the first circuit layer (112) using a sintering process or a welding process, and / or the method for attaching the signal and drain electrodes of the second pre-packaged power chip (130) to the second circuit layer (113) comprises: attaching the signal and drain electrodes of the second pre-packaged power chip (130) to the second circuit layer (113) using a sintering process or a welding process.

13. The method of producing a power module according to claim 10, wherein The method for attaching the AC terminal (140) to the drain of the first pre-packaged power chip (120) and the source of the second pre-packaged power chip (130) comprises: attaching the same surface of the AC terminal (140) to the drain of the first pre-packaged power chip (120) and the source of the second pre-packaged power chip (130) using a sintering process or a welding process.

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