Passenger plane closestool control system and passenger plane closestool controller based on FPGA

Abstract

The invention discloses a passenger plane closestool control system and a passenger plane closestool controller based on an FPGA, and relates to the field of controller design, a control module is used for performing timing based on a low-frequency timing signal under the condition of high and low levels of a microswitch signal controlled by a valve plate of a flushing valve of a passenger plane closestool after a starting signal is received, jumping of different states in a timing period is controlled; aiming at any state, generating an opening rotation signal and a closing rotation signal; when the opening rotation signal is high level, the first relay is controlled to be switched on, and the direct-current motor is controlled to rotate to open the flushing valve plate; when the closing rotation signal is high level, the second relay is controlled to be switched on, and the direct-current motor is controlled to rotate to close the flushing valve plate; the different states at least comprise standby, starting, correct opening, wrong opening, closing, correct closing, wrong closing, troubleshooting and non-opening and non-closing. The intelligent anti-blocking capability of the passenger plane closestool can be improved.

Description

Technical Field

[0001] This application relates to the field of controller design, and in particular to a passenger aircraft toilet control system and an FPGA-based passenger aircraft toilet controller. Background Technology

[0002] The toilet on an aircraft is an important component of the aircraft's water system. Flushing is primarily accomplished by a controller and a flush valve. The principle of the flush valve is as follows: Figure 1 As shown (since this is existing technology, the structure will not be discussed in detail here), it consists of a DC motor (210), gears (120, 130), a micro switch (135), a housing (45, 90), a valve plate (60), etc., with the cam integrated on the gear (120). The controller's appearance is as follows. Figure 2 As shown (due to existing technology, the structure will not be discussed in detail here), it contains a logic control circuit and a relay. When the passenger presses the flush switch on the controller, the motor drives the valve plate to rotate, and the vacuum generator connected to the flush valve generates negative pressure to suck out the waste in the toilet. After a while, the motor drives the valve plate to reset, waiting for the next flush.

[0003] The quality of the controller design directly affects the lifespan of the flush valve and, more importantly, the normal operation of the flight. A toilet malfunction during flight can force the aircraft to return to its origin. Existing controllers only consider valve opening errors (blockage caused by foreign objects during valve opening) and closing errors (blockage caused by foreign objects during valve closing), neglecting the error of being neither open nor closed (the valve remains neither open nor closed due to blockage). In such cases, the motor is in an overloaded stalled state upon startup, with a large current continuously flowing through the coils and commutator. While the temperature rise may not be enough to trigger the thermal fuse to prevent motor burnout, it can cause the commutator to burn out. Furthermore, high-energy particles in the atmosphere during flight can penetrate the fuselage skin and impact the avionics system's control circuits and memory chips, causing both soft and hard errors, leading to electronic equipment malfunctions, data loss, and other safety hazards. Summary of the Invention

[0004] The purpose of this application is to provide a passenger aircraft toilet control system and an FPGA-based passenger aircraft toilet controller, which can improve the intelligent anti-clogging capability of passenger aircraft toilets.

[0005] To achieve the above objectives, this application provides the following solution: In a first aspect, this application provides a passenger aircraft toilet control system, comprising: The frequency divider module is used to: acquire a high-frequency clock signal; divide the high-frequency clock signal to obtain a low-frequency timing signal; and send the low-frequency timing signal to the control module. The de-jitter module is used to: collect the flushing signal of the passenger aircraft toilet; eliminate the jitter in the flushing signal and convert it into a start signal; and send the start signal to the control module. The control module is used to: acquire the micro-switch signal controlling the flush valve plate of the passenger toilet; after receiving the start signal, based on the high and low levels of the micro-switch signal and the low-frequency timing signal, perform timing and control the transition of different states within a timing cycle; for any state, generate an open rotation signal and a close rotation signal; when the open rotation signal is high, control the first relay to turn on, so as to control the DC motor to rotate and open the flush valve plate of the passenger toilet; when the close rotation signal is high, control the second relay to turn on, so as to control the DC motor to rotate and close the flush valve plate of the passenger toilet; the different states include at least standby, start, open correctly, open incorrectly, closed, closed correctly, closed incorrectly, troubleshooting, and neither open nor closed.

[0006] Secondly, this application provides an FPGA-based passenger aircraft toilet controller, which is electrically connected to a flush valve. The flush valve includes at least a DC motor and a flush valve plate. The passenger aircraft toilet controller includes: a voltage regulator chip, a crystal oscillator, a first relay, a second relay, a first micro switch, a second micro switch, an FPGA chip, a flush button, and a fault indicator light. The voltage regulator chip is used to transform the input power supply to obtain a constant voltage and provide power. The crystal oscillator is used to provide a high-frequency clock signal, which is sent to the FPGA chip; the flush button is used to provide a flush signal for the passenger plane toilet, which is sent to the FPGA chip. The first relay, the second relay, the first micro switch, and the second micro switch are all electrically connected to the FPGA chip; the FPGA chip internally uses the modular design of the passenger aircraft toilet control system according to any one of claims 1-7; The first relay and the second relay are used to control the on / off state of the FPGA chip based on the on rotation signal and the off rotation signal. The first relay and the second relay correspond to the forward and reverse rotation of the DC motor, respectively, so as to change the opening and closing of the flush valve plate. The first micro switch and the second micro switch are used to collect the micro switch signals of the flush valve plate of the toilet of the passenger aircraft, which correspond to the closed signal and the open signal, respectively; The fault indicator light is used to illuminate as a warning when a high-level trouble signal is received.

[0007] According to the specific embodiments provided in this application, the following technical effects are disclosed: This application collects the microswitch signal controlled by the flush valve plate of the passenger aircraft toilet. After receiving the start signal, it uses the high and low levels of the microswitch signal as conditions and performs timing based on a low-frequency timing signal to automatically control the transition between different states within a timing cycle. For any state, it generates an open rotation signal and a close rotation signal, thereby controlling the automatic adjustment of states such as standby, start, open correctly, open incorrectly, closed, closed correctly, closed incorrectly, troubleshooting, and neither open nor closed. This application comprehensively considers various situations and solves corresponding problems encountered in use, thereby improving the anti-clogging ability. At the same time, the controller chip uses a radiation-resistant FPGA. Compared with microcontrollers such as ARM (Advanced RISC Machine) and DSP (Digital Signal Processing), the FPGA chip has stronger radiation resistance and better stability, which can better ensure the stable operation and anti-clogging ability of the passenger aircraft toilet. Attached Figure Description

[0008] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0009] Figure 1 This is a schematic diagram of a flush valve.

[0010] Figure 2 This is a schematic diagram of the controller.

[0011] Figure 3 This is a schematic diagram of the modules of the passenger aircraft toilet control system in one embodiment of this application.

[0012] Figure 4 This is a simulation waveform diagram of the button debouncing module.

[0013] Figure 5 This is a state transition diagram.

[0014] Figure 6 This is a schematic diagram of an FPGA-based toilet controller for passenger aircraft.

[0015] Figure 7 This is a simulation overall diagram.

[0016] Figure 8 This is a state machine transition diagram.

[0017] Figure 9 This is a schematic diagram of the simulation waveform for opening an error.

[0018] Figure 10 A schematic diagram of the simulation waveform for correct opening and closing.

[0019] Figure 11 This is a schematic diagram of a non-on / non-off error simulation waveform. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0021] To make the objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0022] In one exemplary embodiment, a passenger aircraft toilet control system is provided, which is implemented by an FPGA. FPGA stands for Field Programmable Gate Array, internally composed of basic elements such as logic elements (LEs), random access memory (RAM), and phase-locked loops (PLLs). Various functional circuits can be formed by downloading programming files. Because it manipulates signals at the clock level to construct logic circuits, compared to traditional processors, it offers extremely high flexibility and powerful parallel capabilities in system design. Careful design allows the circuit structure to precisely match requirements without consuming excessive logic resources. Two widely used HDLs (hardware description languages) for FPGA programming are Verilog HDL and HDL, both of which have system modeling and combinational and timing circuit simulation capabilities. This application uses Verilog HDL for circuit design, with Quartus II 11.0 (64-Bit) as the programming environment and Modelsim SE-64 10.0c for functional simulation. The internal functions of the FPGA are designed modularly. The block diagram after synthesis in Quartus II 11.0 (64-Bit) is shown below. Figure 3 As shown, it consists of a frequency division module, a debouncing module, and a control module.

[0023] Frequency divider module (corresponding) Figure 6The divider module (in the code) is used for: acquiring a high-frequency clock signal (clk); dividing the high-frequency clock signal to obtain a low-frequency timing signal (sys_clk); and sending the low-frequency timing signal to the control module (corresponding to...). Figure 6 The key module's sys_clk input is used. Specifically, this application uses a 50MHz crystal oscillator. Since the flush valve's time accuracy is not high, 0.1S is used as the counting unit, which can be obtained by dividing the 50MHz clock by 2500000. In a practical application of this application, a counter is designed to count from 0 to 5000000 / 2-1, then the output divided clock is toggled, the counter is cleared, and the cycle is repeated.

[0024] De-jitter module (corresponding) Figure 6 The debounce module in the control module is used to: collect the flush signal (push) of the passenger aircraft toilet; eliminate the jitter of the flush signal and convert it into a start signal; and send the start signal to the start input terminal of the control module.

[0025] Manually pressing the controller's start button produces a waveform with glitches, leading to unstable signal levels. Direct acquisition of this signal can cause false triggers. Therefore, it's necessary to eliminate jitter to achieve effective signal acquisition. In this application, the debouncing module eliminates jitter based on the duration of the flushing signal. The debouncing principle involves detecting the hold time of the button signal (e.g., 23ms). For example, a clock with a 1ms period is generated using the aforementioned frequency division method. Timing begins after a falling edge is detected. If a rising edge is detected during the timing period, the timer resets to zero. Only when no rising edge appears within the set hold time is the button considered stably pressed. The simulated waveform is shown below. Figure 4 As shown, pushes pressed within a time interval of less than 23ms did not cause the start to go high; pushes only went high once after the time interval was greater than 23ms.

[0026] The control module (corresponding to) Figure 6 The key module is used to: acquire the micro-switch signal controlling the flush valve plate of the toilet; after receiving the start signal, based on the high and low levels of the micro-switch signal, perform timing based on the low-frequency timing signal, and control the transition of different states within a timing cycle; for any state, generate an open rotation signal and a close rotation signal; when the open rotation signal is high, control the first relay to turn on, so as to control the DC motor to rotate and open the flush valve plate of the toilet; when the close rotation signal is high, control the second relay to turn on, so as to control the DC motor to rotate and close the flush valve plate of the toilet.

[0027] The microswitch signals controlled by the flush valve plate of the passenger aircraft toilet include: a closed signal from the first microswitch (corresponding to the correct closed state) and an open signal from the second microswitch (corresponding to the correct open state); the first microswitch and the second microswitch are used to sense the position of the flush valve plate of the passenger aircraft toilet; when the closed signal is high, it indicates that the flush valve plate of the passenger aircraft toilet is correctly closed and in the fully closed position; when the open signal is high, it indicates that the flush valve plate of the passenger aircraft toilet is correctly open and in the fully open position.

[0028] The different states include at least standby, startup, on-correct, on-error, off, off-correct, off-error, and neither on nor off, as well as troubleshooting. These nine states are represented using a more stable 9-bit one-hot code, as shown in Table 1.

[0029] Table 1

[0030] The transition process of the 9 states is as follows Figure 5 As shown, this is the basis for state machine programming. After programming, the netlist file obtained by Quartus II 11.0 (64-bit) synthesis is downloaded to the FPGA chip to generate the corresponding logic circuit, thus realizing the corresponding logic function. The state machine (FSM) mentioned here is a commonly used method in FPGA design to handle events with sequential relationships. Since the opening and closing of the flush valve plate controlled by the DC motor has a certain sequential relationship, a Mealy-type state machine (the output is related to the input and the current state) is used to implement this control.

[0031] Each state is determined by timing; in the control module, the transition process between different states within a timing cycle includes: Initially, it is in standby mode; specifically, the control system performs a self-test upon power-up, and enters standby mode after the self-test passes.

[0032] After receiving the start signal (i.e., pressing the start button in the standby state), and when the stop signal (the signal from the first micro switch in the off position) is high, the system enters the start state from the standby state. At this time, a high-level start rotation signal is generated to control the DC motor to rotate and open the flush valve of the passenger aircraft toilet.

[0033] After the flush valve plate is rotated open for a first preset duration (e.g., 0.7-0.9 seconds), the flush valve plate of the passenger toilet is correctly opened (i.e., the flush valve plate is fully open). At this time, the opening signal (a signal from the second micro switch in the open position) is high (because the cam linked to the flush valve plate will press down the second micro switch, so the second micro switch outputs a high level), and the system transitions from the standby state to the correctly opened state. At the same time, the opening rotation signal becomes low (at this time, since the flush valve plate is fully open, the controller can shut off the motor circuit). After the correctly opened state is maintained for a second preset duration (e.g., 4.2 seconds), a high-level closing rotation signal is generated to control the DC motor to rotate and close the flush valve plate of the passenger toilet, transitioning the system from the correctly opened state to the closed state.

[0034] After rotating open for a first preset time, if the flush valve of the passenger toilet does not open correctly (i.e., no high level is output after 0.9 seconds, indicating that the flush valve is blocked by foreign objects during the opening process and cannot be fully opened), the opening signal is low, and the system enters the open error state from the standby state, generating a high-level closing rotation signal to control the DC motor to rotate and close the flush valve of the passenger toilet. If it closes after 0.7-0.9 seconds, the system enters the closed state from the open error state.

[0035] If the toilet flush valve fails to close properly after a third preset time (e.g., more than 1 second) following an incorrect opening state, the closing signal will be low, and the system will transition from the incorrect opening state to the troubleshooting state.

[0036] After the rotary closure lasts for a third preset duration (e.g., the flush valve plate driven by the DC motor closes after 0.7S-0.9S), the flush valve plate of the passenger aircraft toilet is correctly closed (at this time, the cam linked to the flush valve plate will press down the first micro switch). At this time, the closing signal is high level, and the system transitions from the closed state to the correctly closed state. After the correctly closed state lasts for a fourth preset duration, the system transitions from the correctly closed state to the standby state.

[0037] After the rotation is closed for a third preset time, the flush valve plate of the passenger aircraft toilet does not close properly (i.e., no high level is output after 0.9 seconds, indicating that the flush valve plate is blocked by foreign objects during the closing process and cannot be fully closed). At this time, the closing signal is low level, and the system enters the closing error state from the closed state. The closing error state automatically enters the troubleshooting state.

[0038] Upon receiving the start signal, and with both the stop and start signals at low levels, it indicates that the flush valve plate is blocked, and the system transitions from standby to a non-open / non-closed state. At this point, power supply to the DC motor should be stopped. After remaining in the non-open / non-closed state for a fifth preset duration (e.g., 5 seconds), the system will transition to a troubleshooting state.

[0039] After the troubleshooting state continues for a preset duration (e.g., 10 seconds), it transitions from the troubleshooting state to the standby state.

[0040] In short, this application uses the high and low levels of the first and second microswitches as conditions, and a time counter with a period of 15 seconds and a unit of 0.1 seconds as the timing basis to control the transition of the above nine states. The opening and closing times of the flush valve plate are not precise, and interval timing is used for judgment. Only when the correct delay of 4.2 seconds is used for precise timing is a counter.

[0041] In practical applications, the control module is also used to: generate a trouble signal to alert to the fault when entering the troubleshooting state; and collect a reset signal to reset the module.

[0042] Based on the same inventive concept, this application also provides an FPGA-based toilet controller for passenger aircraft. The solution provided by this controller is similar to the solution described in the above system. Therefore, the specific limitations of one or more controller embodiments provided below can be found in the system limitations above, and will not be repeated here.

[0043] In one exemplary embodiment, such as Figure 6 As shown, an FPGA-based passenger aircraft toilet controller is provided, which is electrically connected to a flush valve. The flush valve includes at least a DC motor and a flush valve plate. The passenger aircraft toilet controller includes: a voltage regulator chip, a crystal oscillator, a first relay, a second relay, a first micro switch, a second micro switch, an FPGA chip, a flush button, and a fault indicator light.

[0044] The voltage regulator chip is used to transform the input power supply to obtain a constant voltage for power supply; the input power supply is a 28V DC power supply provided by the aircraft transformer; the voltage regulator chip is an LM7805 voltage regulator chip. The 28V power supply directly drives the motor without transformation, while the LM7805 reduces the 28V to 5V to power other electrical equipment besides the motor.

[0045] The crystal oscillator is used to provide a high-frequency clock signal, which is sent to the FPGA chip; wherein, the crystal oscillator is a 50MHz crystal oscillator (providing the clock clk). The flush button is used to provide a flush signal for the aircraft toilet, which is sent to the FPGA chip. The first relay, the second relay, the first microswitch, and the second microswitch are all electrically connected to the FPGA chip; the FPGA chip internally uses the modular design of the aforementioned aircraft toilet control system.

[0046] The first and second relays are used to control the on / off state of the flush valve based on the on / off rotation signal output by the FPGA chip. The first and second relays correspond to the forward and reverse rotation of the DC motor, respectively, to change the opening and closing of the flush valve plate. The first and second microswitches are used to collect the microswitch signal of the flush valve plate of the passenger aircraft toilet, respectively corresponding to the off signal and the on signal.

[0047] During application, the FPGA chip controls the on and off of two relays by opening and closing rotation signals (open_rotation and close_rotation). The on of the two relays corresponds to the forward and reverse rotation of the DC motor, and also to the opening and closing of the flush valve plate (tested to take 0.7-0.9 seconds for opening and closing, and the preset duration of the corresponding state transition is set accordingly). The rotation of the DC motor also drives the cam connected to the motor shaft to rotate, controlling the on and off of two microswitches. The on of the two microswitches serves as signals for the FPGA chip to sense when the valve plate is fully open and fully closed.

[0048] In practical applications, the passenger aircraft toilet controller also includes a fault indicator light and a reset button; the fault indicator light is used to illuminate and warn when a high-level trouble signal is received.

[0049] Figure 6The demonstration shows the initial state: the cam presses down the first microswitch, outputting a 5V high-level signal, which is provided to the FPGA chip as the valve plate closing signal (close_signal). When a passenger presses the flush button (push), the FPGA chip determines that the flush valve plate is in the closed state, knowing that the valve plate was properly closed last time. Therefore, it pulls the open rotation signal (open_rotation) high, activating the first relay. The DC motor drives the flush valve plate to open, and the cam rotates accordingly. The first microswitch opens, and the closing signal (close_signal) goes low. After 0.9 seconds, the second microswitch should activate, outputting a high-level open signal (open_signal) to the FPGA chip. The FPGA chip determines that the flush valve plate has rotated to the correct position, pulls the open rotation signal (open_rotation) low, the first relay disconnects, and the DC motor stops receiving power, preventing overcurrent in the DC motor.

[0050] After the flush valve plate is in the open state for 4.2 seconds, the close rotation signal (close_rotation) is pulled high, activating the second relay. The DC motor drives the flush valve plate to close, and the cam rotates accordingly. The second microswitch opens, and the close signal (open_signal) goes low. After 0.9 seconds, the first microswitch should activate, outputting a high-level close signal (close_signal) to the FPGA chip. The FPGA chip determines that the flush valve plate is fully closed, pulls the close rotation signal (close_rotation) low, the second relay opens, and the DC motor stops receiving power, preventing overcurrent. This completes one normal working cycle.

[0051] Furthermore, this application ensures that pressing the flush button within 15 seconds of the passenger pressing it is ineffective. If the flush valve plate encounters a foreign object during its opening process and becomes blocked, the system switches to closing the flush valve plate. If it closes normally, the foreign object is expelled, and the system returns to normal. If it cannot close, a fault alarm signal is issued, and the fault indicator light illuminates. If the flush valve plate opens normally but encounters a foreign object during its closing process and becomes blocked, a fault alarm signal is issued, and the fault indicator light illuminates. If the FPGA does not detect a high level for the close signal (close_signal) and open signal (open_signal) upon system power-up, it indicates that the system was previously blocked and the fault has not been resolved; in this case, a fault alarm signal is issued directly, and the fault indicator light illuminates.

[0052] In practical applications, a first capacitor C1 can also be set as needed.

[0053] In another practical application, the FPGA chip implements multiple state transition processes, including at least the following three state chain processes: (i) standby-start-on correct-off-off correct-standby; (ii) standby-start-on error-troubleshooting-standby; (iii) standby-start-neither on nor off-troubleshooting-standby.

[0054] To verify the feasibility and beneficial effects of this application, functional simulations were performed using Modelsim SE-64 10.0c based on the three state chain processes described above. The overall results of the three simulations are as follows: Figure 7 As shown, by Figure 7 It can be seen that the start signal was raised three times, indicating that three simulated flushes were performed. In (a) the trouble signal was not raised, while in (b) and (c) the trouble signal was raised, indicating that an alarm signal was generated. Figure 7 The signals on the left side, from top to bottom, are explained as follows: The 0.1S low-frequency timer `sys_clk` tracks the operation time and state transitions of the flush valve. The reset signal `sys_clk_n` resets the FPGA chip when low. The start signal simulates a passenger pressing the flush button (`push`). The open signal `open_signal` (high level) indicates the flush valve is correctly open and in the open position. The close signal `open_signal` (high level) indicates the flush valve is correctly closed and in the closed position. A high output of `open_rotation` activates the first relay, controlling the motor to rotate and open the flush valve. A high output of `close_rotation` activates the second relay, controlling the motor to rotate and close the flush valve. `counter_15s` is a 15-second counter, counting from 0 to 149 in 0.1-second increments. `period_15s` is pulled high for a 15-second period, masking the start signal during this period. `state` is a 9-bit binary state variable. `open_wait` is a register variable that starts timing correctly from the open position, and the countdown reaches 4.2 seconds as the condition for entering the closed state. When the trouble state machine enters the troubleshooting state, it is pulled high and connected to the fault indicator light as an output signal to remind the crew to troubleshoot.

[0055] The state machine transition diagram obtained from program synthesis in Quartus II 11.0 (64-Bit) is as follows: Figure 8 As shown, with Figure 5 The design is consistent.

[0056] The simulation process of opening an error jump is as follows: Figure 9As shown, after the open rotation (open_rotation) lasts for 1 second, the open signal (open_signal) does not go high, indicating that the flush valve plate encountered a foreign object during rotation, causing a blockage. The state jumps from start (000000010) to open error (000001000). Then, the open rotation (open_rotation) goes high, driving the flush valve plate to close. After 1 second, the close signal (close_signal) does not go high, indicating that the flush valve plate encountered a foreign object during rotation. The state jumps from open error (000001000) to troubleshoot (010000000).

[0057] The simulation process jumps to the correct opening and closing state as follows: Figure 10 As shown, after the flush valve plate is opened for 0.8 seconds, there is a 4.2-second delay. The timer counts to 50 and then the flush valve plate is closed. After 0.7 seconds, close_signal goes high, indicating that the flush valve plate is fully open and the status jumps from closed (000010000) to closed correctly (000100000).

[0058] The simulation process of non-on / non-off error jump is as follows: Figure 11 As shown. From Figure 11 As can be seen, when the FPGA chip is powered on and enters the "standby" (000000001) state, once it detects that both the first and second microswitches are at a low level, it indicates that the flush valve plate is in a non-open and non-closed state, and the motor is not powered. It immediately jumps to the "non-open and non-closed" (100000000) state, and the motor rotation signal is pulled low, so no power is supplied to the motor, thus avoiding damage to the motor.

[0059] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0060] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A passenger aircraft toilet control system, characterized in that, The application relates to a control system of a passenger airplane toilet, which comprises the following parts: a frequency division module, which is used for collecting a high-frequency clock signal, performing frequency division processing on the high-frequency clock signal to obtain a low-frequency timing signal, and sending the low-frequency timing signal to a control module; a dither elimination module, which is used for collecting a flushing signal of the passenger airplane toilet, eliminating dither of the flushing signal to convert the flushing signal into a starting signal, and sending the starting signal to the control module; the control module is used for collecting a microswitch signal of a flushing valve valve plate control of the passenger airplane toilet, performing timing based on the low-frequency timing signal under the condition of high and low levels of the microswitch signal after receiving the starting signal, controlling jump of different states in a timing period, generating an opening rotation signal and a closing rotation signal for any state, controlling a first relay to be connected when the opening rotation signal is at a high level to control a direct-current motor to rotate and open the flushing valve valve plate of the passenger airplane toilet, and controlling a second relay to be connected when the closing rotation signal is at a high level to control the direct-current motor to rotate and close the flushing valve valve plate of the passenger airplane toilet; and different states at least include standby, starting, opening correct, opening error, closing, closing correct, closing error, fault elimination and non-opening and non-closing.

2. The guest toilet control system of claim 1, wherein, The microswitch signal of the flushing valve valve plate control of the passenger airplane toilet comprises a closing signal from a first microswitch and an opening signal from a second microswitch. The first microswitch and the second microswitch are used for sensing a position of the flushing valve valve plate of the passenger airplane toilet; when the closing signal is at a high level, it indicates that the flushing valve valve plate of the passenger airplane toilet is correctly closed and is at a completely closed position; and when the opening signal is at a high level, it indicates that the flushing valve valve plate of the passenger airplane toilet is correctly opened and is at a completely opened position.

3. The guest toilet control system of claim 2, wherein, Each state is determined by timing; in the control module, the jump process of different states in a timing period comprises the following steps: initially being in a standby state; after receiving the starting signal and when the closing signal is at a high level, entering a starting state from the standby state, and generating a high-level opening rotation signal to control the direct-current motor to rotate and open the flushing valve valve plate of the passenger airplane toilet; after rotating and opening for a first preset time length, the flushing valve valve plate of the passenger airplane toilet is correctly opened, the opening signal is at a high level, the opening correct state is entered from the standby state, and the opening rotation signal becomes a low level; after the opening correct state lasts for a second preset time length, a high-level closing rotation signal is generated to control the direct-current motor to rotate and close the flushing valve valve plate of the passenger airplane toilet, and the closing state is entered from the opening correct state; after rotating and opening for a first preset time length, the flushing valve valve plate of the passenger airplane toilet is not correctly opened, the opening signal is at a low level, the opening error state is entered from the standby state, a high-level closing rotation signal is generated to control the direct-current motor to rotate and close the flushing valve valve plate of the passenger airplane toilet, and the closing state is entered from the opening error state; and after rotating and opening for a first preset time length, the flushing valve valve plate of the passenger airplane toilet is not correctly opened, the opening signal is at a low level, the opening error state is entered from the standby state, a high-level closing rotation signal is generated to control the direct-current motor to rotate and close the flushing valve valve plate of the passenger airplane toilet, and the closing state is entered from the opening error state. After the rotating closing lasts for the third preset time length, the flush valve plate of the guest toilet is correctly closed, at this time, the closing signal is high level, from the closed state to the correct closing state; after the correct closing state lasts for the fourth preset time length, from the correct closing state to the standby state; After the rotating closing lasts for the third preset time length, the flush valve plate of the guest toilet is not correctly closed, at this time, the closing signal is low level, from the closed state to the incorrect closing state, After receiving the starting signal, and the closing signal and the opening signal are low level, from the standby state to the non-opening and non-closing state.

4. The guest toilet control system of claim 3, wherein, In the control module, the jump process of different states in a timing cycle further includes: After the rotating closing lasts for the third preset time length, the flush valve plate of the guest toilet is not correctly closed, at this time, the closing signal is low level, from the incorrect closing state to the troubleshooting state; After the non-opening and non-closing state lasts for the fifth preset time length, from the non-opening and non-closing state to the troubleshooting state; The incorrect closing state automatically enters the troubleshooting state; After the troubleshooting state lasts for the sixth preset time length, from the troubleshooting state to the standby state.

5. The guest toilet control system of claim 4, wherein, The control module is further used for generating a trouble signal to remind the fault when entering the troubleshooting state.

6. The guest toilet control system of claim 1, wherein, The duration of the flushing signal is used to realize the elimination of the jitter in the anti-jitter module.

7. The guest toilet control system of claim 1, wherein, The control module is further used for collecting a reset signal to realize the module reset.

8. A passenger aircraft toilet controller based on FPGA, electrically connected with a flush valve, the flush valve comprising at least a DC motor and a flush valve valve plate, characterized in that, The guest toilet controller includes a voltage stabilizing chip, a crystal oscillator, a first relay, a second relay, a first micro switch, a second micro switch, an FPGA chip, a flushing button and a fault indicator light; The voltage stabilizing chip is used for transforming the input power supply to obtain a constant voltage and supplying power; The crystal oscillator is used for providing a high-frequency clock signal and sending it to the FPGA chip; the flushing button is used for providing a flushing signal of the guest toilet and sending it to the FPGA chip; The first relay, the second relay, the first micro switch and the second micro switch are electrically connected with the FPGA chip; the FPGA chip internally uses the modular design of the guest toilet control system of any one of claims 1-7; The first relay and the second relay are used for controlling the on-off according to the opening rotating signal and the closing rotating signal output by the FPGA chip; the first relay and the second relay correspond to the forward rotation and the reverse rotation of the direct current motor respectively to change the opening and closing of the flush valve plate; The first micro switch and the second micro switch are used for collecting the micro switch signal of the flush valve plate of the guest toilet, and correspond to the closing signal and the opening signal respectively; The fault indicator light is used for emitting light to indicate the fault when receiving the high level trouble signal.

9. The FPGA-based guest toilet controller of claim 8, wherein, The FPGA chip realizes a plurality of state jump processes, and at least includes the following three state chain processes: Standby-starting-correct opening-closing-correct closing-standby; Standby-starting-incorrect opening-troubleshooting-standby; Standby-starting-non-opening and non-closing-troubleshooting-standby.

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