Thin film solar cell and corresponding manufacturing method
By introducing hole transport structures into thin-film solar cells, including a hole transport layer and a stabilizing layer made of P-type conductive material, the back surface recombination problem is solved, the manufacturing process is simplified, and the cell efficiency is improved.
Patent Information
- Application Number
- CN202480045878.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-07
- Filing Date
- 2024-07-05
- Publication Date
- 2026-02-17
AI Technical Summary
Existing thin-film solar cells suffer from electron-hole recombination losses during back-surface recombination, leading to decreased efficiency. Furthermore, conventional Ga gradient structures increase production costs and complexity.
The hole transport structure includes a hole transport layer of P-type conductive material and a stabilizing layer. The stabilizing layer contains metal oxides and/or metal nitrides to block the diffusion of the hole transport layer and maintain stability during high-temperature manufacturing.
It simplifies the manufacturing process, reduces the thickness of the absorber layer and production costs, while increasing the open-circuit voltage and short-circuit current density of solar cells, enhancing the fill factor, and improving the overall efficiency.
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Figure CN121549079A_ABST
Abstract
Description
Technical Field
[0001] This invention generally relates to the field of photovoltaic devices such as solar cells and solar panels, and more specifically to thin-film solar cells and methods for manufacturing the same. Background Technology
[0002] Solar cells are a class of energy devices that utilize renewable energy in the form of light, converted into useful electrical energy that can be used in a variety of applications. Thin-film solar cells are multilayer semiconductor structures formed by depositing various thin layers and films of semiconductors and other materials on a substrate. These solar cells can be fabricated into lightweight, flexible sheets, which take the form of multiple individual electrically interconnected cells. The lightweight and flexible properties give thin-film solar cells broad potential applicability as power sources for portable electronic devices, aerospace, and residential and commercial buildings, where they can be integrated into various architectural features such as roof tiles, facades, and skylights.
[0003] Thin-film solar cells, such as CIGS (copper indium gallium selenide) solar cells, typically include a back contact or electrode formed on a substrate and a top contact or electrode formed above and electrically connected to the back electrode. Compared to conventional Si solar cells, thin-film solar cells typically have a fully metallic back contact (or back electrode layer), which causes light loss of electrons due to electron-hole recombination (also known as back surface recombination).
[0004] In an effort to improve the efficiency of thin-film solar cells, attempts have been made to limit this recombination.
[0005] Document US 2015 / 380596 A discloses a method for producing thin-film CIGS solar cells that mitigates back-side recombination through a gallium composition gradient, which increases the conduction band edge energy toward the back contact. This gradient reduces back-side recombination by keeping minority carriers away from the back contact and can significantly reduce non-radiative losses in the open-circuit voltage. However, the bandgap gradient leads to various losses: (i) the minimum bandgap region that determines the absorption edge is quite thin, resulting in non-absorption losses in the short-circuit current; the gradual absorption begins to lead to radiative losses in the open-circuit voltage; and the region near the back contact with the highest gallium content has shown extremely low carrier lifetimes of less than 100 ps, which can be attributed to additional deep defects in the high-bandgap chalcopyrite. Furthermore, from a technical point of view, the need for a composition gradient makes the absorber layer unnecessarily thick, which increases production costs.
[0006] Document CN 112786713 A discloses a method for producing thin-film CIGS solar cells, which mitigates back-surface recombination by providing an additional layer between the back contact and the CIGS absorber layer. However, the additional layer is non-conductive and needs to be structured to transport holes, which complicates the manufacturing process and increases production costs.
[0007] The purpose of this invention
[0008] Therefore, there is a need for an improved design / manufacturing method for thin-film solar cells that does not exhibit the aforementioned drawbacks.
[0009] This objective is achieved by the thin-film solar cell according to claim 1. Summary of the Invention
[0010] According to the present invention, a method for manufacturing a thin-film solar cell includes the following steps: Provide substrate; A back electrode layer is formed on the substrate layer; A hole transport structure is formed on the back electrode layer; A semiconductor absorption layer is formed on the hole transport structure, the absorption layer comprising a chalcogenide material; The hole transport structure includes a hole transport layer with a p-type conductive material located on the back electrode layer and a stabilizing layer located on the hole transport layer, wherein the stabilizing layer comprises a metal oxide and / or a metal nitride.
[0011] In other words, the step of forming a hole transport structure on the back electrode includes forming a hole transport layer comprising a P-type conductive material on the back electrode layer, and (subsequently) forming a stabilizing layer on the hole transport layer. In this document, it is preferable to form the hole transport layer directly on the back electrode layer, and then form the stabilizing layer directly on the hole transport layer.
[0012] Preferably, at least one of the hole transport layer and the stabilizing layer is used, and more preferably both are continuous layers, meaning that they completely cover the underlying layer without any openings. This advantageously simplifies the manufacturing process and ensures good performance of the hole transport structure (e.g., in terms of fill factor and / or open-circuit voltage).
[0013] This invention relies on the use of a hole transport structure comprising: a hole transport layer that provides the desired hole selectivity at the back side; and a stabilizing layer arranged as a capping layer to block the diffusion of the hole transport layer during the fabrication of the absorber layer (typically requiring heating to 590°C for CIS / CGIS materials), and thus stabilizing (or deactivating) the latter. Initial tests have shown that this hole transport structure is thermally stable and compatible with thin-film fabrication techniques. The hole transport layer is thermally stable because it does not disappear (decompose) during heating. After fabrication of the absorber layer, the thin-film solar cell still comprises a bilayer hole transport structure (i.e., a hole transport layer and a stabilizing layer). It provides a stable hole transport layer with good transport characteristics and exhibits passivation comparable to that of a conventional Ga gradient, advantageously limiting electronic recombination at the interface with the back electrode layer. Furthermore, performance in terms of minority carrier and fill factor lifetimes indicates that a Ga gradient is not necessary for obtaining high-efficiency solar cells.
[0014] Avoiding the conventional Ga gradient structure simplifies the absorber layer deposition process because a homogeneous absorber layer can be formed, meaning that separate deposition of metal or metal selenides is not required during absorber layer fabrication. This reduces absorber layer deposition process time and allows for thinner absorber layers.
[0015] Any known method can be used to form the layers of hole transport structures and absorption layers, thus allowing for high versatility in production methods.
[0016] The resulting stack of layers is ready to be processed according to conventional techniques to form the top of a solar cell. Therefore, the method typically includes the following steps: - An electron transport layer is formed above the absorption layer; and - A top electrode layer is formed above the electron transport layer.
[0017] This invention therefore provides an improvement in the method for thin-film solar cells using chalcogenide materials as the absorber layer.
[0018] In this document, the term "chalcogenide" refers to materials from the group consisting of metal sulfides, selenides, and / or tellurides, i.e., materials containing one or more chalcogenide atoms (e.g., S, Se, or Te) bonded to one or more metal atoms and having a crystal structure similar to one of the following materials: Chalcopyrite, typically a compound according to the following chemical formula -(Ag x Cu 1-x (In) y Ga z Al 1-y-z(Se) k ,S l ,Te 1-k-l )2, where 0≤x≤1, 0≤k+l≤1, and 0≤y+z≤1; - Kesterite, typically CuZnSn(S) k ,Se 1-k );or - Orthorhombic crystals: typically (Sb x ,Bi 1-x )2(S y ,Se 1-y 3.
[0019] The following describes the possible compositions used for various layers when formed / deposited on the corresponding underlying layers.
[0020] In some implementations, the hole transport layer comprises or is composed of a p-type chalcogenide material.
[0021] Exemplary chalcogenide materials used to form hole transport layers include those selected from Cu(In,Ga)Se2, Cu(In,Ga)(Se,S)2, CuInSe2, CuGaSe2, CuInS2, Cu(In,Ga)S2, and Cu(In,Ga)S2. x Ag 1-x (Ga) y Al 1-y (S) z ,Se 1-z Materials containing CuGaSe2 or CuAlSe2, and mixtures thereof, particularly CuGaSe2 or CuAlSe2. This hole transport layer advantageously facilitates the efficient extraction and transport of holes from the absorber layer to the back electrode. High conduction band edge spikes prevent electron diffusion to the back electrode, which reduces electron-hole recombination, thereby increasing the open-circuit voltage (V) of the solar cell. oc ) and short-circuit current density (J sc It also features a low energy barrier for hole extraction, ensuring that holes can move more freely to the back electrode and enhancing the fill factor (FF). With improvements in all JV parameters, the overall efficiency of the solar cell will be improved.
[0022] The hole transport layer can have a thickness between 10 nm and 200 nm, particularly between 50 nm and 100 nm.
[0023] The stabilizing layer may further comprise, or consist of, stoichiometric or non-stoichiometric metal oxides and / or metal nitrides, or be composed of, stoichiometric or non-stoichiometric metal oxides and / or metal nitrides. The terms oxides and nitrides should be understood to include, for a given metal, one or more forms of oxides, which are nitrides.
[0024] In practice, the stabilizing layer can be an oxide or nitride layer of a single metal. Using an oxide / nitride of a single metal is easier to process. However, the stabilizing layer can also contain a mixture of oxides of different metals, a mixture of nitrides of different metals, or a mixture of one or more metal oxides and one or more metal nitrides respectively.
[0025] Preferred metals for oxides and nitrides include metals and half-metals, including but not limited to Si, Mo, Al, Ga, In, Ti, and Hf.
[0026] Therefore, the stabilizing layer can typically include compounds such as MNx, MOx and / or MNxOy, or be composed of compounds such as MNx, MOx and / or MNxOy, where M is selected from Si, Mo, Al, Ga, In, Ti and Hf, and x and y can be integers (stoichiometric compounds) or decimal values (non-stoichiometric).
[0027] In certain embodiments, the stabilizing layer may be formed as a metal sesquioxide or a metal dioxide, or a mixture thereof. For example, the material used for the stabilizing layer may be selected from the group consisting of Al2O3, Ga2O3, In2O3, TiO2, MoO2, and mixtures thereof.
[0028] In a particular implementation, InO is deposited on top of the CGSe layer. x Layers are used to form a hole transport structure.
[0029] The thickness of the stabilizing layer can be between 1 and 100 nm.
[0030] Preferably, the minimum conduction band size (CBM) of the stabilizing layer is greater than that of the absorbing layer. Therefore, there is a conduction band (CBM) offset between the stabilizing layer and the absorbing layer, preferably at least 0.3 eV.
[0031] In some implementations, the stabilization layer is deposited in direct contact with the hole transport layer. Alternatively, an intermediate layer, particularly a conductivity enhancement layer, can be formed between the stabilization layer and the hole transport layer.
[0032] The conductivity of the hole transport structure can be improved by doping at least one of the hole transport layer and the stabilizing layer. A suitable dopant is, for example, copper.
[0033] Therefore, a copper layer can be formed / arranged adjacent to a stabilizing layer. In particular, a copper layer can be formed between a hole transport layer and a stabilizing layer.
[0034] This copper layer can have a similar thickness to the stabilizing layer, i.e., between 1 and 100 nm. Specifically, a thickness between 20 nm and 50 nm will allow for similar passivation and hole transport effects, which means similar Vo. oc And FF. This makes the production process (method) robust, which ensures the stability and reproducibility of industrial production.
[0035] It can be noted that the high temperature applied during the deposition of the absorber layer will usually cause copper migration / diffusion, which can cause the thin copper layer to disappear completely.
[0036] The fact that at least a portion of the copper atoms from the intermediate copper layer migrate to the stabilizing layer results in copper doping of the stabilizing layer. The provision of a copper layer by the adjacent stabilizing layer, and the migration of copper into the stabilizing layer, are referred to herein as "copper annealing," and the resulting stabilizing layer comprises annealed copper, i.e., copper that migrates into the stabilizing layer during the annealing process. In other words, the stabilizing layer is an annealed layer containing copper.
[0037] However, preferably, an annealing step is performed on the layer stack (i.e., substrate / back electrode layer / hole transport layer / stabilizing layer / copper layer) with a copper layer on top, prior to the deposition of the absorber layer. Annealing is preferably performed at a temperature of 400 to 600°C, more preferably between 450 and 550°C, and especially about 500°C; typically under vacuum. The annealing duration can be between 5 and 30 minutes, particularly between 10 and 20 minutes. Those skilled in the art will adjust the annealing steps according to the thickness and composition of the stabilizing layer. This copper annealing step is considered beneficial for improving the conductivity of the stabilizing layer; it is also believed that copper diffusion into the stabilizing layer is promoted by the annealing step and thus begins during annealing.
[0038] In the case of a copper-annealed stabilizing layer, the copper concentration can be between 1 wt.% and 30 wt.%.
[0039] In the absence of a copper annealing step, where the hole transport layer contains copper, the copper concentration in the stabilizing layer can be less than 1 wt.%, possibly less than 0.1 wt.%.
[0040] The semiconductor absorber layer is a P-type chalcogenide material layer. If provided, it can be formed directly on the hole transport structure (i.e., on the stabilizing layer) or on the (intermediate) copper layer.
[0041] In embodiments, the p-type semiconductor chalcogenide materials used to form the absorption layer typically include, but are not limited to, CIGS compounds. Exemplary materials for the absorption layer are Cu(In,Ga)Se2, Ag(In,Ga)Se2, Cu(In,Al)Se2, Cu(In,Ga)(Se,S)2, CuInSe2, CuGaSe2, CuInS2, and Cu(In,Ga)S2, or other elements from groups II, III, or VI of the periodic table. In embodiments, the absorption layer comprises CuInSe2 and / or Cu(In,Ga)Se2 or is composed of CuInSe2 and / or Cu(In,Ga)Se2. Other suitable chalcogenide materials that can be used include, but are not limited to, Cu(In,Ga)(Se,S)2, CuGaSe2, CuInS2, Cu(In,Ga)Se2, and Cu(In,Ga)S2.
[0042] The absorber layer can have a thickness ranging from about 0.1 µm to about 3 µm.
[0043] It can be noted that the absorber layer can be formed as a uniform layer because a Ga gradient is not required due to the hole transport structure. Therefore, the absorber layer is advantageously free of Ga gradient. Consequently, the absorber layer can also be fabricated to have a smaller thickness, for example, less than 1 μm, i.e., forming a submicron CIGS solar cell.
[0044] Suitable conventional materials that can be used for the substrate layer include, but are not limited to, glass (including, for example, soda-lime glass), ceramics, metals (including, for example, sheets of stainless steel and aluminum), or flexible polymers (including, for example, polyamides, polyethylene terephthalate, polyethylene naphthalate, polymeric hydrocarbons, cellulose polymers, polycarbonates, polyethers, and others).
[0045] In some embodiments, the back electrode layer is a metal layer, such as a molybdenum layer or a transparent conductive oxide layer. Possible TCOs are ZnO, ZnO:Al, InOx:H, InOx:W; however, other suitable conductive metals and semiconductor materials that can be conventionally used in the art can be, for example, Al, Ag, Sn, Ti, Ni, stainless steel, or ZnTe.
[0046] The thickness of the back electrode layer can vary depending on the metal and the battery design; it can typically range from about 50 nm to 1 µm. For molybdenum layers, the thickness can range from 100 nm to 500 nm.
[0047] The upper structure of a solar cell can be conventionally designed, i.e., above the absorber layer (opposite to the hole transport structure). Typically, an electron transport layer (often called a buffer layer) and a top electrode layer are provided on the absorber layer. As is known, the layer disposed on top of the absorber layer is transparent. Other conventional layers can be disposed on or between these layers; for example, one or more window layers can be disposed between the electron transport layer and the top electrode layer.
[0048] In some embodiments, a sodium-containing layer may be formed between the hole transport layer and the stabilizing layer, for example, by thermal evaporation of a Na-containing compound or by evaporation from a solution containing a sodium salt. As is known in the art, sodium tends to have a positive effect on chalcogenide materials.
[0049] According to another aspect, the present invention provides a thin-film solar cell, comprising: substrate; The back electrode layer is located on the substrate; A hole transport structure located on the back electrode layer includes a hole transport layer containing a p-type conductive material. A semiconductor absorption layer is located on the back electrode layer, the absorption layer comprising a chalcogenide material; A window layer located on the semiconductor absorber layer; and The top electrode layer located on the window layer, The hole transport structure further includes a stabilizing layer on the hole transport layer, the stabilizing layer comprising a metal oxide and / or a metal nitride.
[0050] In this embodiment, the hole transport layer comprises materials selected from Cu(In,Ga)Se2, Cu(In,Ga)(Se,S)2, CuInSe2, CuGaSe2, CuInS2, Cu(In,Ga)S2, and (Cu x Ag 1-x (Ga) y Al 1-y (S) z ,Se 1-z )2 and their mixtures of materials.
[0051] The composition / features of these different layers of the method of the present invention have been disclosed above, and therefore, necessary modifications are applicable.
[0052] In this embodiment, the thin-film solar cell is manufactured using the method disclosed above, such that the hole transport layer is deposited during the manufacturing process of the thin-film solar cell in a manner that is not simply caused by interdiffusion between the back electrode layer and the absorber layer during the manufacturing process. Specifically, the hole transport layer of this hole transport structure differs from a layer obtained by selenization and / or sulfidation of the back electrode material. Most preferably, in embodiments where the back electrode is a metal layer, the hole transport layer does not consist of selenides and / or sulfides (doped or undoped) of the metal.
[0053] This means, however, that the composition of the hole transport layer may vary slightly during subsequent steps of the method of the present invention. In particular, some interdiffusion may occur between the two layers of the hole transport structure.
[0054] It should be noted that in this invention, unless explicitly stated that a particular layer is deposited directly on the underlying layer, it is possible that one or more intermediate layers may also exist between the mentioned layers. Therefore, "on" should be interpreted by default as "directly or indirectly on".
[0055] Furthermore, unless otherwise specified, the layer should not be assumed to be 100% pure. Of course, contaminants, other components, etc., may also be present, provided that the layer primarily retains the properties of the mentioned composition, such as by including at least 50% of the mentioned substances, or at least 70%, 80%, 90%, 95%, or 99%. Attached Figure Description
[0056] Referring to the accompanying drawings, other details and advantages of the invention will become apparent from the following detailed description of non-limiting embodiments, in which: Figure 1 This is a schematic diagram illustrating an embodiment of the solar cell of the present invention; Figure 2 A schematic diagram illustrating the manufacturing steps of a solar cell according to another embodiment of the present invention; Figure 3 SEM (scanning electron microscope) cross-sectional images of the thin-film solar cell of the first embodiment before and after the deposition of the absorber layer; Figure 4 These are graphs of the current density-voltage curves for Examples 1-3 and Comparative Example 1; Figure 5 This is a graph of the fill factor (FF) for the same embodiment; Figure 6 This shows the open-circuit voltage V for the same embodiment. OC A curve graph; Figure 7 This is a graph of EQE (external quantum efficiency) as a function of wavelength; Figure 8 This is a graph representing the band structure of Example 1, depicting a preferred conduction band shift greater than 0.3 eV and a valence band shift less than 0.2 eV between the HTL structure and the absorber layer; and Figure 9 Images of a battery as manufactured in Example 1 are shown, where (a) is a TEM view, (b) is a STEM view, and (c) through (h) show EDS mappings illustrating the positions of the various elements in the illustrative layer stack. Detailed Implementation
[0057] Figure 1 A first embodiment of the thin-film solar cell 10 of the present invention is shown. Generally, the solar cell 10 includes a substrate 12 supporting / carrying a photovoltaic (or PV) stack 30. The PV stack 30 sequentially includes: a back electrode layer 14, a hole transport layer 16, a stabilizing layer 18, an absorber layer 22, a buffer layer 24, and a window layer 26. Although not shown, a top electrode layer is typically disposed above the window layer.
[0058] The PV stack 30 is the core of the solar cell. Layers 16-26 constitute the functional layers of the solar cell, which require the implementation of selected solar cell technologies. The hole transport layer and stabilizing layer form the hole transport structure 20 at the back electrode.
[0059] Additional layers, such as a decorative layer and a possible protective layer (not shown) may be formed on top of the window layer (preferably below the top electrode layer).
[0060] The PV stack 30 is conventionally designed as a layer stack, wherein each material layer completely covers the underlying layer (but in embodiments, one or more layers may be arranged as patterned layers, particularly absorption layers). In other words, the back electrode layer is continuous over the area of the substrate support surface, and layers 16 to 26 are continuous over the same area of the back electrode layer 14, vertically stacked on top of another layer.
[0061] The focus of this invention is the hole transport structure at the interface with the back electrode, which will be discussed in detail.
[0062] The layers on the opposite side of the absorption layer can be of any suitable type, and therefore will not be discussed in detail.
[0063] substrate
[0064] The substrate is the substrate layer, which supports the different functional layers of the solar cell.
[0065] The substrate can be made of opaque or translucent materials, typically selected from glass (or quartz), metals (e.g., quartz, titanium, or steel), or polymers (e.g., PET, polystyrene, polyimide). It can take the form of rigid plates or blades, or flexible foils (e.g., thin polymer or metal foils), which have the advantage of flexibility.
[0066] Depending on the direction of light entering the cell, the thin-film solar cell of the present invention can be implemented as two structures, referred to as superstrate and substrate.
[0067] In a cladding cell, light enters the cell through a substrate on which the cell layer is deposited. However, in a substrate structure, light does not pass through the substrate but rather from the opposite side, i.e., from the window layer side. Therefore, for cladding cells, the supporting substrate must be reasonably translucent to allow sufficient light to enter the cell. While metal substrates can only be used in substrate structures due to their opacity, polymers can be used in both structures depending on their transparency.
[0068] The thin-film solar cell of the present invention can also be vertically combined with another solar cell of the same or different design.
[0069] As a final product, a solar panel or solar module comprises multiple adjacent solar cells arranged in the same plane.
[0070] Back electrode layer
[0071] The back electrode layer is typically a metal layer, such as a molybdenum layer, or a transparent conductive oxide layer, preferably an indium tin oxide layer or a zinc tin oxide layer. However, other suitable conductive metals and semiconductor materials conventionally used in the art, such as Al, Ag, Sn, Ti, Ni, stainless steel, or ZnTe, can be used.
[0072] The back electrode layer can be formed on the substrate layer by any conventional method commonly used in the art, including (but not limited to) sputtering, atomic layer deposition (ALD), chemical vapor deposition (CVD) or other techniques.
[0073] The back electrode can be a molybdenum layer with a thickness between 100 and 500 nm.
[0074] Hole transport structure
[0075] According to this disclosure, a hole transport structure is provided between the back electrode layer and the absorption layer, the hole transport structure including a hole transport layer located on the back electrode layer and a stabilizing layer located on the hole transport layer.
[0076] Hole transport layer
[0077] The hole transport layer is a hole selection layer comprising p-type conductive material, and... Figure 1 In some implementations, it is formed directly on the back electrode layer.
[0078] Specifically, the hole transport layer comprises or is composed of p-type chalcogenide materials. For example, the hole transport layer comprises or is composed of materials selected from the group consisting of: Cu(In,Ga)Se2, Cu(In,Ga)(Se,S)2, CuInSe2, CuGaSe2, CuInS2, Cu(In,Ga)S2, (Cu x Ag 1-x (Ga) y Al 1-y (S) z ,Se 1-z )2 and their mixtures.
[0079] To improve conductivity, the hole transport layer is preferably a Cu-rich layer. In particular, the Cu / Ga mass ratio is preferably greater than 1.
[0080] The thickness of HTL can range from 30nm to 200nm.
[0081] Stable layer
[0082] The stabilizing layer is formed on the hole transport layer. In this embodiment, the stabilizing layer is formed directly on the hole transport layer, but in other embodiments, one (or more) intermediate layers may be present.
[0083] The stabilizing layer acts as a barrier or passivation layer because it typically prevents atoms from the high-density ionization (HTL) from diffusing / migrating to the absorber layer during the fabrication of the solar cell. In practice, the stacked layers are heated to relatively high temperatures, typically around 590°C, during the deposition of the absorber layer.
[0084] A stabilizing layer is formed within the hole transport structure as a separate layer from the HTL and remains unchanged during subsequent cell fabrication steps. Initial tests have shown that the thickness of the hole transport structure remains substantially unchanged during the deposition of the absorber layer. This stabilizing layer is designed to inhibit diffusion and is therefore a functional part of the hole transport structure, thus allowing for the desired performance.
[0085] The stabilizing layer is a layer of metal oxide or metal nitride made of a material with p-type conductivity. Typically, the stabilizing layer is a p-type semiconductor material, which can be doped with copper through annealing to enhance conductivity.
[0086] The stabilizing layer preferably has a larger conduction band minimum (CBM) than the absorbing layer, preferably at least 0.3 eV larger than the absorbing layer material. For hole transport structures formed by CuGaSe2 and In2O3 on a CISe absorbing layer, the conduction band shift is, for example, as shown below. Figure 8 As shown in Example 1 below, the In2O3 layer has a conduction band minimum that is 0.3 eV higher than that of the CISe absorption layer, as shown in the detailed graph on the left.
[0087] Typically, the stabilizing layer consists of the same metal oxides, but combinations can be envisioned.
[0088] The stabilizing layer may consist of metal sesquioxides or metal dioxides. For example, the stabilizing layer may contain metal oxides selected from Al₂O₃, Ga₂O₃, In₂O₃, TiO₂, MoO₂, SnO₂, HfO₂, and mixtures thereof. Non-stoichiometric oxides of these metals are also possible.
[0089] The thickness of the stabilizing layer can range from 10 nm to 100 nm.
[0090] It should be noted that in practice, due to the high temperatures involved in the absorption layer deposition step, some interdiffusion can occur between the two layers 16 and 18 of the hole transport structure 20. That is, some atoms can move from the electron transport layer 16 to the stabilizing layer 18, and vice versa. However, the two layers maintain substantially the same thickness, and the stable passivation effect is achieved (see below).
[0091] For solar cells formed by depositing the following layers (corresponding to Example 1 below), for example in Figure 9 The above illustrates the migration between layers: Mo electrode; CuGaSe2 hole transport layer; In2O3 stabilizing layer and CuInSe2 absorber layer.
[0092] It can be observed that Ga tends to migrate upwards to the stabilizing layer, while In migrates downwards to the hole transport layer. However, oxygen remains in the stabilizing layer and Ga does not migrate to the absorption layer. Small amounts of copper can be found in the stabilizing layer, typically less than 1 wt.%.
[0093] In this context, the first results appear to show that the stabilizing layer allows Ga diffusion to be prevented, i.e., by combining with oxygen.
[0094] Therefore, although we have described the composition of layers 16 and 18 at the time of their deposition above, their composition can be altered during subsequent fabrication steps. Nevertheless, some atomic species can be observed to diffuse / migrate and remain within the hole transport structure 20.
[0095] Therefore, the composition of the hole transport structure 20 in the manufactured solar cell depends on the composition of the formed layers.
[0096] This means that, overall, the stabilizing layer in the manufactured battery contains compounds such as MN. x MO x and / or MN x O y M is a metal (however, different metals can exist), and x and y can be integers (stoichiometric compounds) or decimal values (non-stoichiometric). The metal is preferably one of Si, Al, Ga, In, Ti, and Hf. Oxides and nitrides of different metals can exist. Despite the diffusion effect, the hole transport layer is still a p-type chalcogenide.
[0097] Absorption layer
[0098] The absorption layer is a basic photovoltaic material that absorbs most of the sunlight from outside the cell (through adjacent layers). The absorption layer contains p-type chalcogenide materials configured to exhibit a photovoltaic effect, whereby the absorption of the incident light excites the charge carriers.
[0099] The chalcogenide materials of the absorber layer can typically have a band gap between 0.8 and 2.4 eV, particularly between 1 and 1.7 eV.
[0100] Any suitable absorber layer material can be used within the context of this invention. Exemplary materials for the absorber layer include chalcogenides such as CIGS-(Ag,Cu)(In,Ga)(S,Se)2 (copper indium gallium chalcogenide and its silver alloys), CdTe (cadmium telluride and its alloys), and stanzite such as (Ag,Cu)2Zn(Sn,Ge)(S,Se)4 (copper zinc tin sulfide and its alloys), and (Bi,Sb)2(S,Se)3 antimony chalcogenide and its alloys.
[0101] For CIS / CIGSe materials, the absorber layer can have a thickness between 50 and 3500 nm, typically between 2000 and 3500 nm, and in some embodiments between 100 and 500 nm.
[0102] The absorber layer can be deposited using common processes such as selenization and co-evaporation. However, other methods are also possible, such as evaporation, sputtering, electrodeposition, chemical vapor deposition, or inkjet printing.
[0103] Upper stack
[0104] The upper layers can have a conventional design. As described above, they typically include at least a buffer layer, a window layer, and an electrode layer.
[0105] The buffer layer is designed as an electron transport layer and contains n-type semiconductor material, thereby forming an electroactive pn junction with the absorption layer.
[0106] The buffer layer 24 can conventionally be a CdS layer (typically deposited by chemical bath) or made of any other suitable material, such as Zn(O,S).
[0107] Window layer 26 can conventionally be an i-ZnO / Al:ZnO dual-window layer, as is known in the art, which can be deposited by sputtering.
[0108] The ZnO layer is inherently doped and allows electron conduction through the conduction band. Al:ZnO is a transparent conductive oxide (TCO).
[0109] Other options for window layers are, for example, ZnO, ZnO:Al, Zn:B, ITO, InOx:H, and InOx:W.
[0110] The electrode layer can typically take the form of a Ni-Al mesh, which can be deposited sequentially via electron beam evaporation or conventional PVD.
[0111] If desired, additional layers can be added. For example, a layer of low-refractive-index material such as MgF2 can be evaporated at the ZnO:Al surface to reduce light reflection at the air / ZnO:Al interface.
[0112] Those skilled in the art can adjust the upper structure of the solar cell as needed, depending on the required properties and specific applications.
[0113] Manufacturing process
[0114] The solar cells of the present invention can be manufactured using known thin-film manufacturing techniques, i.e., those that allow thin material layers to be deposited onto a substrate or a previously deposited layer, particularly including chemical deposition processes such as chemical solution deposition, chemical bath deposition, spin coating, dip coating, chemical vapor deposition, physical deposition methods such as evaporation, electron beam evaporation, molecular beam epitaxy, sputtering, pulsed laser deposition, or printing processes.
[0115] The deposition techniques described above for each layer are, however, based on examples only. Those skilled in the art can typically select an appropriate layer deposition technique based on the materials in the layers.
[0116] Regarding the first embodiment, see also Figure 1 The manufacturing process of solar cells involves using a suitable deposition process (or generally a layer formation process) to form a stack 30 over a substrate. Layers 14, 16, 28, 22, 24 and 26 are deposited sequentially on the substrate 12, starting with layer 14.
[0117] Effects of the present invention
[0118] This invention aims to improve the efficiency of thin-film solar cells. In CIGS solar cells, the Ga gradient plays a crucial role in mitigating back recombination and achieving high efficiency. However, the drawbacks of inhomogeneous absorber layers, primarily higher radiation losses and insufficient absorption, have been discussed in the literature. Therefore, a paradigm shift has been requested, achieved through passivation of the back contact by a suitable hole transport layer capable of withstanding the harsh environment of chalcopyrite deposition.
[0119] This disclosure provides a solar cell structure and corresponding manufacturing process, including a stable hole transport structure with a passivation effect similar to that of a Ga gradient. The hole transport structure includes a P-type semiconductor hole transport layer, on which a metal oxide layer is formed as a stabilizing layer to block the diffusion of the hole transport layer. By introducing this bilayer structure, the problem of thermal stability is effectively overcome.
[0120] Second Implementation Method
[0121] In the second embodiment, the step of fabricating a copper layer 21 (also referred to as an intermediate layer) adjacent to the stabilizing layer 18 is included.
[0122] This is Figure 2 As shown, copper layer 21 is deposited on top of stabilizing layer 18. Alternatively, copper layer may be formed (directly) between hole transport layer and stabilizing layer.
[0123] During the deposition of the absorber layer, copper atoms diffuse into the stabilizing layer 18, resulting in the stabilizing layer 18 being enriched or doped with copper atoms.
[0124] Without being bound by any theory, it is believed that copper atoms diffused into the stabilizing layer 18 can create defects in the layer structure, which can facilitate the passage of holes or improve the overall conductivity of the stabilizing layer 18.
[0125] The copper layer can be deposited to have a similar thickness to the stabilizing layer, for example, 10 to 100 nm.
[0126] The deposited copper layer is preferably subjected to annealing. For example, copper annealing can be carried out at a temperature between 400°C and 500°C for a duration of 15, 20, 25, or 30 minutes under vacuum.
[0127] In fact, the copper layer can dissolve partially or completely (as confirmed by the first experiment). Therefore, Figure 2 The copper layer shown may no longer be present in the manufactured solar cell, therefore it has the following properties: Figure 1 The structure shown.
[0128] During the deposition of the absorber layer, the copper layer can partially or completely disappear (dissolve) due to the migration of copper towards the barrier and absorber layers. When the copper layer completely disappears, the resulting structure is similar to... Figure 1 The same applies. However, compared to the first embodiment, the stabilizing layer is rich in copper, and therefore can be referred to as a "copper-doped" or "copper-annealed" layer.
[0129] Exemplary Implementation
[0130] Sample preparation
[0131] Example 1 - Thin-film solar cells
[0132] Substrate layer: a glass layer with a thickness of 2mm.
[0133] Back electrode layer: A 500 nm thick molybdenum layer was prepared by sputtering.
[0134] Hole transport layer: CuGaSe2 layer. A 100 nm thick CuGaSe2 layer was deposited by co-evaporation at a substrate temperature of 365°C.
[0135] Stabilizing Layer: The In₂O₃ layer was prepared via solution combustion synthesis (SCS). An In₂O₃ combustion solution was prepared by dissolving 1203.2 mg of In(NO₃)₃·xH₂O (99.99%, Sigma-Aldrich) in 20 mL of 2-methoxyethanol (2-MOE, 99.8%, Sigma-Aldrich) to form a 0.2 M solution. 800 µL of acetylacetone (C₅H₈O₂, Sigma-Aldrich, 99%) was added to the solution as fuel. 90 mL of 14.5 M NH₃ (aqueous, 99%, Sigma-Aldrich) per mmol of In ions was added to raise the pH and promote the formation of the In(acac)x (acac = C₅H₇O₂) complex of In ions. The solutions were then stirred until they became clear. Using this clarified solution, In₂O₃ films were prepared by spin-coating these solutions onto these substrates at 3000 rpm for 60 s, followed by hot plate heating at 130°C for 1 min. The spin-coating and drying process was repeated four times to achieve a thickness of 50 nm. Finally, the films were crystallized by placing these samples on a hot plate at a set temperature varying from 200°C to 350°C for 3 minutes. Ga₂O₃ was prepared using the same method and steps, the only difference being that Ga(NO₃)₃·xH₂O (99.99%, Sigma-Aldrich) was used instead of In(NO₃)₃·xH₂O (99.99%, Sigma-Aldrich).
[0136] Absorber Layer: The CuInSe2 absorber layer was prepared using a typical three-stage method. In the first stage, an InSe precursor was formed at a low substrate set temperature of 365°C. In the second stage, Cu and Se were added to the film at a substrate temperature of 570°C. When it became slightly Cu-rich (Cu / In ≈ 1.05), the Cu gate was closed and the film was annealed in a Se atmosphere for 20 minutes. In the third stage, at the same substrate set temperature of 570°C, In and Se were supplied again to make the final absorber layer slightly Cu-poor (Cu / In = 0.95), with a thickness of approximately 1.8 µm and a band gap of 1.01 eV. The substrate temperature read from the pyrometer is typically lower than the set temperature. The higher the set temperature, the greater the temperature difference. For low temperatures, such as 365°C, they are roughly the same. For high temperatures, such as 570°C, the temperature from the pyrometer is 50–60°C lower than the set temperature.
[0137] Buffer Layer: A CdS layer was prepared by chemical bath deposition (CBD). Prior to CdS coating, all samples were chemically etched with a 5% KCN aqueous solution for 30 seconds to remove potential residual oxides. The CBD formulation was deposited at 67°C with 2 mM CdSO4, 50 mM thiourea, and 1.5 M NH4OH for 6–7 min. The estimated thickness was 40–50 nm based on typical growth rates. During PL characterization, CdS was essential for passivating the pre-passivation surface and preventing surface degradation.
[0138] Window layer and top electrode layer: To complete the device, i-ZnO / Al:ZnO is sputtered on top of CdS, followed by electron beam evaporation of a Ni / Al mesh.
[0139] Example 2 - Thin-film solar cells
[0140] Thin-film solar cells were prepared in the same manner as in Example 1, except that a thin layer of NaF with a thickness of about 4 nm was deposited between the two layers of the hole transport structure (i.e., between the CuGaSe2 layer and the In2O3 layer) by thermal evaporation.
[0141] Example 3 - Thin-film solar cells
[0142] Thin-film solar cells were fabricated in the same manner as in Example 1, using an absorber layer of Cu(In,Ga)Se2 with a thickness of 900 nm and a band gap of 1.15 eV.
[0143] However, in terms of the manufacturing process, an additional Cu layer is deposited on the stabilizing layer (In2O3) before the absorber layer is formed. This Cu layer has a similar thickness to the stabilizing layer, here approximately 50 nm.
[0144] Then, the entire stack (glass / Mo / CuGaSe2 / In2O3 / Cu) was placed in 10 -7 ~10 -10 Under high vacuum of 50 milliton Heating to 500 C / m rate C, and with 500 Anneal at C for 20 minutes. Then anneal at 20-30°C under the same vacuum. Cool it to 200 C / m rate. C.
[0145] The copper layer completely dissolves and cannot be observed in the manufactured solar cell.
[0146] Comparative Example 1 - Reference Thin-Film Solar Cell
[0147] A reference cell was fabricated using the following structure: substrate / Mo back electrode / CuInSe2 / CdS / i-ZnO / Al:ZnO.
[0148] That is, there is no hole transport structure (CuGaSe2 / In2O3).
[0149] Different layers were deposited using the same sample preparation process as in Example 1.
[0150] Sample characterization
[0151] Lighting current density - voltage (JV)
[0152] Measurements were performed at 25°C using a 4-probe configuration. A AAA-grade solar simulator provided simulated AM1.5G spectra calibrated with a Si reference cell. Forward scan voltages were applied from -0.3 V to 0.6 V in 0.01 V steps.
[0153] Scanning electron microscope (SEM)
[0154] Scanning electron microscopy is used to analyze the cross-sectional microstructure of membranes.
[0155] External quantum efficiency measurement
[0156] To measure the external quantum efficiency (EQE), chopper illumination from a halogen / xenon lamp was used, and a lock-in amplifier was employed to precisely measure the photocurrent.
[0157] Experimental results
[0158] exist Figures 4 to 6 The results correspond to Examples 1 to 3 and Comparative Example 1, and are expressed as follows: - "a" corresponds to Comparative Example 1 and is also recorded as Mo-Re - "b" corresponds to Example 1, also denoted as HTL - "c" corresponds to Example 2, also known as HTL+NaF - "d" corresponds to Example 3, also known as HTL+Cu annealing. SEM cross-sectional image ( Figure 3 The example relates to Example 1 (deposition of Mo / CuGaSe2 / In2O3 / CuInSe2) and clearly shows that the initial thicknesses of In2O3 and CuGaSe2 before CuInSe2 deposition were approximately 50 nm and 100 nm, respectively. After the CuInSe2 absorber layer was deposited, the independent structures of the two layers were still easily identifiable, and their respective thicknesses remained unchanged, confirming that In2O3 is a good stabilizer to prevent significant outward diffusion of Ga.
[0159] However, its composition may change; Ga migrates from the hole transport layer to the stabilization layer, and In migrates in other ways, i.e., the In₂O₃ layer becomes the Ga₂O₃ layer, and the CuGaSe₂ layer becomes the CuInSe₂ layer (see [link]). Figure 9 (At the same time, refer to the discussion above).
[0160] The passivation effect of the new HTL was also confirmed by external quantum efficiency (EQE) spectroscopy. Figure 7 The thin-film solar cell (Na-doped) according to Example 2 is compared with a solar cell without the hole transport structure of the present invention, i.e., a direct Mo back-contact solar cell (Comparative Example 1), and here with another comparative example (denoted as GBG) corresponding to a cell having a Ga gradient in the absorber layer.
[0161] The thin-film solar cell of the present invention has the best EQE response to long-wavelength photons, which means the best collection of carriers generated by long-wavelength photons, thereby having the best back-side passivation.
[0162] For the thin-film solar cell according to the present invention, the steepest absorption and collection start (lowest inflection point) was observed. Figure 7 The thin-film solar cell depicts a gentler EQE edge because carriers generated by long-wavelength illumination near the back contact have a lower collection chance due to the high recombination activity of the active back contact. This loss is also reflected in the overall lower EQE. Furthermore, the contrasting solar cell exhibits lower long-wavelength radiation absorption than the solar cell of this invention: the low bandgap region is much thinner than the overall film thickness. Gradual absorption leads to additional radiation voltage losses.
[0163] Furthermore, in the current density-voltage characteristics ( Figure 4 No significant hole transport or current blocking behavior was observed in the FF ( ), resulting in a fairly good FF of over 71%. Figure 5This observation clearly demonstrates that the thin-film solar cell of the present invention, having a hole transport structure comprising a CuGaSe2 layer and an In2O3 layer, possesses sufficient hole selectivity to simultaneously maintain a high Voc ( Figure 6 ) and FF.
[0164] Adding NaF can improve Voc( Figure 6 (This is because Na is an important dopant in CIGS).
[0165] Sample 3, annealed with Cu, exhibited an FF of 77% or even higher. Figure 5 This indicates that Cu annealing can improve hole transport performance.
[0166] Sample 3 ( Figure 6 ) high V OC Compared to its band gap (1.15 eV), it demonstrates the good passivation effect of Cu annealing on hole transport structures.
Claims
1. A method for producing a thin-film solar cell, the method comprising the following sequential steps: providing a substrate (12); forming a back electrode layer (14) on the substrate; forming a hole transport structure (20) on the back electrode layer, the hole transport structure comprising a hole transport layer (16) comprising a p-type conductive material on the back electrode layer and a stabilization layer (18) on the hole transport layer, the stabilization layer comprising a metal oxide and / or a metal nitride; and forming a semiconductor absorber layer (22) on the hole transport structure, the absorber layer comprising a chalcogenide material.
2. The method according to claim 1, wherein the stabilization layer comprises a metal oxide and / or a metal nitride of one or more metals selected from the group comprising Si, Mo, Al, Ga, In, Ti and Hf.
3. The method according to claim 1 or 2, wherein the stabilization layer is deposited as a metal oxide selected from the group comprising AI2O3, Ga2O3, In2O3, TiO2, MoO2, and mixtures thereof.
4. The method according to any one of claims 1 to 3, wherein the stabilization layer has a thickness between 10 nm and 100 nm.
5. The method according to any one of the preceding claims, wherein the conduction band minimum of the stabilization layer is larger than the conduction band minimum of the absorber layer, preferably at least 0.3 eV larger.
6. The method according to any one of the preceding claims, wherein the hole transport layer comprises a p-type chalcogenide material.
7. The method according to claim 6, wherein the hole transport layer comprises a material selected from the group consisting of Cu(In,Ga)Se2, Cu(In,Ga)(Se,S)2, CuInSe2, CuGaSe2, CuInS2, Cu(In,Ga)S2 and mixtures thereof.
8. The method according to any one of the preceding claims, wherein the hole transport layer has a thickness between 30 and 200 nm.
9. The method according to any one of the preceding claims, wherein the absorber layer comprises, preferably consists of, a material selected from the group consisting of Cu(In,Ga)Se2, Cu(In,Ga)(Se,S)2, CuInSe2, CuGaSe2, CuInS2, Cu(In,Ga)S2 and mixtures thereof.
10. The method according to any one of the preceding claims, wherein the absorber layer has a thickness of 0.1 pm to 3 pm.
11. The method according to any one of the preceding claims, wherein forming the hole transport structure comprises forming a copper layer (21) adjacent to the stabilization layer.
12. The method according to claim 11, comprising annealing the layer stack with the copper layer (21) on top at a temperature between 400 and 600 °C, preferably between 450 °C and 550 °C, in particular about 500 °C, for a period of time between 5 and 30 minutes, in particular between 10 and 20 minutes. 13. The method according to claim 11 or 12, wherein the copper layer has a thickness similar to the stabilizing layer.
14. The method according to any of the preceding claims, comprising depositing a sodium layer between the hole transport layer and the stabilizing layer.
15. The method according to the preceding claim, further comprising the steps of: forming an electron transport layer over the absorber layer; and forming a top electrode layer over the electron transport layer.
16. A thin-film solar cell, comprising: a substrate (12); a back electrode layer (14) on the substrate; a hole transport structure (20) on the back electrode layer, the hole transport structure comprising a hole transport layer (16) comprising a p-type conductive material; a semiconductor absorber layer (22) on the hole transport structure, the absorber layer comprising a chalcogenide material; an electron transport layer (24) on the semiconductor absorber layer; and a top electrode layer (26) on the electron transport layer, wherein the hole transport structure (20) further comprises a stabilizing layer (18) on the hole transport layer (16), the stabilizing layer comprising a metal oxide and / or a metal nitride. the stabilizing layer comprising a metal oxide and / or a metal nitride of one or more metals selected from the group comprising Si, Mo, Al, Ga, In, Ti and Hf.
17. The thin-film solar cell of claim 16, wherein, 18. The thin-film solar cell according to claim 16 or 17, wherein the stabilizing layer has a thickness between 10 nm and 100 nm.
19. The thin-film solar cell according to any of claims 16 to 18, wherein the conduction band minimum of the stabilizing layer is larger than the conduction band minimum of the absorber layer, preferably at least 0.3 eV larger.
20. The thin-film solar cell according to any of claims 16 to 19, wherein the stabilizing layer further comprises annealed copper.
21. The thin-film solar cell according to any of claims 16 to 20, wherein the hole transport layer comprises a p-type chalcogenide material.
22. The thin-film solar cell according to any of claims 16 to 21, wherein the absorber layer comprises a material selected from the group consisting of Cu(In,Ga)Se2, Cu(In,Ga)(Se,S)2, CuInSe2, CuGaSe2, CuInS2, Cu(In,Ga)S2 and mixtures thereof.
23. The thin-film solar cell according to any of claims 16 to 22, wherein the absorber layer has a thickness between 0.1 pm and 3 pm.
24. The thin-film solar cell according to any of claims 16 to 23, wherein the back electrode layer is a metal layer, preferably a Mo layer or a transparent conductive oxide layer.
25. A thin-film solar module comprising a plurality of thin-film solar cells according to any of claims 16 to 24.
Citation Information
Patent Citations
High-efficiency ultrathin CIGS thin-film solar cell and preparation method thereof
CN112786713A
CIGS film production method, and CIGS solar cell production method using the CIGS film production method
US20150380596A1