Cyclic redundancy check method, device and equipment based on priori knowledge

Abstract

The invention provides a priori knowledge-based cyclic redundancy check method, apparatus and device. The method comprises the steps of obtaining original to-be-checked data; performing period division on the original to-be-verified data, and determining the length of a to-be-complemented byte; performing preprocessing according to the original to-be-verified data and the to-be-complemented byte length to obtain intermediate data; obtaining a prior information value according to the length of the byte to be complemented and a preset prior information table; and performing cyclic redundancy check calculation on the intermediate data according to the prior information value to generate a target check result. According to the scheme, the cyclic redundancy check calculation is converted from multi-core to single-core, so that the chip area and logic resources can be saved, and the improvement of the cyclic redundancy check calculation rate and the reduction of power consumption and heat production are realized.

Description

Technical Field

[0001] This invention relates to the field of data security technology, and in particular to a method, apparatus, and device for cyclic redundancy check based on prior knowledge. Background Technology

[0002] Cyclic Redundancy Check (CRC) is a method used to detect errors during data transmission or storage. The check algorithm can detect any data corruption by calculating the CRC check value between the application and the data.

[0003] In network transmission chip design, to reduce the transmission clock frequency, multiple bytes of data typically need to be transmitted per cycle. For example, in a 40G network device, if the clock cycle is 312.5MHz, then 16 bytes need to be transmitted per cycle. Because the total length in network transmission is not fixed, the number of bytes in the last cycle varies and is not all of them valid bytes.

[0004] Traditional CRC calculation methods require designing multiple CRC calculation cores to meet the different valid byte requirements of the last cycle, resulting in a total of 16 CRC calculation cores. A single core is selected for each core based on the actual number of valid bytes in the last cycle. While this method achieves cyclic redundancy check, the design of multiple CRC calculation cores wastes significant logic resources and chip area. Summary of the Invention

[0005] This invention provides a method, apparatus, and device for cyclic redundancy check (CRC) based on prior knowledge, which solves the problems of resource waste, low CRC calculation efficiency, and high power consumption and heat generation.

[0006] To solve the above-mentioned technical problems, the technical solution of the present invention is as follows: This invention provides a cyclic redundancy check method based on prior knowledge, comprising: Obtain the original data to be verified; The original data to be verified is periodically divided to determine the length of the bytes to be padded. Preprocessing is performed based on the original data to be verified and the length of the bytes to be padded to obtain intermediate data; Based on the length of the byte to be supplemented and the preset prior information table, the prior information value is obtained; Based on the prior information value, a cyclic redundancy check calculation is performed on the intermediate data to generate the target check result.

[0007] Optionally, the original data to be verified is periodically divided to determine the length of the bytes to be padded, including: Based on the original data to be verified, the total length of the original data to be verified is obtained; The data is divided into periods based on its total length to obtain the effective byte length of the last period. The length of the bytes to be padded is determined based on the length of the effective bytes.

[0008] Optionally, preprocessing is performed based on the original data to be verified and the length of the bytes to be padded to obtain intermediate data, including: The original data to be verified is filled with invalid data of the length to be padded, to obtain data of the preset length; The preset length data is shifted to obtain intermediate data.

[0009] Optionally, the preset length data is shifted to obtain intermediate data, including: The invalid data added to the preset length data is moved from the end of the data to the beginning of the data to obtain intermediate data.

[0010] Optionally, based on the length of the byte to be padded and a preset prior information table, a prior information value is obtained, including: The preset prior information table is searched according to the length of the byte to be padded to obtain the prior information value corresponding to the length of the byte to be padded.

[0011] Optionally, the amount of data in the preset prior information table matches the number of data bytes in a complete cycle, and different numbers of data bytes correspond to different data in the prior information table.

[0012] Optionally, a cyclic redundancy check (CRC) calculation is performed on the intermediate data based on the prior information value to generate a target check result, including: The prior information value is used as the first initial value of the first period of the intermediate data to perform cyclic redundancy check calculation for the first period, and a second initial value suitable for cyclic redundancy check calculation for the second period is obtained, until the cyclic redundancy check calculation for the last period is completed, and the check result is obtained.

[0013] This invention also provides a cyclic redundancy check device based on prior knowledge, comprising: The acquisition module is used to acquire the original data to be verified. The processing module is used to periodically divide the original data to be verified to determine the length of the byte to be supplemented; preprocess the original data to be verified and the length of the byte to be supplemented to obtain intermediate data; and obtain the prior information value according to the length of the byte to be supplemented and a preset prior information table. The generation module is used to perform cyclic redundancy check calculation on the intermediate data based on the prior information value, and generate the target check result.

[0014] This invention also provides a computing device, including: a processor and a memory storing a computer program, wherein the computer program, when run by the processor, executes the above-described method.

[0015] This invention also provides a computer-readable storage medium storing instructions that, when executed on a computer, cause the computer to perform the above-described method.

[0016] The technical solution of the present invention has at least the following effects: The above-described solution of the present invention obtains the original data to be verified; divides the original data to be verified into periods to determine the length of the byte to be supplemented; preprocesses the original data to be verified and the length of the byte to be supplemented to obtain intermediate data; obtains the prior information value according to the length of the byte to be supplemented and a preset prior information table; and performs cyclic redundancy check calculation on the intermediate data according to the prior information value to generate the target verification result. This can save chip area and logic resources, improve the CRC calculation rate, and reduce power consumption and heat. Attached Figure Description

[0017] Figure 1 This is a flowchart of the cyclic redundancy check method based on prior knowledge provided in the embodiments of the present invention; Figure 2 This is a structural block diagram of the cyclic redundancy check method based on prior knowledge provided in the embodiments of the present invention; Figure 3 This is a schematic diagram of the preprocessing process of the cyclic redundancy check method based on prior knowledge provided in the embodiments of the present invention; Figure 4 This is a structural diagram of the cyclic redundancy check device based on prior knowledge provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the structure of the computing device provided in an embodiment of the present invention. Detailed Implementation

[0018] Exemplary embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this invention will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0019] like Figure 1 and Figure 2 As shown, embodiments of the present invention propose a cyclic redundancy check method based on prior knowledge, comprising: Step 11: Obtain the original data to be verified; Step 12: Divide the original data to be verified into periods to determine the length of the bytes to be padded; Step 13: Preprocess the original data to be verified and the length of the bytes to be padded to obtain intermediate data; Step 14: Obtain the prior information value based on the length of the byte to be supplemented and the preset prior information table; Step 15: Perform cyclic redundancy check calculation on the intermediate data based on the prior information value to generate the target check result.

[0020] In this embodiment, in step 11, the original data to be verified refers to the data during transmission or storage, and the integrity of the original data to be verified is confirmed by CRC verification.

[0021] In step 12, based on the total length of the original data to be verified, it is determined how many bytes of the original data to be verified need to be padded to become an integer multiple of the bus width.

[0022] In step 13, the original data to be verified is padded with the length of the padded bytes and then shifted so that the number of bytes in each cycle is fixed to the bus width, and invalid data is located at the beginning of the entire data.

[0023] In step 14, a priori information table is obtained through pre-calculation, assuming a fixed number of valid bytes and a fixed amount of supplementary invalid data in each cycle. The data in the priori information table can vary depending on the bus width, the value of the supplementary invalid data, or the CRC calculation standard used. For example, when the bus width is 16, 16 priori parameters need to be introduced. Figure 2 As shown.

[0024] In step 15, the target verification result is actually the cyclic redundancy check code obtained after CRC calculation of the intermediate data.

[0025] This technical solution changes the traditional multi-core CRC calculation mode to a single-core CRC calculation mode. By introducing prior knowledge and preprocessing the data, the input data is converted into a full cycle state, saving resources and chip area, simplifying algorithm design and implementation, effectively improving the verification speed, and reducing power consumption and heat generation.

[0026] In an optional embodiment of the present invention, step 11, obtaining the original data to be verified, may include: Step 111: Obtain the data during transmission or storage as the original data to be verified.

[0027] In this embodiment, the original data to be verified refers to data during transmission or storage. This data can be calculated based on the clock cycle to determine the number of bytes of data to be transmitted in each cycle. For the last cycle, the number of bytes of valid data will vary depending on the total amount. For example, if the target transmission rate is 40Gbps, the clock frequency is 312.5MHz, and the bus width is W, where W is the bus width (i.e., the number of bytes of data to be transmitted in each cycle), R represents the target transmission rate, and f represents the clock frequency.

[0028] In an optional embodiment of the present invention, step 12, dividing the original data to be verified into periods to determine the length of the bytes to be padded, may include: Step 121: Obtain the total length of the original data to be verified based on the original data to be verified; Step 122: Divide the data into periods based on the total length to obtain the effective byte length of the last period; Step 123: Determine the length of the byte to be padded based on the effective byte length.

[0029] In this embodiment, in step 121, the total length of the original data to be verified can be obtained by parsing the protocol header of the data packet or the control logic of the data stream.

[0030] In step 122, according to This yields the total number of periods in the current division; based on This yields the effective byte length of the last cycle; where M represents the total number of cycles; L represents the total data length; and W represents the bus width. Indicates to The result is rounded up; N represents the effective byte length of the last cycle; mod represents the modulo operation.

[0031] In step 123, according to The length of the byte to be padded is obtained; where K represents the length of the byte to be padded; W represents the bus width; and N represents the length of the effective bytes in the last cycle.

[0032] like Figure 3 As shown, in an optional embodiment of the present invention, step 13, preprocessing based on the original data to be verified and the length of the bytes to be padded to obtain intermediate data, may include: Step 131: Fill the original data to be verified with invalid data of the length to be padded bytes to obtain data of the preset length; Step 132, performing a shift operation on the preset length data to obtain intermediate data, includes: moving the invalid data added to the preset length data from the end of the data to the beginning of the data to obtain intermediate data.

[0033] In this embodiment, in step 131, the invalid data to be filled can be all zeros, all ones, or other specific data. Invalid data filling is completed by appending invalid data of length to be padded to the end of the original data to be verified. At this point, the total data length plus the invalid data length should be an integer multiple of the bus width.

[0034] In step 132, the entire data stream is shifted 6 bytes to the left, so that the invalid data that was originally filled in the last cycle is moved to the beginning of the data stream. At this time, the length of the entire data stream remains unchanged, but the last cycle becomes a complete 16 bytes of valid data.

[0035] In an optional embodiment of the present invention, step 14, obtaining the prior information value based on the length of the byte to be supplemented and the preset prior information table, may include: Step 141: Search the preset prior information table according to the length of the byte to be supplemented to obtain the prior information value corresponding to the length of the byte to be supplemented; the amount of data in the preset prior information table matches the number of data bytes in a complete cycle, and different data in the prior information table correspond to different numbers of data bytes.

[0036] In this embodiment, the shifting in step 132 changes the data order, which will cause the CRC result to change. Therefore, prior knowledge is introduced for compensation. Based on the length of the byte to be supplemented, the prior information value in the corresponding preset prior information table is used as the initial value of the CRC calculation core to offset the effect of the shift.

[0037] The prior information table can be based on and Obtain; among them , represents the prior information value corresponding to the length of the byte to be padded; n represents the length of the byte to be padded; This represents the standard initial value for CRC calculation; This represents the prior information value corresponding to the length of the previous byte to be padded; This indicates a single-byte processing function; x represents the current value of the CRC register to be processed. This indicates a logical right shift of 8 bits; This means retaining the lowest 8 bits of x; This indicates a bitwise XOR operation; if the bits are the same, the result is 0; if the bits are different, the result is 1.

[0038] The specific prior information table is shown in Table 1.

[0039] Table 1 Prior Information Table

[0040] In an optional embodiment of the present invention, step 15, performing cyclic redundancy check calculation on the intermediate data based on the prior information value to generate the target check result, may include: Step 151: Use the prior information value as the first initial value of the first period of the intermediate data, perform cyclic redundancy check calculation for the first period, obtain the second initial value applicable to the cyclic redundancy check calculation for the second period, until the cyclic redundancy check calculation for the last period is completed, and obtain the check result.

[0041] In this embodiment, the prior information value and the data of the first cycle in the intermediate data are used as inputs for the first cycle CRC calculation, and the output is the second initial value; the second initial value and the data of the second cycle in the intermediate data are used as inputs for the second cycle CRC calculation, and the output is the third initial value; and so on, until the output of the last cycle is calculated, to obtain the final state value, which is the CRC register value after processing all 32 bytes of data; then, the final state value is XORed with 0xFFFFFFFF to convert it into the target verification result. The verification result is a cyclic redundancy check code.

[0042] A specific embodiment of the cyclic redundancy check method based on prior knowledge provided in this invention is as follows: Step 1: Based on the target transmission rate of 40Gbps and the clock frequency of 312.5MHz, the bus width is 16 bytes; the original data to be verified is 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12.

[0043] Step 2: Based on the parsing, the total length of the current data is 18, the total number of cycles is 2, all 16 bytes of cycle 1 are valid, the length of valid bytes in cycle 2 is 2, and the length of bytes to be supplemented is 14. The data for cycle 1 is 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10; the data for cycle 2 is 11 12.

[0044] Step 3: Fill in invalid data. Here, the data is filled with all zeros. That is, the data for period 1 is 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10; the data for period 2 is 11 12 00 00 00 00 00 00 00 00 00 00 00 00. The intermediate data after shifting is: Period 1 data: 00 00 00 00 00 00 00 00 00 00 00 00 01 02, Period 2 data: 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 1112.

[0045] Step 4: The length of the byte to be padded is 14. By querying the prior information table, the prior information value is obtained as 0X50DDA75D.

[0046] Step 5: Perform cyclic redundancy check calculations on the first initial value, the prior information value 0x50DDA75D, and the data 00 0000 00 00 00 00 00 00 00 00 00 01 02 in the intermediate data for period 1 to obtain the second initial value 0x2412C1D4 for period 2. Perform cyclic redundancy check calculations on the second initial value and the data 03 04 05 06 07 08 09 0A 0B 0C0D 0E 0F 10 11 12 in period 2 to obtain the final state 0x906DC362. XOR the final state with 0xFFFFFFFF to obtain the target check result 0x6F943C9D.

[0047] The proposed cyclic redundancy check (CRC) method based on prior knowledge saves chip area and computing resources through single-core computation, avoiding the power consumption and heat generation of redundant computing cores. By introducing prior knowledge, computational compensation is achieved, which improves CRC calculation efficiency and reduces the complexity of CRC design.

[0048] like Figure 4 As shown, this embodiment of the invention also provides a cyclic redundancy check device 40 based on prior knowledge, comprising: Module 41 is used to acquire the original data to be verified. Processing module 42 is used to periodically divide the original data to be verified to determine the length of the byte to be supplemented; preprocess the original data to be verified and the length of the byte to be supplemented to obtain intermediate data; and obtain the prior information value according to the length of the byte to be supplemented and the preset prior information table. The generation module 43 is used to perform cyclic redundancy check calculation on the intermediate data based on the prior information value to generate the target check result.

[0049] Optionally, processing module 42 is specifically used for: Based on the original data to be verified, the total length of the original data to be verified is obtained; The data is divided into periods based on its total length to obtain the effective byte length of the last period. The length of the bytes to be padded is determined based on the length of the effective bytes.

[0050] Optionally, processing module 42 is specifically used for: The original data to be verified is filled with invalid data of the length to be padded, to obtain data of the preset length; The preset length data is shifted to obtain intermediate data.

[0051] Optionally, the preset length data is shifted to obtain intermediate data, including: The invalid data added to the preset length data is moved from the end of the data to the beginning of the data to obtain intermediate data.

[0052] Optionally, processing module 42 is specifically used for: The preset prior information table is searched according to the length of the byte to be supplemented to obtain the prior information value corresponding to the length of the byte to be supplemented; the amount of data in the preset prior information table matches the number of data bytes in a complete cycle, and different data bytes correspond to different amounts of data in the prior information table.

[0053] Optionally, the processing module 42 is also specifically used for: The prior information value is used as the first initial value of the first period of the intermediate data to perform cyclic redundancy check calculation for the first period, and a second initial value suitable for cyclic redundancy check calculation for the second period is obtained, until the cyclic redundancy check calculation for the last period is completed, and the check result is obtained.

[0054] It should be noted that this device is a device corresponding to the above method. All implementation methods in the above method embodiments are applicable to this embodiment and can achieve the same technical effect.

[0055] like Figure 5 As shown, this embodiment of the invention also provides a computing device 50, including a processor 51, a memory 52, and a program or instructions stored in the memory 52 and executable on the processor 51. When the program or instructions are executed by the processor 51, they implement the various processes of the above-described embodiment of the cyclic redundancy check method based on prior knowledge and achieve the same technical effect. To avoid repetition, they will not be described again here. It should be noted that the computing device in this embodiment of the invention includes the above-described mobile electronic devices and non-mobile electronic devices.

[0056] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0057] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0058] In the embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0059] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0060] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0061] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0062] Furthermore, it should be noted that in the apparatus and method of the present invention, it is obvious that the components or steps can be decomposed and / or recombined. These decompositions and / or recombinations should be considered equivalent solutions of the present invention. Moreover, the steps performing the above series of processes can naturally be executed in the order described, but are not necessarily required to be executed in chronological order; some steps can be executed in parallel or independently of each other. Those skilled in the art will understand that all or any step or component of the method and apparatus of the present invention can be implemented in any computing device (including processors, storage media, etc.) or network of computing devices, in hardware, firmware, software, or a combination thereof. This is something that those skilled in the art can achieve by using their basic programming skills after reading the description of the present invention.

[0063] Therefore, the object of the present invention can also be achieved by running a program or a set of programs on any computing device. The computing device can be a known general-purpose device. Therefore, the object of the present invention can also be achieved simply by providing a program product containing program code for implementing the method or apparatus. That is, such a program product also constitutes the present invention, and the storage medium storing such a program product also constitutes the present invention. Obviously, the storage medium can be any known storage medium or any storage medium developed in the future. It should also be noted that in the apparatus and method of the present invention, it is obvious that the components or steps can be decomposed and / or recombined. These decompositions and / or recombinations should be considered equivalent to the present invention. Furthermore, the steps for performing the above series of processes can naturally be performed in the order described, but are not necessarily required to be performed in chronological order. Some steps can be performed in parallel or independently of each other.

[0064] The above are preferred embodiments of the present invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A cyclic redundancy check method based on prior knowledge, characterized in that, include: Obtain the original data to be verified; The original data to be verified is periodically divided to determine the length of the bytes to be padded. Preprocessing is performed based on the original data to be verified and the length of the bytes to be padded to obtain intermediate data; Based on the length of the byte to be supplemented and the preset prior information table, the prior information value is obtained; Based on the prior information value, a cyclic redundancy check calculation is performed on the intermediate data to generate the target check result.

2. The cyclic redundancy check method based on prior knowledge according to claim 1, characterized in that, The original data to be verified is periodically divided to determine the length of the bytes to be padded, including: Based on the original data to be verified, the total length of the original data to be verified is obtained; The data is divided into periods based on its total length to obtain the effective byte length of the last period. The length of the byte to be padded is determined based on the length of the effective bytes.

3. The cyclic redundancy check method based on prior knowledge according to claim 1, characterized in that, Preprocessing is performed based on the original data to be verified and the length of the bytes to be padded to obtain intermediate data, including: The original data to be verified is filled with invalid data of the length to be padded, to obtain data of the preset length; The preset length data is shifted to obtain intermediate data.

4. The cyclic redundancy check method based on prior knowledge according to claim 3, characterized in that, The preset length data is shifted to obtain intermediate data, including: The invalid data added to the preset length data is moved from the end of the data to the beginning of the data to obtain intermediate data.

5. The cyclic redundancy check method based on prior knowledge according to claim 1, characterized in that, Based on the length of the byte to be supplemented and the preset prior information table, the prior information values ​​are obtained, including: The preset prior information table is searched according to the length of the byte to be padded to obtain the prior information value corresponding to the length of the byte to be padded.

6. The cyclic redundancy check method based on prior knowledge according to claim 1, characterized in that, The amount of data in the preset prior information table matches the number of data bytes in a complete cycle, and different numbers of data bytes correspond to different data in the prior information table.

7. The cyclic redundancy check method based on prior knowledge according to claim 1, characterized in that, Based on the prior information value, a cyclic redundancy check (CRC) calculation is performed on the intermediate data to generate a target check result, including: The prior information value is used as the first initial value of the first period of the intermediate data to perform cyclic redundancy check calculation for the first period, and a second initial value suitable for cyclic redundancy check calculation for the second period is obtained, until the cyclic redundancy check calculation for the last period is completed, and the check result is obtained.

8. A cyclic redundancy check device based on prior knowledge, characterized in that, include: The acquisition module is used to acquire the original data to be verified. The processing module is used to periodically divide the original data to be verified and determine the length of the bytes to be padded. Preprocessing is performed based on the original data to be verified and the length of the bytes to be padded to obtain intermediate data; Based on the length of the byte to be supplemented and the preset prior information table, the prior information value is obtained; The generation module is used to perform cyclic redundancy check calculation on the intermediate data based on the prior information value, and generate the target check result.

9. A computing device, characterized in that, include: A processor, a memory storing a computer program, wherein the computer program, when executed by the processor, performs the method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The system stores instructions that, when executed on a computer, cause the computer to perform the method as described in any one of claims 1 to 7.

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