Display panel and display device

Abstract

The invention provides a display panel and a display device, and relates to the technical field of display. A driving transistor is improved, so that the driving transistor comprises a first pole and n second poles, at least one of the n second poles is electrically connected with a target signal end through a switch selection component in combination with control over the switch selection component, and the width-to-length ratio of the driving transistor in different conduction states is adjusted; it is ensured that the width-to-length ratios of the driving transistor in different conduction states are different, for example, the width-to-length ratio of the driving transistor in the first conduction state is different from the width-to-length ratio of the driving transistor in the second conduction state. The driving transistor provided by the technical scheme of the invention has different width-to-length ratios in different conduction states and is not a fixed value, and the adjustable range of the driving current can be increased by combining the control of the switch selection component, for example, the driving current can be further increased compared with the prior art, so that the maximum light-emitting brightness of the light-emitting element is further improved, and the light-emitting efficiency of the light-emitting element is improved. And the display effect of the display panel is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] The pixel driving circuit provides the driving current required for the display panel's light-emitting elements and controls whether the light-emitting elements enter the light-emitting stage, thus becoming an indispensable component in most display panels.

[0003] Currently, the aspect ratio of the driving transistors in pixel driving circuits is fixed, meaning the driving current can only be adjusted via the data voltage. The lower the data voltage, the higher the driving current, and the higher the brightness of the light-emitting element.

[0004] However, the minimum value of the data voltage is limited and cannot be reduced indefinitely. This limits the maximum value of the driving current, which in turn limits the maximum brightness of the light-emitting element and affects the display effect of the display panel. Summary of the Invention

[0005] In view of the above problems, this application provides a display panel and display device to improve the display effect of the display panel. The specific solution is as follows:

[0006] The first aspect of this application provides a display panel, the display panel including: sub-pixels and a pixel driving circuit for driving the sub-pixels, the pixel driving circuit including a driving transistor and a switch selection component;

[0007] The driving transistor includes a first terminal and n second terminals, where n ≥ 2 and n is a positive integer;

[0008] The n second poles are electrically connected to the n first terminals of the switch selection component, and the second terminal of the switch selection component is electrically connected to the target signal terminal.

[0009] At least one of the n second poles is electrically connected to the target signal terminal via a switch selection component;

[0010] The driving transistor includes at least two conduction states; the at least two conduction states include a first conduction state and a second conduction state;

[0011] The width-to-length ratio of the driving transistor in the first conducting state is W1 / L1, and the width-to-length ratio of the driving transistor in the second conducting state is W2 / L2, where W1 / L1 ≠ W2 / L2.

[0012] Based on the same inventive concept, a second aspect of this application provides a display device, which includes the aforementioned display panel.

[0013] By employing the above technical solution, this application provides a display panel and display device. By improving the driving transistor to include a first electrode and n second electrodes, and combining it with a switch selection component, the n second electrodes are electrically connected to n first terminals of the switch selection component. The second terminal of the switch selection component is electrically connected to a target signal terminal. By controlling the switch selection component, at least one of the n second electrodes is electrically connected to the target signal terminal through the switch selection component, thereby adjusting the width-to-length ratio of the driving transistor in different conduction states. This ensures that the width-to-length ratio of the driving transistor is different in different conduction states; for example, the width-to-length ratio of the driving transistor in the first conduction state is different from that in the second conduction state. In other words, the driving transistor provided by this invention has different width-to-length ratios in different conduction states, not a fixed value. Combined with the control of the switch selection component, the adjustable range of the driving current can be increased. For example, the driving current can be further increased compared to existing technologies, thereby improving the maximum luminous brightness of the light-emitting element and enhancing the display effect of the display panel. Attached Figure Description

[0014] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent when taken in conjunction with the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0015] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0016] Figure 2 A cross-sectional schematic diagram of a display panel provided in an embodiment of the present invention;

[0017] Figure 3 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present invention;

[0018] Figure 4 An equivalent circuit diagram of a driving module provided in an embodiment of the present invention;

[0019] Figure 5 This is a schematic diagram of a partial film structure of a driving transistor provided in an embodiment of the present invention;

[0020] Figure 6 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention;

[0021] Figure 7 A schematic diagram of an equivalent circuit for another driving module provided in an embodiment of the present invention;

[0022] Figure 8This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention;

[0023] Figure 9 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention;

[0024] Figure 10 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention;

[0025] Figure 11 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention;

[0026] Figure 12 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention;

[0027] Figure 13 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention;

[0028] Figure 14 An equivalent circuit diagram of another driving module provided in an embodiment of the present invention;

[0029] Figure 15 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0030] The embodiments of this application are described below with reference to the accompanying drawings. The terminology used in the implementation section of this application is only for explaining specific embodiments and is not intended to limit the application. Those skilled in the art will recognize that, with technological advancements and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0031] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0032] It should be noted that the directional terms appearing in this invention are based on the relative positional relationships shown in the accompanying drawings and should not be taken as absolute limitations on this application.

[0033] Various modifications and variations can be made to this invention without departing from its spirit or scope, as will be apparent to those skilled in the art. Therefore, this invention is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this invention can be combined with each other without contradiction.

[0034] refer to Figure 1 , Figure 1 This is a schematic diagram of a display panel according to an embodiment of the present invention. The display panel 100 provided in this embodiment of the present invention is divided into a display area AA and a non-display area BB that at least partially surrounds the display area AA. The non-display area BB is typically the border area of ​​the display panel 100.

[0035] It should be noted that, in this embodiment of the invention, the non-display area BB is used to fully surround the display area AA as an example for explanation.

[0036] Specifically, in this embodiment of the invention, the display area AA includes a plurality of sub-pixels 11. For example, the plurality of sub-pixels 11 may include a first sub-pixel 111 and a second sub-pixel 112, with the first sub-pixel 111 and the second sub-pixel 112 emitting different colors of light. For instance, the first sub-pixel 111 is an R sub-pixel, the second sub-pixel 112 is a B sub-pixel, the first sub-pixel 111 emits red light, and the second sub-pixel 112 emits blue light. Optionally, to achieve full-color display of the display panel 100, the plurality of sub-pixels 11 may further include a third sub-pixel 113, the third sub-pixel 113 being a G sub-pixel used to emit green light.

[0037] refer to Figure 2 , Figure 2 This is a cross-sectional schematic diagram of a display panel provided in an embodiment of the present invention. The display panel 100 provided in this embodiment of the present invention includes: a substrate 12.

[0038] A pixel definition layer 13 is located on one side of the substrate 12; the pixel definition layer 13 has a plurality of sub-pixel openings 14 for setting sub-pixels 11.

[0039] Specifically, in this embodiment of the invention, the display panel 100 may further include a buffer layer 15 and an array layer 16 located between the substrate 12 and the pixel definition layer 13.

[0040] The array layer 16 includes, but is not limited to, a plurality of thin-film transistors 17, a passivation layer 18, and a planarization layer 19. The thin-film transistors 17 may include a semiconductor layer 171, a gate 172, a source 173, and a drain 174. The array layer 16 may also include a gate insulating layer 161 disposed between the semiconductor layer 171 and the gate 172, and an interlayer insulating layer 162 disposed between the gate 172 and the source 173 and the drain 174. The passivation layer 18 is disposed on the side of the source 173 and the drain 174 away from the interlayer insulating layer 162. The planarization layer 19 is disposed on the side of the passivation layer 18 away from the interlayer insulating layer 162. The pixel definition layer 13 is disposed on the side of the planarization layer 19 away from the substrate 12. It should be noted that, in this embodiment of the invention, the source 173 and the drain 174 are located on the same layer as an example.

[0041] It should be noted that the pixel definition layer 13 is attached Figure 2 It has multiple layers of structure, which will not be elaborated on here, and is attached. Figure 2 The following explanation uses only one thin-film transistor 17 as an example. The circuit structure, including the pixel driving circuit and other components, is composed of the thin-film transistor 17 and other components used to drive the sub-pixel 11 to illuminate.

[0042] Optionally, the display panel 100 provided in this embodiment of the invention may further include an encapsulation layer, which includes, but is not limited to, a first inorganic encapsulation layer, an organic encapsulation layer and a second inorganic encapsulation layer sequentially disposed on the pixel definition layer 13, and the encapsulation layer includes, but is not limited to, a thin film encapsulation (TFE) layer.

[0043] Optionally, the substrate 12 is a flexible insulating material substrate with properties such as stretchability, bendability, or flexibility. Its material includes, but is not limited to, polyimide (PI), polycarbonate (PC), or polyethylene terephthalate (PET).

[0044] Optionally, the buffer layer 15 includes, but is not limited to, an inorganic material layer or an organic material layer. The inorganic material layer includes, but is not limited to, silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, or aluminum nitride. The organic material layer includes, but is not limited to, acrylic or PI. In this embodiment of the invention, the buffer layer is described using an organic material layer as an example.

[0045] Optionally, the sub-pixel 11 includes an anode layer 11A, a light-emitting layer 11B, and a cathode layer 11C; the anode layer 11A is connected to one pole of the driving transistor in the pixel driving circuit.

[0046] refer to Figure 3 , Figure 3 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present invention. The display panel 100 provided in this embodiment of the present invention includes a pixel driving circuit 20 and a light-emitting element 21, wherein one of the light-emitting elements 21 can be a sub-pixel 11.

[0047] like Figure 3 As shown, the pixel driving circuit 20 includes a driving module 22; the driving module 22 is used to provide a driving current to the light-emitting element 21, and the light-emitting element 21 emits light in response to the driving current.

[0048] refer to Figure 4 , Figure 4 The present invention provides an equivalent circuit diagram of a driving module. The driving module 22 provided in the present invention includes a driving transistor T0 and a switch selection component 23.

[0049] The driving transistor T0 includes a first terminal N3-1 and n second terminals (i.e., N2-1, N2-2, ..., N2-n), where n ≥ 2 and n is a positive integer. For example, the first terminal N3-1 of the driving transistor T0 is electrically connected to the connection node N3, and the gate of the driving transistor is electrically connected to the connection node N1.

[0050] The n second poles are electrically connected to the n first terminals of the switch selection component 23, and the second terminal of the switch selection component 23 is electrically connected to the target signal terminal. For example, the second terminal of the switch selection component 23 is electrically connected to the connection node N2, that is, it realizes the electrical connection with the first power supply voltage terminal PVDD, in which case the first power supply voltage terminal PVDD serves as the target signal terminal.

[0051] At least one of the n second poles is electrically connected to the target signal terminal via the switch selection component 23.

[0052] The driving transistor T0 includes at least two conduction states; the at least two conduction states include a first conduction state and a second conduction state.

[0053] The width-to-length ratio of the driving transistor T0 in the first conducting state is W1 / L1, and the width-to-length ratio of the driving transistor T0 in the second conducting state is W2 / L2, where W1 / L1 ≠ W2 / L2.

[0054] Wherein, the driving current Ids = 1 / 2 × u × Cox × W / L × (Vgs - Vth) 2 u is a constant, Cox is the capacitance between the gate and the semiconductor layer in the driving transistor T0, W / L is the width-to-length ratio of the driving transistor T0, Vgs is the voltage difference between the gate and the source of the driving transistor T0, and Vth is the threshold voltage of the driving transistor T0.

[0055] Since Vg=V Data +Vth,Vs=V PVDD V Data Indicates data voltage, V PVDD This represents the voltage at the first power supply voltage terminal PVDD; therefore, when W / L is a constant, the magnitude of the drive current Ids can only be determined by the data voltage V. Data To adjust. Among them, the data voltage V... Data The smaller the value, the larger the driving current Ids, and the higher the luminous brightness of the light-emitting element 21. However, the data voltage V... Data The minimum value is limited and cannot be infinitely reduced, which limits the maximum value of the driving current Ids, thereby limiting the maximum luminous brightness of the light-emitting element 21 and affecting the display effect of the display panel 100.

[0056] It should be noted that, as Figure 3 and Figure 4 As shown, the data voltage V Data Data voltage V is written to the gate of the driving transistor T0. Data The transmission path passes through connection node N2, connection node N3, and connection node N1 in sequence. Due to the influence of the threshold voltage Vth of the driving transistor T0, the gate voltage of the driving transistor T0 is not completely synchronized with the data voltage V. Data They are the same, that is, Vg = V. Data The relationship between +Vth.

[0057] Based on this, in this embodiment of the invention, the driving transistor T0 is improved to include a first electrode N3-1 and n second electrodes. Combined with the switch selection component 23, the n second electrodes are electrically connected to the n first terminals of the switch selection component 23, and the second terminal of the switch selection component 23 is electrically connected to the target signal terminal. By controlling the switch selection component 23, at least one of the n second electrodes is electrically connected to the target signal terminal through the switch selection component 23, thereby adjusting the width-to-length ratio of the driving transistor T0 in different conduction states, ensuring that the width-to-length ratio of the driving transistor T0 is different in different conduction states. For example, the width-to-length ratio of the driving transistor T0 in the first conduction state is different from that in the second conduction state.

[0058] It should be noted that the different conduction states of the driving transistor T0 can be understood as different second poles being electrically connected to the target signal terminal through the switch selection component 23, serving as the actual effective second pole when the driving transistor T0 is turned on.

[0059] That is, the driving transistor T0 provided by the present invention has different width-to-length ratios in different conduction states, and is not a fixed value. Combined with the control of the switch selection component 23, the adjustable range of the driving current Ids can be increased. For example, the driving current Ids can be further increased compared with the prior art, thereby improving the maximum luminous brightness of the light-emitting element 21 and improving the display effect of the display panel 100.

[0060] For example, when the display panel 100 needs to display high brightness, the corresponding second electrode among the n second electrodes can be electrically connected to the target signal terminal through the switch selection component 23, so that the current driving transistor T0 has a larger width-to-length ratio, thereby increasing the driving current Ids and making the light-emitting element 21 have higher light-emitting brightness.

[0061] When the display panel 100 displays the same brightness, i.e., the data voltage V Data When the current voltage remains unchanged, the corresponding second electrode among the n second electrodes can be electrically connected to the target signal terminal through the switch selection component 23, thereby giving the current driving transistor T0 a larger width-to-length ratio and increasing the driving current Ids. In this case, the voltage V at the first power supply voltage terminal PVDD can be reduced. PVDD This achieves the goal of reducing the power consumption of the display panel by 100%.

[0062] In an optional embodiment of the present invention, such as Figure 4 As shown, the switch selection component 23 provided in this embodiment of the invention includes n parallel-connected switching transistors SW; namely SW1, SW2, ..., SWn.

[0063] The first terminals of the n switching transistors SW serve as the n first terminals of the switch selection component 23. The second terminals of the n switching transistors SW are connected together and serve as the second terminals of the switch selection component 23. The gates of the n switching transistors SW receive corresponding control signals to realize the control of each switching transistor SW.

[0064] Specifically, in this embodiment of the invention, by controlling the switching states of n parallel-connected switching transistors SW, at least one of the n second poles is electrically connected to the target signal terminal through the switch selection component 23, thereby adjusting the width-to-length ratio of the driving transistor T0 under different conduction states, ensuring that the width-to-length ratio of the driving transistor T0 is different under different conduction states. For example, the width-to-length ratio of the driving transistor T0 under the first conduction state is different from that under the second conduction state.

[0065] In an optional embodiment of the present invention, the switch selection component 23 is used to control one of the n second poles to be electrically connected to the target signal terminal.

[0066] refer to Figure 5 , Figure 5 This is a schematic diagram of a partial film structure of a driving transistor provided in an embodiment of the present invention, with reference to... Figure 6 , Figure 6 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention, with reference to... Figure 7 , Figure 7 This is a schematic diagram of an equivalent circuit for another driving module provided in an embodiment of the present invention. The driving transistor T0 provided in this embodiment of the present invention further includes a semiconductor layer 171 and a gate 172.

[0067] The semiconductor layer 171 includes a first end 171-1 and n second ends (taking 171-2-1, 171-2-2 and 171-2-3 as examples); the first end 171-1 is arranged adjacent to the region where the first electrode N3-1 is located, and the n second ends are arranged adjacent to the regions where the n second electrodes are located, one by one.

[0068] Optionally, the width of the semiconductor layer 171 between the first end 171-1 and the i-th second end 171-2-i is Wi, the length of the semiconductor layer 171 between the first end 171-1 and the i-th second end 171-2-i is Li, the width of the semiconductor layer 171 between the first end 171-1 and the j-th second end 171-2-j is Wj, and the length of the semiconductor layer 171 between the first end 171-1 and the j-th second end 171-2-j is Lj; 1≤i≤n, 1≤j≤n, i≠j.

[0069] Where Wi = Wj and Li ≠ Lj; or Wi ≠ Wj and Li = Lj; or Wi ≠ Wj and Li ≠ Lj.

[0070] Specifically, in this embodiment of the invention, n=3 is used as an example for explanation. Figure 5 The semiconductor layer 171 of the driving transistor T0 shown is obtained by improving the existing "U"-shaped semiconductor layer 171. Figure 6 The semiconductor layer 171 of the driving transistor T0 shown is an improvement on the existing “S” type semiconductor layer 171.

[0071] like Figure 5 and Figure 6As shown, the width of the semiconductor layer 171 between the first end 171-1 and the first second end 172-2-1 is W1, the width of the semiconductor layer 171 between the first end 171-1 and the second second end 172-2-2 is W1, and the width of the semiconductor layer 171 between the first end 171-1 and the third second end 172-2-3 is W1; the length of the semiconductor layer 171 between the first end 171-1 and the first second end 172-2-1 is L1, the length of the semiconductor layer 171 between the first end 171-1 and the second second end 172-2-2 is L2, and the length of the semiconductor layer 171 between the first end 171-1 and the third second end 172-2-3 is L3, where L1 > L2 > L3. This satisfies the relationship Wi = Wj and Li ≠ Lj.

[0072] For example, when the display panel 100 needs to display high brightness, the switch SW3 in the switch selection component 23 can be turned on, and the switch SW1 and switch SW2 can be turned off, so that the third second terminal N2-3 of the driving transistor T0 is electrically connected to the target signal terminal through the switch selection component 23. At this time, the actual effective semiconductor layer 171 of the driving transistor T0 is the semiconductor layer 171 between the first terminal 171-1 and the third second terminal 171-2-3. At this time, with the width W of the semiconductor layer 171 unchanged, the length L3 becomes smaller than L1, so that the current driving transistor T0 has a larger width-to-length ratio, thereby increasing the driving current Ids and making the light-emitting element 21 have higher brightness.

[0073] When the display panel 100 displays the same brightness, i.e., the data voltage V Data When the current is unchanged, the switching transistor SW3 in the switch selection component 23 can be turned on, while the switching transistors SW1 and SW2 can be turned off, so that the third second terminal N2-3 of the driving transistor T0 is electrically connected to the target signal terminal through the switch selection component 23. At this time, the actual semiconductor layer 171 of the driving transistor T0 is the semiconductor layer 171 between the first terminal 171-1 and the third second terminal 171-2-3. At this time, with the width W of the semiconductor layer 171 unchanged, the length L3 is smaller than L1, so that the current driving transistor T0 has a larger width-to-length ratio, thereby increasing the driving current Ids. At this time, the voltage V of the first power supply voltage terminal PVDD can be reduced. PVDD This achieves the goal of reducing the power consumption of the display panel by 100%.

[0074] Optionally, the semiconductor layer 171 of the driving transistor T0 can also be designed to satisfy the relationship Wi≠Wj and Li=Lj. That is, when the length L of the semiconductor layer 171 remains unchanged, at least one of the n second poles can be electrically connected to the target signal terminal through the switch selection component 23 by controlling the switch selection component 23. This allows for the adjustment of the width W of the semiconductor layer 171 of the driving transistor T0 in different conduction states, thereby adjusting the width-to-length ratio and ensuring that the width-to-length ratio of the driving transistor T0 is different in different conduction states. For example, the width-to-length ratio of the driving transistor T0 in the first conduction state is different from that in the second conduction state.

[0075] Optionally, the semiconductor layer 171 of the driving transistor T0 can also be designed to satisfy the relationship that Wi≠Wj and Li≠Lj. By controlling the switch selection component 23, at least one of the n second poles is electrically connected to the target signal terminal through the switch selection component 23, thereby adjusting the width W and length L of the semiconductor layer 171 of the driving transistor T0 in different conduction states, so as to adjust the width-to-length ratio and ensure that the width-to-length ratio of the driving transistor T0 is different in different conduction states. For example, the width-to-length ratio of the driving transistor T0 in the first conduction state is different from that in the second conduction state.

[0076] It should be noted that, as Figure 5 and Figure 6 As shown, the semiconductor layer 171 between different second ends and the first end 171-1 has a common part. Therefore, in this embodiment, the switch selection component 23 can only control one of the n second poles to be electrically connected to the target signal terminal.

[0077] In an optional embodiment of the present invention, the switch selection component 23 is used to control at least two of the n second poles to be electrically connected to the target signal terminal.

[0078] refer to Figure 8 , Figure 8 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention. The driving transistor T0 provided in this embodiment of the present invention further includes a semiconductor layer 171 and a gate 172.

[0079] The semiconductor layer 171 includes n sub-semiconductor layers (i.e., 1711, 1712, ..., 171n), with a gap between adjacent sub-semiconductor layers.

[0080] The n first ends of the n sub-semiconductor layers (taking 171-1-1, 171-1-2, ..., 171-1-n as examples) are respectively arranged adjacent to the region where the first electrode is located, and the n second ends of the n sub-semiconductor layers (taking 171-2-1, 171-2-2, ..., 171-2-n as examples) are respectively arranged adjacent to the regions where the n second electrodes are located.

[0081] Optionally, the width of the a-th sub-semiconductor layer is Wa, the length of the a-th sub-semiconductor layer is La, the width of the b-th sub-semiconductor layer is Wb, and the length of the b-th sub-semiconductor layer is Lb; 1≤a≤n, 1≤b≤n, a≠b.

[0082] Where Wa = Wb, and La = Lb.

[0083] like Figure 8 As shown, the length of each sub-semiconductor layer is L, and the width of each sub-semiconductor layer is W.

[0084] refer to Figure 9 , Figure 9 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention.

[0085] Let's take n=3 as an example for explanation, combined with... Figure 7 In the circuit structure shown, when the display panel 100 needs to display high brightness, the switching transistors SW1-SW3 in the switch selection component 23 can be turned on, so that the three second terminals N2-3 of the driving transistor T0 are electrically connected to the target signal terminal through the switch selection component 23. At this time, the actual effective semiconductor layer 171 of the driving transistor T0 is the whole of the three sub-semiconductor layers. At this time, with the length L of the semiconductor layer 171 remaining unchanged, the width W becomes three times W. The increase in width W makes the current driving transistor T0 have a larger width-to-length ratio, thereby increasing the driving current Ids and making the light-emitting element 21 have higher light-emitting brightness.

[0086] When the display panel 100 displays the same brightness, i.e., the data voltage V Data When the current is unchanged, all switching transistors SW1-SW3 in the switch selection component 23 can be turned on to electrically connect the three second terminals N2-3 of the driving transistor T0 to the target signal terminal through the switch selection component 23. At this time, the actual semiconductor layer 171 of the driving transistor T0 is a whole of three sub-semiconductor layers. With the length L of the semiconductor layer 171 remaining unchanged, the width W becomes three times W. The increase in width W gives the current driving transistor T0 a larger width-to-length ratio, thereby increasing the driving current Ids. At this time, the voltage V of the first power supply voltage terminal PVDD can be reduced. PVDDThis achieves the goal of reducing the power consumption of the display panel by 100%.

[0087] Optional, see reference Figure 10 , Figure 10 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention. The semiconductor layer 171 further includes a target sub-semiconductor layer 1710.

[0088] The target sub-semiconductor layer 1710 has a width of W0 and a length of L0.

[0089] Where Wa = Wb > W0, and La = Lb > L0.

[0090] In this embodiment of the invention, the nth sub-semiconductor layer 171n is used as an example to illustrate the target sub-semiconductor layer 1710. The width W0 of the target sub-semiconductor layer 1710 can be the same as the width of the semiconductor layer 171 of the existing driving transistor with a fixed width-to-length ratio, and the length L0 of the target sub-semiconductor layer 1710 can be the same as the length of the semiconductor layer 171 of the existing driving transistor with a fixed width-to-length ratio.

[0091] When the target sub-semiconductor layer 1710 is turned on as the driving transistor T0, and the actual effective semiconductor layer 171 is, the same display effect as the existing technical solution can be achieved.

[0092] Based on this, by adding multiple independent sub-semiconductor layers and controlling the switch selection component 23, at least one sub-semiconductor layer can be used as the actual effective semiconductor layer 171 when the driving transistor T0 is turned on. This allows for the adjustment of the width W and / or length L of the semiconductor layer 171 in different conduction states of the driving transistor T0, thereby adjusting the width-to-length ratio and ensuring that the width-to-length ratio of the driving transistor T0 is different in different conduction states. For example, the width-to-length ratio of the driving transistor T0 in the first conduction state is different from that in the second conduction state.

[0093] Optional, see reference Figure 11 , Figure 11 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention. The width of the a-th sub-semiconductor layer is Wa, the length of the a-th sub-semiconductor layer is La, the width of the b-th sub-semiconductor layer is Wb, and the length of the b-th sub-semiconductor layer is Lb; 1≤a≤n, 1≤b≤n, a≠b.

[0094] Where Wa = Wb, and La ≠ Lb.

[0095] In this embodiment of the invention, taking n=3 as an example, the length L1 between the first end 171-1-1 and the second end 171-2-1 of the first sub-semiconductor layer, the length L2 between the first end 171-1-2 and the second end 171-2-2 of the second sub-semiconductor layer, and the length L3 between the first end 171-1-3 and the second end 171-2-3 of the third sub-semiconductor layer, where L1>L2>L3; the widths of the first, second, and third sub-semiconductor layers are the same, all being W.

[0096] For example, by controlling the switch selection component 23, when the first sub-semiconductor layer and the second sub-semiconductor layer are actually effective semiconductor layers 171 when the driving transistor T0 is turned on, the width becomes twice W, the width increases, and the length L is mainly L2, which is smaller than L1. This will make the driving transistor T0 have a larger width-to-length ratio.

[0097] Based on this design, the width W and / or length L of the semiconductor layer 171 of the driving transistor T0 can be adjusted in different conduction states. On the basis of adjusting the width-to-length ratio, the adjustable range of the width-to-length ratio can be further increased, thereby realizing the diversified display of the display panel 100.

[0098] Optional, ;in, This is the first preset tolerance.

[0099] The first preset tolerance can be determined according to actual needs, and the lengths between different sub-semiconductor layers are designed in a regular manner to achieve more precise adjustment of the length L.

[0100] Optional, see reference Figure 12 , Figure 12 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention. The width of the a-th sub-semiconductor layer is Wa, the length of the a-th sub-semiconductor layer is La, the width of the b-th sub-semiconductor layer is Wb, and the length of the b-th sub-semiconductor layer is Lb; 1≤a≤n, 1≤b≤n, a≠b.

[0101] Where Wa≠Wb, and La=Lb.

[0102] In this embodiment of the invention, n=3 is used as an example for explanation. The length L between the first end 171-1-1 and the second end 171-2-1 of the first sub-semiconductor layer, the length L between the first end 171-1-2 and the second end 171-2-2 of the second sub-semiconductor layer, and the length L between the first end 171-1-3 and the second end 171-2-3 of the third sub-semiconductor layer are all the same. The width of the first sub-semiconductor layer is W-1, the width of the second sub-semiconductor layer is W-2, and the width of the third sub-semiconductor layer is W-3, where W-1 > W-2 > W3.

[0103] For example, by controlling the switch selection component 23, when the first sub-semiconductor layer and the second sub-semiconductor layer are the actual effective semiconductor layers 171 when the driving transistor T0 is turned on, the width becomes the sum of W-1 and W-2, the width increases, and the length remains unchanged at L, which will make the driving transistor T0 have a larger width-to-length ratio.

[0104] Since different sub-semiconductor layers have different widths, the combination of different sub-semiconductor layers can achieve multiple width adjustments. Based on the adjustment of the width-to-length ratio, the adjustable range of the width-to-length ratio can be further increased, thereby realizing the diversified display of the display panel 100.

[0105] Optional, ;in, This is the second preset tolerance.

[0106] The second preset tolerance can be determined according to actual needs, and the width between different sub-semiconductor layers is designed in a regular manner to achieve a more refined adjustment of the width W.

[0107] Optionally, the width of the a-th sub-semiconductor layer is Wa, the length of the a-th sub-semiconductor layer is La, the width of the b-th sub-semiconductor layer is Wb, and the length of the b-th sub-semiconductor layer is Lb; 1≤a≤n, 1≤b≤n, a≠b.

[0108] Where Wa≠Wb, and La≠Lb.

[0109] In this embodiment of the invention, by adding multiple independent sub-semiconductor layers, and making the width and length of any two sub-semiconductor layers different, the switch selection component 23 controls at least one sub-semiconductor layer to be used as the actual effective semiconductor layer 171 when the driving transistor T0 is turned on. This allows for the adjustment of the width W and / or length L of the semiconductor layer 171 in different conduction states of the driving transistor T0. Based on the adjustment of the width-to-length ratio, the adjustable range of the width-to-length ratio can be further increased, thereby realizing the diversified display of the display panel 100.

[0110] It should be noted that, as Figures 8-12 As shown, semiconductor layer 171 consists of multiple independent sub-semiconductor layers, with no shared parts between the sub-semiconductor layers. Therefore, in this embodiment, the switch selection component 23 can control at least one of the n second electrodes to be electrically connected to the target signal terminal.

[0111] In an optional embodiment of the present invention, reference is made to... Figure 13 , Figure 13 This is a schematic diagram of a partial film structure of another driving transistor provided in an embodiment of the present invention, with reference to... Figure 14 , Figure 14 This is an equivalent circuit diagram of another driving module provided in an embodiment of the present invention. One part of the sub-semiconductor layer is an LTPS (Low Temperature Poly-silicon) sub-semiconductor layer 171A, and the other part of the sub-semiconductor layer is an IGZO (Indium-Gallium-Zinc-Oxide) sub-semiconductor layer 171B.

[0112] Specifically, in this embodiment of the invention, taking n=2 as an example, based on the different characteristics of the LTPS sub-semiconductor layer 171A and the IGZO sub-semiconductor layer 171B, the corresponding sub-semiconductor layer is selected as the actual effective semiconductor layer when the driving transistor T0 is turned on under different display states of the display panel 100, so as to achieve the corresponding effect.

[0113] For example, when the display panel 100 displays low brightness, the switch SW2 in the switch selection component 23 can be turned on to electrically connect the second electrode N2-3 corresponding to the driving transistor T0 to the target signal terminal through the switch selection component 23. At this time, the actual effective semiconductor layer 171 of the driving transistor T0 is the IGZO sub-semiconductor layer 171B. Based on the characteristics of IGZO, the mura when the display panel 100 is displayed can be reduced, resulting in a better low grayscale display effect.

[0114] It should be noted that the LTPS sub-semiconductor layer 171A and the IGZO sub-semiconductor layer 171B can also serve as the actual effective semiconductor layers when the driving transistor T0 is turned on.

[0115] For example, when the display panel 100 needs to display high brightness, the switching transistors SW1-SW2 in the switch selection component 23 can be turned on, so that the two second terminals N2-3 of the driving transistor T0 are electrically connected to the target signal terminal through the switch selection component 23. At this time, the actual effective semiconductor layer 171 of the driving transistor T0 is the whole of these two sub-semiconductor layers. At this time, with the length L of the semiconductor layer 171 remaining unchanged, the width W becomes twice W. The increase in width W makes the current driving transistor T0 have a larger width-to-length ratio, thereby increasing the driving current Ids and making the light-emitting element 21 have higher light-emitting brightness.

[0116] When the display panel 100 displays the same brightness, i.e., the data voltage V Data When the current is unchanged, the switching transistors SW1-SW2 in the switch selection component 23 can be turned on to electrically connect the two second terminals N2-3 of the driving transistor T0 to the target signal terminal through the switch selection component 23. At this time, the actual effective semiconductor layer 171 of the driving transistor T0 is the entirety of these two sub-semiconductor layers. With the length L of the semiconductor layer 171 remaining unchanged, the width W becomes twice the length W. The increased width W gives the current driving transistor T0 a larger width-to-length ratio, thereby increasing the driving current Ids. At this time, the voltage V of the first power supply voltage terminal PVDD can be reduced. PVDD This achieves the goal of reducing the power consumption of the display panel by 100%.

[0117] In an optional embodiment of the present invention, the sub-pixel 11 includes a first sub-pixel 111 and a second sub-pixel 112.

[0118] The pixel driving circuit includes a first pixel driving circuit that drives the first sub-pixel and a second pixel driving circuit that drives the second sub-pixel.

[0119] The display panel includes a first display state, in which the aspect ratio of the driving transistor in the first pixel driving circuit in the on state is different from the aspect ratio of the driving transistor in the second pixel driving circuit in the on state.

[0120] Specifically, in this embodiment of the invention, the first sub-pixel 111 is described as a red sub-pixel, and the second sub-pixel 112 is described as a blue sub-pixel.

[0121] Since most of the power consumption on the data signal line comes from the switching between the red and blue sub-pixels, the smaller the difference between the data voltages corresponding to the red and blue sub-pixels, the lower the power consumption on the data signal line. Currently, the efficiency difference between the red, green, and blue sub-pixels is Ib > Ir > Ig, meaning the driving current of the blue sub-pixel is greater than that of the red sub-pixel, which is greater than that of the green sub-pixel. When the dimensions of the driving transistors T0 are the same, there exists a situation where the data voltage of the blue sub-pixel is less than that of the red sub-pixel, which is less than that of the green sub-pixel.

[0122] Therefore, in the first display state of this embodiment of the invention, based on Figure 7 and Figure 9 This allows all switches SW1-SW3 in the switch selection component 23 of the pixel driving circuit corresponding to the blue sub-pixel to be turned on, all switches SW1-SW2 in the switch selection component 23 of the pixel driving circuit corresponding to the red sub-pixel to be turned on, and switch SW1 in the switch selection component 23 of the pixel driving circuit corresponding to the green sub-pixel to be turned on. At this time, the actual effective semiconductor layer width of the driving transistor T0 corresponding to different sub-pixels 11 is different, that is, the actual effective semiconductor layer width of the driving transistor T0 corresponding to the blue sub-pixel is greater than the actual effective semiconductor layer width of the driving transistor T0 corresponding to the red sub-pixel is greater than the actual effective semiconductor layer width of the driving transistor T0 corresponding to the green sub-pixel. According to Ids=1 / 2×u×Cox×W / L×(Vgs-Vth) 2 This allows the data voltage corresponding to the blue sub-pixel to be close to that corresponding to the red sub-pixel, reducing the difference in data voltage between the two and thus reducing power consumption on the data signal line.

[0123] On the other hand, when the display panel 100 displays HBM (High Brightness Mode) brightness, the HBM brightness does not meet the standard when the data voltage output capability of the driver chip is limited (the minimum data voltage will be greater than 0.2V) and the data voltage corresponding to the blue sub-pixel is set to the limit.

[0124] Based on this, in the embodiments of the present invention, the blue sub-pixel, green sub-pixel, and red sub-pixel adopt a differentiated design, based on Figure 7 and Figure 9This allows all switches SW1-SW3 in the switch selection component 23 of the pixel driving circuit corresponding to the blue sub-pixel to be turned on, all switches SW1-SW2 in the switch selection component 23 of the pixel driving circuit corresponding to the red sub-pixel to be turned on, and switch SW1 in the switch selection component 23 of the pixel driving circuit corresponding to the green sub-pixel to be turned on. At this time, the actual effective semiconductor layer width of the driving transistor T0 corresponding to different sub-pixels 11 is different, that is, the actual effective semiconductor layer width of the driving transistor T0 corresponding to the blue sub-pixel is greater than the actual effective semiconductor layer width of the driving transistor T0 corresponding to the red sub-pixel is greater than the actual effective semiconductor layer width of the driving transistor T0 corresponding to the green sub-pixel. According to Ids=1 / 2×u×Cox×W / L×(Vgs-Vth) 2 This can increase the driving current corresponding to the blue sub-pixel, so that when the display panel displays HBM brightness, the HBM brightness of the blue sub-pixel can meet the standard; similarly, based on different choices, it is also possible to make the HBM brightness of the red and green sub-pixels meet the standard when the display panel displays HBM brightness.

[0125] In an optional embodiment of the present invention, such as Figure 3 As shown, the pixel driving circuit 20 provided in this embodiment of the invention further includes: a data writing transistor T1, which is connected between the driving module 22 and the data signal line. The source of the data writing transistor T1 is used to receive data signals, the drain of the data writing transistor T1 is connected to the driving module 22, and the gate of the data writing transistor T1 is used to receive control signals S1.

[0126] In this process, the control signal S1 received by the data writing transistor T1 is a pulse signal. During the data writing phase, when the control signal S1 is in an active pulse phase, it controls the data writing transistor T1 to be in a conducting state, providing a data signal to the driving transistor T0 through this data signal line; when the control signal S1 is in an inactive pulse phase, it controls the data writing transistor T1 to be in a deactivating state. Therefore, under the control of the control signal S1, the data writing transistor T1 selectively provides a data signal to the driving transistor T0.

[0127] The pixel driving circuit 20 provided in this embodiment of the invention further includes: a first reset transistor T2, the source of the first reset transistor T2 receiving a reset signal Vref, the drain of the first reset transistor T2 being connected to the gate of the driving transistor T0, and the gate of the first reset transistor T2 being used to receive a control signal S2.

[0128] In this process, the control signal S2 received by the first reset transistor T2 is a pulse signal. During the effective pulse phase of the control signal S2, the first reset transistor T2 is controlled to be in the on state, and the reset signal Vref is written into the gate of the driving transistor T0 through the first reset transistor T2 to reset the gate of the driving transistor T0. During the ineffective pulse phase of the control signal S2, the first reset transistor T2 is controlled to be in the off state.

[0129] The pixel driving circuit 20 provided in this embodiment of the invention further includes: a compensation transistor T3, used to compensate the threshold voltage of the driving transistor T0, wherein the source of the compensation transistor T3 is connected to the gate of the driving transistor T0 to form a connection node N1, the drain of the compensation transistor T3 is connected to the drain of the driving transistor T0, and the gate of the compensation transistor T3 is used to receive the control signal S3.

[0130] In this circuit, the control signal S3 received by the compensation transistor T3 is a pulse signal. During the effective pulse phase of the control signal S3, the compensation transistor T3 is turned on to compensate for the threshold voltage of the driving transistor T0; during the ineffective pulse phase of the control signal S3, the compensation transistor T3 is turned off. Therefore, under the control of the control signal S3, the compensation transistor T3 selectively compensates for the threshold voltage of the driving transistor T0.

[0131] In an optional embodiment of the present invention, the compensation transistor T3 may be an oxide semiconductor transistor, which has a relatively smaller leakage current, thereby helping to stabilize the potential of the driving transistor T0.

[0132] The pixel driving circuit 20 provided in this embodiment of the invention further includes: a light-emitting element reset transistor T4; the source of the light-emitting element reset transistor T4 is used to receive the initialization signal Vini, the drain of the light-emitting element reset transistor T4 is connected to the anode of the light-emitting element 21, and the gate of the light-emitting element reset transistor T4 is used to receive the control signal S4.

[0133] Among them, the control signal S4 received by the light-emitting element reset transistor T4 is a pulse signal. During the effective pulse phase of the control signal S4, the light-emitting element reset transistor T4 is in the on state, and the initialization signal Vini is written to the anode of the light-emitting element 21 through the light-emitting element reset transistor T4 to perform initialization processing on the light-emitting element 21; during the ineffective pulse phase of the control signal S4, the light-emitting element reset transistor T4 is in the off state.

[0134] The pixel driving circuit 20 provided in this embodiment of the invention further includes: a first light-emitting control transistor T5 and a second light-emitting control transistor T6. The first light-emitting control transistor T5 is connected between the first power supply voltage terminal PVDD and the driving module 22, and the second light-emitting control transistor T6 is connected between the driving module 22 and the light-emitting element 21, and is used to control whether the pixel driving circuit 20 is in the light-emitting stage or the non-light-emitting stage.

[0135] The cathode of the light-emitting element 21 is connected to the second power supply voltage terminal PVEE.

[0136] The gates of the first light-emitting control transistor T5 and the second light-emitting control transistor T6 simultaneously receive the light-emitting control signal EMIT. Under the control of the light-emitting control signal EMIT, the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are either in the on state or the off state. The light-emitting control signal EMIT received by the gates of the first light-emitting control transistor T5 and the second light-emitting control transistor T6 is a pulse signal. During the light-emitting stage, the light-emitting control signal EMIT outputs an effective pulse to control the first light-emitting control transistor T5 and the second light-emitting control transistor T6 to be in the on state, so that the driving current provided by the driving transistor T0 flows into the light-emitting element 21 to make it emit light. During the non-light-emitting stage, the light-emitting control signal EMIT outputs an invalid pulse to control the first light-emitting control transistor T5 and the second light-emitting control transistor T6 to be in the off state, so that the light-emitting element 21 does not emit light.

[0137] It should be noted that the light emission control signal EMIT provided in the embodiments of the present invention can be a single control signal that simultaneously controls the first light emission control transistor T5 and the second light emission control transistor T6; or, the light emission control signal EMIT can be divided into two sub-light emission control signals, which control their respective corresponding light emission control transistors, and the longer duration of the invalid pulse output in the two sub-light emission control signals is the effective time length of the non-light emission stage.

[0138] Accordingly, embodiments of the present invention also provide a display device, including the display panel 100 provided in any of the above embodiments.

[0139] refer to Figure 15 , Figure 15 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention, wherein the display device 200 provided in the embodiment of the present invention can be a mobile terminal device.

[0140] In other embodiments of the present invention, the display device 200 provided by the present invention may also be an electronic display device such as a mobile phone, computer, or vehicle terminal, and the present invention does not impose specific limitations on it.

[0141] The above provides a detailed description of the display panel and display device provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

[0142] It should be noted that each embodiment in this specification focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other.

[0143] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that elements inherent to a process, method, article, or apparatus that comprises a list of elements, or elements inherent to such processes, methods, articles, or apparatus, are also included. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0144] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, characterized in that, The display panel includes: sub-pixels and a pixel driving circuit for driving the sub-pixels, the pixel driving circuit including a driving transistor and a switch selection component; The driving transistor includes a first electrode and n second electrodes, where n ≥ 2 and n is a positive integer; The n second poles are electrically connected to the n first terminals of the switch selection component, and the second terminal of the switch selection component is electrically connected to the target signal terminal; At least one of the n second poles is electrically connected to the target signal terminal through the switch selection component; The driving transistor includes at least two conduction states; the at least two conduction states include a first conduction state and a second conduction state. The width-to-length ratio of the driving transistor in the first conducting state is W1 / L1, and the width-to-length ratio of the driving transistor in the second conducting state is W2 / L2, where W1 / L1 ≠ W2 / L2.

2. The display panel according to claim 1, characterized in that, The switch selection component is used to control one of the n second poles to be electrically connected to the target signal terminal.

3. The display panel according to claim 2, characterized in that, The driving transistor further includes a semiconductor layer; The semiconductor layer includes a first end and n second ends; the first end is disposed adjacent to the region where the first electrode is located, and the n second ends are disposed adjacent to the regions where the n second electrodes are located in a one-to-one correspondence.

4. The display panel according to claim 3, characterized in that, The width of the semiconductor layer between the first end and the i-th second end is Wi, the length of the semiconductor layer between the first end and the i-th second end is Li, the width of the semiconductor layer between the first end and the j-th second end is Wj, and the length of the semiconductor layer between the first end and the j-th second end is Lj; 1≤i≤n, 1≤j≤n, i≠j; Where Wi = Wj and Li ≠ Lj; or Wi ≠ Wj and Li = Lj; or Wi ≠ Wj and Li ≠ Lj.

5. The display panel according to claim 1, characterized in that, The switch selection component is used to control at least two of the n second poles to be electrically connected to the target signal terminal.

6. The display panel according to claim 5, characterized in that, The driving transistor further includes a semiconductor layer; The semiconductor layer includes n sub-semiconductor layers, with a gap between two adjacent sub-semiconductor layers; The n first ends of the n sub-semiconductor layers are respectively arranged adjacent to the region where the first electrode is located, and the n second ends of the n sub-semiconductor layers are respectively arranged adjacent to the region where the n second electrodes are located.

7. The display panel according to claim 6, characterized in that, The width of the a-th sub-semiconductor layer is Wa, the length of the a-th sub-semiconductor layer is La, the width of the b-th sub-semiconductor layer is Wb, and the length of the b-th sub-semiconductor layer is Lb; 1≤a≤n, 1≤b≤n, a≠b; Where Wa = Wb, and La = Lb.

8. The display panel according to claim 7, characterized in that, The semiconductor layer further includes a target sub-semiconductor layer; The target sub-semiconductor layer has a width of W and a length of L. Where Wa = Wb > W0, and La = Lb > L0.

9. The display panel according to claim 6, characterized in that, The width of the a-th sub-semiconductor layer is Wa, the length of the a-th sub-semiconductor layer is La, the width of the b-th sub-semiconductor layer is Wb, and the length of the b-th sub-semiconductor layer is Lb; 1≤a≤n, 1≤b≤n, a≠b; Where Wa = Wb, and La ≠ Lb.

10. The display panel according to claim 9, characterized in that, ； in, This is the first preset tolerance.

11. The display panel according to claim 6, characterized in that, The width of the a-th sub-semiconductor layer is Wa, the length of the a-th sub-semiconductor layer is La, the width of the b-th sub-semiconductor layer is Wb, and the length of the b-th sub-semiconductor layer is Lb; 1≤a≤n, 1≤b≤n, a≠b; Where Wa≠Wb, and La=Lb.

12. The display panel according to claim 11, characterized in that, ； in, This is the second preset tolerance.

13. The display panel according to claim 6, characterized in that, The width of the a-th sub-semiconductor layer is Wa, the length of the a-th sub-semiconductor layer is La, the width of the b-th sub-semiconductor layer is Wb, and the length of the b-th sub-semiconductor layer is Lb; 1≤a≤n, 1≤b≤n, a≠b; Where Wa≠Wb, and La≠Lb.

14. The display panel according to claim 6, characterized in that, One part of the sub-semiconductor layer is an LTPS sub-semiconductor layer, and the other part of the sub-semiconductor layer is an IGZO sub-semiconductor layer.

15. The display panel according to claim 1, characterized in that, The sub-pixel includes a first sub-pixel and a second sub-pixel; The pixel driving circuit includes a first pixel driving circuit for driving the first sub-pixel and a second pixel driving circuit for driving the second sub-pixel. The display panel includes a first display state, in which the aspect ratio of the driving transistor in the first pixel driving circuit in the on state is different from the aspect ratio of the driving transistor in the second pixel driving circuit in the on state.

16. The display panel according to claim 1, characterized in that, The switch selection component includes n switching transistors connected in parallel; The first terminals of the n switching transistors serve as the n first terminals of the switch selection component, and the second terminals of the n switching transistors are connected together to serve as the second terminals of the switch selection component.

17. A display device, characterized in that, The display device includes the display panel as described in any one of claims 1-16.

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