Debugger circuit board capable of customizing communication protocol for high-frequency data processing of bus encoder and upper computer software of debugger circuit board

Abstract

The invention belongs to the field of digital signal processing and digital integrated circuits, and particularly relates to a debugger circuit board capable of customizing a communication protocol for high-frequency data processing of a bus encoder and upper computer software of the debugger circuit board, which can realize communication debugging of encoders with common interfaces such as RS485, SSI, BiSS-C, ABZ, USB and the like. Simple hardware design operation display can be realized through the touch panel, data uploading and detailed data display can be realized through USB connection with an upper computer, communication protocol editing and hardware writing can be realized, high-frequency signals of an encoder can be pre-processed by the hardware, the application to different encoder communication protocols is realized, the operation is visual and convenient, the carrying is convenient, and the application range is wide. The method is high in adaptability and suitable for debugging in various occasions.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of digital signal processing and digital integrated circuits, and particularly relates to a high-frequency data processing self-definable communication protocol debugger circuit board of a bus encoder and upper computer software thereof. BACKGROUND

[0002] As a commonly used important position or speed detection sensor, the encoder plays an important role in the fields of industrial automation machine tools or production lines, vehicle enterprise research and development, etc. that need to accurately detect position and speed. At present, commonly used square wave chord wave or bus encoders have respective application spaces. The bus encoders have different toolings, connection modes and communication protocols due to different manufacturers' drives and interface selections. When different customized production requirements are met, the encoder drivers of different interface protocols may need to be researched and debugged, resulting in multiple toolings and multiple communication modes, which causes inconvenience in debugging.

[0003] With the improvement of the precision of a servo system, the clock frequency of a bus encoder has been generally improved to 1 MHz-10 MHz, and the single-turn data amount reaches 10 6 bits or more. A commercially available logic analyzer needs to know the frame format in advance and cannot modify the field length, CRC polynomial or end sequence on site. In addition, PC end software decoding is easy to overflow under a 20 kHz sampling period, resulting in insufficient real-time performance SUMMARY

[0004] The application aims to solve the problem of inconvenience in customized research and development or production debugging caused by the non-uniformity of the encoder interface and communication protocol of the selected driver of different manufacturers. The application provides a hardware debugger containing most mainstream encoder communication interfaces and capable of freely editing a communication protocol, and an upper computer system capable of further processing, displaying and modifying data of the hardware debugger, so that the hardware debugger can quickly and conveniently detect data of various encoders, troubleshoot problems or freely communicate in research and development or production debugging. The application aims to directly debug various encoder interfaces without repeatedly replacing or even changing wiring to obtain encoder data. Meanwhile, the hardware debugger can be edited and modified when different data lengths, different data segment definitions or different communication clock frequencies are needed, so as to process complex communication protocols, thereby improving the efficiency of production and research and development debugging and coping with the inconvenience of different interface protocols.

[0005] To achieve the above functions and effects, the technical scheme of the application is as follows:

[0006] The first aspect provides a debugger hardware for receiving and processing different encoder interfaces and communication protocols, which comprises a signal input detection module, a communication processing module, a system control module, a drive connection module and a data storage module, wherein the input detection module is used for detecting whether data is input, detecting whether the interface is active and determining whether to wake up the system, and the wake-up mode is not unique; the communication processing module is used for processing signals of different interface communication protocols, and as many as possible commonly used encoder interface protocols are included to ensure that different encoder signals can be processed in time; the system control module is used for overall control operation of the hardware, including communication interface selection, data panel display, high-frequency signal data processing, data uploading and the like; and the drive connection module is used for connecting with the upper computer software and can also provide power supply to realize drive control of the hardware by the upper computer.

[0007] The input detection module comprises enabling and input detection of a plurality of communication interface input sections, confirms whether data flows into each communication interface, realizes confirmation of target signal access selection, and also can wake up the system in sleep state to avoid the system being in high power consumption state at all times, and can also detect input power supply to ensure normal working voltage, and the process is as follows:

[0008] The receiving enable section of each communication interface is connected with the I / O port of the control chip, and once signal flows in, the chip is woken up, and the chip can also poll the communication interface to check whether signal flows in under the condition that the selected connection interface is not selected, to calculate the interface activity degree, and the most active interface can be automatically selected when the panel is opened, and the power supply detection chip also detects whether the input voltage reaches the threshold value to confirm whether the working voltage is normal, to avoid damage to data when the voltage is abnormal.

[0009] The communication processing module comprises RS485, RS422 chips and a USB signal conversion module, realizes RS485 half-duplex transceiver and full-duplex 422 transceiver, supports BiSS-C, SSI differential clock and data channel, has ABZ positive channel, basically supports commonly used encoder interfaces at present, can freely select the required interface access, and when there are multiple interface accesses, the signals can also be received and debugged one by one through adjustment.

[0010] The system control module is composed of a main control chip and a panel display module, can realize LCD display of the current operation panel, the panel displays the interface information and communication protocol description setting which can be selected and accessed by the communication processing module, and can pre-process the high-frequency data and simply display on the panel, and the main control chip can also be selected to communicate with a single communication interface through the panel, and other interfaces are shielded to avoid communication confusion, to realize visual operation of the debugger hardware. The process is as follows:

[0011] The main control chip displays the basic information of the panel by driving the LCD screen, and the chip can be directly commanded through the panel touch, the main control chip enters the sleep state when not used for a long time and no data flows into the interface in the power-on state, and the main control chip can be awakened by inputting data to the interface and pressing the button, and the I / O port connected is changed to trigger the awakening, since the serial port of the main control chip is limited, and the types of the encoder interface are more, part of the serial port needs to be multiplexed, the actual required interface enable needs to be selected, in the case of multiple interface connection, the multiplexed input interface needs to be shielded to avoid signal confusion and cause the communication to be unable to be normally performed, and at this time, the main control chip control can be used to realize the closing of part of the path.

[0012] The driving connection module is connected with the host computer through USB, and 5V power supply can also be provided through the USB, the host computer can send a command to make the hardware send the high-frequency encoder information processed by the main control chip at the frequency required by the host computer after being connected to the hardware, and the host computer can also pre-process the high-frequency signal content to make the host computer analyze the higher-frequency encoder information, and the host computer can also modify the hardware through the module to update the firmware and the protocol.

[0013] The data storage module is mainly used for saving the panel information by connecting the SD memory card to the port of the main control chip, and the panel information includes basic setting parameters, panel display parameters, fault code table and communication protocol description file, and the data storage module can also be used for backup storage when updating the firmware.

[0014] In the second aspect, the application provides a debugger host computer software for receiving and processing different encoder interfaces and communication protocols, the host computer can realize real-time display of data waveforms, supports a self-defined communication protocol function (frame format, verification, segment sequence, etc.), can self-define a chart display to establish a display table according to the set communication protocol, can edit an algebraic relation between original signal data values and chart display values to intuitively show, and supports data reading, protocol configuration and firmware upgrading of the hardware through a single USB link.

[0015] The real-time display waveform function adopts a double-buffering mechanism, that is, the data is ensured to be continuous and not lost, and the smoothness of the graphic display is realized, so that the screen flashing is avoided under the high-frequency refreshing icon.

[0016] The self-defined protocol configuration function can edit the communication clock frequency, frame header bit, data information segment sorting, data information segment size, verification bit and the like by establishing a JSON file.

[0017] According to the protocol configuration generation chart, the edited protocol configuration is extracted and generated into an editable and adjustable setting table by using the chart control, the table is generated according to the protocol and is fixed, and the table is convenient for directly applying after parameter modification, the table contains original data display (single value is not stopped refreshing), can set data processing mode, also contains waveform display control, set waveform display maximum and minimum value, waveform display window display point number and waveform display naming, although the editing freedom is limited to a certain extent by limiting chart input, but the operation editing is intuitive and the function is safe;

[0018] The firmware updating function sends the instruction through the USB to make the debugger hardware enter the BOOT mode, and then the debugger hardware is made to perform self-backup and then is erased, then the.hex file or.bin file format is written into the hardware, the firmware is updated, and the verification is performed after the completion.

[0019] The new beneficial effect of the present application is that:

[0020] (1) The operation is intuitive and convenient, portable, and adaptable, and can be applied to various occasions for debugging;

[0021] (2) Hardware analysis + USB3.0 realizes high-frequency signal processing and uploading;

[0022] (3) Single link, realizing data transmission, configuration writing and firmware updating three-in-one, reducing connectors and wiring. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 The hardware schematic diagram of the present application;

[0024] Figure 2 The hardware PCB diagram of the present application;

[0025] Figure 3 The hardware panel operation flow chart;

[0026] Figure 4 The upper computer software panel display diagram;

[0027] Figure 5 The upper computer software panel operation flow chart. DETAILED DESCRIPTION

[0028] For the purpose of more intuitive expression of the present application, the technical scheme and advantages, the specific technical scheme will be described in detail in combination with the drawings in the present application, and of course the described examples are part of the examples, to intuitively show the specific situation.

[0029] As Figure 1As shown, the present application provides a kind of debugging hardware for receiving and processing different encoder interface and communication protocol, including signal input detection module, communication processing module, system control module, drive connection module, data storage module;

[0030] Wherein input detection and communication processing module, for being able to handle multiple commonly used encoder interface, here select SP3485 for adapting half duplex RS485 communication, select MAX3490 to adapt full duplex RS422 communication differential transceiver, to support SSI, BiSS-C interface communication here in order to save space, to ABZ orthogonal signal selected external intermediate plate scheme, to handle square wave or chord signal;

[0031] Wherein system control module due to considering cost and chip function use rate etc., select STM32F407ZET6, as main control chip, and plus TFTLCD touch display screen to realize through LCD display panel to the hardware debugger is operated, and can be realized by hardware button BOOT The switch of;

[0032] Drive connection module is selected CH340G to realize serial port and USB conversion, to facilitate USB communication of host computer, and uses LM1117 to realize 5V to 3.3V for chip power supply;

[0033] Data storage is accessed a TF memory card socket, realizes external storage by the form of external memory card insertion, expands flash space, and realizes portable operation;

[0034] Through LCD display panel touch operation realizes the selection of communication interface, enables the corresponding interface of main control chip, and can select pre-set communication protocol file to realize connection communication.

[0035] As shown, Figure 2 As shown, hardware volume is compressed as much as possible, to realize convenient carrying and installation, circuit board is kept in just surrounding the size of LCD screen, to facilitate the connection of the encoder to be debugged, RS485, SSI, BiSS-C interface on the circuit board is inserted terminal, through external interface line made, to facilitate the connection of some fixed on the equipment encoder, also realizes the operation of free modification access wiring mode, can be modified by modifying access line to modify more interfaces;

[0036] In the case of as much as possible compression volume, and expose enough interface, set fixed hole in its four corners, install acrylic plate at the bottom of circuit board, avoid contact circuit, control volume in 72.5*91mm, can be realized single hand, very portable.

[0037] In the host computer software, the overall structure is C++20 + Qt6 (GUI) + OpenGL4.5, which includes:

[0038] Thread model, USB acquisition thread uses USB3.0Bulk + Interrupt, CPU thread pool decoding analysis thread, OpenGL Context vertical synchronization GPU rendering thread, Qt GUI event loop main thread;

[0039] USB three-in-one link protocol, including maximum 1024B Bulk-IN high-frequency sampling data, maximum 1024B Bluk-OUT JSON protocol configuration;

[0040] In the rendering aspect, USB completes block direct mapping to OpenGL SSBO (Shader Storage BufferObject), no CPU copy, vertex shader converts raw sampling points (t, y) to normalized device coordinates, sets 1024*1024 canvas, 1M point data, 60FPS fixed refresh.

[0041] As shown in Figure 3 The hardware debugger is simple and intuitive to operate. The first step is to connect the encoder interface and connect the USB to the host computer. After connection, if power supply is successful, the power supply indicator will light up red, the LCD backlight will light up, and the LCD panel will display the loading word and loading progress bar.

[0042] During the loading process, after the initialization of the main control chip program is completed, it will limit the reading of the memory card, and open the interface one by one for 1 second to check whether there is data access and whether it is normal. After loading is completed, the panel will report whether reading is normal, and then the left list will be displayed. The list has two columns. The left column is to select the interface, and the right column is to select the protocol. There are up and down arrows to support changing and page scrolling. The right side is the serial port function selection. If it is to monitor the communication content between the encoder and the driver, you can directly select the connection. If you need to debug and send instructions, you can input the instructions in the right side edit column. Like serial port helper, you can choose to send alone or send regularly. The minimum time interval for sending is 50us.

[0043] After selecting the interface, communication protocol and communication mode, connect if there is communication signal, the green indicator on the hardware will light up, and it will be extinguished if there is no communication for a period of time. After communication is established, the LCD panel will display part of the data according to the communication protocol, such as monitoring the new generation driver and spindle motor encoder. The panel will display the current position information and speed. If the interface or communication protocol is set incorrectly, the indicator will flash and prompt on the panel that there is no valid data.

[0044] In the case of normal communication, the data information can be actively sent to the host computer, including the communication protocol at this time, so that the host computer can quickly establish the corresponding settings and simplify the host computer setting operation.

[0045] As shown in Figure 4 The host computer software of the present application is simple and easy to operate, and has rich functions. The steps include:

[0046] The first step is to detect the connected device. After detecting the hardware debugging, the host computer port is opened. At this time, the host computer software sends an identification command to the hardware. The hardware replies with fixed data to identify whether the connected hardware is correct, and the firmware version is confirmed from the reply data.

[0047] After connecting the device, click to read the communication protocol. At this time, all communication protocols stored in the hardware will be obtained. If the hardware has selected a protocol at this time, the selected protocol will be selected preferentially.

[0048] If the hardware interface protocol is set correctly, the next step can be directly selected. The software will generate a table separately. The table will display the clock frequency and interface information in the communication protocol. According to the data segment sorting in the protocol file, the range is generated according to the data segment size, the data segment name is obtained, and then these data are listed one by one in the table. The first column is the serial number, the second column is the description name, the third column is the original data, the fourth column is the unit, the fifth column is the editing unit, the value of the sixth column can be set in the editing unit, and the algebraic relation of the original data in the sixth column is set, for example, the encoder position value original data range of the fourth column 3 rows is 0-65535, then L6H3 = L4H3*360 / 65536 can be set in the fifth column, and the sixth column 3 rows will display the position parameter in angle unit.

[0049] Another page is the oscilloscope function. The required data waveform can be displayed, and four channels can be displayed simultaneously. Each channel can be clicked to set individually, and the display range and display points can be set.

[0050] After preparation, click to open the oscilloscope, and the data waveform and table data are refreshed.

[0051] If the hardware does not have a correct communication protocol, the software needs to be edited. Click the protocol editing, input the required clock frequency, frame header bit, data segment sequence, data segment size, and name parameters, click save to name the file, and click read protocol to see the protocol in the hardware memory card. The new saved protocol file is dragged into it, and the software will write it into the hardware.

[0052] After successful writing, reopen the hardware debugger, and repeat the operation with the correct communication protocol as described above to complete the communication establishment and debugging.

[0053] Although the present application has been described in detail with reference to the foregoing embodiments, the technical solutions recorded in the foregoing embodiments can be modified, or some of the technical features can be replaced by equivalent features, by those skilled in the art, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A debugger circuit board for high-frequency data processing of a bus encoder with a customizable communication protocol, characterized in that, include: The encoder input interface can be selected, and it is compatible with common encoder interfaces such as RS485, SSI, BiSS-C, USB and ABZ. It can pre-process communication data at high speed, is suitable for communication speeds within 10MHz, and supports data transfer and display; The standalone editable communication protocol processing can handle different types and contents of communication data, parse its communication protocol frame format, and set its length field, data field, and check field to suit various driver communication methods. The touch control panel allows for easy operation, enabling simple hardware setup and storing / reading pre-configured communication protocols. It has a compatible host computer communication interface and software that can be used to program the debugger, modify settings, and acquire data. It can graphically display waveforms and statistical charts of data in real time; It provides users with editing functions, allowing them to edit communication protocols, generate corresponding description files, and set corresponding display charts. Users can adjust the displayed content themselves.

2. The debugger circuit board for high-frequency data processing of a bus encoder with a customizable communication protocol according to claim 1, characterized in that, A variety of encoder input interfaces are available, including: A half-duplex RS485 transceiver module, used for direct communication with the RS485 protocol, or multiple devices can be connected for communication monitoring; Full-duplex RS422 transceiver, supporting BiSS-C, SSI differential clock and data channels; The USB signal transceiver module is used to implement USB protocol communication and can also provide 5V power supply. The ABZ quadrature input channel is used to receive the incremental signal from the encoder. The corresponding interface communication mode can be automatically identified and selected through the debugger, or the input interface can be selected manually.

3. The debugger circuit board for high-frequency data processing of a bus encoder with a customizable communication protocol according to claim 1, characterized in that, Pre-processing communication data at high speed, including: The main control chip pre-calculates the high-frequency signal data of different encoder signals according to the communication protocol, and then transmits the data in packets according to the display requirements. The USB 3.0 circuit is used alone to convert the serial port of the main control chip into a differential signal when transmitting data to the host computer.

4. A debugger circuit board for high-frequency data processing of a bus encoder with a customizable communication protocol according to claim 1 or 3, characterized in that, Editable communication protocol files are stored in preset registers, including: The field length register stores the bit width of the data storage length field, which is used to confirm the data segment length during data processing; The CRC polynomial register is used to store the polynomial value of the check field to check for communication errors or data loss. Ending selection register is used to define the byte order of data fields.

5. A debugger circuit board for high-frequency data processing of a bus encoder with a customizable communication protocol according to claim 2, characterized in that, Interface identification and manual selection, including: Interface activity detection involves scanning the communication status of each interface to confirm whether any data is being transmitted when the communication interface has not been confirmed. Manually select the required interface. When multiple interfaces are connected at the same time or when interface detection fails, you can manually select the interface through the display panel or host computer software to enable the corresponding communication terminal and block the unnecessary communication terminal.

6. A debugger circuit board for high-frequency data processing of a bus encoder with a customizable communication protocol according to claims 1-5, characterized in that, It enables direct manipulation and data storage, including: The LCD touch display panel provides users with an intuitive view of the operating interface, while the touch control main control chip enables various functional requirements. The main control chip can be connected to an external TF memory card to expand storage space and save panel data, various settings, communication protocols, and data backups.

7. A debugger circuit board for high-frequency data processing of a bus encoder with a customizable communication protocol according to claim 1, characterized in that, The host computer software is further configured, including: A separate oscilloscope window displays the data waveform, and different data can be displayed by selecting and modifying the data terminals; The list can be continuously refreshed to display values ​​from different data ends, and can be further processed before being displayed; It can display the verification error rate, perform communication status detection, and issue error alerts for communication anomalies; It allows for protocol editing, generating protocol description files, and writing them to debugger hardware.

8. A debugger circuit board for high-frequency data processing of a bus encoder with a customizable communication protocol according to claims 1 and 6, characterized in that, The generated description file is in JSON format and includes: The clock frequency setting can be adjusted according to the required frequency of the encoder corresponding to the interface to accommodate encoders of different frequencies. The frame header field sets the corresponding data instruction frame header field, which is used to identify different data headers; Data field, sets the number of data segments and the length of each segment, used to process different data contents; The CRC field sets the CRC check format for different check methods.

9. A debugger circuit board for high-frequency data processing of a bus encoder with a customizable communication protocol according to any one of claims 1-7, characterized in that, The debugger circuit board and the host computer software communicate via the same USB link, including: Upload of preprocessed high-frequency encoder data; The host computer software protocol description file is distributed; Firmware online upgrade.

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