Chip interface document automatic generation method, electronic equipment and medium
By parsing interface code files to generate basic data for chip interface documentation and utilizing target document template parameters, chip interface documentation can be automatically generated, solving the problems of low efficiency and high cost in chip interface documentation generation and achieving efficient and low-cost documentation generation.
Patent Information
- Application Number
- CN202511556328.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-29
- Publication Date
- 2026-02-27
AI Technical Summary
Chip interface documentation generation is inefficient and costly, and existing technologies require additional scripting, resulting in a huge workload.
By parsing a collection of interface code files, basic data for chip interface documentation is generated, and chip interface documentation is automatically generated based on the target document template parameters.
It reduces the cost of generating chip interface documentation, improves generation efficiency, and eliminates the need for writing additional scripts.
Smart Images

Figure CN121579063A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the chip technical field, and particularly to a chip interface document automatic generation method, an electronic device and a medium. BACKGROUND
[0002] In the chip development process, a large number of chip interface documents need to be generated to record the description information of the chip interface. The data volume of the chip interface document corresponding to one chip design is huge, which may include thousands of pages. If the engineers directly write the chip interface document, the workload is huge. If the chip interface document is generated according to the chip code file, an additional script needs to be written to generate the chip interface document, which results in low generation efficiency and high generation cost of the chip interface document. Therefore, how to reduce the generation cost and improve the generation efficiency of the chip interface document becomes a technical problem to be solved. SUMMARY
[0003] The present application aims to provide a chip interface document automatic generation method, an electronic device and a medium, which reduces the generation cost and improves the generation efficiency of the chip interface document.
[0004] According to the first aspect of the present application, a chip interface document automatic generation method is provided, which comprises the following steps: Step S1, a set of interface code files to be processed {F1, F2,..., Fn,..., FN} is obtained, wherein Fn is the nth interface code file to be processed, the value range of n is 1 to N, N is the total number of the interface code files to be processed, N≥1, and Fn includes the interface description information, the interface name information, the protocol information, the clock information, the reset information and the signal list {R1, R2,..., Rf(n)} corresponding to the nth interface. n ,...,F N} are obtained. n n Fn includes the interface description information, the interface name information, the protocol information, the clock information, the reset information and the signal list {R1, R2,..., Rf(n)} corresponding to the nth interface. n n i n f(n) n i n Ri is the ith signal information corresponding to the nth interface, the value range of i is 1 to f(n), f(n) is the total number of signals corresponding to the nth interface, and Ri includes the signal name, the signal description information, the signal bit range and the signal fixed value. i n Ri includes the signal name, the signal description information, the signal bit range and the signal fixed value. Step S2, {F1, F2,..., Fn,..., FN} is parsed to generate chip interface document basic data. n N Step S3, obtaining a target document template parameter corresponding to the chip interface document; Step S4, generating a target chip interface document based on the document basic data and the target document template parameter.
[0005] According to a second aspect of the present application, an electronic device is provided, comprising at least one processor, and a memory connected with the at least one processor in communication; wherein the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method according to the first aspect of the present application.
[0006] According to a third aspect of the present application, a computer readable storage medium is provided, which stores computer executable instructions for executing the method according to the first aspect of the present application.
[0007] The present application has obvious advantages and beneficial effects compared with the prior art. By the above technical solution, the chip interface document automatic generation method, electronic device and medium provided by the present application can achieve considerable technical progress and practicality, and have wide industrial utilization value, which at least has the following beneficial effects: The present application obtains chip interface document basic data by analyzing a set of code files to be processed, and generates a target chip interface document based on the chip interface document basic data and a target document template parameter, without the need for extra scripts to generate the chip interface document. The present application reduces the generation cost of the chip interface document and improves the generation efficiency of the chip interface document. BRIEF DESCRIPTION OF DRAWINGS
[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.
[0009] Figure 1 The chip interface document automatic generation method flowchart provided by the embodiments of the present application. DETAILED DESCRIPTION
[0010] The technical solutions in the embodiments of the present application will be described clearly and completely in conjunction with the drawings of the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, not all embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.
[0011] The embodiments of the present application provide a chip interface document automatic generation method, which comprises the steps of:Figure 1 As shown, it includes: Step S1: Obtain the set of interface code files to be processed {F1, F2, ..., F n ,...,F N}, where F n This refers to the nth interface code file to be processed, where n ranges from 1 to N, and N is the total number of interface code files to be processed, N≥1,F n This includes the interface description, interface name, protocol information, clock information, reset information, and signal list {R1} corresponding to the nth interface. n R2 n ,...,R i n ,...,R f(n) n}, R i n Let i be the i-th signal information corresponding to the n-th interface, where i ranges from 1 to f(n), f(n) is the total number of signals corresponding to the n-th interface, and R is the total number of signals. i n This includes the signal name, signal description information, signal bit range, and signal fixation value.
[0012] It should be noted that the target chip interface document can be generated based on a single interface code file to be processed, or it can be generated based on multiple interface code files to be processed, depending on the specific application requirements.
[0013] Step S2: Parse {F1,F2,...,F} n ,...,F N}, generate the basic data for the chip interface documentation.
[0014] The document base data includes a document set {te1, te2, ..., te...} x ,...,te X}, table set {ta1,ta2,...,ta y ,...,ta Y Image set {P1, P2, ..., P} z ,...,P Z}, file header, title set {ti1,ti2,...,ti e ,...,ti E} and relationship tree. Where, te x Let x be the x-th document in the basic document data, where x ranges from 1 to X, and X is the total number of documents in the document collection. yP is the yth document in the document base data, y ranges from 1 to Y, Y is the total number of tables in the table set, P z t is the zth picture in the document base data, z ranges from 1 to Z, Z is the total number of pictures in the picture set, ti e e is the e th title in the document base data, e ranges from 1 to E, E is the total number of titles in the title set. It should be noted that the structures of different document base data are consistent, and each is composed of a document set, a table set, a picture set, a file header header, a title set and a relationship tree. Different sets of interface code files to be processed correspond to different specific data contents in the base data. It should be noted that if there is no picture in the application scenario, the picture set is empty.
[0015] As an embodiment, the relationship tree includes a plurality of nodes arranged in a hierarchy, each node is composed of one of te x , ta y , P z , header, ti e , or composed of a plurality of associations of te x , ta y , P z , header, ti e . The association relationship between te x , ta y , P z , header, ti e includes at least one association between te x and at least one ta y , at least one association between te x and at least one P z , at least one association between ta y and at least one P z , an association between ti e and at least one te x , an association between at least one ti e and at least one ta y . It should be noted that the document set, the table set, the picture set, the file header header, and the title set store all data extracted from the chip file, and the relationship tree defines the association relationship and the order relationship between all data extracted from the chip file. The same document, title, table, picture and other information can be reused in different nodes of the relationship tree.
[0016] Step S3, obtaining the target document template parameters corresponding to the chip interface document.
[0017] The target document template parameters corresponding to the chip interface document include font, size, position, color of the file header header, font, size, position, color of each text type, font, size, position, color of each table type, font, size, position, color of each title type, and the position can be specifically center, left, right, etc. The document structure information includes table type sequence, document type sequence, display relationship of text and table, and display relationship of picture and text. The display relationship of text and table includes text and table interlacing, only outputting text without outputting table, and only outputting table without outputting text. The display relationship of picture and text includes picture insertion into text, text surrounding picture, etc.
[0018] Step S4, generating a target chip interface document based on the document basic data and the target document template parameters.
[0019] As an embodiment, if N=1, a target chip interface document is generated based on one interface code file to be processed, and the step S2 includes: Step S21, parsing the interface name information in F1 into a target file header header.
[0020] It should be noted that there is only one file header header in each basic data.
[0021] Step S22, parsing the interface description information, protocol information, clock information, and reset information in F1 into corresponding documents and storing them in a target document set.
[0022] The target document set can include one or more documents.
[0023] Step S23, parsing the R i n into a title and storing it in a target title set.
[0024] The target title set can include one or more titles.
[0025] Step S24, parsing {R1 n ,R2 n ,...,R i n ,...,R f(n) n} into an interface table, the behavior signal name of the interface table, the column of the interface table is signal description information, signal bit range, and signal fixed value, and storing the interface table in a target table set.
[0026] Step S25, generating a target relationship tree {Q1, Q2,..., Q e ,...,Q E} based on the target document set, the target file header header, the target table set, and the target title set, where Q e is the e-th node of the target relationship tree, e ranges from 1 to E, E is the total number of nodes of the target relationship tree, Q1, Q2,..., Q e ,...,Q E are arranged in the order of node generation, Q1 includes the target file header header, F1 corresponds to a node, each R i n corresponds to a node, R i n is a child node of the node corresponding to F1, and each node other than Q1 is composed of one of the documents in the target document set, the titles in the target title set, and the tables in the target table set, or composed of multiple associations of the documents in the target document set, the titles in the target title set, and the tables in the target table set.
[0027] As an embodiment, if N > 1, a target chip interface document is generated based on the plurality of interface code files to be processed, and the step S2 includes: Step C21, extracting information from the interface name of each F n to comprehensively generate the target file header header.
[0028] It should be noted that there is only one file header header in each basic data.
[0029] Step C22, parsing the interface name information in F n into a first-level title and storing the first-level title in the target title set.
[0030] Step C23, parsing the signal name corresponding to R i n into a second-level title and storing the second-level title in the target title set.
[0031] Step C24, parsing the interface description information, the protocol information, the clock information, and the reset information in each F n into corresponding documents and storing the documents in the target document set.
[0032] Step C25, parsing each group {R1 n ,R2 n ,...,R i n ,...,R f(n) n} is parsed into an interface table, the behavior signal name of the table, the column of the table is signal description information, signal bit range and signal fixed value, and the interface table is stored in the target table set.
[0033] Step C26, generating a target relationship tree {Q1, Q2,..., Q e ,...,Q E} based on the target document set, the target file header, the target table set and the target title set. e Qe is the e-th node corresponding to the target relationship tree, e is in the range of 1 to E, E is the total number of nodes of the target relationship tree, Q1, Q2,..., Q e ,...,Q E are arranged in the order of node generation, Q1 includes the target file header header, each F n corresponds to a node, F n corresponding node includes a first-level title, each R i n corresponds to a node, R i n corresponding node includes a second-level title, R i n corresponding node is the child node of the corresponding F n corresponding node, and each node other than Q1 is composed of one of the documents in the target document set, the titles in the target title set and the tables in the target table set, or composed of multiple associations of the documents in the target document set, the titles in the target title set and the tables in the target table set.
[0034] Wherein, the multiple associations of the documents in the target document set, the titles in the target title set and the tables in the target table set include: at least one document in the target document set and at least one table in the target table set association, at least one document in the target document set and at least one title in the target title set association, and at least one table in the target table set and at least one title in the target title set association.
[0035] As an embodiment, the step S3 includes: Step S31, acquiring a chip interface document template, parsing the acquired chip interface document template to generate corresponding document template parameters, and storing the generated document template parameters into a chip interface document template library.
[0036] Step S32, acquiring target document template parameters corresponding to a chip interface document from the chip interface document template library.
[0037] As an embodiment, the step S32 includes: Step S321, obtaining the font, size, position, and color corresponding to the file header header of the chip interface document.
[0038] The position can be specifically center, left, right, etc.
[0039] Step S322, obtaining the font, size, position, and color corresponding to each text type of the chip interface document.
[0040] Step S323, obtaining the font, size, position, and color corresponding to each table type of the chip interface document.
[0041] Step S324, obtaining the font, size, position, and color corresponding to each title type of the chip interface document.
[0042] Step S325, obtaining the document structure information of the chip interface document, which includes the table type sequence, the document type sequence, the display relationship between text and table, and the display relationship between picture and text.
[0043] The display relationship between text and table includes: text and table interlacing, only outputting text without outputting table, and only outputting table without outputting text. The display relationship between picture and text includes picture insertion into text, text surrounding picture, etc.
[0044] It should be noted that in some application scenarios, some data can only be presented to a part of users, some data can be presented to all users, and some data can only be used internally. Therefore, different data has different security levels. In order to present the corresponding visible data in the chip interface document according to the security level of the user, each Q e is provided with a corresponding security level. e
[0045] As an embodiment, the step S4 includes: Step S41, sequentially obtaining Q e .
[0046] Step S42, if the security level of the currently obtained Q e is higher than the security level of the current user, skipping the currently obtained Q e , returning to execute step S41, otherwise, executing step S43.
[0047] Step S43, displaying the content in Q e in the target chip interface document according to the format corresponding to the target document template parameter.
[0048] If the security level of the current acquired node is higher than the security level corresponding to the current user id, it indicates that the data of the current acquired node cannot be presented to the current user, and the current acquired node is skipped. If the security level of the current acquired node is not higher than the security level corresponding to the current user id, it indicates that the data of the current acquired node can be presented to the current user, and thus the data of the node is acquired and generated in the target register document according to the corresponding format in the target document template parameter.
[0049] It is noted that some example embodiments are described as processes or methods depicted as flowcharts. Although the processes are described in a particular, sequential order, many of the processes described can be performed concurrently, in parallel, or simultaneously. In addition, the order of individual processes can be re-arranged. The processes can terminate when their operations are completed, but can also terminate in response to events that are not included in the flowcharts. Processes can correspond in whole, or in part, to example embodiments, or to functions, routines, subroutines, subprograms, or the like.
[0050] The embodiment of the present application further provides an electronic device, comprising: at least one processor; and a memory connected with the at least one processor in communication; wherein the memory stores instructions executed by the at least one processor, and the instructions are arranged to execute the method provided by the embodiment of the present application.
[0051] The embodiment of the present application further provides a computer readable storage medium, which stores computer executable instructions, and the computer executable instructions are used for executing the method provided by the embodiment of the present application.
[0052] The embodiment of the present application acquires chip interface document basic data by parsing the code file set to be processed, and generates a target chip interface document based on the chip interface document basic data and the target document template parameter, so that the corresponding script for generating the chip interface document is not needed, the generation cost of the chip interface document is reduced, and the generation efficiency of the chip interface document is improved.
[0053] The above merely describes the preferred embodiments of the present application, but does not limit the present application in any form, although the present application is disclosed as above with the preferred embodiments. However, the present application is not limited by the above disclosure, and any skilled person in the art can make some changes or modifications to the above disclosed technical contents to make equivalent embodiments with equivalent changes, but as long as the changes or modifications do not deviate from the technical solution of the present application, and the above embodiments are modified, changed or modified according to the technical essence of the present application, all of the above still belong to the scope of the technical solution of the present application.
Claims
1. A method for automatic generation of chip interface documentation, characterized by, The method comprises the following steps: Step S1: Obtain the set of interface code files to be processed {F1, F2, ..., F n ,...,F N }, where F n This refers to the nth interface code file to be processed, where n ranges from 1 to N, and N is the total number of interface code files to be processed, N≥1,F n This includes the interface description, interface name, protocol information, clock information, reset information, and signal list {R1} corresponding to the nth interface. n R2 n ,...,R i n ,...,R f(n) n }, R i n Let i be the i-th signal information corresponding to the n-th interface, where i ranges from 1 to f(n), f(n) is the total number of signals corresponding to the n-th interface, and R is the total number of signals. i n This includes the signal name, signal description, signal bit range, and signal fixation value; Step S2, parsing {F1, F2,..., F n ,...,F N}, generating chip interface document basic data; Step S3, obtaining a target document template parameter corresponding to the chip interface document; Step S4, generating a target chip interface document based on the document basic data and the target document template parameter.
2. The method of claim 1, wherein, if N = 1, the step S2 comprises: Step S21, parsing the interface name information in F1 into a target file header header; Step S22, parsing the interface description information, protocol information, clock information, and reset information in F1 into corresponding documents and storing them in a target document set; 3. The method of claim 1, wherein, if N > 1, the step S2 comprises: Step S23, R i n The corresponding signal name is resolved into a title stored in the target title set; Step S24, parsing {R1 n ,R2 n ,...,R i n ,...,R f(n) n} into an interface table, the behavior signal name of the interface table, the column of the interface table as signal description information, signal bit range and signal fixed value, and storing the interface table in the target table set; Step S25, generating a target relation tree {Q1, Q2,..., Q e ,...,Q E} based on the target document set, the target file header header, the target table set, and the target title set, where Q e is the e-th node of the target relation tree, e ranges from 1 to E, E is the total number of nodes of the target relation tree, Q1, Q2,..., Q e ,...,Q E are arranged in the order of node generation, Q1 includes the target file header header, F1 corresponds to a node, and each R i n corresponds to a node, R i n corresponds to a node that is a child node of the node corresponding to F1, and each node other than Q1 is composed of one of the documents in the target document set, the titles in the target title set, and the tables in the target table set, or composed of multiple associations of the documents in the target document set, the titles in the target title set, and the tables in the target table set.
4. The method of claim 2 or 3, wherein, the plurality of associations composed of the documents in the target document set, the titles in the target title set, and the tables in the target table set comprise at least one association between at least one document in the target document set and at least one table in the target table set, at least one association between at least one document in the target document set and at least one title in the target title set, and at least one association between at least one table in the target table set and at least one title in the target title set.
5. The method of claim 1, wherein, the step S3 comprises: Step C21, extract information from each F n interface name to generate target file header header; Step C22, the interface name information in F n is parsed into a primary title and stored in a target title set; Step C23, R i n The corresponding signal name is resolved to a secondary title stored in the target title set. Step C24, parse the interface description information, protocol information, clock information, reset information in each F n to the corresponding document and store in the target document set; Step C25, parse each group {R1 n ,R2 n ,...,R i n ,...,R f(n) n} into an interface table, the behavior signal name of the table, the column of the table as signal description information, signal bit range and signal fixed value, and store the interface table in the target table set; Step C26, generating target relation tree {Q1, Q2,..., Q e ,...,Q E} based on target document set, target file header, target table set, target title set, Q e is the e-th node of target relation tree, e is in the range of 1 to E, E is the total number of nodes of target relation tree, Q1, Q2,..., Q e ,...,Q E are arranged in the order of node generation, Q1 includes target file header, each F n corresponds to a node, F n corresponding node includes a first-level title, each R i n corresponds to a node, R i n corresponding node includes a second-level title, R i n corresponding node is a child node of corresponding F n , Q1 except each node is composed of one of document in target document set, title in target title set, table in target table set, or composed of multiple associations of document in target document set, title in target title set, table in target table set. Step S31, obtaining a chip interface document template, parsing the obtained chip interface document template to generate a corresponding document template parameter, and storing the generated document template parameter in a chip interface document template library; Step S32, obtaining a target document template parameter corresponding to the chip interface document from the chip interface document template library.
6. The method of claim 1, wherein, the target document template parameter comprises a font, size, position, and color corresponding to a file header header, a font, size, position, and color corresponding to each text type, a font, size, position, and color corresponding to each table type, a font, size, position, and color corresponding to each title type, document structure information, and the document structure information comprises a table type order, a document type order, a display relationship between text and table, and a display relationship between picture and text. The method comprises the following steps: at least one processor; and a memory in communication connection with the at least one processor; wherein the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method of any one of the preceding claims 1-6. The computer executable instructions are stored in the memory, and the computer executable instructions are used to execute the method of any one of the preceding claims 1-6.
7. An electronic device, comprising: 8. A computer-readable storage medium, characterized in that,
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