System, method and device for realizing real-time uninterrupted transmission of ultra-large bandwidth data through USB4, processor and storage medium thereof

Abstract

The invention relates to a system for realizing real-time uninterrupted transmission of ultra-large bandwidth data through a USB4 (Universal Serial Bus 4), which comprises signal acquisition equipment, a USB4 transmission module, data receiving equipment and a system control module, and is characterized in that the signal acquisition equipment is deployed at an FPGA (Field Programmable Gate Array) end of a collector and is used for acquiring original data; the USB4 transmission module is used for transmitting data in the signal acquisition equipment to the data receiving equipment at a high speed through the USB4 transmission module; the data receiving equipment is used for temporarily storing data and processing and analyzing the data; the system control module is used for monitoring the whole data transmission process in real time. According to the system, the method, the device, the processor and the computer readable storage medium for realizing the real-time uninterrupted transmission of the ultra-large bandwidth data through the USB4, the innovative technical scheme is adopted, so that the system, the method, the device, the processor and the computer readable storage medium have remarkable bandwidth advantages, high safety, high reliability, flexibility, system stability and good expandability; and the overall performance and the application value of the signal acquisition and data transmission system are greatly improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data transmission, especially the field of real-time transmission of large data volumes, and specifically refers to a system, method, device, processor and computer readable storage medium for realizing uninterrupted real-time transmission of ultra-large bandwidth data through USB4. BACKGROUND

[0002] In the context of growing demand for modern data transmission, high-speed and stable data transmission becomes crucial. Although there are various data transmission protocols and interfaces in the existing technology, there are still problems such as insufficient bandwidth, transmission delay and data loss in real-time transmission of large data volumes. USB4, as the latest generation of Universal Serial Bus protocol, has high bandwidth, low delay and good compatibility, and is suitable for large data transmission. However, how to fully utilize the advantages of USB4 to establish an efficient and stable data transmission system is still a problem to be solved. The relevant concepts are as follows: 1. Basic concepts of USB4 interface USB4 is the latest generation of USB interface standard, based on Thunderbolt 4 technology, providing a transmission rate of up to 40 Gbps, supporting transmission of multiple protocols including DisplayPort, PCIe, etc. The high bandwidth and low delay characteristics of USB4 can ensure fast transmission of large data volumes.

[0003] 2. Introduction to high-bandwidth data transmission Using the high-bandwidth characteristics of USB4 interface, fast transmission of large data volumes is achieved, ensuring uninterrupted and low-delay data transmission.

[0004] Several key technical problems encountered in the process of signal acquisition and data transmission in the existing technology mainly include the following aspects: 1. Insufficient bandwidth The existing technology uses traditional USB interfaces (such as USB2.0 and USB3.0) and other data transmission protocols with limited bandwidth, which cannot meet the demand of modern signal acquisition devices for real-time transmission of ultra-large data volumes.

[0005] 2. Transmission delay and data loss When faced with large data volumes, traditional data transmission systems are prone to delay, data loss or transmission interruption, affecting real-time performance and data integrity.

[0006] 3. Transmission reliability The existing technology lacks a perfect monitoring and early warning mechanism for data transmission, which may result in unreliable data transmission, data errors and transmission failures. SUMMARY

[0007] The present application aims to overcome the above-mentioned shortcomings of the prior art, and provides a system, method, device, processor and computer readable storage medium for realizing real-time uninterrupted transmission of super-large bandwidth data through USB4, which meets the requirements of high bandwidth, low delay and wide application range.

[0008] To achieve the above-mentioned purpose, the system, method, device, processor and computer readable storage medium for realizing real-time uninterrupted transmission of super-large bandwidth data through USB4 are as follows: The system for realizing real-time uninterrupted transmission of super-large bandwidth data through USB4 mainly comprises a signal acquisition device, a USB4 transmission module, a data receiving device and a system control module. The signal acquisition device is arranged at the FPGA end of the collector and is used for acquiring raw data. The USB4 transmission module is connected with the signal acquisition device and is used for transmitting the data in the signal acquisition device to the data receiving device at high speed through the USB4 transmission module. The data receiving device is connected with the USB4 transmission module and is used for temporarily storing data and processing and analyzing the data. The system control module is connected with the signal acquisition device, the USB4 transmission module and the data receiving device and is used for monitoring the whole data transmission process in real time.

[0009] Preferably, the signal acquisition device comprises a signal acquisition module and a data buffer module. The data buffer module is connected with the signal acquisition module. The signal acquisition module is used for acquiring super-large bandwidth raw data in real time, and the data buffer module is used for temporarily storing the acquired data.

[0010] Preferably, the USB4 transmission module comprises a USB4 interface circuit and a transmission control module. The USB4 interface circuit is connected with the data buffer module of the signal acquisition device. The transmission control module is connected with the USB4 interface circuit. The transmission control module is used for managing the transmission process of data, so that the data is transmitted in real time and uninterrupted. The USB4 interface circuit encapsulates the data as a PCIe data packet through a USB4 interface and transmits the data to a PC end.

[0011] Preferably, the data receiving device comprises a data processing module and a three-level cache area. The data processing module is connected with the USB4 transmission module and is used for processing and analyzing the data. The three-level cache area comprises an Xillybus buffer area, an APP buffer area and a persistent storage area. The Xillybus buffer area is used for receiving raw data and buffering at a fluctuating rate. The APP buffer area is used for a processing transfer zone. The persistent storage area is used for writing data.

[0012] Preferably, the system control module includes a transmission status monitoring unit and an error warning unit. The transmission status monitoring unit is connected to the signal acquisition device, the USB4 transmission module, and the data receiving device, and is used to monitor the data transmission status in real time. The error warning unit is connected to the transmission status monitoring module and is used to monitor the queue full status during data transmission and issue an EOF warning.

[0013] The main feature of this method for achieving real-time uninterrupted transmission of ultra-high bandwidth data via USB4 is that the method includes the following steps: (1) The signal acquisition module obtains raw signal data with ultra-high bandwidth from the signal source and stores it in the data cache module; (2) The decrypted data is transmitted to the data processing module for further processing and analysis to obtain the final valid information; (3) The system control module monitors the entire data transmission process in real time, monitors the queue full status during the data transmission process and issues an EOF warning.

[0014] Preferably, step (1) specifically includes the following steps: (1.1) The FPGA acquires signal data in real time and writes it into the FIFO queue; (1.2) When the FIFO occupancy rate is greater than or equal to 95%, an EOF warning is triggered and data collection is suspended.

[0015] This device, which enables real-time, uninterrupted transmission of ultra-high bandwidth data via USB4, is characterized by comprising: A processor is configured to execute computer-executable instructions; The memory stores one or more computer-executable instructions, which, when executed by the processor, implement the steps of the method described above for achieving real-time uninterrupted transmission of ultra-high bandwidth data via USB4.

[0016] The processor that enables real-time uninterrupted transmission of ultra-high bandwidth data via USB4 is characterized in that the processor is configured to execute computer-executable instructions, which, when executed by the processor, implement the various steps of the aforementioned method for enabling real-time uninterrupted transmission of ultra-high bandwidth data via USB4.

[0017] The main feature of this computer-readable storage medium is that it stores a computer program thereon, which can be executed by a processor to implement the various steps of the above-described method for real-time uninterrupted transmission of ultra-high bandwidth data via USB4.

[0018] The system, method, apparatus, processor, and computer-readable storage medium of the present invention, which enable real-time uninterrupted transmission of ultra-high bandwidth data via USB4, have significant advantages over existing technologies in terms of bandwidth, real-time transmission capability, high security, high reliability, flexibility, wide applicability, efficient data processing, system stability, and good scalability. By adopting innovative technical solutions, the present invention solves the problems of insufficient bandwidth, transmission delay, data loss, and security in existing technologies, and greatly improves the overall performance and application value of signal acquisition and data transmission systems. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the system architecture for achieving real-time uninterrupted transmission of ultra-high bandwidth data via USB4 according to the present invention.

[0020] Figure 2 This is a flowchart of the PC-side data reception and processing of the method for real-time uninterrupted transmission of ultra-high bandwidth data via USB4 according to the present invention.

[0021] Figure 3 The flowchart of the three-level buffer execution of the data receiving device for the method of realizing real-time uninterrupted transmission of ultra-high bandwidth data via USB4 according to the present invention is shown. Detailed Implementation

[0022] To more clearly describe the technical content of the present invention, the following description is provided in conjunction with specific embodiments.

[0023] This invention discloses a system for real-time, uninterrupted transmission of ultra-high bandwidth data via USB4. The system includes a signal acquisition device, a USB4 transmission module, a data receiving device, and a system control module. The signal acquisition device is deployed on the FPGA of the acquisition unit and is used to acquire raw data. The USB4 transmission module is connected to the signal acquisition device and is used to transmit data from the signal acquisition device to the data receiving device at high speed via USB4. The data receiving device is connected to the USB4 transmission module and is used for temporary data storage, processing, and analysis. The system control module is connected to the signal acquisition device, the USB4 transmission module, and the data receiving device and is used to monitor the entire data transmission process in real time.

[0024] In a preferred embodiment of the present invention, the signal acquisition device includes a signal acquisition module and a data cache module. The data cache module is connected to the signal acquisition module. The signal acquisition module is used to acquire ultra-high bandwidth raw data in real time, and the data cache module is used to temporarily store the acquired data.

[0025] In a preferred embodiment of the present invention, the USB4 transmission module includes a USB4 interface circuit and a transmission control module. The USB4 interface circuit is connected to the data buffer module of the signal acquisition device, and the transmission control module is connected to the USB4 interface circuit. The transmission control module is used to manage the data transmission process, so that the data is transmitted in real time without interruption. The USB4 interface circuit encapsulates the data into PCIe data packets through the USB4 interface and transmits them to the PC.

[0026] In a preferred embodiment of the present invention, the data receiving device includes a data processing module and a three-level buffer. The data processing module is connected to the USB4 transmission module and is used to process and analyze data. The three-level buffer includes a Xillybus buffer, an APP buffer, and a persistent storage area. The Xillybus buffer is used to receive raw data and buffers fluctuations. The APP buffer is used to process the transit area. The persistent storage area is used to write data.

[0027] In a preferred embodiment of the present invention, the system control module includes a transmission status monitoring unit and an error warning unit. The transmission status monitoring unit is connected to the signal acquisition device, the USB4 transmission module, and the data receiving device, and is used to monitor the data transmission status in real time. The error warning unit is connected to the transmission status monitoring module and is used to monitor the queue full status during data transmission and issue an EOF warning.

[0028] The method for achieving real-time uninterrupted transmission of ultra-high bandwidth data via USB4 according to the present invention includes the following steps: (1) The signal acquisition module obtains raw signal data with ultra-high bandwidth from the signal source and stores it in the data cache module; (2) The decrypted data is transmitted to the data processing module for further processing and analysis to obtain the final valid information; (3) The system control module monitors the entire data transmission process in real time, monitors the queue full status during the data transmission process and issues an EOF warning.

[0029] In a preferred embodiment of the present invention, step (1) specifically includes the following steps: (1.1) The FPGA acquires signal data in real time and writes it into the FIFO queue; (1.2) When the FIFO occupancy rate is greater than or equal to 95%, an EOF warning is triggered and data collection is suspended.

[0030] The present invention relates to a device for real-time uninterrupted transmission of ultra-high bandwidth data via USB4, wherein the device comprises: A processor is configured to execute computer-executable instructions; The memory stores one or more computer-executable instructions, which, when executed by the processor, implement the steps of the method described above for achieving real-time uninterrupted transmission of ultra-high bandwidth data via USB4.

[0031] The present invention discloses a processor for real-time uninterrupted transmission of ultra-high bandwidth data via USB4, wherein the processor is configured to execute computer-executable instructions, and when the computer-executable instructions are executed by the processor, the various steps of the above-described method for real-time uninterrupted transmission of ultra-high bandwidth data via USB4 are implemented.

[0032] The computer-readable storage medium of the present invention stores a computer program that can be executed by a processor to implement the various steps of the method for real-time uninterrupted transmission of ultra-high bandwidth data via USB4.

[0033] This invention provides a signal acquisition system and method for real-time uninterrupted transmission of ultra-high bandwidth data based on USB4, including a signal acquisition device, a USB4 transmission module, a data receiving device, and a system control module. This system can effectively achieve real-time transmission of large amounts of data while ensuring data integrity and continuity during transmission.

[0034] The system architecture is as follows: 1. Signal acquisition equipment The signal acquisition device is deployed on the FPGA side of the acquisition unit and includes a signal acquisition module and a data buffer module. The signal acquisition module is responsible for acquiring ultra-high bandwidth raw data (such as high-speed ADC signals) in real time, while the data buffer module (FIFO queue) is used to temporarily store the acquired data. The capacity can be dynamically adjusted to ensure stable transmission of the data source.

[0035] Key mechanism: FPGA monitors the FIFO status, triggers an EOF warning and pauses data acquisition when the queue is full (ensuring data continuity).

[0036] 2. USB4 transmission module The USB4 transmission module is responsible for transmitting data from the signal acquisition device to the data receiving device at high speed via the USB4 interface. It includes the USB4 interface circuitry and the transmission control module.

[0037] The transmission control module manages the data transmission process, ensuring that data is transmitted in real time without interruption.

[0038] Physical layer: USB4 interface circuit (40Gbps bandwidth); Control layer: Data acquisition end: Data transmission is managed via Xillybus driver; PC side: Optimized protocol encapsulation for transmission control module (PCIe tunneling technology); Data flow: FIFO → USB4 physical interface → PC-side Xillybus buffer.

[0039] 3. Data receiving equipment The data receiving device includes a three-level buffer and a data processing module. The three-level buffer is used to temporarily store the received data, and the data processing module is used to process and analyze the data.

[0040] like Figure 3 As shown, the data receiving device is entirely deployed on the PC and includes a three-level cache: Xillybus buffer (8GB): Receives raw data, buffer rate fluctuates (supports 3-second latency tolerance); APP buffer: an intermediate area for application layer processing (such as data decryption / format conversion); Persistent storage: RAID 0 array solid-state drives (written directly via FILE_FLAG_NO_BUFFERING, avoiding kernel copying).

[0041] 4. System Control Module The system control module includes a transmission status monitoring unit and an error early warning unit. The transmission status monitoring unit monitors the data transmission status in real time, while the error early warning unit monitors the queue fullness during data transmission and issues an EOF (Extended Error) warning to ensure the integrity of data transmission.

[0042] The system control module includes a data acquisition unit, where an FPGA is used to monitor the transmission status (FIFO status) and provide EOF warnings; and a PC-side unit, where a driver layer API monitors the USB4 link status and an application layer performs error correction.

[0043] Figure 1 The direction of the middle arrow indicates the data flow: FPGA FIFO → USB4 → Xillybus buffer → APP buffer → RAID 0 solid-state drive array.

[0044] ; The transmission method is as follows:

[0045] 1. Signal Acquisition and Buffering The signal acquisition module obtains raw signal data with ultra-high bandwidth from the signal source and stores it in the data cache module to ensure a continuous supply of data.

[0046] 2. Data Processing and Analysis The decrypted data is transmitted to the data processing module for further processing and analysis to obtain the final valid information.

[0047] 3. Transmission monitoring and early warning The transmission status monitoring unit in the system control module monitors the entire data transmission process in real time, detects queue fullness during data transmission, and issues EOF warnings to ensure the continuity and integrity of data transmission.

[0048] The specific steps and data transmission processing steps for achieving ultra-high bandwidth and real-time uninterrupted data transmission in this solution are as follows: 1. Data Acquisition and Pre-caching • The FPGA acquires signal data in real time and writes it into a FIFO queue; • Monitoring mechanism: When the FIFO occupancy rate is ≥95%, an EOF warning is triggered, and data collection is suspended; 2. USB4 protocol layer transmission • Xillybus driver reads FIFO data at ≥1MB / time; • Transmitted to the PC via USB4 interface encapsulated as PCIe data packets (tunneling technology); 3. PC-side data reception and processing 4. Storage optimization • Write optimization: Write in 512-byte sector alignment to avoid kernel copying; • Hardware acceleration: RAID 0 array concurrently writes to multiple NVMe SSDs (breaking the single-disk SLC cache limit).

[0049] In a specific embodiment of the present invention, the signal acquisition system of the hardware part includes: The USB4 interface module provides a high-speed, bidirectional data transfer channel. The data acquisition front end is connected to the USB4 interface module and is used to acquire and perform preliminary processing of analog or digital signals; A high-speed data processor, coupled to the USB4 interface module and the data acquisition front end, is responsible for real-time processing of the acquired data; A memory module is used to temporarily store data being processed, ensuring the continuity of the data stream; Persistent storage devices are used to store processed data for a long period of time. The control unit is configured to manage and optimize the data flow between the aforementioned components to ensure real-time performance and uninterrupted transmission under high bandwidth conditions.

[0050] The method for data transmission in this signal acquisition system includes the following steps: (a) Receive data from an external source via the USB4 interface; (b) Perform real-time preprocessing on the received data, such as filtering or encoding; (c) Efficiently transmit the preprocessed data to a high-speed data processor; (d) After further processing, the data is immediately written to a persistent storage device; (e) Maintain the continuity and stability of data transmission throughout the process to ensure no data loss or delay.

[0051] The data collector part of this invention is as follows: 1. Data Acquisition and Storage: The data acquisition unit uses an FPGA for data acquisition. The FPGA stores the real-time acquired data in its internal FIFO (First In First Out) queue.

[0052] The FPGA continuously monitors the size of the FIFO queue. When the FIFO queue is full, the FPGA sends an EOF (End of File) signal to the PC, indicating that data reading is not timely and stopping data acquisition. This mechanism ensures the continuity and integrity of the acquired data.

[0053] The PC version of this invention is as follows: 1. Data reading and storage: like Figure 2 As shown, the PC continuously reads FIFO data from the FPGA via the Xillybus driver and stores this data in the Xillybus buffer. The Xillybus buffer is set to 8GB in size to handle potential rate fluctuations during data processing.

[0054] At a data transfer rate of 2.4 GB / s, the Xillybus buffer allows for a processing delay of approximately 3 seconds, thus preventing the FIFO queue from becoming full due to insufficient instantaneous data transfer rate.

[0055] 2. Data processing and optimization: When an application reads data from the Xillybus buffer, it reads at least 1MB of data at a time. By ensuring that the amount of data read in a single session is large enough, excessive I / O requests can be reduced, avoiding the bottleneck of single-core CPU processing and thus achieving ideal bandwidth performance.

[0056] 3. Data is written to the hard drive: When writing to a disk file, the operating system by default copies the data to the kernel space first, and then the control program writes it to the hard drive. When the data bandwidth is high, this copying process affects the data transfer rate. To solve this problem, this solution in Windows systems sets the FILE_FLAG_NO_BUFFERING flag in the write function, allowing data to bypass the kernel space and be written directly to the hard drive. Direct reading and writing to the hard drive requires operations on a sector-by-sector basis. Typically, the logical sector size of an NVMe SSD is 512 bytes, and the program needs to ensure that the amount of data read and written in a single operation is a multiple of 512 bytes.

[0057] 4. Solid State Drive Performance Optimization: Modern solid-state drives (SSDs) are typically very fast, but the speeds advertised by manufacturers are usually the maximum speeds achievable by the SSD, i.e., the speed at which the external cache is written. For example, the 990 PRO 1TB SSD will quickly exhaust its external cache (1GB) and internal SLC emulation cache (240GB when empty) during sustained high-bandwidth writes. At this point, the speed will drop to the speed of direct writes to TLC NAND flash memory, approximately 1GB / s. To address this issue, this solution uses multiple SSDs arranged in a RAID 0 array, allowing simultaneous read and write operations across multiple drives, thus meeting the receiver's bandwidth requirements. The RAID 0 array provides higher read and write speeds and bandwidth, ensuring that the system maintains high performance during high-bandwidth data transfers.

[0058] Compared with the prior art, the present invention, employing the above technical solution, has the following technical effects: 1. Ultra-high bandwidth transmission capability This invention utilizes the bandwidth capability of the USB4 interface, which is up to 40Gbps, to achieve high-speed transmission of ultra-large amounts of data, significantly improving bandwidth utilization and meeting the high bandwidth requirements of modern signal acquisition equipment.

[0059] 2. Real-time uninterrupted transmission This invention ensures the real-time and continuous nature of data transmission through an efficient transmission control module and cache management strategy, avoiding data loss and transmission delay.

[0060] 3. Efficient data processing This invention employs a RAID 0 array to improve the read and write speeds of the solid-state drive (SSD), ensuring high system performance during high-bandwidth data transmission. By setting the FILE_FLAG_NO_BUFFERING flag, data is written directly to the hard drive, increasing the data transfer rate and avoiding the impact of kernel space copying. By adjusting the data read volume, I / O requests are reduced, avoiding the bottleneck of single-core CPU processing and improving overall system performance.

[0061] 4. High reliability The transmission status monitoring and early warning function in the system control module of this invention can monitor the data transmission status in real time and issue an EOF warning in a timely manner to ensure the reliability and integrity of data transmission.

[0062] 5. Flexibility and compatibility This invention uses a USB4 interface, which has good compatibility and can be seamlessly connected with various signal acquisition devices and data receiving devices to adapt to different application scenarios and needs, thereby improving the system's flexibility and compatibility.

[0063] For the specific implementation scheme of this embodiment, please refer to the relevant descriptions in the above embodiments, which will not be repeated here.

[0064] It is understood that the same or similar parts in the above embodiments can be referred to each other, and the contents not described in detail in some embodiments can be referred to the same or similar contents in other embodiments.

[0065] It should be noted that in the description of this invention, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means at least two.

[0066] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing a particular logical function or process, and the scope of the preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which embodiments of the invention pertain.

[0067] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution device. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0068] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The corresponding program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiments.

[0069] Furthermore, the functional units in the various embodiments of the present invention can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0070] The storage media mentioned above can be read-only memory, disk, or optical disk, etc.

[0071] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0072] The system, method, apparatus, processor, and computer-readable storage medium of the present invention, which enable real-time uninterrupted transmission of ultra-high bandwidth data via USB4, have significant advantages over existing technologies in terms of bandwidth, real-time transmission capability, high security, high reliability, flexibility, wide applicability, efficient data processing, system stability, and good scalability. By adopting innovative technical solutions, the present invention solves the problems of insufficient bandwidth, transmission delay, data loss, and security in existing technologies, and greatly improves the overall performance and application value of signal acquisition and data transmission systems.

[0073] In this specification, the invention has been described with reference to specific embodiments thereof. However, it will be apparent that various modifications and variations can be made without departing from the spirit and scope of the invention. Therefore, the specification and drawings should be considered illustrative rather than restrictive.

Claims

1. A system for real-time uninterrupted transmission of ultra-high bandwidth data via USB4, characterized in that, The system includes a signal acquisition device, a USB4 transmission module, a data receiving device, and a system control module. The signal acquisition device is deployed on the FPGA of the acquisition unit and is used to acquire raw data. The USB4 transmission module is connected to the signal acquisition device and is used to transmit the data from the signal acquisition device to the data receiving device at high speed via USB4. The data receiving device is connected to the USB4 transmission module and is used to temporarily store data and process and analyze the data. The system control module is connected to the signal acquisition device, the USB4 transmission module, and the data receiving device and is used to monitor the entire data transmission process in real time.

2. The system for real-time uninterrupted transmission of ultra-high bandwidth data via USB4 as described in claim 1, characterized in that, The signal acquisition device includes a signal acquisition module and a data cache module. The data cache module is connected to the signal acquisition module. The signal acquisition module is used to acquire ultra-high bandwidth raw data in real time, and the data cache module is used to temporarily store the acquired data.

3. The system for real-time uninterrupted transmission of ultra-high bandwidth data via USB4 according to claim 1, characterized in that, The USB4 transmission module includes a USB4 interface circuit and a transmission control module. The USB4 interface circuit is connected to the data buffer module of the signal acquisition device, and the transmission control module is connected to the USB4 interface circuit. The transmission control module is used to manage the data transmission process, so that the data is transmitted in real time without interruption. The USB4 interface circuit encapsulates PCIe data packets through the USB4 interface and transmits them to the PC.

4. The system for real-time uninterrupted transmission of ultra-high bandwidth data via USB4 according to claim 1, characterized in that, The data receiving device includes a data processing module and a three-level buffer. The data processing module is connected to the USB4 transmission module and is used to process and analyze data. The three-level buffer includes a Xillybus buffer, an APP buffer, and a persistent storage area. The Xillybus buffer is used to receive raw data and buffers fluctuations. The APP buffer is used to process the transit area. The persistent storage area is used to write data.

5. The system for real-time uninterrupted transmission of ultra-high bandwidth data via USB4 according to claim 1, characterized in that, The system control module includes a transmission status monitoring unit and an error warning unit. The transmission status monitoring unit is connected to the signal acquisition device, the USB4 transmission module, and the data receiving device, and is used to monitor the data transmission status in real time. The error warning unit is connected to the transmission status monitoring module and is used to monitor the queue full status during data transmission and issue an EOF warning.

6. A method for achieving real-time uninterrupted transmission of ultra-high bandwidth data via USB4 based on the system described in claim 1, characterized in that, The method includes the following steps: (1) The signal acquisition module obtains raw signal data with ultra-high bandwidth from the signal source and stores it in the data cache module; (2) The decrypted data is transmitted to the data processing module for further processing and analysis to obtain the final valid information; (3) The system control module monitors the entire data transmission process in real time, monitors the queue full status during the data transmission process and issues an EOF warning.

7. The method for achieving real-time uninterrupted transmission of ultra-high bandwidth data via USB4 according to claim 6, characterized in that, Step (1) specifically includes the following steps: (1.1) The FPGA acquires signal data in real time and writes it into the FIFO queue; (1.2) When the FIFO occupancy rate is greater than or equal to 95%, an EOF warning is triggered and data collection is suspended.

8. A device for real-time uninterrupted transmission of ultra-high bandwidth data via USB4, characterized in that, The device includes: A processor is configured to execute computer-executable instructions; The memory stores one or more computer-executable instructions, which, when executed by the processor, implement the steps of the method for real-time uninterrupted transmission of ultra-high bandwidth data via USB4 as described in any one of claims 6 to 7.

9. A processor that enables real-time, uninterrupted transmission of ultra-high bandwidth data via USB4, characterized in that, The processor is configured to execute computer-executable instructions, which, when executed by the processor, implement the steps of the method for real-time uninterrupted transmission of ultra-high bandwidth data via USB4 as described in any one of claims 6 to 7.

10. A computer-readable storage medium, characterized in that, It stores a computer program that can be executed by a processor to implement the steps of the method for real-time uninterrupted transmission of ultra-high bandwidth data via USB4 as described in any one of claims 6 to 7.

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