Double-layer collaborative optimization power grid partitioning method and related device

Abstract

The invention discloses a double-layer collaborative optimization power grid partitioning method and a related device, and the method achieves the collaborative optimization of a power grid partitioning structure and simulation calculation resource allocation by constructing an upper-layer optimization model and a lower-layer optimization model which are mutually dependent, and comprises the steps: taking the maximum partitioning balance degree as a target; constructing an upper-layer optimization model by combining a partition calculation amount constraint and a partition decoupling cost constraint; constructing a lower-layer optimization model in combination with simulation calculation core occupancy constraints by taking the highest calculation resource efficiency as a target; the upper-layer model and the lower-layer model are combined to form a double-layer optimization model with a decision dependency relationship, the boundary of the partition calculation amount constraint is obtained by the lower-layer model, and the boundary of the simulation calculation core occupation constraint is obtained by the upper-layer model; and carrying out iterative solution on the double-layer model to obtain a power grid partitioning scheme which meets the electrical decoupling requirement and has high parallel efficiency and a computing resource allocation result.

Description

Technical Field

[0001] This invention pertains to power grid electromagnetic transient simulation technology, and particularly relates to a two-layer collaborative optimization method for power grid partitioning and related devices. Background Technology

[0002] With the advancement of new power system construction, the large-scale integration of renewable energy and power electronic equipment into the power system is continuously increasing the dynamic complexity of the system, making the power grid exhibit stronger nonlinearity, strong coupling, and rapid time-varying characteristics. Against this backdrop, in order to accurately describe transient behavior at the microsecond and even nanosecond levels, electromagnetic transient simulation has become a core analytical tool in important fields such as the dynamic characteristics of power electronic interface devices, the interaction mechanism of AC / DC hybrid systems, and the design of protection and control strategies.

[0003] Because electromagnetic transient simulation requires repeatedly solving large-scale sparse equations under extremely small step sizes, its computational load increases significantly with the scale of the power grid, making it difficult for traditional electromagnetic transient simulation to meet the real-time or near-real-time performance requirements for ultra-large-scale systems. To improve computational speed, engineering practice typically employs parallel computing clusters or dedicated real-time simulators. However, these platforms have high hardware costs, complex communication structures, and limited scalability, and still face significant bottlenecks as the scale of simulations continues to grow.

[0004] To improve simulation efficiency, grid-based parallel simulation technology has gradually become a key approach. Its basic idea is to divide the complete power grid into several subsystems, solve them in parallel on multiple computing cores, and exchange boundary information through interfaces to obtain the overall simulation results. However, existing grid-based strategies are mostly based on single-layer partitioning, focusing only on the electrical connectivity of the system or the basic balance of subnet size. They fail to fully consider factors such as differences in component computational complexity, modeling errors in strongly coupled regions, subnet communication volume after partitioning, and the availability of computing resources. This results in insufficient grid-based rationality, unbalanced computational load, and excessive communication overhead, making it difficult to achieve a system-optimal parallel simulation structure.

[0005] In addition, traditional network-based methods generally lack resource scheduling mechanisms that match the characteristics of actual computing hardware, making it difficult to achieve an effective balance between simulation accuracy, speed, and hardware usage. This results in low resource utilization and limits the performance improvement potential of large-scale electromagnetic transient simulations. Summary of the Invention

[0006] Based on this, the present invention aims to propose a two-layer collaborative optimization method for power grid partitioning and related devices, taking into account the constraints of power system computing requirements and computing resources, and achieving priority decoupling of solution variables through a two-layer optimization model, so as to effectively improve the computational efficiency of simulation.

[0007] In a first aspect, the present invention provides a two-layer collaborative optimization method for power grid partitioning, comprising:

[0008] With the goal of maximizing the degree of power grid zoning balance, and with zoning computational constraints and zoning decoupling cost constraints as constraints, an upper-level optimization model is constructed.

[0009] With the goal of maximizing computing resource efficiency, the lower-level optimization model is constructed using the core occupancy constraints of simulation computing as the constraint condition;

[0010] The upper-level optimization model and the lower-level optimization model are combined into a two-level optimization model. The decision dependency relationship of the two-level optimization model is defined as follows: the boundary of the partition computation constraint is obtained by solving the lower-level optimization model, and the boundary of the simulation calculation core occupancy constraint is obtained by solving the upper-level optimization model.

[0011] The two-level optimization model is solved iteratively to obtain the power grid partitioning results and the computational resource allocation results.

[0012] Furthermore, the objective function of the upper-level optimization model is expressed as:

[0013] ,

[0014] in, , Indicates the weighting factor. Indicates the cost of partition decoupling. The partition imbalance is represented by N, the number of partitions, and i and j, which are the partition numbers.

[0015] Furthermore, the computational cost constraint for each partition is that the sum of the computational costs of each partition is no greater than the computational cost of the simulation core. The computational cost of each partition is calculated based on the computational time occupied by each transient element within the partition.

[0016] Furthermore, the computational constraint for partitioning is expressed as:

[0017] ,

[0018] in, The computational cost of the i-th partition is represented by N; N represents the number of partitions. This represents the computational cost of the k-th transient element within the partition, calculated based on the computation time required by the transient element. Indicates the number of transient elements within the partition; This represents the computational cost of the m-th simulation core, which is calculated by the lower-level optimization model. This indicates the number of cores used in the simulation.

[0019] Furthermore, the cost constraint for partition decoupling is expressed as:

[0020] ,

[0021] in, Indicates the cost of partition decoupling. This indicates the length of the connection line between partitions i and j.

[0022] Furthermore, the degree of regional imbalance The calculation is based on the computational cost of each partition, and is represented as follows:

[0023] ,

[0024] in, The value represents the computational cost of the i-th partition, and N represents the number of partitions.

[0025] Furthermore, the lower-level optimization model is represented as:

[0026] ,

[0027] in, , , Indicates the weighting factor. Indicates the number of cores used in the simulation. This represents the core utilization rate of the e-th simulation calculation. This indicates the number of cores used in the simulation calculation. This represents the communication volume between the simulation calculation cores s and v.

[0028] Furthermore, the core occupancy constraint for simulation calculations is expressed as:

[0029] ,

[0030] in, The solution is obtained from the upper-level optimization model. This represents the total number of simulation computing cores in the simulation cluster. This indicates the single-step simulation time of a single simulation calculation core.

[0031] Furthermore, the two-level optimization model is iteratively solved to obtain the power grid partitioning results and computational resource allocation results, including:

[0032] The upper-level optimization model is optimized and solved using the average partitioning computation as the initial value to obtain the optimized network result of one round.

[0033] Based on the results of the first round of optimized network partitioning, the lower-level optimization model is optimized and solved to obtain the results of the first round of computing resource allocation.

[0034] Using the results of one round of network optimization and one round of computational resource allocation as the initial values ​​for iteration, the two-level optimization model is iteratively solved to obtain the power grid partitioning results and computational resource allocation results.

[0035] Secondly, the present invention provides a dual-layer collaborative optimization power grid partitioning device, comprising:

[0036] The first modeling module is used to construct an upper-level optimization model with the goal of maximizing the degree of grid zoning balance and with constraints on zoning computation and zoning decoupling cost as constraints.

[0037] The second modeling module is used to construct a lower-level optimization model with the goal of maximizing computing resource efficiency and the core occupancy constraints of simulation computing as the constraint condition.

[0038] The two-layer modeling module combines the upper-layer optimization model and the lower-layer optimization model into a two-layer optimization model. The decision dependency relationship of the two-layer optimization model is defined as follows: the boundary of the partition computational constraint is obtained by solving the lower-layer optimization model, and the boundary of the simulation calculation core occupancy constraint is obtained by solving the upper-layer optimization model.

[0039] The model solving module is used to iteratively solve the two-level optimization model to obtain the power grid partitioning results and the computational resource allocation results.

[0040] Thirdly, the present invention provides an electronic device including a memory storing computer-executable instructions and a processor, wherein when the computer-executable instructions are executed by the processor, the device performs the steps of the two-layer collaborative optimization power grid partitioning method provided in the first aspect.

[0041] Fourthly, the present invention provides a readable storage medium storing a computer-executable program that, when executed, implements the various steps of the two-layer collaborative optimization power grid partitioning method provided in the first aspect.

[0042] The present invention has the following beneficial effects:

[0043] This invention proposes a two-layer collaborative optimization method and related apparatus for power grid partitioning. By constructing a two-layer collaborative model that combines partitioning structure optimization with computational resource allocation optimization, the power grid partitioning process can simultaneously consider electrical decoupling effects and simulation resource utilization efficiency. The upper-layer model optimizes the global partitioning structure based on features such as partitioning computational load and partitioning coupling relationships, resulting in good decoupling and balance in partitioning. The lower-layer model, based on the upper-layer partitioning structure, coordinates core occupancy, core quantity, and communication overhead to achieve optimal allocation of computational resources. Through the interdependence and iterative solution of the upper and lower-layer models, the partitioning boundary and computational core allocation can dynamically converge to the global optimum. This allows electromagnetic transient simulation to significantly reduce partitioning coupling costs while meeting computational accuracy requirements, improve the load balance of parallel simulation, maximize the parallel computing capabilities of the simulation cluster, and significantly improve overall simulation efficiency and computational performance. The power grid partitioning method proposed in this invention has a clear structure, strong convergence, is suitable for large-scale power grid simulation scenarios, and has good engineering application value. Attached Figure Description

[0044] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0045] Figure 1 A flowchart illustrating the implementation of the two-layer collaborative optimization power grid partitioning method provided in this embodiment of the invention;

[0046] Figure 2 A schematic diagram of the structure of the dual-layer collaborative optimization power grid partitioning device provided in an embodiment of the present invention;

[0047] Figure 3 This is an electronic device architecture diagram provided for an embodiment of the present invention. Detailed Implementation

[0048] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0049] See Figure 1 One embodiment of the present invention provides a two-layer collaborative optimization method for power grid partitioning, comprising:

[0050] Step S110. With the goal of maximizing the degree of grid zoning balance, and with zoning computational constraints and zoning decoupling cost constraints as constraints, construct an upper-level optimization model.

[0051] The upper-level optimization model constructed in this step aims to improve the load balance of the power grid zones. By quantifying the differences in computational complexity, number of transient components, and regional coupling among the zones, the final network scheme has good load balance and low interconnection coupling in parallel electromagnetic transient simulation.

[0052] Specifically, the optimization objective is reflected by the partition decoupling cost and the grid partition imbalance. The two indicators are weighted to balance the importance of partition decoupling cost and partition imbalance in the optimization process. The grid partition imbalance is numerically quantified based on the difference in partition computation.

[0053] For example, the objective function of the upper-level optimization model is expressed as:

[0054]

[0055] in, , Indicates the weighting factor. Indicates the cost of partition decoupling. The partition imbalance is represented by N, the number of partitions, and i and j, which are the partition numbers.

[0056] In some embodiments of the present invention, partitioned computational constraints are used to ensure that the total computational load of each partition does not exceed the capacity of the simulation core. In a further embodiment, the partitioned computational load can be estimated based on the actual electromagnetic transient component type (such as multi-port buses, converters, reactors, switching components, etc.) through its single-step computation time or average occupancy time, making the constraint construction more closely match the actual simulation computation requirements. Depending on the component type, different time parameter estimation models can be used, such as static estimation, dynamic statistics, or regression models based on historical simulation data.

[0057] For example, the partitioning computation constraint is expressed as:

[0058]

[0059] in, The computational cost of the i-th partition is represented by N; N represents the number of partitions. This represents the computational cost of the k-th transient element within the partition, calculated based on the computation time required by the transient element. Indicates the number of transient elements within the partition; This represents the computational cost of the m-th simulation core, which is calculated by the lower-level optimization model. This indicates the number of cores used in the simulation.

[0060] In a more preferred embodiment, the partition decoupling cost constraint is constructed based on the reciprocal of the line length. Its physical meaning is that the shorter the line length, the stronger the electrical coupling, the larger the amount of interactive data between partitions, and the higher the cost of cross-core communication. Therefore, by using a piecewise function to represent the line coupling cost, the optimization model automatically tends to lengthen the strongly coupled lines, thereby naturally forming decoupling while ensuring the accuracy of electrical equivalence.

[0061] In some embodiments of the present invention, the calculation of partition decoupling costs is triggered only when the electrical components at both ends of the connection line belong to different partitions. This is because when both ends of the line are in the same partition, the electromagnetic relationships within the line can be locally solved within the same computational core. In this case, the exchange of electrical quantities does not cross partition boundaries and does not involve cross-core communication, therefore, decoupling costs do not need to be factored in. However, when both ends of the line belong to different partitions, the voltage, current, and transient admittance of the nodes at both ends of the line need to be exchanged between partitions. The synchronization and coupling of inter-partition computations will introduce additional communication delays and data consistency constraints, thus requiring such lines to be treated as decoupling boundaries and the corresponding decoupling costs to be calculated.

[0062] In a further embodiment, to improve the accuracy of decoupling cost calculation, the transient coupling characteristics of cross-regional lines can be characterized in more detail. For example, the strength of electrical coupling between zones can be calculated based on the line's distributed parameters, voltage level, node short-circuit capacity, or coupling strength of the admittance matrix, thereby correcting the line coupling cost based on the original length reciprocal model. Simultaneously, for lines with complex components such as double-ended multi-terminal buses or converters, weighting can be applied based on the sensitivity of their connection topology to coupling processing, enabling the decoupling cost model to adapt to different wiring structures.

[0063] In a more preferred embodiment, the partition decoupling cost can also take into account the types of data synchronization stages introduced by the cross-partition computation of lines, such as the prediction current exchange in the prediction-correction process and the interface variable update in the Newton iteration. By statistically analyzing the number of interactions between different lines within a simulation time step, the decoupling cost can be further dynamically calculated. For lines with high interaction frequency and short cross-partition distance, their influence in the decoupling constraints can be increased by adding weight factors, which helps the optimization model to automatically avoid cutting such strongly coupled connections in the search solution and improves the stability of the partitioning results.

[0064] For example, with a decoupling limit of 15km, the partition decoupling cost constraint is expressed as:

[0065]

[0066] in, Indicates the cost of partition decoupling. This indicates the length of the connection line between partitions i and j.

[0067] Step S120. With the goal of maximizing computing resource efficiency, construct a lower-level optimization model using the core occupancy constraint of simulation computing as the constraint condition.

[0068] The lower-level optimization model constructed in this step aims to maximize the utilization efficiency of computing resources. By comprehensively balancing the number of cores, core utilization, and inter-core communication, it achieves the optimal allocation of computing resources under a given partitioning structure.

[0069] Specifically, the optimization objective of the lower-level optimization model is represented by a weighted calculation of the core occupancy rate, the number of cores used, and the communication volume between cores, in order to reflect the resource allocation and load of the cores.

[0070] For example, the lower-level optimization model is represented as:

[0071]

[0072] in, , , Indicates the weighting factor. This indicates the number of cores used in the simulation calculation. This represents the core utilization rate of the e-th simulation calculation. This represents the communication volume between the simulation calculation cores s and v. This represents the core set of simulation calculations.

[0073] In a further embodiment, the calculation of the core occupancy rate in the simulation can be determined based on the required computing power of each partition and the core capacity ratio. At the same time, the communication latency between cores can be considered. Through communication graphs, topology matrices, or network bandwidth models, the computing latency generated by cross-core data interaction can be estimated, making the core pressure assessment more accurate.

[0074] In a more preferred embodiment, the lower-level model may also introduce heterogeneous resource capability factors. For example, different cores in the cluster may have different frequencies, different cache structures, or different memory access speeds. By defining different resource weights for each type of core, the optimization model can be applied to heterogeneous parallel simulation environments.

[0075] Step S130. Combine the upper-level optimization model and the lower-level optimization model into a two-level optimization model. Define the decision dependency relationship of the two-level optimization model as follows: the boundary of the partition computation constraint is obtained by solving the lower-level optimization model, and the boundary of the simulation calculation core occupancy constraint is obtained by solving the upper-level optimization model.

[0076] This step couples the partition structure decision of the upper-level model with the resource allocation decision of the lower-level model to construct a two-layer collaborative optimization model. The dependency relationship is defined as follows: the boundary of the partition computation constraint is determined by the core capacity calculated by the lower-level optimization model, and the upper bound of the simulation calculation core occupancy constraint is determined by the partition computation given by the upper-level model.

[0077] In a more preferred embodiment, a master-slave solution architecture can be introduced to unify the solution framework of the two-layer model. In this architecture, the upper layer acts as the master problem, determining the structural variables, while the lower layer acts as the slave problem, solving for continuous variables or resource-type variables, thus giving the model good convergence and scalability.

[0078] Step S140. Iteratively solve the two-layer optimization model to obtain the power grid partitioning results and the computational resource allocation results.

[0079] In this step, an iterative solution strategy is adopted to solve the two-layer model, so that the upper and lower layers gradually converge to the global optimum as the constraint boundaries are continuously updated.

[0080] Specifically, the upper-level model is solved using the average partitioning computation as the initial input to obtain the initial partitioning structure; the initial partitioning structure is then input into the lower-level model for resource optimization to obtain the initial core allocation scheme; finally, this is used as the initial value to solve the two-level model simultaneously, and through multiple iterations, the partitioning structure and resource allocation are made to approach the optimal value.

[0081] In a further embodiment, various optimization algorithms such as gradient descent, genetic algorithm, particle swarm optimization, or heuristic search can be used in the iterative solution process to improve the convergence speed in complex power grid scenarios.

[0082] In a more preferred embodiment, the two-layer iterative solution can introduce convergence criteria, such as the change in partition imbalance being lower than a threshold, the change in core occupancy being lower than a threshold, or the decrease in the objective function being lower than a threshold, to determine whether to terminate the iteration early and improve the overall computational efficiency.

[0083] The invention will be further explained below using a specific optimization model.

[0084] The upper-level optimization model and its constraints are expressed as follows:

[0085]

[0086] in, , Indicates the weighting factor; Indicates the cost of partition decoupling; Indicates the partition imbalance; N represents the number of partitions; i and j represent the partition numbers; This represents the computational cost of the i-th partition; This represents the computational cost of the k-th transient element within the partition, calculated based on the computation time required by the transient element. Indicates the number of transient elements within the partition; This represents the computational cost of the m-th simulation core, which is calculated by the lower-level optimization model. Indicates the number of cores used in the simulation calculation; This indicates the actual number of simulation computing cores used. This indicates the single-step simulation time of a single simulation calculation core.

[0087] The lower-level optimization model aims to optimize the allocation of computing resources. Its objective function and constraints are expressed as follows:

[0088]

[0089] in, , , Indicates the weighting factor; This indicates the actual number of simulation computing cores used. This indicates the core utilization rate of the e-th simulation calculation. This represents the total number of simulation computing cores in the simulation cluster; This indicates the single-step simulation duration of a single simulation computation core; This represents the computational resource consumption of transient element p on the e-th simulation calculation core; This represents the amount of computing resources required for the simulation calculation core e; This indicates the number of transient components used in the simulation calculation using the simulation calculation core; This represents the communication volume between the simulation calculation cores s and v; Represents the core set of simulation calculations; This represents the computational communication of transient elements n and m. and These represent the simulation calculation kernels corresponding to transient elements n and m, respectively. and These represent the simulation core sets of N-type parent components (simulation data source nodes) and M-type child components (simulation data receiving nodes), respectively.

[0090] In simulation, the single-step simulation time of the core is often specified. For example, the simulation calculation is required to be completed within 50μs. Then, as long as the number of simulation calculation cores is determined, the total computational load of the simulation system can be determined, which can be used as the boundary of the constraint conditions on the computational load in the optimization model.

[0091] The upper-level optimization model is solved using the average partition computational cost as the initial input, and the solution is then processed. The solution is passed to the lower-level optimization model, which then performs resource optimization solutions and outputs the results. Passed to the upper-level optimization model for calculation Thus, the two-level optimization model is solved iteratively.

[0092] The disclosed method can be implemented using various types of devices. Therefore, the present invention also discloses an apparatus corresponding to the above method, and specific embodiments are given below for detailed description.

[0093] like Figure 2 As shown, one embodiment of the present invention provides a two-layer collaborative optimization power grid partitioning device, comprising:

[0094] The first modeling module 202 is used to construct an upper-level optimization model with the goal of maximizing the degree of grid zoning balance and with constraints on zoning computation and zoning decoupling cost as constraints.

[0095] The second modeling module 204 is used to construct a lower-level optimization model with the goal of maximizing computing resource efficiency and the core occupancy constraint of simulation computing as the constraint condition.

[0096] The dual-layer modeling module 206 combines the upper-layer optimization model and the lower-layer optimization model into a dual-layer optimization model. The decision dependency relationship of the dual-layer optimization model is defined as follows: the boundary of the partition computational constraint is obtained by solving the lower-layer optimization model, and the boundary of the simulation calculation core occupancy constraint is obtained by solving the upper-layer optimization model.

[0097] The model solving module 208 is used to iteratively solve the two-level optimization model to obtain the power grid partitioning results and the computational resource allocation results.

[0098] The device provided in this application embodiment has the same implementation principle and technical effect as the aforementioned method embodiment. For the sake of brevity, any parts not mentioned in the device embodiment can be referred to the corresponding content in the aforementioned method embodiment.

[0099] The methods and related apparatuses mentioned in the above embodiments are described with reference to the method flowcharts and / or structural diagrams provided in the embodiments of this application. Specifically, each block of the method flowchart and / or structural diagram, as well as combinations of blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing device, generate instructions for implementing the process. Figure 1 A schematic diagram of one or more processes and / or structures. Figure 1 The computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 A schematic diagram of one or more processes and / or structures. Figure 1The functions specified in one or more boxes. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable apparatus for implementing the process. Figure 1 A process or multiple processes and / or structures illustrate the steps of the functions specified in one or more boxes.

[0100] The following embodiments illustrate the application of this method to a computer device. It is understood that the computer device can be any device with computing and processing capabilities, including but not limited to servers or personal laptops. In one embodiment, the computer device can be an application server, which can be a server used to run the application under test.

[0101] See Figure 3 This document illustrates a hardware block diagram of an electronic device intended to represent various forms of digital computers, such as laptops, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframes, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present application described and / or claimed herein.

[0102] like Figure 3 As shown, the electronic device includes: at least one processor 1, at least one communication interface 2, at least one memory 3, and at least one communication bus 4;

[0103] In this embodiment of the application, the number of processor 1, communication interface 2, memory 3, and communication bus 4 is at least one, and processor 1, communication interface 2, and memory 3 communicate with each other through communication bus 4;

[0104] Processor 1 may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present invention.

[0105] Memory 3 may include high-speed RAM, and may also include non-volatile memory, such as at least one disk storage device;

[0106] The memory stores a program, which the processor can call. The program is used to implement the various processing steps of the aforementioned two-layer collaborative optimization power grid zoning scheme.

[0107] This invention also provides a readable storage medium storing a computer program thereon, which, when executed by a processor, implements various processing flows of the two-layer collaborative optimization power grid partitioning scheme provided by any possible implementation of the above embodiments and / or in combination with the embodiments.

[0108] The invention has been described in particular detail above with respect to possible scenarios, and those skilled in the art will recognize that the invention can be practiced through other embodiments. Specific naming of components, capitalization of terms, attributes, data structures, or any other programming or structural aspects are not mandatory or important, and the mechanisms or features of implementing the invention may have different names, forms, or procedures. The system can be implemented through a combination of hardware and software (as described), entirely through hardware elements, or entirely through software elements. The specific division of functions among the various system components described herein is merely exemplary and not mandatory; rather, the functions performed by a single system component can be performed by multiple components, or the functions performed by multiple components can be performed by a single component.

[0109] Those skilled in the art should understand that the various steps of the disclosed methods can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. Optionally, they can be implemented using device-executable program code, which can then be stored in a storage device for execution by the computing device. Alternatively, they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Therefore, the embodiments disclosed in this invention are not limited to any specific hardware and software combination.

[0110] The programs (also referred to as programs, software, software applications, or code) executable by these computing devices include machine instructions of a programmable processor and can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. As used herein, the terms “machine-readable medium” and “computer-readable medium” refer to any computer program product, device, and / or apparatus (e.g., disk, optical disk, memory, programmable logic device (PLD)) used to provide machine instructions and / or data to a programmable processor, including machine-readable media that receive machine instructions as machine-readable signals. The term “machine-readable signal” refers to any signal used to provide machine instructions and / or data to a programmable processor.

[0111] Certain aspects of this invention include the process steps and instructions described herein in algorithmic form. It should be noted that the process steps and instructions of this invention can be implemented in software, firmware, and / or hardware, and when implemented in software, they can be downloaded, stored on various operating systems and operated from said platforms.

[0112] Those skilled in the art will understand that the structures shown in the figures are merely block diagrams of some structures related to the present application and do not constitute a limitation on the terminal device to which the present application is applied. Specific terminal devices may include more or fewer components than those shown in the figures, or combine certain components, or have different component arrangements.

[0113] In the description of this specification, the use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "possible design," etc., refers to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0114] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0115] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A two-layer collaborative optimization method for power grid zoning, characterized in that, include: With the goal of maximizing the degree of power grid zoning balance, and with zoning computational constraints and zoning decoupling cost constraints as constraints, an upper-level optimization model is constructed. With the goal of maximizing computing resource efficiency, the lower-level optimization model is constructed using the core occupancy constraints of simulation computing as the constraint condition; The upper-level optimization model and the lower-level optimization model are combined into a two-level optimization model. The decision dependency relationship of the two-level optimization model is defined as follows: the boundary of the partition computational constraint is obtained by solving the lower-level optimization model, and the boundary of the simulated computing core occupancy constraint is obtained by solving the upper-level optimization model. The two-layer optimization model is iteratively solved to obtain the power grid partitioning results and the computational resource allocation results.

2. The method according to claim 1, characterized in that, The objective function of the upper-level optimization model is expressed as: ， in, , Indicates the weighting factor. Indicates the cost of partition decoupling. The partition imbalance is represented by N, the number of partitions, and i and j, which are the partition numbers.

3. The method according to claim 2, characterized in that, The partition imbalance The calculation is based on the computational cost of each partition, and is expressed as follows: ， in, The value represents the computational cost of the i-th partition, and N represents the number of partitions.

4. The method according to claim 1, characterized in that, The computational constraint for each partition is that the sum of the computational costs of each partition is not greater than the computational cost of the simulation core. The computational cost of each partition is calculated based on the computational time occupied by each transient element within the partition.

5. The method according to claim 4, characterized in that, The partitioning computational constraint is expressed as follows: ， in, The computational cost of the i-th partition is represented by N; N represents the number of partitions. This represents the computational cost of the k-th transient element within the partition, calculated based on the computation time required by the transient element. Indicates the number of transient elements within the partition; This represents the computational cost of the m-th simulation core, which is calculated by the lower-level optimization model. This indicates the number of cores used in the simulation.

6. The method according to claim 1, characterized in that, The lower-level optimization model is represented as follows: ， in, , , Indicates the weighting factor. This indicates the actual number of simulation computing cores used. This represents the core utilization rate of the e-th simulation calculation. This represents the communication volume between the simulation calculation cores s and v. This represents the core set of simulation calculations.

7. The method according to claim 1, characterized in that, The iterative solution of the two-layer optimization model to obtain the power grid partitioning results and computational resource allocation results includes: The upper-level optimization model is optimized and solved using the average partitioning computation as the initial value to obtain the optimized network result in one round. Based on the results of the first round of optimized network partitioning, the lower-level optimization model is optimized and solved to obtain the results of the first round of computing resource allocation. Using the results of the first round of network optimization and the results of the first round of computational resource allocation as the initial values ​​for iteration, the two-layer optimization model is iteratively solved to obtain the power grid partitioning results and the computational resource allocation results.

8. A dual-layer collaborative optimization power grid zoning device, characterized in that, include: The first modeling module is used to construct an upper-level optimization model with the goal of maximizing the degree of grid zoning balance and with constraints on zoning computation and zoning decoupling cost as constraints. The second modeling module is used to construct a lower-level optimization model with the goal of maximizing computing resource efficiency and the core occupancy constraints of simulation computing as the constraint condition. The dual-layer modeling module combines the upper-layer optimization model and the lower-layer optimization model into a dual-layer optimization model. The decision dependency relationship of the dual-layer optimization model is defined as follows: the boundary of the partition computation constraint is obtained by solving the lower-layer optimization model, and the boundary of the simulation calculation core occupancy constraint is obtained by solving the upper-layer optimization model. The model solving module is used to iteratively solve the two-layer optimization model to obtain the power grid partitioning results and the computing resource allocation results.

9. An electronic device, characterized in that, It includes a memory storing computer-executable instructions and a processor, which, when executed by the processor, causes the device to perform the two-layer collaborative optimization power grid partitioning method as described in any one of claims 1 to 7.

10. A readable storage medium, characterized in that, It stores a computer-executable program that, when executed, implements the two-layer collaborative optimization power grid partitioning method as described in any one of claims 1 to 7.

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