Loop decoupling control method of three-phase parallel flying capacitor type three-level converter

Abstract

The invention provides a loop decoupling control method for a three-phase parallel flying capacitor type three-level converter. The loop decoupling control method is applied to a battery energy storage system, an electric vehicle charger or a direct-current micro-grid interface. The method comprises the following steps that S1, a voltage and current double-closed-loop output controller is constructed, and the voltage and current double-closed-loop output controller samples output voltage Vbat in an outer loop and samples output current Ibat in an inner loop; by constructing a multi-loop parallel and variable orthogonal decoupling control architecture, independent regulation and cooperative operation of three control targets of main power regulation, inter-phase current balance and flying capacitor voltage balance are realized. According to the architecture, the inherent loop coupling defect in traditional serial or master-slave control is abandoned, physical feasibility and priority execution of a control instruction are guaranteed through algebraic constraint and a dynamic amplitude limiting mechanism, and therefore on the premise that device parameter matching is not depended on and hardware complexity is not increased, the reliability of the control instruction is improved. And the dynamic response capability and the steady-state control precision of the system are obviously improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power electronic converters, and more particularly to a loop decoupling control method for a three-phase parallel flying capacitor type three-level converter. BACKGROUND

[0002] In high-power power electronic conversion systems, interleaved parallel topology has been widely used in new energy power generation, electric vehicle charging, data center power supply, industrial motor drive and other fields due to its ability to effectively reduce input / output current ripple, improve system equivalent main control switch frequency, disperse thermal stress and improve power density. However, with the increase in the number of parallel branches, the uneven distribution of current between phases is increasingly prominent, not only exacerbating the imbalance of device thermal stress and reducing system reliability, but also possibly causing local overcurrent and leading to device failure. Therefore, achieving high-precision current sharing control has become a key technical challenge in the design of high-power interleaved parallel converters.

[0003] Currently, traditional current sharing control strategies mainly fall into two categories: serial current sharing control and master-slave current sharing decoupling control. Serial current sharing control adopts a typical double-loop cascade structure with an outer voltage loop and an inner current loop. The voltage loop is constructed by sampling the output voltage to generate a unified current reference, which is then distributed to the current inner loop of each parallel branch for tracking control. This scheme is simple in structure and easy to implement, but the premise of achieving current sharing is that the inductance parameters of each branch are highly consistent, which relies on strict matching of components. Once there is a parameter deviation or temperature drift, the inter-phase current will be significantly unbalanced. Especially under dynamic conditions such as load mutation, due to the deep coupling between the voltage loop and the current loop, the response is lagged, and the current sharing performance deteriorates sharply, seriously affecting the stability of the system. To ensure basic current sharing effect, high-cost screening and pairing of inductors are often required, increasing the manufacturing cost and maintenance difficulty.

[0004] Master-slave current-sharing decoupling control, which specifies a certain parallel branch as the "master branch" and uses its inductor current as the reference signal, and the remaining "slave branches" track the master branch current value through closed-loop control, thereby achieving current sharing. To further suppress the dynamic interaction between branches, a decoupling compensation network is usually introduced. This method theoretically achieves partial separation of the voltage stabilization and current sharing goals, improving control flexibility. However, the core control variable is still generated by a single loop (such as the voltage loop or the master current loop), and the overall architecture is still essentially a serial control paradigm, failing to establish a truly parallel and independent multi-objective control system. This limits the dynamic adjustment capability of the system when facing complex disturbances in medium and high power scenarios (such as load jumps and input voltage fluctuations); at the same time, the decoupling network is easily ineffective at high frequencies, which may introduce additional phase delay and induce system oscillation. More seriously, once the master branch fails, the entire current sharing mechanism will collapse, posing a significant single-point failure risk and restricting the system's redundancy and reliability.

[0005] In addition, in converters with complex topologies such as flying capacitor, in addition to current sharing control, precise voltage sharing control of the flying capacitor voltage is also required. However, traditional control methods cannot achieve full decoupling between the voltage sharing loop and the output voltage loop, the current inner loop, and the current sharing loop, resulting in mutual interference between multiple control objectives and severe loop coupling. This strong coupling characteristic not only reduces the dynamic response speed and disturbance rejection capability of the system, but also affects the voltage accuracy and current balance during steady-state operation.

[0006] In summary, existing current sharing control techniques generally suffer from severe control loop coupling, insufficient dynamic performance, poor robustness, and low reliability, making it difficult to meet the comprehensive demands of modern high-power conversion systems for high efficiency, high reliability, and high-performance control. SUMMARY

[0007] The technical problem to be solved by the present application is to improve the dynamic response capability, anti-interference performance, and steady-state control accuracy of a three-phase parallel flying capacitor three-level converter.

[0008] The present application provides a loop decoupling control method for a three-phase parallel flying capacitor three-level converter, which is applied to a battery energy storage system, an electric vehicle charger, or a direct current microgrid interface. The method comprises the following steps:

[0009] S1, constructing a voltage-current double-loop output controller, which samples the output voltage V bat and the output current I bat in the outer loop and the inner loop, respectively, to generate an average duty ratio command d as a three-phase duty ratio reference. bat , the output current I bat , and the average duty ratio command d, and the average duty ratio command d is used as the reference signal of the three-phase duty ratio.avg ;

[0010] S2, two current sharing control loops are constructed, corresponding to phase A and phase B respectively; each current sharing control loop takes the real-time average of three-phase inductor currents as a current given value, and takes the actual inductor current of the corresponding phase as a negative feedback input, and generates the current sharing compensation of the phase through adjustment;

[0011] S3, a flying capacitor voltage sharing control loop is constructed for each of phases A, B and C, respectively, to generate the voltage sharing compensation of the phase through adjustment, with a preset proportion of bus voltage as a given voltage and the flying capacitor voltage of the corresponding phase as a negative feedback input;

[0012] S4, based on the average duty cycle instruction d avg , the current sharing compensation of each phase and the voltage sharing compensation of each phase, the on-duty cycle instructions of the two main control switching devices of each phase are generated through decoupling into rules, respectively, and the following decoupling conditions are met:

[0013] (i) the introduction of the current sharing compensation and the voltage sharing compensation does not change the three-phase average duty cycle, thereby not affecting the main power output performance;

[0014] (ii) the average duty cycle instruction d avg and the voltage sharing compensation do not change the sum of the duty cycles of the two main control switching devices of any phase, thereby not affecting the balance of the inductor current of the phase;

[0015] (iii) the average duty cycle instruction d avg and the current sharing compensation do not change the difference between the duty cycles of the two main control switching devices of any phase, thereby not affecting the balance of the flying capacitor voltage of the phase;

[0016] (iv) the current sharing controller of each phase only acts on the phase, thereby not affecting the difference between the current sharing compensation and the average duty cycle of the current sharing control loop of the other phase, and there is no coupling interference between them;

[0017] S5, the voltage sharing compensation output by the flying capacitor voltage sharing control loop and the current sharing compensation output by the current sharing control loop are subjected to dynamic amplitude limiting processing, to ensure that all generated duty cycle instructions meet the physical constraint 0≤D≤1, and the modulation margin is allocated in turn according to the control priority: the main power control is given priority to ensure full-range adjustment capability, the remaining modulation margin is allocated to the flying capacitor voltage sharing control, and the remaining available modulation space is allocated to the inductor current sharing control, thereby realizing the independence, coordination and operation stability of the three objectives of output power control, inter-phase current balance and flying capacitor voltage balance under hardware constraints.

[0018] In the loop decoupling control method of the three-phase parallel flying-capacitor type three-level converter, the preset proportion of the bus voltage in step S3 is 0.5, that is, half bus voltage 0.5*V bus As the given voltage of the flying-capacitor voltage equalization control loop.

[0019] In the loop decoupling control method of the three-phase parallel flying-capacitor type three-level converter, in step S3, under the small current operating condition, the flying-capacitor voltage equalization control loop dynamically judges the charging and discharging polarity of the flying-capacitor according to the inductance current direction or the continuous deviation direction of the flying-capacitor voltage, and adjusts the sign of the equalization compensation amount accordingly, so as to ensure the correct direction of the equalization control effect.

[0020] In the loop decoupling control method of the three-phase parallel flying-capacitor type three-level converter, in step S4, the decoupling rule is specifically:

[0021] The conduction duty cycles of the two main control switching devices of phase A are respectively: A1 = d avg +d ia +d fa ,

[0022] D A2 = d avg +d ia -d fa ;

[0023] The conduction duty cycles of the two main control switching devices of phase B are respectively: B1 = d avg +d ib +d fb ,

[0024] D B2 = d svg +d ib -d fb ;

[0025] The conduction duty cycles of the two main control switching devices of phase C are respectively: C1 = d avg -(d ia +d ib )+d fc , D C2 = d avg -(d ia +d ib )-d fc ;

[0026] Wherein, d avg is the average duty cycle command, d ia , dib is the flow compensation amount of phase A and phase B, d fa is the voltage compensation amount of phase A, d fb is the voltage compensation amount of phase B, d fc is the voltage compensation amount of each phase.

[0027] In the loop decoupling control method of the three-phase parallel flying-capacitor-type three-level converter, the dynamic limiting process in the step S5 specifically includes:

[0028] The average duty cycle command is limited to satisfy 0 < d avg < 1;

[0029] The voltage compensation amount of each phase is limited to satisfy |d fx | < min(d avg , 1-d avg ), wherein x = a, b, c represents each phase of the three-phase parallel topology.

[0030] The flow compensation amount of phase A and phase B is limited to satisfy |d ix | < 1-d avg - |d fx |, wherein x = a, b.

[0031] In the loop decoupling control method of the three-phase parallel flying-capacitor-type three-level converter, the voltage and current double-loop output controller in the step S1 is configured as: the voltage outer loop output as the given instruction of the current inner loop, so that the converter has the constant voltage and current limiting output characteristics, and supports the constant voltage, constant current or constant power charging and discharging mode of the battery.

[0032] The loop decoupling control method of the three-phase parallel flying-capacitor-type three-level converter according to the application realizes independent regulation and cooperative operation of the three control targets of main power regulation, inter-phase current balance and flying-capacitor voltage balance through the construction of a multi-loop parallel and variable orthogonal decoupling control architecture. The architecture discards the inherent loop coupling defects in the traditional serial or master-slave control, and uses algebraic constraints and dynamic limiting mechanisms to ensure the physical feasibility and priority execution of the control instruction, thereby significantly improving the dynamic response capability and steady-state control precision of the system without relying on device parameter matching and increasing hardware complexity, effectively solving the common technical problems of current imbalance, capacitor voltage drift and multi-loop interaction instability of the multi-phase parallel flying-capacitor-type three-level converter in high-power application scenarios, and having outstanding substantial features and significant progress. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figure 1 is the flowchart of the loop decoupling control method of the three-phase parallel flying-capacitor-type three-level converter according to the application.

[0034] Figure 2is a control block diagram of a loop decoupling control method of a three-phase parallel flying-capacitor type three-level converter of the present application;

[0035] Figure 3 is a three-phase interleaved parallel flying-capacitor type three-level topology structure diagram in the loop decoupling control method of the three-phase parallel flying-capacitor type three-level converter of the present application. DETAILED DESCRIPTION

[0036] In order to make the objects, technical solutions and advantages of the present application clearer, the present application is further described in detail below in combination with the drawings and examples. It should be understood that the specific examples described herein are only used to explain the present application and do not limit the present application.

[0037] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not necessarily limit to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0038] As shown in Figure 1 is a flowchart of an embodiment of a loop decoupling control method of a three-phase parallel flying-capacitor type three-level converter of the present application. A loop decoupling control method of a three-phase parallel flying-capacitor type three-level converter is provided, which is applied to a battery energy storage system, an electric vehicle charger or a direct current microgrid interface; characterized in that the method comprises the following steps:

[0039] In step S1, a voltage and current double-loop output controller is constructed, which samples output voltage V bat and output current I bat in the outer loop and the inner loop, respectively, to generate average duty ratio command d avg as a three-phase duty ratio reference;

[0040] In step S2, two current sharing control loops are constructed, corresponding to phase A and phase B respectively; each current sharing control loop takes the real-time average of three-phase inductor current as the current given value, and takes the actual inductor current of the corresponding phase as the negative feedback input, to generate the current sharing compensation of the phase through adjustment; the current sharing compensation of phase C is not provided with an independent control loop, and the current sharing compensation of phase C is the negative value of the sum of the current sharing compensations of phase A and phase B, so as to ensure that the algebraic sum of the three-phase current sharing compensations is zero, and the average duty cycle of the three phases is not changed;

[0041] In step S3, flying capacitor voltage sharing control loops are independently constructed for phases A, B and C, and the preset proportion of the bus voltage is taken as the given voltage, and the flying capacitor voltage of the corresponding phase is taken as the negative feedback input, to generate the voltage sharing compensation of the phase through adjustment;

[0042] In step S4, based on the average duty cycle instruction d avg , the current sharing compensation of each phase and the voltage sharing compensation of each phase, the on-duty cycle instruction of each phase is generated through decoupling into rules, and the following decoupling conditions are met:

[0043] (i) The introduction of the current sharing compensation and the voltage sharing compensation does not change the average duty cycle of the three phases, so as to not affect the main power output performance;

[0044] (ii) The average duty cycle instruction d avg and the voltage sharing compensation do not change the sum of the duty cycles of the two main control switching devices of any phase, so as to not affect the balance of the inductor current of the phase;

[0045] (iii) The average duty cycle instruction d avg and the current sharing compensation do not change the difference between the duty cycles of the two main control switching devices of any phase, so as to not affect the balance of the flying capacitor voltage of the phase;

[0046] (iv) Each phase current sharing controller only acts on the phase, so as to not affect the difference between the current sharing compensation and the average duty cycle of the other phase current sharing control loop, and there is no coupling interference between them;

[0047] In step S5, the voltage sharing compensation output by the flying capacitor voltage sharing control loop and the current sharing compensation output by the current sharing control loop are subjected to dynamic amplitude limiting processing, to ensure that all generated duty cycle instructions meet the physical constraint 0≤D≤1, and the modulation margin is allocated in turn according to the control priority: the main power control is preferentially guaranteed to have full-range adjustment capability, the remaining modulation margin is preferentially allocated to the flying capacitor voltage sharing control, and the remaining available modulation space is finally allocated to the inductor current sharing control, so as to realize the independence, coordination and running stability of the three objectives of output power control, inter-phase current balance and flying capacitor voltage balance under the hardware constraint.

[0048] In an embodiment, the preset proportion of the bus voltage in the step S3 is 0.5, i.e. half bus voltage 0.5xV bus as the given voltage of the flying capacitor voltage equalization control loop.

[0049] In an embodiment, in the step S3 under the small current operation condition, the flying capacitor voltage equalization control loop dynamically judges the charging and discharging polarity of the flying capacitor according to the inductance current direction or the continuous deviation direction of the flying capacitor voltage, and adjusts the sign of the equalization compensation amount accordingly, so as to ensure the correct direction of the equalization control action.

[0050] In an embodiment, the decoupling rules in the step S4 are specifically:

[0051] The conduction duty cycles of the two main control switching devices of phase A are respectively: A1 = d avg +d ia +d fa ,

[0052] D A2 = d avg +d ia -d fa ;

[0053] The conduction duty cycles of the two main control switching devices of phase B are respectively: B1 = d avg +d ib +d fb ,

[0054] D B2 = d avg +d ib -d fb ;

[0055] The conduction duty cycles of the two main control switching devices of phase C are respectively: C1 = d avg -(d ia +d ib )+d fc , D C2 = d avg -(d ia +d ib )-d fc ;

[0056] wherein, d avg is the average duty cycle command, d ia , d ib are the A, B phase current equalization compensation amounts, d fa , d fb , d fc are the phase voltage equalization compensation amounts.

[0057] In an embodiment, the dynamic limiting process in the step S5 specifically includes:

[0058] The limited average duty command satisfies 0 < d avg <1;

[0059] The limited phase-to-phase voltage compensation quantity satisfies ∣d fx ∣ < min(d avg , 1-d avg ), where x = a, b, c represents each phase of the three-phase parallel topology.

[0060] The limited A-phase and B-phase current sharing compensation quantity satisfies ∣d ix ∣ < 1-d avg - ∣d fx ∣, where x = a, b.

[0061] In an embodiment, the voltage-current double closed loop output controller in the step S1 is configured to: output the voltage outer loop as the given instruction of the current inner loop, so that the converter has a constant voltage and current limiting output characteristic, and supports constant voltage, constant current or constant power charging and discharging modes of the battery.

[0062] The application provides a loop decoupling control method of a three-phase parallel flying capacitor type three-level converter, which is suitable for high-reliability and high-efficiency bidirectional energy conversion scenes such as a battery energy storage system, an electric vehicle charger or a direct current microgrid interface. Each phase of the converter contains four main control switching devices (denoted as S1, S2, S3 and S4), a flying capacitor and an output inductor, and the three-phase output ends are connected to a battery port in parallel, so that high-power energy throughput is realized.

[0063] The voltage-current double closed loop output controller samples the battery voltage V bat as a feedback signal, compares the voltage reference value set, and outputs a current command through an outer loop regulator (such as a PI controller); the current command is given as an inner loop, and compared with the actually sampled battery current I bat , and a three-phase average duty command d avg is generated through an inner loop regulator.

[0064] In particular, by taking the output of the voltage outer loop as the given input of the current inner loop, the system has a constant voltage and current limiting output characteristic, can automatically switch the constant voltage (CV), constant current (CC) or constant power (CP) charging and discharging mode according to the battery state, and meets the diversified needs of the battery management system.

[0065] To realize three-phase inductor current balancing, the application only constructs a current sharing control loop of the A-phase and the B-phase, and does not set an independent controller for the C-phase.

[0066] Specifically, the A-phase current sharing controller uses the real-time average value of the three-phase inductor current (i LA +i LB +i LC ) / 3 is used as the current setpoint, with the actual inductor current i of phase A as the reference value. LA As a negative feedback input, the adjusted output is the phase A current sharing compensation quantity d. ia ;

[0067] Similarly, the B-phase current sharing controller outputs d. ib ;

[0068] The flow compensation for phase C is determined by algebraic relations:

[0069] d ib =-(d ia +d ib This design ensures that the algebraic sum of the three-phase current sharing compensation is always zero, thus not changing the three-phase average duty cycle d. avg This avoids interference with the main power output and effectively achieves three-phase current balance.

[0070] To maintain stable voltage across each phase of the flying capacitor, this invention constructs independent voltage equalization control loops for the flying capacitors of phases A, B, and C.

[0071] Each equalizing control loop uses the bus voltage V bus A preset ratio is used as the voltage setpoint. Preferably, this preset ratio is 0.5, that is, 0.5 × V of half the bus voltage. bus As the target value, the measured voltages VflyA, VflyB, and VflyC of the corresponding phase's flying capacitors are used as negative feedback inputs, and the voltage equalization compensation quantities d are generated after adjustment. fa d fb d fc .

[0072] It is worth noting that under low-current operating conditions, the charging and discharging direction of the flying capacitor may be uncertain due to the small inductor current or frequent changes in its direction. In this case, the voltage equalization control loop needs to combine the direction of the inductor current or the continuous offset direction of the flying capacitor voltage to dynamically determine the energy flow direction of the flying capacitor, and adjust the sign of the voltage equalization compensation accordingly to ensure the correct direction of control action and avoid exacerbating voltage imbalance.

[0073] Based on the above control signals, the duty cycle commands for the two main control switching devices (S1 and S2) of each phase are generated by decoupling into a network, and the specific rules are as follows:

[0074] Phase A: D A1 =d avg +d ia +d fa D A2 =davg +d ia -d fa ;

[0075] B phase: D B1 =d avg +d ib +d fb , D B2 =d avg +d ib -d fb ;

[0076] C phase: D C1 =d avg -(d ia +d ib )+d fc , D C2 =d avg -(d ia +d ib )-d fc ; wherein d avg is an average duty command, d ia , d ib are A, B phase current-sharing compensation amounts, and d fa , d fb , d fc are phase-voltage-sharing compensation amounts.

[0077] The synthesis rule satisfies the following decoupling conditions:

[0078] (i) The introduction of current-sharing and voltage-sharing compensation amounts does not change the three-phase average duty, so it does not affect the main power output;

[0079] (ii) The average duty command and the voltage-sharing compensation amount do not change the sum of the two switch duty ratios of any phase, so they do not affect the inductor current balance of the phase;

[0080] (iii) The average duty command and the current-sharing compensation amount do not change the difference between the two switch duty ratios of any phase, so they do not affect the flying capacitor voltage balance of the phase;

[0081] (iv) Each phase current-sharing controller only acts on the phase, so it does not affect the difference between the current-sharing compensation amount and the average duty of the other phase current-sharing control loop, and there is no coupling interference between them.

[0082] Due to physical constraints, all duty ratios must satisfy 0≤D≤1, so the compensation amount needs to be dynamically limited, and the modulation margin needs to be allocated according to the control priority:

[0083] Main power control priority: limit the average duty command to satisfy 0 avg <1;

[0084] The next best approach is cross-phase voltage equalization control (because its imbalance can easily cause device overvoltage): limiting the voltage equalization compensation of each phase to meet |d. fx | <min(d avg ,1-d avg ), where x = a, b, c represent each phase of the three-phase parallel topology;

[0085] Finally, the current sharing control requires limiting the current sharing compensation amounts for phases A and B to satisfy |d. ix |<1-d avg -∣d fx |, where x = a, b.

[0086] This limiting logic ensures that: the main power regulation capability is not limited across the entire operating range; the flying capacitor voltage is given priority to obtain compensation margin; and the current sharing control utilizes the remaining modulation space to achieve coordinated and stable operation of the three objectives of output power control, phase-to-phase current balancing and flying capacitor voltage balancing.

[0087] In practical engineering, the maximum feasible values ​​of pressure equalization and current equalization compensation can be calibrated under extreme working conditions based on measured data, and a safety margin can be added as a fixed limiting threshold to simplify the real-time control algorithm.

[0088] The control method described in this invention can be implemented by a digital signal processor (DSP), a microcontroller (MCU), or a field-programmable gate array (FPGA). All control loops operate in discrete time, ultimately generating six drive signals through a high-resolution pulse width modulation (PWM) module. These signals control the six upper arm switches (S1 / S2) of the three-phase flying capacitor three-level converter, respectively. The lower arm switches (S3 / S4) can be generated by complementary logic via a dead-time modulation module.

[0089] This invention effectively alleviates the problem of multi-loop coupling in traditional control schemes by constructing a three-layer parallel decoupled control architecture, including a voltage and current dual closed-loop output control loop, an independent phase-to-phase current sharing control loop, and a flying capacitor voltage sharing control loop. Specifically, this is reflected in the following aspects:

[0090] Traditional solutions typically use a uniform current command allocation to achieve current sharing, which is susceptible to dynamic disturbances in the main control loop. This invention decouples the current sharing regulation from the main power control, directly modulating the duty cycle of each phase through independent compensation signals. This ensures that the voltage and current dual closed-loop control and the current sharing control do not interfere with each other during dynamic processes. Under conditions such as sudden load changes, the system can still maintain the balance of the three-phase inductor currents, and it does not strictly depend on the consistency of the output inductor parameters of each phase.

[0091] The application adopts a symmetric structure in which phase A and phase B are active current sharing control loops, and phase C is passively compensated through algebraic constraint (i.e. the compensation amount of phase C is the negative value of the sum of the compensation amounts of phases A and B). The design avoids the dependence on a single master path in the traditional master-slave architecture, while ensuring that there is no coupling between the current sharing loops. In combination with a dynamic amplitude limiting strategy based on modulation margin priority, high-frequency interaction oscillation between the control loops can be effectively suppressed, and the risk of overall current sharing failure caused by the failure of a single-phase controller can be reduced.

[0092] Based on the average model analysis of the three-phase interleaved flying capacitor type three-level topology, the application establishes a decoupling network between the output controller, the current sharing controller and the voltage sharing controller, which independently regulates three sets of orthogonal variables: three-phase average duty cycle (for main power regulation), the sum of the switching duty cycles of each phase (for inductance current balancing), and the difference between the switching duty cycles of each phase (for flying capacitor voltage balancing). Thus, in the same control cycle, stable control of the flying capacitor voltage, dynamic and steady-state balancing of the three-phase inductance current, and rapid tracking of the battery-side current can be simultaneously achieved.

[0093] In the 1250V / 300A high-voltage high-power application scenario, the application scheme can achieve:

[0094] The three-phase inductance current deviation is less than a preset threshold (e.g. ±2%) in the full operating condition range; each control loop remains stable in a wide frequency band without significant interaction oscillation; and the flying capacitor voltage is maintained within 50%±1% of the bus voltage during load changes. The above characteristics help to improve the power density, dynamic response capability and long-term operation reliability of the converter.

[0095] Through theoretical analysis and structured control design, the application achieves complete decoupling between the output power control, inter-phase current balancing and flying capacitor voltage balancing three loops, while ensuring system stability, significantly improving the dynamic response performance, current sharing accuracy and fault tolerance capability of the multi-phase parallel system, and having important engineering application value.

[0096] It should be noted that the methods described in the application are not only applicable to three-phase systems, but can also be directly extended to any n-phase (n≥2) interleaved flying capacitor type multi-level converter, and have good scalability and engineering universality.

[0097] It should be noted that for each of the method embodiments described above, in order to simply describe, they are all expressed as a series of action combinations, but those skilled in the art should know that the application is not limited by the order of the described actions, because according to the application, certain steps can be performed in other order or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification all belong to preferred embodiments, and the actions and modules involved are not necessarily essential to the application.

[0098] Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software necessary for a general hardware platform, and of course, can also be implemented by hardware, but in many cases, the former is a better implementation. Based on such understanding, the technical solutions of the present application can be embodied in the form of a software product, which is stored in a storage medium (such as a ROM / RAM, a magnetic disk, or an optical disc) and includes a plurality of instructions for causing an end device (which can be a mobile phone, a computer, a server, or a network device) to execute the method described in each embodiment of the present application.

[0099] Therefore, the above description is only a preferred specific implementation of the present application, and the protection scope of the present application is not limited thereto. Any changes or replacements easily thought of by those skilled in the art within the technical scope disclosed by the present application should be covered within the protection scope of the present application, and the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A loop decoupling control method of a three-phase parallel flying-capacitor-type three-level converter, applied to a battery energy storage system, an electric vehicle charger or a DC microgrid interface; characterized in that, The method comprises the following steps: S1, a voltage and current double closed loop output controller is constructed, the voltage and current double closed loop output controller is sampled output voltage V bat outside loop bat , output current I bat inside loop, average duty ratio instruction d avg that is three-phase duty ratio reference is generated S2, two current sharing control loops are constructed, corresponding to phase A and phase B respectively; each current sharing control loop takes the real-time average value of three-phase inductor current as a current given value, takes the actual inductor current of the corresponding phase as a negative feedback input, and generates the current sharing compensation of the phase through adjustment; the current sharing compensation of phase C is not provided with an independent control loop, and the current sharing compensation of phase C is the negative value of the sum of the current sharing compensations of phase A and phase B, so as to ensure that the algebraic sum of the three-phase current sharing compensations is zero, and the average duty cycle of the three phases is not changed; S3, a flying capacitor voltage sharing control loop is independently constructed for each of phases A, B and C, a preset proportion of the bus voltage is taken as a given voltage, and the flying capacitor voltage of the corresponding phase is taken as a negative feedback input, and the voltage sharing compensation of the phase is generated through adjustment; S4, generating the average duty command d based on the average duty command d avg The average duty command d is generated based on the average duty command d, the current sharing compensation amount of each phase, and the voltage sharing compensation amount of each phase. The average duty command d is decoupled into the on-duty command of two main control switch devices of each phase, and the following decoupling conditions are met: (i) the introduction of the current sharing compensation and the voltage sharing compensation does not change the average duty cycle of the three phases, so as to not affect the main power output performance; (ii) average duty cycle command d avg The average duty cycle command d is calculated by the following equation: d = (d1 + d2) / 2, where d1 and d2 are the duty cycles of the two main switch devices of the phase. (iii) average duty cycle command d avg The current sharing compensation amount does not change the difference between the duty cycles of the two main control switch devices of any phase, thereby not affecting the balance of the flying capacitor voltage of the phase. (iv) each phase current controller only acts on the phase, so as to not affect the difference between the current sharing compensation and the average duty cycle of the other phase current control loop, and there is no coupling interference between them; S5, the voltage sharing compensation output by the flying capacitor voltage sharing control loop and the current sharing compensation output by the current sharing control loop are subjected to dynamic amplitude limiting processing, so as to ensure that all generated duty cycle instructions meet the physical constraint 0≤D≤1, and the modulation margin is allocated in turn according to the control priority: the main power control is preferentially guaranteed to have full-range adjustment capability, the remaining modulation margin is preferentially allocated to the flying capacitor voltage sharing control, and the remaining available modulation space is finally allocated to the inductor current sharing control, so as to realize the independence, coordination and operation stability of the three objectives of output power control, inter-phase current balance and flying capacitor voltage balance under the hardware constraint.

2. The loop-decoupled control method of a three-phase parallel flying-capacitor-type three-level converter according to claim 1, characterized by, The preset proportion of the bus voltage in the step S3 is 0.5, that is, half bus voltage 0.5xV bus As the given voltage of the flying capacitor voltage equalization control loop.

3. The loop-decoupled control method of a three-phase parallel flying-capacitor-type three-level converter according to claim 2, characterized by, In the step S3, under the small current operation condition, the flying capacitor voltage sharing control loop dynamically judges the charging and discharging polarity of the flying capacitor according to the inductor current direction or the continuous deviation direction of the flying capacitor voltage, and adjusts the sign of the voltage sharing compensation accordingly, so as to ensure that the direction of the voltage sharing control is correct.

4. The loop-decoupled control method of a three-phase parallel flying-capacitor-type three-level converter according to claim 1, characterized by, In the step S4, the decoupling rule is specifically: The conduction duty ratios of the two main control switching devices of phase A are respectively: D A1 = d avg + d ia + d fa , D a2 = d avg + d ia - d fa ; The on-duty duty ratio of the two main control switch devices of phase B is respectively: D B1 = d avg + d ib + d fb , D B2 = d avg + d ib - d fb ; The conduction duty ratios of the two main control switch devices of phase C are respectively: C1 = d avg -(d ia +d ib )+d fc , D C2 = d avg -(d ia +d ib )-d fc ; wherein d avg is the average duty command, d ia , d ib are A, B phase current sharing compensation, d fa , d fb , d fc are phase voltage sharing compensation.

5. The loop-decoupled control method of a three-phase parallel flying-capacitor-type three-level converter according to claim 1, characterized by, In the step S5, the dynamic amplitude limiting processing specifically includes: The average duty cycle command is limited to satisfy 0 < d < 1 avg <1; The limitation of the equalization compensation amount of each phase satisfies |d fx < min(d avg ,1-d avg ), where x=a, b, c represents each phase of the three-phase parallel topology. The restriction A-phase and B-phase equal current compensation amount satisfies |d ix <1-d avg -d fx |, where x = a, b.

6. The loop-decoupled control method of a three-phase parallel flying-capacitor-type three-level converter according to claim 1, characterized by, In the step S1, the voltage and current double-loop output controller is configured as: the voltage outer loop output is taken as the given instruction of the current inner loop, so that the converter has the constant voltage and current limiting output characteristics, and supports the constant voltage, constant current or constant power charging and discharging modes of the battery.

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