Dead zone compensation method, device and equipment of frequency converter and medium

Abstract

The invention discloses a dead-time compensation method, device and equipment of a frequency converter and a medium, and relates to the technical field of power electronic converter control. The rotating speed tracking circuit of the multiplexing frequency converter collects real-time voltage signals of the inverter, and the real-time voltage signals are processed through a hardware channel to obtain actual voltage signals. And performing software channel processing on the ideal reference voltage signal to obtain an estimated voltage signal, and constructing an ideal voltage estimation channel synchronous with hardware channel processing through software so as to form a perfect voltage waveform output without dead zone disturbance. A difference signal is determined according to an estimated voltage signal and an actual voltage signal, and the dead zone disturbance can be accurately observed through comparison in consideration of dead zone disturbance existing in hardware acquisition. Voltage difference comparison is carried out by constructing a software mirror image channel parallel to a hardware channel, the algorithm is simple and efficient, the problem of zero crossing point compensation is solved fundamentally, high-performance dead zone compensation is achieved, and the reliability of the system is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power electronic converter control, and particularly relates to a dead-time compensation method and device for a frequency converter, equipment and a medium. BACKGROUND

[0002] In motor drive, uninterruptible power supply (UPS), new energy power generation and other applications, voltage source pulse width modulation (PWM) inverter is the core power conversion unit. In order to prevent the upper and lower bridge arms of the inverter bridge from short-circuiting, a dead-time must be inserted in the PWM drive signal, which will cause a deviation between the actual output voltage vector of the inverter and the ideal voltage vector calculated by the controller. This voltage loss caused by non-ideal factors such as dead-time, switch-on voltage drop and switching delay is collectively referred to as "dead-time effect".

[0003] The conventional current feedback compensation has an uncontrollable blind area near the zero point of the current, and it is difficult to accurately determine the direction of the voltage that should be compensated, thereby causing compensation failure, waveform distortion and torque ripple, and thus reducing the reliability of the system.

[0004] Therefore, how to compensate for the dead-time effect to improve the reliability of the system is an urgent problem to be solved by those skilled in the art. SUMMARY

[0005] The present application aims to provide a dead-time compensation method and device for a frequency converter, equipment and a medium to solve the problem of compensation failure caused by the conventional zero-point compensation current feedback method, so as to reduce the reliability of the system.

[0006] To solve the above technical problems, the present application provides a dead-time compensation method for a frequency converter, comprising:

[0007] An ideal reference voltage signal processed by a current loop controller and an actual voltage signal processed by a hardware channel of a speed tracking circuit of the frequency converter are obtained;

[0008] An estimated voltage signal is obtained by software channel processing of the ideal reference voltage signal, and a difference signal is determined according to the estimated voltage signal and the actual voltage signal to input to a compensator to generate a compensation voltage signal;

[0009] The compensation voltage signal is superimposed on the ideal reference voltage signal to generate a compensated voltage signal.

[0010] In one aspect, the ideal reference voltage signal is software channel processed to obtain an estimated voltage signal, comprising:

[0011] The ideal reference voltage signal is actively delayed to obtain a delayed reference voltage signal; wherein the active delay processing is a delay control period matching a delay period of a loader in a software processing process;

[0012] The delayed reference voltage signal is software filtered to obtain an estimated voltage signal.

[0013] On the other hand, the compensator is a complex vector filter;

[0014] Correspondingly, the construction process of the compensator comprises:

[0015] A first bandwidth of the compensator and a second bandwidth corresponding to a software filtering manner are obtained;

[0016] A first proportional gain is determined according to the first bandwidth and the second bandwidth;

[0017] A first function is determined according to the first proportional gain, the first bandwidth, a fundamental angular frequency and a complex frequency variable, so as to complete the construction process of the compensator.

[0018] On the other hand, the first bandwidth is greater than a preset integral multiple of the fundamental angular frequency and less than a first threshold value; wherein the first threshold value is obtained from a sampling angular frequency and a second proportional gain.

[0019] On the other hand, the compensator comprises an inverse transformation module, a transformation module and an adjustment controller;

[0020] Correspondingly, the processing process of the compensator comprises:

[0021] The difference signal is transformed by the transformation module to obtain a direct current signal corresponding to a rotating coordinate system;

[0022] The direct current signal is adjusted by the adjustment controller to obtain a first signal;

[0023] The first signal is transformed by the inverse transformation module to obtain a compensating voltage signal corresponding to a stationary coordinate system.

[0024] On the other hand, the construction process of a transfer function of the adjustment controller comprises:

[0025] A first bandwidth of the compensator and a second bandwidth corresponding to a software filtering manner are obtained;

[0026] A first proportional gain is determined according to the first bandwidth and the second bandwidth;

[0027] The transfer function of the adjustment controller is determined according to the first proportional gain, the first bandwidth and a complex frequency variable.

[0028] In another aspect, after the compensated voltage signal is obtained, the method further comprises:

[0029] performing a load delay process on the compensated voltage signal to obtain an actual delayed voltage signal;

[0030] performing a modulation process on the actual delayed voltage signal to obtain a new actual voltage signal, and returning to the step of determining a difference signal according to the estimated voltage signal and the actual voltage signal to obtain a new difference signal until the new actual voltage signal is the same as the estimated voltage signal, and ending the compensation.

[0031] To solve the above technical problems, the present application also provides a dead zone compensation device of a frequency converter, comprising:

[0032] an acquisition module, configured to acquire an ideal reference voltage signal processed by a current loop controller and an actual voltage signal processed by a hardware channel of a speed tracking circuit of the frequency converter;

[0033] a processing module, configured to perform a software channel process on the ideal reference voltage signal to obtain an estimated voltage signal, and determine a difference signal according to the estimated voltage signal and the actual voltage signal, so as to input the difference signal to a compensator to generate a compensation voltage signal;

[0034] a superposition module, configured to superimpose the compensation voltage signal on the ideal reference voltage signal to generate a compensated voltage signal.

[0035] To solve the above technical problems, the present application also provides a dead zone compensation device of a frequency converter, comprising:

[0036] a memory, configured to store a computer program;

[0037] a processor, configured to execute the computer program to realize the steps of the dead zone compensation method of the frequency converter.

[0038] To solve the above technical problems, the present application also provides a computer readable storage medium, wherein the computer readable storage medium stores a computer program, and the computer program is executed by a processor to realize the steps of the dead zone compensation method of the frequency converter.

[0039] The application provides a dead zone compensation method of a frequency converter, first, a speed tracking circuit of the frequency converter collects real-time voltage signals of an inverter, and actual voltage signals are obtained through hardware channel processing. The ideal reference voltage signals processed by the current loop controller are obtained to facilitate subsequent comparison and difference value acquisition. Secondly, the ideal reference voltage signals are processed through a software channel to obtain estimated voltage signals. An ideal voltage estimation channel synchronized with the hardware channel processing is constructed through software to form a perfect voltage waveform output without dead zone disturbance. The difference signal is determined according to the estimated voltage signal and the actual voltage signal, and the voltage difference is determined by comparing the ideal estimated voltage signal generated by software with the actual voltage signal collected by hardware. Considering that the hardware collection will exist dead zone disturbance, the dead zone disturbance is accurately observed, the voltage disturbance caused by the dead zone effect is observed in real time, and the difference signal is input into the compensator in real time to generate a compensation voltage signal. Finally, the compensation voltage signal is superimposed on the ideal reference voltage signal, that is, the observed value is fed forward to the voltage instruction to form a voltage closed-loop control to correct the dead zone error. The whole process does not need to carry out zero compensation, and the compensation will not fail due to inaccurate direction judgment near the current zero point. The application directly observes and compensates the voltage, so that the voltage signal is a continuous sine signal near the zero point, and there is no direction judgment problem. The voltage difference is compared through the software mirror channel parallel to the hardware channel, the algorithm is simple and efficient, the zero point compensation problem is fundamentally solved, the torque ripple caused by the zero point compensation failure and the waveform distortion caused by the noise audible to the human ear are effectively inhibited, high-performance dead zone compensation is realized, and the reliability of the system is improved.

[0040] In addition, the application also provides a dead zone compensation device, equipment and medium of a frequency converter, which have the same beneficial effects as the dead zone compensation method of the frequency converter. BRIEF DESCRIPTION OF DRAWINGS

[0041] In order to more clearly illustrate the embodiments of the application, the drawings needed in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creating laborious work.

[0042] Figure 1 A flow chart of a dead zone compensation method of a frequency converter provided by the embodiments of the application;

[0043] Figure 2 A dead zone compensation schematic diagram of a frequency converter provided by the embodiments of the application;

[0044] Figure 3 A control schematic diagram of a compensator of a complex vector filter provided by the embodiments of the application;

[0045] Figure 4 A control schematic diagram of a PI controller regulator provided for an embodiment of the present application;

[0046] Figure 5 An output current schematic diagram under a light load working condition provided for an embodiment of the present application;

[0047] Figure 6 An output current schematic diagram under a heavy load working condition provided for an embodiment of the present application;

[0048] Figure 7 A structure diagram of a dead zone compensation device of a frequency converter provided for an embodiment of the present application;

[0049] Figure 8 A structure diagram of a dead zone compensation device of a frequency converter provided for an embodiment of the present application. DETAILED DESCRIPTION

[0050] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0051] The core of the present application is to provide a dead zone compensation method, device, equipment and medium of a frequency converter, to solve the problem of compensation failure caused by the current feedback mode of conventional zero point compensation, and to reduce the reliability of the system.

[0052] In order to enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the drawings and specific embodiments.

[0053] In motor drive, uninterrupted power supply (UPS), new energy power generation and other applications, voltage source PWM inverter is the core power conversion unit. In order to prevent the upper and lower bridge arms of the inverter bridge from being short-circuited, a dead time must be inserted in the PWM drive signal, which will cause a deviation between the actual output voltage vector of the inverter and the ideal voltage vector calculated by the controller. This voltage loss caused by non-ideal factors such as dead time, switch-on voltage drop and switching delay is collectively referred to as "dead time effect". The dead time effect will cause output voltage waveform distortion, generate low-order harmonics, cause motor torque ripple, produce noise audible to human ear, and reduce system efficiency. Therefore, high-precision compensation of the dead time effect is one of the key technologies to improve the performance of the inverter. The current feedback compensation is usually used, and in this compensation method, there is an uncontrollable blind area near the zero point of the current, and it is difficult to accurately determine the direction of the voltage that should be compensated, thereby causing compensation failure, waveform distortion and torque ripple, thereby reducing the reliability of the system. The dead time compensation method of the frequency converter provided in the application can solve the above technical problems.

[0054] Figure 1 A flow chart of a dead time compensation method of a frequency converter provided in an embodiment of the application is shown in Figure 1 , and the method comprises:

[0055] S11: obtaining an ideal reference voltage signal processed by a current loop controller and an actual voltage signal processed by a hardware channel of a speed tracking circuit of the frequency converter;

[0056] S12: performing software channel processing on the ideal reference voltage signal to obtain an estimated voltage signal, and determining a difference signal according to the estimated voltage signal and the actual voltage signal to input to a compensator to generate a compensation voltage signal;

[0057] S13: superimposing the compensation voltage signal on the ideal reference voltage signal to generate a compensated voltage signal.

[0058] Specifically, the ideal reference voltage signal is obtained by processing by the current loop controller, mainly by first obtaining the reference voltage vector (Vq* and Vd*) calculated and output by the current loop controller. The reference voltage is subjected to inverse Park transformation to convert it from the rotating coordinate system to the two-phase stationary coordinate system to obtain the ideal two-phase reference voltage (Vq* and Vd*). The actual voltage signal is obtained by hardware channel processing by the speed tracking circuit of the frequency converter, mainly by using the pre-existing speed tracking circuit (usually including a filter unit) in the frequency converter control system to collect the three-phase output voltage signal (Vabc) at the output end of the inverter. The three-phase voltage signal is subjected to Clark transformation to obtain the actual voltage signal (Vq and Vd) in the two-phase stationary coordinate system. ​​Here, the original speed tracking circuit in the frequency converter is reused to obtain the actual output voltage of the inverter, and the actual output voltage is obtained through hardware channel processing.

[0059] Step S12 performs software channel processing on the ideal reference voltage signal to obtain an estimated voltage signal. This software channel processing takes into account the absence of dead time in software mode, while dead time exists in hardware channel processing. Therefore, the data from the software and hardware channels are compared and observed. The software channel actively delays and filters the ideal reference voltage calculated by the controller to simulate the characteristics of the hardware path, generating an estimated value of the ideal output voltage to represent the perfect voltage waveform output without dead time disturbances. The two voltage signals from the software and hardware channels are compared to determine the difference signal. This difference is the observed value of the voltage disturbance caused by factors such as dead time and switching transistor voltage drop. This observed value is input to the compensator for adjustment to obtain the compensated voltage signal.

[0060] It should be noted that the compensator can be a proportional-integral (PI) controller or other types of controllers; there are no restrictions here, and it can be set according to the actual situation. The compensated voltage signal is fed forward and superimposed onto the ideal reference voltage signal to generate the final compensated voltage command, i.e., the voltage signal.

[0061] Figure 2 A schematic diagram of dead-time compensation for a frequency converter provided in an embodiment of this application is shown below. Figure 2 As shown, the reference voltage vector ( The ideal two-phase reference voltage is obtained through the inverse Park transformation. Next, after software channel processing (active delay and software filtering (low-pass filter, LPF)) the ideal estimated voltage signal is obtained. The actual voltage signal in step S11 ( The difference signal is obtained by comparing it with the estimated voltage signal. The difference signal is input to the compensator to obtain the compensation voltage signal. ), fed forward and superimposed onto the ideal reference voltage signal ( On the above, the final compensated voltage command is generated: The compensated voltage command is sent to the Space Vector Pulse Width Modulation (SVPWM) module to generate a PWM signal to drive the inverter power switch transistors, and finally outputs a precise voltage to drive the motor.

[0062] The dead-time compensation method of the frequency converter provided by the embodiment of the application first acquires the real-time voltage signal of the inverter by the speed tracking circuit of the frequency converter, and obtains the actual voltage signal by hardware channel processing. The ideal reference voltage signal processed by the current loop controller is acquired to facilitate subsequent comparison and difference acquisition. Secondly, the ideal reference voltage signal is processed by a software channel to obtain an estimated voltage signal. An ideal voltage estimation channel synchronized with the hardware channel processing is constructed by software to form a perfect voltage waveform output without dead-time disturbance. The difference signal is determined according to the estimated voltage signal and the actual voltage signal, and the voltage difference is determined by comparing the ideal estimation voltage signal generated by software with the actual voltage signal collected by hardware. Considering that the hardware collection may exist dead-time disturbance, the dead-time disturbance is accurately observed by comparison, the voltage disturbance caused by the dead-time effect is observed in real time, and the difference signal is input into the compensator in real time to generate a compensation voltage signal. Finally, the compensation voltage signal is superimposed on the ideal reference voltage signal, that is, the observed value is fed forward to the voltage command to form a voltage closed-loop control to correct the dead-time error. The whole process does not need zero compensation, and the compensation will not fail due to inaccurate direction judgment near the current zero point. The application directly observes and compensates the voltage, so that the voltage signal is a continuous sine signal near the zero point, and there is no direction judgment problem. The voltage difference is compared by constructing a software mirror channel parallel to the hardware channel, the algorithm is simple and efficient, the zero point compensation problem is fundamentally solved, the torque ripple caused by the zero point compensation failure and the waveform distortion caused by the noise audible to the human ear are effectively suppressed, high-performance dead-time compensation is realized, and the reliability of the system is improved.

[0063] In some embodiments, the software channel processing of the ideal reference voltage signal to obtain the estimated voltage signal comprises:

[0064] The ideal reference voltage signal is actively delayed to obtain a delayed reference voltage signal; wherein the processing mode of the active delay processing is to delay the control period to match the delay period of the loading mechanism in the software processing process;

[0065] The delayed reference voltage signal is processed by software filtering to obtain the estimated voltage signal.

[0066] Specifically, the ideal reference voltage signal is actively delayed, for example, delayed for one control period, denoted as to match the calculation and execution delay inherent in the loading mechanism of the control chip. The active delay core is to delay the specific signal (such as current sampling, instruction given) according to the preset timing to adapt to the hardware response or signal synchronization requirement.

[0067] The delay type can also be selected by delaying: preferentially using a fixed step delay (suitable for scenarios requiring precise synchronization, such as voltage and current sampling alignment), or an adaptive delay (dynamically adjusted according to the speed / load, avoiding low-speed response lag). The software implementation is achieved by means of a timer interrupt or a loop count, for example based on the frequency converter core clock (e.g. 10 kHz interrupt), setting the delay step (1-100 μs adjustable), storing the signal in a First-In-First-Out (FIFO) buffer, and reading it according to the delay step number. Key parameter setting: the delay time needs to match the hardware characteristics, such as the Analog-to-Digital (AD) conversion delay of the current sampling channel An active delay can be set to ensure that the voltage command and the current sampling signal are time-synchronized.

[0068] Regarding the filtering process, the speed tracking circuit in the hardware channel contains a low-pass filter, which functions to suppress high-frequency interference in the voltage sampling signal. The low-pass filtering operation in the software channel only functions to match the characteristics of the hardware channel, and does not bear the function of suppressing noise, so the software filtering process here is consistent with the filtering process of the hardware channel.

[0069] The determination process of the estimated voltage signal provided by the software channel processing in the embodiment is to match the inherent calculation and execution delay under the chip loading mechanism through active delay processing, and then to generate an ideal estimated voltage signal by means of software low-pass filtering processing, so as to represent the perfect voltage waveform that should be output when there is no dead-zone disturbance, facilitating subsequent comparison with the signal after the hardware channel processing. The signal can be synchronized in time sequence, interference noise can be suppressed, and control performance can be stabilized.

[0070] In some embodiments, the compensator is a complex vector filter;

[0071] Correspondingly, the construction process of the compensator includes:

[0072] obtaining a first bandwidth of the compensator and a second bandwidth corresponding to the software filtering manner;

[0073] determining a first proportional gain according to the first bandwidth and the second bandwidth;

[0074] determining a first function according to the first proportional gain, the first bandwidth, the fundamental angular frequency and the complex frequency variable, so as to complete the construction process of the compensator.

[0075] Specifically, the complex vector filter is used to replace the combination of the PI controller and the coordinate transformation. Figure 3 A control schematic diagram of a compensator of a complex vector filter provided by the embodiment of the application is as shown in Figure 3The working process is shown as follows: the controller calculates d-q axis reference voltage The α-β axis reference voltage in the stationary coordinate system is obtained through inverse Park transformation The signal is divided into two paths: one path enters the forward channel and is sent to the PWM and inverter module after being loaded with delay by a beat control chip , and the output equivalent sinusoidal PWM high-voltage pulse is obtained after low-pass filtering (LPF) by a sampling circuit ; the other path enters the software estimation channel and generates an ideal estimated voltage signal after being actively delayed by software and low-pass filtered (LPF) by software . The actual collected output voltage is compared with the estimated value , and the difference is sent to a complex vector filter for adjustment. The output of the filter is the observed voltage disturbance compensation amount, and the compensation amount is fed forward and superimposed on the reference voltage to correct the PWM command and offset the dead zone effect.

[0076] The complex vector filter is a controller applying the internal model principle to alternating current signals, and the first proportional gain is determined according to the first bandwidth and the second bandwidth, and the formula is as follows:

[0077] ;

[0078] ;

[0079] wherein, is the first bandwidth of the compensator, is the second bandwidth corresponding to the software filtering processing mode, and the units are rad / s. is the first proportional gain.

[0080] The first function is: ;

[0081] wherein, is the first proportional gain, is the fundamental angular frequency, is a complex frequency variable, is the first bandwidth.

[0082] It should be noted that the first bandwidth should not be set too high. If the first bandwidth is set too high, the influence of the delay link cannot be ignored. Therefore, the second function of the difference signal to the compensation voltage signal is as follows:

[0083] .

[0084] It can be seen that the voltage disturbance observer presents the characteristics of a low-pass filter, and the filtering performance thereof depends on the set bandwidth When the motor speed is increased, the set bandwidth can be appropriately increased to ensure that the voltage disturbance observer can accurately observe the voltage disturbance without attenuation and lag. However, the set bandwidth should not be set too high, otherwise the influence of the delay link (L) cannot be ignored.

[0085] The compensator constituted by the complex vector filter provided in the embodiment presents the characteristics of a low-pass filter, and when the motor speed is increased, the set bandwidth can be appropriately increased to ensure that the voltage disturbance observer can accurately observe the voltage disturbance without attenuation and lag. The algorithm structure is more concise, the calculation burden is significantly reduced, the calculation error and complexity caused by coordinate transformation are avoided, the accurate compensation ability for all alternating harmonic components is maintained, and the dynamic response speed is faster.

[0086] In some embodiments, the first bandwidth is greater than a preset integral multiple of the fundamental angular frequency and less than a first threshold value; wherein the first threshold value is obtained from the sampling angular frequency and the second proportional gain.

[0087] Specifically, the selection range of the set bandwidth is: .

[0088] wherein, is the sampling angular frequency, and 1 / 20 is the second proportional gain. The second proportional gain is a critical value for affecting the influence of the delay link (L).

[0089] The complex vector filter can achieve zero static error tracking and regulation for alternating signals of specific frequencies. Therefore, it can directly process alternating voltage signals in the alpha-beta coordinate system, greatly simplifying the algorithm structure.

[0090] The determination process of the selection range of the first bandwidth provided in the embodiment ensures that the voltage disturbance observer can accurately observe the voltage disturbance without attenuation and lag, and also ensures that the influence caused by the delay link is taken into account, thereby achieving zero static error tracking and regulation.

[0091] In some embodiments, the compensator comprises an inverse transformation module, a transformation module, and a regulation controller.

[0092] Correspondingly, the processing process of the compensator comprises:

[0093] The difference signal is subjected to transformation processing of the transformation module to obtain a direct current signal corresponding to the rotating coordinate system;

[0094] The direct current signal is subjected to regulation processing of the regulation controller to obtain a first signal.

[0095] ​​The first signal is transformed by the inverse transformation module to obtain the compensation voltage signal corresponding to the stationary coordinate system.

[0096] Specifically, Figure 4 This is a control schematic diagram of a regulator for a PI controller provided in an embodiment of this application, as shown below. Figure 4 As shown, voltage disturbance observation compensation is based on a PI controller and coordinate transformation. This scheme calculates the difference between the output voltage signal and the estimated voltage signal in the compensation loop. ), through Park transformation ( This is converted into a DC signal in a rotating coordinate system. Since the PI controller can only regulate DC signals without steady-state error, the DC signal, after being regulated by the PI controller, is then subjected to an inverse Park transform. The coordinates are converted back to the stationary coordinate system to form an AC compensation quantity, which is then fed forward and superimposed into the command.

[0097] In the compensation circuit, the output voltage Compared with the estimated value The comparison is performed, and the difference signals are sequentially passed through an inverse Park transform module ( ), a PI controller, and a Park converter module ( ), and then connect it to the positive input of the second adder.

[0098] The role of the PI controller and coordinate transformation: By performing two coordinate transformations, the problem of tracking AC quantities is transformed into a problem of regulating DC quantities, thus enabling disturbance observation and compensation using a traditional PI controller. This is an indirect but feasible implementation method.

[0099] The compensation provided in this embodiment, achieved through a PI controller, utilizes widely available and mature PI adjustment algorithms in existing controllers, making it easy to implement via software upgrades on existing platforms.

[0100] In some embodiments, the process of constructing the transfer function of the controller includes:

[0101] Obtain the first bandwidth of the compensator and the second bandwidth corresponding to the software filtering method;

[0102] The first proportional gain is determined based on the first bandwidth and the second bandwidth;

[0103] The transfer function of the regulating controller is determined based on the first proportional gain, the first bandwidth, and the complex frequency variable.

[0104] Specifically, its transfer function is as follows:

[0105] .

[0106] in, The first bandwidth of the compensator, This represents the second bandwidth corresponding to the software filtering method, with units of rad / s. This is the first proportional gain. It is a complex frequency variable.

[0107] PI controllers, combined with coordinate transformations (such as Clark transformation and Park transformation), are used to achieve vector control compensation for AC motors. The core is to convert AC quantities into DC quantities and then achieve precise adjustment through the PI controller.

[0108] The transfer function of the PI controller provided in this embodiment uses an integral term that eliminates DC steady-state error, accurately tracks the given value, and avoids the accumulation of deviations over long-term operation. The proportional term amplifies the current deviation, accelerates the response speed, and promptly compensates for current deviations caused by load fluctuations, grid fluctuations, and other disturbances. In some embodiments, after obtaining the compensated voltage signal, the method further includes:

[0109] The compensated voltage signal is subjected to a loading delay processing to obtain the actual delayed voltage signal;

[0110] The actual delayed voltage signal is modulated to obtain a new actual voltage signal. The process then returns to the step of determining the difference signal based on the estimated voltage signal and the actual voltage signal to obtain a new difference signal. This process continues until the new actual voltage signal is the same as the estimated voltage signal, at which point the compensation ends.

[0111] Specifically, such as Figure 2 As shown, the forward channel consists of reference voltage input modules connected in sequence ( ), Inverse Park Transform Module ( ), first adder, control chip loading delay module ( The circuit consists of a PWM modulation and inverter module, a low-pass filter (LPF) module, and ultimately outputs the actual voltage. .

[0112] Feedback channel: from actual output voltage The sampling point is led out and connected to the negative input terminal of the second adder.

[0113] Software estimation channel: from reference voltage input module ( ) is led out and connected to the software active delay module ( The voltage signal is then passed through a software low-pass filter (LPF) module to output an estimated voltage signal. .

[0114] Compensation Loop: The output of the second adder (i.e., the difference between the actual voltage signal and the estimated voltage signal) is connected to the compensator formed by the complex vector filter. The output of the compensator is connected to the first adder, forming a feedforward compensation closed loop. It should be noted that in the hardware channel, the compensated voltage signal is subjected to a loading delay to obtain the actual delayed voltage signal. This is then modulated to obtain a new actual voltage signal. Closed-loop control continues until the new actual voltage signal matches the estimated voltage signal, at which point the compensation ends.

[0115] The closed-loop control compensation process provided in this embodiment ensures real-time compensation. Through hardware reuse and algorithm innovation, it achieves dead-zone compensation through a completely new technical path. It has produced substantial and verifiable positive effects in terms of simplifying the algorithm, eliminating zero-crossing blind spots, enhancing adaptability, and improving output accuracy.

[0116] Figure 5 A schematic diagram of the output current under light load conditions provided in this application embodiment is shown below. Figure 5 As shown, when this embodiment is not used, the output current ( The waveform distortion is obvious, and the output torque ( The torque pulsation was severe. After applying this embodiment, the current waveform returned to a sine wave, and the torque pulsation was greatly suppressed, proving the excellent effectiveness of this application under light load conditions that are difficult to compensate for.

[0117] Figure 6 A schematic diagram of the output current under heavy load conditions provided in this application embodiment is shown below. Figure 6 As shown, without this embodiment, the current and torque already exhibit some distortion. With this embodiment, the current waveform is smoother, torque ripple is further reduced, the system operates more smoothly, and efficiency is higher.

[0118] The foregoing has described in detail various embodiments of the dead-time compensation method for frequency converters. Based on this, this application also discloses a dead-time compensation device for frequency converters corresponding to the aforementioned method. Figure 7 This is a structural diagram of a dead-time compensation device for a frequency converter provided in an embodiment of this application. Figure 7 As shown, the dead-time compensation device of the frequency converter includes:

[0119] The acquisition module 11 is used to acquire the ideal reference voltage signal processed by the current loop controller and the actual voltage signal obtained by hardware channel processing through the speed tracking circuit of the frequency converter;

[0120] Processing module 12 is used to perform software channel processing on the ideal reference voltage signal to obtain an estimated voltage signal; and to determine the difference signal based on the estimated voltage signal and the actual voltage signal, so as to input it to the compensator to generate a compensation voltage signal;

[0121] The superposition module 13 is used to superimpose the compensation voltage signal onto the ideal reference voltage signal to generate the compensated voltage signal.

[0122] Since the embodiments of the device part correspond to the embodiments described above, please refer to the embodiments described in the method part for the embodiments of the device part, and will not be repeated here.

[0123] For a description of the dead-zone compensation device for a frequency converter provided in this application, please refer to the above method embodiments. This application will not repeat the description here, but it has the same beneficial effects as the dead-zone compensation method for the frequency converter described above.

[0124] Figure 8 A structural diagram of a dead-time compensation device for a frequency converter provided in an embodiment of this application is shown below. Figure 8 As shown, the device includes:

[0125] Memory 21 is used to store computer programs;

[0126] Processor 22 is used to implement the dead-time compensation method of the frequency converter when executing a computer program.

[0127] The dead-time compensation device for the frequency converter provided in this embodiment may include, but is not limited to, tablet computers, laptop computers, or desktop computers.

[0128] The processor 22 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 22 may be implemented using at least one of the following hardware forms: Digital Signal Processor (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 22 may also include a main processor and a coprocessor. The main processor, also known as the Central Processing Unit (CPU), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 22 may integrate a Graphics Processing Unit (GPU), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 22 may also include an Artificial Intelligence (AI) processor, which handles computational operations related to machine learning.

[0129] The memory 21 may include one or more computer-readable storage media, which may be non-transitory. The memory 21 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 21 is used to store at least the following computer program 211, which, after being loaded and executed by the processor 22, is capable of implementing the relevant steps of the dead-zone compensation method for the frequency converter disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 21 may also include an operating system 212 and data 213, etc., and the storage method may be temporary storage or permanent storage. The operating system 212 may include Windows, Unix, Linux, etc. The data 213 may include, but is not limited to, the data involved in the dead-zone compensation method for the frequency converter, etc.

[0130] In some embodiments, the dead-time compensation device of the frequency converter may further include a display screen 23, an input / output interface 24, a communication interface 25, a power supply 26, and a communication bus 27.

[0131] Those skilled in the field can understand, Figure 8 The structure shown does not constitute a limitation on the dead-time compensation device of the frequency converter and may include more or fewer components than shown.

[0132] The processor 22 implements the dead-time compensation method for the frequency converter provided in any of the above embodiments by calling the instructions stored in the memory 21.

[0133] For a description of the dead-zone compensation device for a frequency converter provided in this application, please refer to the above method embodiments. This application will not repeat the description here, but it has the same beneficial effects as the dead-zone compensation method for the frequency converter described above.

[0134] Furthermore, this application also provides a computer-readable storage medium storing a computer program, which, when executed by processor 22, implements the steps of the dead-time compensation method for the frequency converter described above.

[0135] It is understood that if the methods in the above embodiments are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0136] For a description of the computer-readable storage medium provided in this application, please refer to the above method embodiments. This application will not repeat the description here, but it has the same beneficial effects as the dead-time compensation method of the frequency converter described above.

[0137] The above provides a detailed description of a dead-time compensation method, apparatus, device, and medium for a frequency converter provided in this application. The various embodiments in the specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of this application.

[0138] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

Claims

1. A dead-time compensation method for a frequency converter, characterized in that, include: The ideal reference voltage signal processed by the current loop controller and the actual voltage signal obtained by hardware channel processing through the speed tracking circuit of the frequency converter are acquired. The estimated voltage signal is obtained by software channel processing of the ideal reference voltage signal; The difference signal is determined based on the estimated voltage signal and the actual voltage signal, and then input to the compensator to generate a compensation voltage signal. The compensated voltage signal is superimposed on the ideal reference voltage signal to generate the compensated voltage signal.

2. The dead-time compensation method for a frequency converter according to claim 1, characterized in that, The estimated voltage signal is obtained by software channel processing of the ideal reference voltage signal, including: The ideal reference voltage signal is subjected to active delay processing to obtain a delayed reference voltage signal; wherein, the active delay processing method is to control the delay period to match the delay period of the loading mechanism in the software processing process; The estimated voltage signal is obtained by software filtering the delayed reference voltage signal.

3. The dead-time compensation method for a frequency converter according to claim 1, characterized in that, The compensator is a complex vector filter; Correspondingly, the construction process of the compensator includes: Obtain the first bandwidth of the compensator and the second bandwidth corresponding to the software filtering method; A first proportional gain is determined based on the first bandwidth and the second bandwidth; The first function is determined based on the first proportional gain, the first bandwidth, the fundamental angular frequency, and the complex frequency variable to complete the construction process of the compensator.

4. The dead-time compensation method for a frequency converter according to claim 3, characterized in that, The first bandwidth is greater than a preset integer multiple of the fundamental angular frequency and less than a first threshold; wherein the first threshold is obtained by the sampling angular frequency and the second proportional gain.

5. The dead-time compensation method for a frequency converter according to claim 1, characterized in that, The compensator includes an inverse transformation module, a transformation module, and a regulating controller; Correspondingly, the processing procedure of the compensator includes: The difference signal is processed by the transformation module to obtain the DC signal corresponding to the rotating coordinate system; The DC signal is processed by the regulating controller to obtain the first signal; The first signal is transformed by the inverse transformation module to obtain the compensation voltage signal corresponding to the stationary coordinate system.

6. The dead-time compensation method for a frequency converter according to claim 5, characterized in that, The process of constructing the transfer function of the regulating controller includes: Obtain the first bandwidth of the compensator and the second bandwidth corresponding to the software filtering method; A first proportional gain is determined based on the first bandwidth and the second bandwidth; The transfer function of the regulating controller is determined based on the first proportional gain, the first bandwidth, and the complex frequency variable.

7. The dead-time compensation method for a frequency converter according to claim 1, characterized in that, After obtaining the compensated voltage signal, the method further includes: The compensated voltage signal is subjected to a loading delay processing to obtain the actual delayed voltage signal; The actual delayed voltage signal is modulated to obtain a new actual voltage signal, and then the process returns to the step of determining the difference signal based on the estimated voltage signal and the actual voltage signal to obtain a new difference signal, until the new actual voltage signal is the same as the estimated voltage signal, at which point the compensation ends.

8. A dead-time compensation device for a frequency converter, characterized in that, include: The acquisition module is used to acquire the ideal reference voltage signal processed by the current loop controller and the actual voltage signal obtained by hardware channel processing through the speed tracking circuit of the frequency converter. The processing module is used to perform software channel processing on the ideal reference voltage signal to obtain the estimated voltage signal; The difference signal is determined based on the estimated voltage signal and the actual voltage signal, and then input to the compensator to generate a compensation voltage signal. The superposition module is used to superimpose the compensation voltage signal onto the ideal reference voltage signal to generate the compensated voltage signal.

9. A dead-time compensation device for a frequency converter, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the dead-time compensation method for a frequency converter as described in any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the dead-time compensation method for the frequency converter as described in any one of claims 1 to 7.

Images