Analog quantity input circuit and acquisition module with analog quantity input circuit

Abstract

The invention discloses an analog input circuit and an acquisition module with the analog input circuit. The analog input circuit comprises an input sampling branch, a voltage stabilization protection unit and an anti-reverse protection unit, the input sampling branch comprises a current limiting unit and a sampling unit which are connected in series, one end of the current limiting unit is connected with a signal input terminal, and the other end is connected with the input end of the sampling unit; the output end of the sampling unit is connected with the internal reference ground; the voltage-stabilizing protection unit is connected in parallel to two ends of the sampling unit; one end of the anti-reverse protection unit is connected with the signal reference terminal, and the other end is connected with the internal reference ground; when the external power supply terminal and the signal input terminal are short-circuited, the current limiting unit can control the current flowing through the voltage stabilization protection unit within a set current range, and the voltage stabilization protection unit can clamp the voltage at the two ends of the sampling unit at a set voltage value; when the external power supply terminal and the signal reference terminal are short-circuited, the anti-reverse protection unit cuts off the short-circuit loop through reverse cut-off; and self-adaptive current limiting and overvoltage protection are realized.

Description

Technical Field

[0001] This invention relates to the field of industrial automation control technology, and more specifically, to an analog input circuit and a data acquisition module having an analog input circuit. Background Technology

[0002] In distributed control systems and safety instrumented systems, the analog signal acquisition module is a core component used to acquire 4 mA-20 mA current signals output by field sensors (such as temperature sensors, pressure sensors, flow transmitters, etc.). This module typically needs to support two-wire, three-wire, and four-wire instruments and provide 24V power to external devices.

[0003] However, during industrial field construction and maintenance, wiring errors are the main cause of damage to analog signal acquisition modules. Common fault conditions include: short circuit between external power supply terminal and signal input terminal, short circuit between external power supply terminal and signal reference terminal, and incorrect connection of external high voltage.

[0004] To solve the above problems, existing technologies typically employ the following solutions: Patent document CN117193221A discloses an analog input system with input current limiting protection. This system employs an active control circuit based on a MOSFET (Metal Oxide Semiconductor). It uses an MCU (Microcontroller Unit) or dedicated circuitry to detect voltage / current and then control the gate voltage of the MOSFET to achieve switching or current limiting. This approach has the following significant drawbacks: first, the circuit is complex and costly; second, if the gate drive voltage shared by multiple channels is abnormal, all channel protection will fail; and third, it introduces a large number of active devices (such as MOSFETs), which themselves may become sources of failure.

[0005] Patent document CN112636314A discloses a current limiting protection circuit, which designs a complex current limiting circuit (such as a combination of transistors and MOSFETs) for the external power supply side. Although it can protect the power supply, each channel requires an independent complex circuit, which occupies valuable PCB (Printed Circuit Board) area and has a high cost.

[0006] In summary, there is an urgent need to develop an analog input circuit and a data acquisition module with an analog input circuit to solve one or more of the problems mentioned above. Summary of the Invention

[0007] One object of the present invention is to provide a new technical solution for an analog input circuit and a data acquisition module having an analog input circuit.

[0008] According to a first aspect of the present invention, an analog input circuit is provided, comprising: an external power supply terminal, a signal input terminal, a signal reference terminal, and an internal reference ground, wherein the external power supply terminal is connected to a power supply. It also includes: input sampling branch, voltage regulation protection unit and reverse protection unit; One end of the input sampling branch is connected to the signal input terminal, and the other end is connected to the internal reference ground; the input sampling branch includes a current limiting unit and a sampling unit connected in series, one end of the current limiting unit is connected to the signal input terminal, and the other end is connected to the input terminal of the sampling unit; the output terminal of the sampling unit is connected to the internal reference ground; The voltage regulation and protection unit is connected in parallel across the two ends of the sampling unit; One end of the anti-reverse protection unit is connected to the signal reference terminal, and the other end is connected to the internal reference ground; When the external power supply terminal is short-circuited with the signal input terminal, the current limiting unit can control the current flowing through the voltage regulation protection unit within a set current range, and the voltage regulation protection unit can clamp the voltage across the sampling unit at a set voltage value; when the external power supply terminal is short-circuited with the signal reference terminal, the reverse protection unit cuts off the short-circuit loop by reverse cutoff.

[0009] Optionally, the upper limit of the set current range is greater than the operating current of the current limiting unit and less than the maximum withstand current of the voltage regulation protection unit.

[0010] Optionally, the current limiting unit includes a resettable fuse, wherein the rated current limiting current of the resettable fuse is greater than the upper limit of the normal operating current range of the analog input circuit, and the operating current of the resettable fuse is greater than the upper limit of the normal operating current range and less than the maximum withstand current of the voltage regulation protection unit.

[0011] Optionally, the set voltage value is simultaneously less than or equal to the maximum withstand voltage of the sampling unit and the rated clamping voltage of the voltage regulation protection unit.

[0012] Optionally, the voltage regulation protection unit includes a Zener diode, the cathode of which is connected to the connection node between the current limiting unit and the sampling unit, and the anode of which is connected to the internal reference ground.

[0013] Optionally, the reverse connection protection unit includes a reverse connection protection diode, the anode of which is connected to the internal reference ground, and the cathode of which is connected to the signal reference terminal.

[0014] Optionally, the sampling unit includes a first sampling resistor and a second sampling resistor connected in series; one end of the first sampling resistor is connected to the current limiting unit, and the other end is connected to one end of the second sampling resistor, and the other end of the second sampling resistor is connected to the internal reference ground; The common connection point of the first sampling resistor and the second sampling resistor serves as the first voltage acquisition point, and the connection node between the first sampling resistor and the current limiting unit serves as the second voltage acquisition point. The first voltage acquisition point and the second voltage acquisition point are respectively used to output voltage signals to the analog-to-digital conversion circuit.

[0015] Optionally, the sampling unit further includes a filter capacitor connected in parallel with the series combination of the first sampling resistor and the second sampling resistor.

[0016] Optionally, the external power supply terminal is connected to the power supply via a power protection diode, with the anode of the power protection diode connected to the power supply and the cathode of the power protection diode connected to the external power supply terminal.

[0017] According to a second aspect of the present invention, a data acquisition module having an analog input circuit is provided, comprising the analog input circuit as described in the first aspect of the present invention, an analog-to-digital converter circuit connected to a sampling unit of the analog input circuit, and a processor connected to the analog-to-digital converter circuit.

[0018] According to an embodiment of the present invention, the analog input circuit and the acquisition module having the analog input circuit have the following advantages: The analog input circuit of this invention combines a resettable PTC fuse and a Zener diode. When a short circuit occurs, the PTC fuse first activates to limit the total current, thus controlling the current flowing through the Zener diode within a safe range. The Zener diode can therefore reliably clamp the voltage across the sampling resistor to the set voltage value, thereby protecting the sampling resistor and conditioning circuit in the subsequent stage. By simply adding a reverse polarity protection diode between the internal reference ground and the signal reference terminal, the thorny problem of "short circuit between the external power supply terminal and the signal reference terminal" is cleverly solved. When a short circuit occurs, the reverse polarity protection diode reverses and cuts off the short circuit loop at almost zero cost, protecting the 24V power supply.

[0019] Other features and advantages of the invention will become clear from the following detailed description of exemplary embodiments of the invention with reference to the accompanying drawings. Attached Figure Description

[0020] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments of the invention and, together with their description, serve to explain the principles of the invention.

[0021] Figure 1 This is a schematic diagram of an analog input circuit according to an embodiment; Figure 2 This is a schematic diagram of an analog input circuit connected to an external two-wire instrument, according to an embodiment. Figure 3 This is a schematic diagram illustrating the principle of an analog input circuit connected to an external three-wire instrument according to an embodiment. Figure 4 This is a schematic diagram of an analog input circuit connected to an external four-wire instrument according to an embodiment. Figure 5 This is a schematic diagram illustrating the principle of a short circuit in an analog input circuit according to an embodiment. Figure 1 ; Figure 6 This is a schematic diagram illustrating the principle of a short circuit in an analog input circuit according to an embodiment. Figure 2 . Detailed Implementation

[0022] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the invention.

[0023] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0024] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0025] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0026] Example 1: See Figure 1 As shown, this embodiment of the invention provides an analog input circuit, including: external power supply terminals S1+ / S2+ / …..Sn+, signal input terminal AI1+, signal reference terminals AI1- / AI2- / …..AIn-, and internal reference ground FGND. The external power supply terminals S1+ / S2+ / …..Sn+ are connected to the power supply CH_24V. The circuit also includes: an input sampling branch, a voltage regulation protection unit, and a reverse protection unit. One end of the input sampling branch is connected to the signal input terminal AI1+, and the other end is connected to the internal reference ground FGND; the input sampling branch includes a current limiting unit 1 and a sampling unit 2 connected in series. One end of the current limiting unit 1 is connected to the signal input terminal AI1+, and the other end is connected to the input terminal of the sampling unit 2; the output terminal of the sampling unit 2 is connected to the internal reference ground FGND. The voltage regulation protection unit 3 is connected in parallel across the two ends of the sampling unit 2; One end of the anti-reverse protection unit 4 is connected to the signal reference terminal AI1- / AI2- / …..AIn-, and the other end is connected to the internal reference ground FGND; When the external power supply terminals S1+ / S2+ / …..Sn+ are short-circuited with the signal input terminal AI1+, the current limiting unit 1 can control the current flowing through the voltage regulation protection unit 3 within a set current range, and the voltage regulation protection unit 3 can clamp the voltage across the sampling unit 2 at a set voltage value; when the external power supply terminals S1+ / S2+ / …..Sn+ are short-circuited with the signal reference terminals AI1- / AI2- / ….. AIn-, the reverse protection unit 4 cuts off the short-circuit loop by reverse cutoff.

[0027] Optionally, in the analog input circuit of this embodiment of the invention, the upper limit of the current range is set to be greater than the operating current of the current limiting unit 1 and less than the maximum withstand current of the voltage regulation protection unit 3.

[0028] Optionally, in the analog input circuit of this embodiment, the current limiting unit 1 includes a resettable fuse PTC. The rated current limiting current of the resettable fuse PTC is greater than the upper limit of the normal operating current range of the analog input circuit, and the operating current of the resettable fuse PTC is greater than the upper limit of the normal operating current range and less than the maximum withstand current of the voltage regulation protection unit 3.

[0029] Optionally, in the analog input circuit of this embodiment of the invention, the set voltage value is simultaneously less than or equal to the maximum withstand voltage of the sampling unit 2 and the rated clamping voltage of the voltage regulation protection unit 3.

[0030] Optionally, in the analog input circuit of this embodiment of the invention, the voltage regulation protection unit 3 includes a Zener diode D2, the cathode of the Zener diode D2 is connected to the connection node of the current limiting unit 1 and the sampling unit 2, and the anode of the Zener diode D2 is connected to the internal reference ground FGND.

[0031] Optionally, in the analog input circuit of this embodiment of the invention, the reverse protection unit 4 includes a reverse protection diode D3 / D4, the anode of the reverse protection diode D3 / D4 is connected to the internal reference ground FGND, and the cathode of the reverse protection diode D3 / D4 is connected to the signal reference terminal AI1- / AI2- / …..AIn-.

[0032] Optionally, in the analog input circuit of this embodiment of the invention, the sampling unit 2 includes a first sampling resistor R1 and a second sampling resistor R2 connected in series; one end of the first sampling resistor R1 is connected to the current limiting unit 1, and the other end is connected to one end of the second sampling resistor R2, and the other end of the second sampling resistor R2 is connected to the internal reference ground FGND. The common connection point of the first sampling resistor R1 and the second sampling resistor R2 is used as the first voltage acquisition point (the first voltage acquired is V1), and the connection node of the first sampling resistor R1 and the current limiting unit 1 is used as the second voltage acquisition point (the first voltage acquired is V2). The first voltage acquisition point and the second voltage acquisition point are used to output voltage signals V1 / V2 to the analog-to-digital conversion circuit, respectively.

[0033] Optionally, in the analog input circuit of this embodiment of the invention, the sampling unit 2 further includes a filter capacitor C1 connected in parallel with the series combination of the first sampling resistor R1 and the second sampling resistor R2.

[0034] Optionally, in the analog input circuit of this embodiment of the invention, the external power supply terminals S1+ / S2+ / …..Sn+ are connected to the power supply CH_24V through power protection diodes D1 / D5. The anode of the power protection diodes D1 / D5 is connected to the power supply CH_24V, and the cathode of the power protection diodes D1 / D5 is connected to the external power supply terminals S1+ / S2+ / …..Sn+.

[0035] The analog input circuit of this invention, which supports two-wire, three-wire, and four-wire instruments, is described in detail below. Under normal operating conditions, the schematic diagram of a 4 mA-20 mA current input is shown below. Figure 2-4 As shown.

[0036] like Figure 2As shown, the system supports two-wire external instruments. The external power supply terminal S1+ provides power to the instrument, the signal input terminal AI1+ receives the signal current, and the signal reference terminal AI1- can be left floating, serving as both signal ground and power ground. Specifically, the power supply CH_24V supplies power to the two-wire instrument through the power protection diode D1 and the external power supply terminal S1+. The 4 mA-20 mA signal current generated by the instrument flows into the signal input terminal AI1+, passes through the resettable fuse PTC, the first sampling resistor R1, and the second sampling resistor R2, and then flows back to the internal reference ground FGND, forming a complete loop. At this time, since the current is much smaller than the operating current of the resettable fuse PTC, the PTC exhibits extremely low resistance, and its impact on the signal is negligible. Simultaneously, the voltage across the first sampling resistor R1 and the second sampling resistor R2 is much lower than the breakdown voltage of the Zener diode D2, which is in the off state and does not affect signal acquisition. The processor CPU acquires the first voltage V1 and the second voltage V2 through an analog-to-digital converter (ADC) and calculates the input current value.

[0037] like Figure 3 As shown, a three-wire external instrument is supported. The external power supply terminal S1+ provides power to the instrument, the signal input terminal AI1+ receives the signal current, and the signal reference terminal AI1- is shared as both signal ground and power ground. Specifically, the three-wire instrument is powered through the power protection diode D1 and the external power supply terminal S1+. The 4 mA-20 mA signal current generated by the instrument flows into the signal input terminal AI1+, passes through the resettable fuse PTC, the first sampling resistor R1, and the second sampling resistor R2, and then flows back to the internal reference ground FGND and the reverse connection protection diode D3 before returning to the signal reference terminal AI1-, forming a complete loop. At this time, since the current is much smaller than the operating current of the resettable fuse PTC, the PTC exhibits extremely low resistance, and its impact on the signal is negligible. Simultaneously, the voltage across the first sampling resistor R1 and the second sampling resistor R2 is much lower than the breakdown voltage of the Zener diode D2, which is in the off state and does not affect signal acquisition. The processor CPU acquires the first voltage V1 and the second voltage V2 through the analog-to-digital converter (ADC) and calculates the input current value.

[0038] like Figure 4As shown, the instrument supports a four-wire external system. Powered by an independent external power supply, it receives a 4 mA-20 mA current loop signal using only the signal input terminal AI1+ and the signal reference terminal AI1-. The input protection (resetting fuse PTC and Zener diode D2) at the signal input terminal AI1+ remains active, preventing accidental high voltage connections from externally to AI1+. The external power supply terminal S1+ can be left floating. Specifically, the 4 mA-20 mA signal current generated by the instrument flows into the signal input terminal AI1+, passes through the reset fuse PTC, the first sampling resistor R1, and the second sampling resistor R2, then flows back to the internal reference ground FGND, and finally back to the signal reference terminal AI1- via the reverse connection protection diode D3, forming a complete circuit. At this time, since the current is much smaller than the operating current of the resettable fuse PTC, the resettable fuse PTC exhibits extremely low resistance, and its impact on the signal is negligible. At the same time, the voltages on the first sampling resistor R1 and the second sampling resistor R2 are much lower than the breakdown voltage of the Zener diode D2, and the Zener diode D2 is in the off state, which does not affect signal acquisition. The processor CPU acquires the first voltage V1 and the second voltage V2 through the analog-to-digital converter (ADC) and calculates the input current value.

[0039] The following is a detailed description of two situations where the analog input circuit of the present invention has incorrectly connected terminals.

[0040] like Figure 5 As shown, when a short circuit occurs between the external power supply terminal S1+ and the signal input terminal AI1+ (4 mA-20 mA input current), current will flow from the external power supply terminal S1+ into the signal input terminal AI1+, then through the resettable fuse PTC, and then part of the current will flow to the Zener diode D2, while part of the current will flow to the first sampling resistor R1 and the second sampling resistor R2. To ensure that the components in the circuit are not damaged, appropriate parameters for the resettable fuse PTC, the Zener diode D2, and the first and second sampling resistors R1 and R2 must be selected to properly distribute the current.

[0041] In industrial automation systems, the analog input current range is typically 0 mA-22 mA, powered by a 24V power supply. Therefore, the rated current limiting current Ih of the resettable PTC fuse should be 50 mA, the operating current It should be 150 mA, and the withstand voltage should be 30 V. A suitable model is the TE brand microSMD005F, but a more appropriate brand and model can be chosen based on specific requirements. The Zener diode D2 should have a rated clamping voltage VZ of 8 V. Due to the impedance requirements of HART communication, the sampling resistor generally needs to be less than 300Ω. Therefore, both the first sampling resistor R1 and the second sampling resistor R2 can be 130Ω, resulting in a total sampling impedance of 260Ω.

[0042] Using the selected resettable PTC fuse, Zener diode D2, and first and second sampling resistors R1 and R2, the current IR flowing through the sampling resistor is: VZ / (R1+R2)=8 V / (130 Ω+130 Ω)≈30.76 mA; while the current IZ flowing through the diode D2 is: Ih-VZ / (R1+R2)=50 mA-30.76 mA=19.24 mA.

[0043] This allows for power constraints on the selected Zener diode D2, the first sampling resistor R1, and the second sampling resistor R2. The power PR consumed by the sampling resistors is: PR = R1 × IR 2 =130 Ω × 30.76 mA × 30.76 mA ≈ 0.123 W. The power PD consumed by the Zener diode D2 is: PD = VZ × IZ = 8 V × 19.24 mA ≈ 0.154 W. Therefore, the required sampling resistor power can be greater than or equal to 0.25 W, and the Zener diode power can be greater than or equal to 1 W to meet the reliability requirements.

[0044] Because the input protection (PTC resettable fuse and D2 Zener diode) and grounding protection (reverse polarity protection diode) of each channel are physically independent parallel branches, they only share power and ground and have no shared control signals. Therefore, if the resettable fuse of any channel enters a high-impedance state due to overcurrent, or the Zener diode is broken down, it will only affect the electrical characteristics of that channel and will not couple to other channels through electrical signals, thus achieving complete electrical isolation and fault isolation. This is something that the scheme in existing literature CN117193221A cannot achieve at all.

[0045] like Figure 6 As shown, when a short circuit occurs between the external power supply terminal S1+ and the signal reference terminal AI1-, current flows from the external power supply terminal S1+ to the signal reference terminal AI1-. Since a reverse-biased diode D3 / D4 is connected in series between the internal reference ground FGND and the signal reference terminal AI1-, and this diode has the characteristics of forward conduction and reverse cutoff, in this situation, the reverse-biased diode D3 / D4 is in a reverse bias state, preventing current from flowing through. This prevents a circuit from being formed between the external power supply terminal S1+ and the internal reference ground FGND, thus achieving short-circuit protection for the external power supply terminal.

[0046] For a short circuit between the signal input terminal AI1+ and the signal reference terminal AI1-, the channel circuit is safe because no current flows into the channel.

[0047] The analog input circuit design of this invention breaks away from the conventional approach of solving current limiting problems through complex active control circuits (such as MOSFET switching arrays). Instead, it combines a resettable PTC fuse (a passive device for overcurrent protection) with a Zener diode (a passive device for voltage regulation) in a specific way. Utilizing their inherent physical characteristics, they work together to achieve "adaptive" current limiting and overvoltage protection without any external control signals. This represents a shift in design philosophy from "active control protection" to "passive adaptive protection." The analog input circuit of this invention is not simply a matter of stacking resettable PTC fuses and Zener diodes together; rather, they create a synergistic effect where 1+1+1>3, demonstrating a collaborative protection effect between the devices. Synergistic effect 1: Synergistic protection of "current limiting" and "clamping." Using a resettable PTC fuse alone can only limit current but cannot precisely clamp the voltage; using a Zener diode alone will cause it to burn out due to excessive power consumption when faced with high current. In this embodiment of the invention, the two are combined. When a short circuit occurs, the self-resetting fuse PTC first activates to limit the total current, so that the current flowing through the Zener diode is controlled within a safe range. The Zener diode can therefore reliably clamp the voltage across the sampling resistor to the set voltage value, thereby protecting the subsequent sampling resistor and conditioning circuit. This synergistic protection of "current limiting" and "clamping" is not revealed in the prior art. Synergistic effect 2: The ingenious use of the reverse polarity protection diode. This embodiment of the invention cleverly solves the thorny problem of "short circuit between external power supply terminal S1+ and signal reference terminal AI1-" simply by adding a reverse polarity protection diode D3 / D4 between the internal reference ground FGND and the signal reference terminal AI1-. When a short circuit occurs, the reverse polarity protection diode is reverse-biased and cuts off the short circuit loop in a near-zero-cost manner, protecting the 24V power supply. This is an unconventional, extremely simple and efficient circuit protection approach, producing a technical effect that can only be achieved by existing complex solutions, and has an "unexpected" nature.

[0048] In summary, the analog input circuit of this invention, through inter-channel electrical decoupling design, has channel current limiting and channel isolation functions, can resist arbitrary short circuits in the field, and the faulty channel does not affect the other channels; the problem of external power supply current limiting can be solved by using only anti-reverse connection diodes; the protection function is achieved with a very simple hardware design, with a very low number of components and cost, significantly saving PCB area and requiring no additional power supply.

[0049] Example 2: See Figure 1 As shown, this embodiment of the invention provides a data acquisition module with an analog input circuit, including the analog input circuit as described in Embodiment 1, an analog-to-digital converter circuit connected to the sampling unit of the analog input circuit, and a processor connected to the analog-to-digital converter circuit.

[0050] Optionally, the acquisition module with analog input circuit in this embodiment of the invention further includes a sampling unit and a signal conditioning circuit that are respectively connected to the analog input circuit and the analog-to-digital conversion circuit.

[0051] The signal conditioning circuit includes a differential amplifier circuit, a follower circuit, and an RC filter circuit. It amplifies the voltage V1 across the first sampling resistor R1 by a factor of 1. The total voltage V2 across the first sampling resistors R1 and R2 is designed to follow the signal, resulting in V2 = 2 × V1. The amplified signal then passes through the RC filter circuit and is sent to a multiplexer. The CPU acquires and reads the data via an analog-to-digital converter (ADC). By comparing the relationship between the voltages V1 and V2, faults in the sampling resistors can be diagnosed. For example, with the same input current passing through the first sampling resistors R1 and R2, under normal conditions, V2 ≈ 2 × V1. Under abnormal resistance conditions, assuming the resistance of the second sampling resistor R2 drifts and increases while the resistance of the first sampling resistor R1 remains normal, V2 > 2 × V1. Therefore, by comparing the relationship between V1 and V2, faults such as sampling resistor drift, open circuit, and short circuit can be diagnosed, thus improving the channel's self-diagnostic capability. If only one voltage value is acquired, the change in the acquired voltage value cannot be determined whether it is due to a change in the input current or a change in the sampling resistor; therefore, the fault cannot be diagnosed.

[0052] After passing through the signal conditioning circuit, the signal is connected to the analog-to-digital converter (ADC), which converts the analog signal into a digital signal. The CPU then reads the ADC result via SPI communication.

[0053] Please note that the technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments have been described. However, as long as the combination of these technical features does not contradict each other, it should be considered within the scope of this specification. The above embodiments only illustrate several implementation methods of this application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be pointed out that for those skilled in the art, several modifications and improvements can be made without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

[0054] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

[0055] While specific embodiments of the invention have been described in detail by way of examples, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of the invention. Those skilled in the art should understand that modifications can be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. An analog input circuit, comprising: The system includes an external power supply terminal, a signal input terminal, a signal reference terminal, and an internal reference ground. The external power supply terminal is connected to a power supply. The system is characterized by further including an input sampling branch, a voltage regulation protection unit, and a reverse protection unit. One end of the input sampling branch is connected to the signal input terminal, and the other end is connected to the internal reference ground; the input sampling branch includes a current limiting unit and a sampling unit connected in series, one end of the current limiting unit is connected to the signal input terminal, and the other end is connected to the input terminal of the sampling unit; the output terminal of the sampling unit is connected to the internal reference ground; The voltage regulation and protection unit is connected in parallel across the two ends of the sampling unit; One end of the anti-reverse protection unit is connected to the signal reference terminal, and the other end is connected to the internal reference ground; When the external power supply terminal is short-circuited with the signal input terminal, the current limiting unit can control the current flowing through the voltage regulation protection unit within a set current range, and the voltage regulation protection unit can clamp the voltage across the sampling unit at a set voltage value; when the external power supply terminal is short-circuited with the signal reference terminal, the reverse protection unit cuts off the short-circuit loop by reverse cutoff.

2. The analog input circuit according to claim 1, characterized in that, The upper limit of the set current range is greater than the operating current of the current limiting unit and less than the maximum withstand current of the voltage regulation protection unit.

3. The analog input circuit according to claim 2, characterized in that, The current limiting unit includes a self-resetting fuse. The rated current limiting current of the self-resetting fuse is greater than the upper limit of the normal operating current range of the analog input circuit, and the operating current of the self-resetting fuse is greater than the upper limit of the normal operating current range and less than the maximum withstand current of the voltage regulation protection unit.

4. The analog input circuit according to claim 1, characterized in that, The set voltage value is simultaneously less than or equal to the maximum withstand voltage of the sampling unit and the rated clamping voltage of the voltage regulation protection unit.

5. The analog input circuit according to claim 4, characterized in that, The voltage regulation and protection unit includes a Zener diode, the cathode of which is connected to the connection node between the current limiting unit and the sampling unit, and the anode of which is connected to the internal reference ground.

6. The analog input circuit according to claim 1, characterized in that, The reverse connection protection unit includes a reverse connection protection diode, the anode of which is connected to the internal reference ground, and the cathode of which is connected to the signal reference terminal.

7. The analog input circuit according to claim 1, characterized in that, The sampling unit includes a first sampling resistor and a second sampling resistor connected in series; one end of the first sampling resistor is connected to the current limiting unit, and the other end is connected to one end of the second sampling resistor, and the other end of the second sampling resistor is connected to the internal reference ground; The common connection point of the first sampling resistor and the second sampling resistor serves as the first voltage acquisition point, and the connection node between the first sampling resistor and the current limiting unit serves as the second voltage acquisition point. The first voltage acquisition point and the second voltage acquisition point are respectively used to output voltage signals to the analog-to-digital conversion circuit.

8. The analog input circuit according to claim 7, characterized in that, The sampling unit also includes a filter capacitor connected in parallel with the series combination of the first sampling resistor and the second sampling resistor.

9. The analog input circuit according to claim 1, characterized in that, The external power supply terminal is connected to the power supply through a power protection diode. The anode of the power protection diode is connected to the power supply, and the cathode of the power protection diode is connected to the external power supply terminal.

10. A data acquisition module with analog input circuitry, characterized in that, It includes an analog input circuit as described in any one of claims 1-9, an analog-to-digital converter circuit connected to a sampling unit of the analog input circuit, and a processor connected to the analog-to-digital converter circuit.

Images