Low-coherence interference microstructure rapid measurement method based on FPGA

Abstract

The invention discloses a low-coherence interference microstructure rapid measurement method based on an FPGA, and the method comprises the steps: enabling the FPGA to respectively receive image data and single-point light intensity data collected by a CMOS sensor and a photoelectric detector, and transmitting the two types of data to an FPGA chip internal memory; a parallel pipeline architecture of the FPGA is designed, so that interference pattern contrast can be calculated in real time and displacement point-by-point calculation can be completed while a series of image data and photoelectric detector interference analog signals are received, and the processing efficiency is remarkably improved; and calculating the position of an interference envelope peak value by adopting a gravity center method, completing three-dimensional shape detection of the microstructure, and realizing three-dimensional shape reconstruction. According to the method, the processing speed of low-coherence interference measurement can be effectively increased, the microstructure morphology can be restored at a high speed, and online detection application of low-coherence interference in the fields of semiconductor packaging, lithium battery manufacturing, ultra-precision machining and the like is facilitated.

Description

Technical Field

[0001] This invention relates to the field of FPGA hardware algorithm acceleration, specifically a method for rapid measurement of low-coherence interference microstructures based on FPGA. Background Technology

[0002] Microstructures have wide applications in terms of unique physical properties and precise photonic and electronic manipulation. With the increasing demand for the fabrication and testing of microstructured devices, high-speed detection of the complex surface morphology of these devices has become a significant challenge. Low-coherence interferometry (LCI) is a non-destructive measurement method for detecting the morphology of microstructures, offering advantages such as non-contact operation and high precision.

[0003] In the field of precision measurement, the accuracy of low-coherence interference microstructure detection is highly dependent on the performance of the core driving components. Among them, piezoelectric ceramic actuators are widely used in axial scanning positioning due to their nanometer-level movement accuracy and fast response characteristics. However, piezoelectric ceramic actuators limit the improvement of scanning speed, and the scanning stroke is limited, making it impossible to measure large-sized samples. Existing research on microstructure morphology detection algorithms is mostly focused on general-purpose computing platforms, such as PCs and workstations, which have disadvantages such as high power consumption and large device size. Algorithms on these devices often struggle to achieve both high accuracy and high speed.

[0004] To address the slow measurement speed of existing low-coherence interferometry microstructures, YiLiang Huang, in his paper "Fasttemplate matching method in white-light scanning interferometry for 3D micro-profile measurement," employed a low-coherence interferometry method based on fast template matching, improving algorithm speed. However, this method still uses piezoelectric ceramics for sampling, which cannot meet the measurement requirements of large-size samples. This invention uses a high-speed motor as the drive, combined with precise displacement data obtained from laser interferometry, which improves scanning speed and enables accurate positioning of image data. Furthermore, it replaces the general-purpose computing platform with an FPGA, utilizing its parallel processing and pipeline technology to enhance the algorithm's processing speed. Summary of the Invention

[0005] To overcome the shortcomings of the prior art, this invention provides a rapid measurement method for low-coherence interference microstructures based on FPGA. It uses a high-speed motor as the drive, optimizes the working efficiency of the entire system by using the principle of parallel operation of FPGA and the pipeline mode, realizes real-time processing of low-coherence interference data, and completes the reconstruction of the three-dimensional morphology of microstructures.

[0006] This invention is achieved using the following technical solution: a rapid measurement method for low-coherence interferometric microstructures based on FPGA, comprising the following steps:

[0007] S1, a low-coherence interferometer is used to detect and acquire the three-dimensional morphology of the microstructure. The FPGA receives the three-dimensional morphology data of the microstructure acquired by the low-coherence interferometer. The three-dimensional morphology data of the microstructure includes image data acquired by CMOS and single-point light intensity data received by photodetector. The above image data and single-point light intensity data are stored in the on-chip memory of the FPGA and transferred to S2.

[0008] S2: Perform mean filtering on the image data to obtain a mean-filtered interferogram. Simultaneously, calculate the displacement data from the single-point light intensity data and proceed to S3.

[0009] S3. Perform linear interpolation on the mean-filtered interferogram and displacement data respectively to obtain the linear interpolated interferogram and displacement values. Then combine the linear interpolated interferogram with the mean-filtered interferogram and combine the displacement values ​​with the displacement data to obtain the corresponding interferogram sequence and displacement sequence, and then proceed to S4.

[0010] S4. Utilize the parallel pipeline characteristics of the FPGA to perform contrast calculation on the interferogram sequence, obtain the contrast data of each interferogram, and then proceed to S5.

[0011] S5 performs adaptive threshold processing on the contrast data, which can suppress noise and extract effective interference envelope signals to obtain denoised contrast data, and then proceeds to S6.

[0012] S6. Based on the denoised contrast data and displacement sequence, the centroid method is used to calculate the peak position of the interference envelope, thus completing the three-dimensional morphology detection of the microstructure.

[0013] Compared with existing technologies, the significant advantages of this invention are as follows: This invention proposes a fast measurement method for low-coherence interferometric microstructures based on FPGA, accelerating the computation in hardware on the FPGA. Implementing multiple independent pipelined operations on the FPGA fully utilizes its parallelism, thereby improving the algorithm's computation speed. The pipelined structure of the FPGA allows each stage of the low-coherence interferometric signal processing algorithm to run continuously, decomposing the algorithm processing into multiple stages, each processed simultaneously, reducing overall latency. Attached Figure Description

[0014] Figure 1 This is a flowchart of a rapid measurement method for low-coherence interference microstructures based on FPGA according to the present invention. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] Combination Figure 1 A rapid measurement method for low-coherence interferometric microstructures based on FPGA, comprising the following steps:

[0017] S1. A low-coherence interferometer is used to detect and acquire the three-dimensional morphology of the microstructure. The FPGA receives the three-dimensional morphology data of the microstructure acquired by the low-coherence interferometer. The three-dimensional morphology data of the microstructure includes image data acquired by CMOS and single-point light intensity data received by photodetector. The above image data and single-point light intensity data are stored in the on-chip memory of the FPGA.

[0018] The CMOS and photodetector in the low-coherence interferometer are located in the same optical path controlled by the same motor for synchronous movement; the image data acquired by the CMOS is transmitted to the FPGA via LVDS, the FPGA parses the received image data and rearranges the parsed data to obtain complete image data; the single-point interference light intensity data received by the photodetector is stored in the FPGA after analog-to-digital conversion.

[0019] The innovation of this invention lies in the use of a motor-controlled low-coherence interferometer for continuous vertical scanning, which can improve the measurement speed and shorten the measurement time for large-sized samples.

[0020] Switch to S2.

[0021] S2 performs mean filtering on the image data to obtain a mean-filtered interferogram, and simultaneously calculates the displacement data from the single-point light intensity data.

[0022] The mean filtering process uses a 3*3 sliding window, replacing the gray value of the center pixel with the mean gray value of the neighboring pixels. For pixels on the boundary of the image data, the gray value of the edge pixels is copied for processing, and finally the mean filtering interferogram is obtained. The single-point light intensity data is calculated point by point in parallel using FPGA, and the displacement data is obtained through difference, extreme value detection and arctangent operation.

[0023] Switch to S3.

[0024] S3. Perform linear interpolation on the mean-filtered interferogram and displacement data respectively to obtain the linear interpolated interferogram and displacement values. Then, combine the linear interpolated interferogram with the mean-filtered interferogram, and combine the displacement values ​​with the displacement data to obtain the corresponding interferogram sequence and displacement sequence.

[0025] The linear interpolation is performed once between two adjacent mean-filtered interferograms and once between two adjacent displacement data. The linearly interpolated interferograms are then combined with the mean-filtered interferograms, and the displacement values ​​are combined with the displacement data to obtain the interferogram sequence and the displacement sequence, respectively.

[0026] Switch to S4.

[0027] S4 utilizes the parallel pipeline characteristics of the FPGA to perform contrast calculations on the interferogram sequence, obtaining the contrast data for each interferogram.

[0028] The contrast calculation employs a pipelined frame buffer mechanism to achieve synchronous processing of acquisition and calculation. Each stage is sequentially connected, and different stages can process different data simultaneously, forming a multi-stage pipeline structure. During sequential vertical scanning, a circular buffer with a capacity of 7 frames is constructed using the FPGA's on-chip memory to store the interferogram sequence. When the 7th frame of the interferogram sequence is obtained, the contrast data of the 4th frame is immediately calculated in parallel based on the interferogram sequence composed of the 1st to 7th frames in the current buffer. Subsequently, the interferogram sequence stored in the circular buffer is updated every time the interferogram sequence is increased by 1 frame. Based on the continuous 7 frames of the interferogram sequence, including the current frame, the contrast data of the intermediate frames is calculated synchronously. This process continues as the scan progresses, ultimately obtaining the contrast data of each interferogram.

[0029] The innovation of this invention lies in the use of FPGA to perform contrast calculation on the interferogram sequence. Since the contrast calculation only requires 7 adjacent frames of the interferogram sequence, it is only necessary to build a circular buffer with a capacity of 7 frames in the on-chip memory of the FPGA. It is not necessary to store all the interferogram sequences, which reduces the use of the on-chip memory of the FPGA and saves resources.

[0030] Switch to S5.

[0031] S5 performs adaptive thresholding on the contrast data, which can suppress noise, extract effective interference envelope signals, and obtain denoised contrast data.

[0032] The adaptive thresholding process constructs a 3*3 sliding window on each frame of contrast data, averages the contrast of all pixels within the sliding window, and uses the average contrast value as the contrast threshold of the pixel at the center of the sliding window, so that each pixel has a different threshold. For pixels on the boundary of the contrast data, the method of copying the contrast threshold of edge pixels is used for processing, and finally the denoised contrast data is obtained.

[0033] The innovation of this invention lies in using an adaptive threshold to process contrast data, which can better eliminate noise outside the interference envelope and improve measurement accuracy compared to a global threshold.

[0034] Switch to S6.

[0035] S6. Based on the denoised contrast data and displacement sequence, the centroid method is used to calculate the peak position of the interference envelope, thus completing the three-dimensional morphology detection of the microstructure.

[0036] The centroid method utilizes denoised contrast data combined with displacement sequences for calculation. In the FPGA, parallel processing is performed in units of m pixels, calculating the cumulative sum of the numerator and denominator for each of the m pixels in real time, and continuously updating the input as the dynamic scanning process progresses. The input for the cumulative sum of the numerator is the denoised contrast data and displacement sequence, which are multiplied to obtain the cumulative term. The input for the cumulative sum of the denominator is the denoised contrast data.

[0037] Once the sequential vertical scan is complete, each pixel is divided by the sum of the numerator and the sum of the denominator to obtain the peak position of the interference envelope of all pixels, thus completing the three-dimensional morphology detection of the microstructure.

[0038] The formula for calculating the centroid method is as follows:

[0039] ,

[0040] in The denoised contrast data for the pixel in the nth frame, xth row, and yth column. This is the displacement sequence of the nth frame. Let be the peak position of the interference envelope of the pixel in row x and column y, and N represent the total number of displacement sequence frames.

[0041] The innovation of this invention lies in the use of FPGA to implement the centroid method, which can process multiple pixels in parallel and make full use of the calculated high-precision displacement sequence, thereby enhancing the anti-interference ability and making it more suitable for calculations in non-uniform sampling situations.

[0042] Example 1:

[0043] This invention employs a low-coherence interferometer to detect the three-dimensional morphology of microstructures. An FPGA receives the three-dimensional morphology data of the microstructure acquired by the low-coherence interferometer. This data includes image data acquired by a CMOS image sensor and single-point light intensity data received by four photodetectors. The CMOS image sensor has a resolution of 1000 (H) * 1000 (V), a pixel size of 4.5 μm * 4.5 μm, and a data output bit width of 8 bits. The photosensitive surface size of the photodetectors is 1.2 mm. The core chip of the FPGA main control board is a Xilinx Kintex UltraScale KU060, providing 726K system logic units, 38 Mb of Block RAM resources, and 2760 DSP processing units.

[0044] (1) During the vertical scanning process, the low-coherence interferometer uses a CMOS sensor to acquire 1000*1000 resolution image data at a frame rate of 1000 fps, acquiring a total of 300 images, the sequence of which is denoted as […]. Simultaneously, the photodetector synchronously collects single-point light intensity data. .

[0045] (2) The mean-filtered interferogram is obtained by performing 3*3 neighborhood mean filtering on the image data acquired by CMOS. For pixels on the image boundary, the grayscale values ​​of the edge pixels are copied for processing. Displacement data is obtained by performing difference operations, extreme value detection, and arctangent calculation on the single-point light intensity data. The resolution is 10 nm.

[0046] (3) Perform a linear interpolation between two adjacent mean-filtered interferograms and between two adjacent displacement data points, and then combine the linearly interpolated interferograms. Interference plot with mean filter Combined, displacement values With displacement data By combining them, interferogram sequences can be obtained separately. and displacement sequence .

[0047] Linear interpolation interferogram and corresponding displacement values The calculation formula is:

[0048] ,

[0049] The combined interferogram sequence and displacement sequence are as follows:

[0050] ,

[0051] ,

[0052] (4) Calculate contrast data based on the interferogram sequence obtained after linear interpolation. .

[0053] The formula for calculating contrast is:

[0054] ,

[0055] for Contrast that cannot be calculated using the contrast calculation formula All values ​​are directly assigned zero. The contrast calculation module includes a multi-pixel weighted difference module, a sum of squares calculation module, and a square root calculation module. The square root calculation module uses the CORDIC algorithm for calculation. The CORDIC algorithm is a fast method for calculating trigonometric functions in binary mode, and it can also achieve square root calculation through appropriate transformations. The basic principle of the CORDIC algorithm is to divide the rotation angle into multiple consecutive small deflection angles, and complete the rotation process by successively swaying to approach the target rotation angle. Ultimately, it can be decomposed into a series of addition, subtraction, and shift operations, making it very suitable for hardware implementation.

[0056] (5) Calculate the contrast data Adaptive thresholding is performed to obtain the denoised contrast data. ;

[0057] threshold The calculation formula is:

[0058] ,

[0059] in This represents the pixel contrast data at the (x+a)th row and (y+b)th column of the nth frame. This represents the pixel threshold for the nth frame, xth row, and yth column.

[0060] When the contrast value of a pixel is less than the threshold, the contrast value is set to zero; when the contrast value of a pixel is greater than or equal to the threshold, the contrast value remains unchanged. Contrast data after noise reduction All are directly assigned zero.

[0061] (6) Combine the contrast data after noise reduction With displacement sequence The position of the peak value of the interference envelope was calculated using the centroid method. In the FPGA, parallel processing is performed in units of 10 pixels to ultimately obtain the height data of 1000*1000 pixels.

[0062] The formula for calculating the center of gravity using the centroid method is:

[0063] ,

[0064] in The denoised contrast data for the pixel in the nth frame, xth row, and yth column. This is the displacement sequence of the nth frame. The peak position of the interference envelope of the pixel in row x and column y.

[0065] In summary, this application proposes a fast measurement method for low-coherence interferometric microstructures based on FPGA. The computation is accelerated in hardware on the FPGA, and the obtained height data of the object under test is then uploaded to a host computer. Implementing multiple independent pipelined operations on the FPGA fully utilizes its parallelism, thereby improving the algorithm's computation speed. The FPGA's pipelined structure allows each stage of the low-coherence interferometric signal processing algorithm to run continuously, decomposing the algorithm into multiple stages, each processed simultaneously, reducing overall latency.

[0066] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to the above embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0067] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A rapid measurement method for low-coherence interferometric microstructures based on FPGA, characterized in that, Includes the following steps: S1, a low-coherence interferometer is used to detect and acquire the three-dimensional morphology of the microstructure. The FPGA receives the three-dimensional morphology data of the microstructure acquired by the low-coherence interferometer. The three-dimensional morphology data of the microstructure includes image data acquired by CMOS and single-point light intensity data received by photodetector. The above image data and single-point light intensity data are stored in the on-chip memory of the FPGA and transferred to S2. S2, perform mean filtering on the image data to obtain a mean-filtered interferogram, and simultaneously calculate the single-point light intensity data to obtain displacement data, then proceed to S3; S3, perform linear interpolation on the mean-filtered interferogram and displacement data respectively to obtain the linear interpolated interferogram and displacement values. Then, combine the linear interpolated interferogram with the mean-filtered interferogram and combine the displacement values ​​with the displacement data to obtain the corresponding interferogram sequence and displacement sequence, and then proceed to S4; S4. Utilize the parallel pipeline characteristics of the FPGA to perform contrast calculation on the interferogram sequence, obtain the contrast data of each interferogram, and then proceed to S5. S5, perform adaptive threshold processing on the contrast data to suppress noise and extract effective interference envelope signals to obtain denoised contrast data, then proceed to S6; S6, based on the denoised contrast data and displacement sequence, uses the centroid method to calculate the peak position of the interference envelope, thus completing the three-dimensional morphology detection of the microstructure.

2. The rapid measurement method for low-coherence interferometric microstructures based on FPGA according to claim 1, characterized in that: In the low-coherence interferometer, the optical paths of the CMOS and photodetector are controlled by the same motor for synchronous movement; the image data acquired by the CMOS is transmitted to the FPGA via LVDS, the FPGA parses the received image data and rearranges the parsed data to obtain complete image data; the single-point interference light intensity data received by the photodetector is stored in the FPGA after analog-to-digital conversion.

3. The method for rapid measurement of low-coherence interferometric microstructures based on FPGA according to claim 2, characterized in that: In S2, the mean filtering process uses a 3*3 sliding window. The gray value of the center pixel is replaced by the mean gray value of the neighboring pixels. For pixels on the boundary of the image data, the gray value of the edge pixels is copied. Finally, the mean filtering interferogram is obtained. The single-point light intensity data is calculated point by point in parallel using FPGA. The displacement data is obtained through difference, extreme value detection and arctangent operation.

4. The rapid measurement method for low-coherence interferometric microstructures based on FPGA according to claim 3, characterized in that: In S3, linear interpolation is performed between two adjacent mean-filtered interferograms and between two adjacent displacement data. The linearly interpolated interferograms are then combined with the mean-filtered interferograms, and the displacement values ​​are combined with the displacement data to obtain the interferogram sequence and the displacement sequence, respectively.

5. The rapid measurement method for low-coherence interferometric microstructures based on FPGA according to claim 4, characterized in that: In S4, contrast calculation employs a pipelined frame buffer mechanism to achieve synchronous processing of acquisition and calculation. Each stage is sequentially connected, and different stages can process different data simultaneously, forming a multi-stage pipeline structure. During sequential vertical scanning, a circular buffer with a capacity of 7 frames is constructed using the FPGA's on-chip memory to store the interferogram sequence. When the 7th frame of the interferogram sequence is obtained, the contrast data of the 4th frame is immediately calculated in parallel based on the interferogram sequence composed of the 1st to 7th frames in the current buffer. Subsequently, the interferogram sequence stored in the circular buffer is updated every time the interferogram sequence is increased by 1 frame. Based on the continuous 7 frames of the interferogram sequence, including the current frame, the contrast data of the intermediate frames is calculated synchronously. This process continues as the scan continues, eventually yielding contrast data for each interferogram.

6. The method for rapid measurement of low-coherence interferometric microstructures based on FPGA according to claim 5, characterized in that: In S5, the adaptive thresholding process constructs a 3*3 sliding window on each frame of contrast data, averages the contrast of all pixels within the sliding window, and uses the average contrast value as the contrast threshold of the pixel at the center of the sliding window, so that each pixel has a different threshold. For pixels on the boundary of the contrast data, the method of copying the contrast threshold of edge pixels is used for processing, and finally the denoised contrast data is obtained.

7. The method for rapid measurement of low-coherence interferometric microstructures based on FPGA according to claim 6, characterized in that: In S6, the centroid method uses denoised contrast data combined with displacement sequence for calculation; in FPGA, parallel processing is performed in units of m pixels, calculating the cumulative sum of numerator and denominator terms for the m pixels in real time, and continuously updating the input as the dynamic scanning process progresses; the input for the cumulative sum of numerator terms is the denoised contrast data and displacement sequence, which are multiplied to obtain the cumulative term; the input for the cumulative sum of denominator terms is the denoised contrast data. Once the sequential vertical scan is complete, each pixel is divided by the sum of the numerator and the sum of the denominator to obtain the peak position of the interference envelope of all pixels, thus completing the three-dimensional morphology detection of the microstructure.

8. The method for rapid measurement of low-coherence interferometric microstructures based on FPGA according to claim 7, characterized in that, The formula for calculating the center of gravity using the centroid method is: ， in The denoised contrast data for the pixel in the nth frame, xth row, and yth column. This is the displacement sequence of the nth frame. Let be the peak position of the interference envelope of the pixel in row x and column y, and N represent the total number of displacement sequence frames.

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