Test handler and method for testing semiconductor package using test handler

Abstract

The present disclosure relates to a test handler and a method for testing a semiconductor package using the test handler. The test handler and the method for testing a semiconductor package using the test handler are capable of performing an electrical inspection process on a semiconductor package. The present disclosure may include a loader unit to detach a semiconductor package to be tested from a first annular frame on which the semiconductor package to be tested is placed, or to attach a tested semiconductor package to a second annular frame; a tester unit to test the semiconductor package loaded from the loader unit and to unload the tested semiconductor package back to the loader unit; and a shuttle unit mounted to connect the loader unit and the tester unit, for transferring the semiconductor package to the tester unit or to the loader unit, and for preheating or cooling the semiconductor package during the transfer.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of Korean Patent Application No. 10-2024-0109442, filed on August 14, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates to a test processor and a test method for semiconductor packaging, and more specifically, to a test processor and a test method for semiconductor packaging capable of performing electrical inspection processes on semiconductor packages. Background Technology

[0004] Generally, semiconductor devices can be formed on a silicon wafer, which serves as a semiconductor substrate, by repeatedly performing a series of manufacturing processes. The semiconductor devices formed as described above can be manufactured into semiconductor packages through dicing, bonding, and packaging processes.

[0005] Through electrical characteristic inspection, the manufactured semiconductor packages, as described above, can be classified as good or defective products. In electrical characteristic inspection, test processors used for handling semiconductor devices and test equipment used for inspecting semiconductor packages can be used.

[0006] Recently, due to the development of various types of semiconductor devices, the demand for electrical inspection processes for semiconductor devices individualized through dicing is increasing, and consequently, the demand for inspection equipment used to perform such inspections is also increasing. For example, in the case of forming high-bandwidth memory (HBM) devices on a wafer, an electrical inspection process may be required after individualization through dicing. Summary of the Invention

[0007] This disclosure aims to address the aforementioned problems, and its purpose is to provide a test processor capable of performing electrical inspection processes on high-bandwidth memory (HBM) devices and a test method for semiconductor packaging. However, such an objective is illustrative and does not limit the scope of this disclosure.

[0008] According to embodiments of this disclosure, a test processor is provided. The test processor may include: a loader unit for removing a semiconductor package to be tested from a first annular frame on which a semiconductor package to be tested is placed, or for attaching a semiconductor package to be tested to a second annular frame; a tester unit for testing the semiconductor package loaded from the loader unit and for unloading the tested semiconductor package back to the loader unit; and a shuttle unit configured to connect the loader unit and the tester unit for conveying the semiconductor package to the tester unit or to the loader unit, and for preheating or cooling the semiconductor package during conveying.

[0009] According to embodiments of this disclosure, the loader unit may include: a clamping unit for pulling out a first annular frame from a first box on which a plurality of semiconductor packages to be tested are placed, or for storing a second annular frame on which a tested semiconductor package is placed into a second box; an annular frame expander for holding the first annular frame pulled out from the first box and for expanding the dicing tape to which the semiconductor package is attached to increase the spacing between the semiconductor packages; an annular frame stage on which the second annular frame to which the tested semiconductor package is to be attached is placed; a loading pickup unit for picking up the semiconductor package from the first annular frame placed on the annular frame expander and transferring the semiconductor package to a shuttle unit; and an unloading pickup unit for picking up the semiconductor package tested by the tester unit and transferred back to the loader unit via the shuttle unit and transferring the semiconductor package to the second annular frame placed on the annular frame stage.

[0010] According to embodiments of this disclosure, a loading pickup unit may include: a loading platform formed to extend linearly along one side of an array of annular frame expanders and annular frame stages; and a loading pickup mounted slidably along the loading platform to pick up a semiconductor package placed on a first annular frame on the annular frame expander. An unloading pickup unit may include: an unloading platform formed to extend linearly along opposite sides of the array of annular frame expanders and annular frame stages, such that it is parallel to the loading platform; and an unloading pickup mounted slidably along the unloading platform to pick up a semiconductor package placed on a shuttle unit. The clamping unit may include: a clamping platform formed to extend in a direction perpendicular to the extending direction of the parallel-formed loading platform and unloading platform, and the clamping platform for connecting the loading platform and the unloading platform; and a clamp mounted to be slidable along the clamping platform, the clamp having a clamping portion for clamping one side of a first annular frame or a second annular frame, and the clamp for pulling the first annular frame from a first box to an annular frame extender, or for storing the second annular frame from the annular frame platform into a second box.

[0011] According to embodiments of the present disclosure, the unloading pickup unit may further include: an unloading pickup unit installed below the movement path of the unloading pickup, and the unloading pickup unit is used to perform visual inspection on the exterior of the semiconductor package picked up and transported by the unloading pickup, wherein the unloading pickup is used to correct the picking error of the semiconductor package based on the result of the visual inspection performed by the unloading visual inspection unit.

[0012] According to embodiments of the present disclosure, the shuttle unit may include: a shuttle track unit formed to extend in a direction perpendicular to the extension direction of the parallel-formed loading platform and unloading platform, and extending to the tester unit; and a shuttle table mounted to be slidable along the shuttle track unit, and the shuttle table being used to transfer semiconductor packages between the loader unit and the tester unit.

[0013] According to embodiments of the present disclosure, the shuttle may include: a heater unit installed inside the shuttle to heat a semiconductor package placed on the upper surface of the shuttle; and a cooling unit including: a nozzle installed on one side of the shuttle to spray air toward the semiconductor package placed on the upper surface of the shuttle to cool the semiconductor package.

[0014] According to embodiments of this disclosure, a tester unit may include: a tester module for testing a semiconductor package; an alignment pickup unit for picking up a semiconductor package transferred to the tester unit via a shuttle unit; and a test stage mounted slidably between the alignment pickup unit and the tester module to move the semiconductor package to a position corresponding to the tester module or to a position corresponding to the alignment pickup unit, wherein the alignment pickup unit places the semiconductor package on the test stage for testing, or picks up a tested semiconductor package from the test stage and places the tested semiconductor package on the shuttle unit.

[0015] According to embodiments of the present disclosure, the alignment pickup unit may include: an alignment stage formed to extend linearly in a direction between one end of the shuttle unit and a position corresponding to a sliding movement path of the test stage; an alignment pickup mounted to be slidable along the alignment stage to pick up a semiconductor package conveyed via the shuttle unit and place the semiconductor package on the test stage, or to pick up a tested semiconductor package from the test stage and place the tested semiconductor package on the shuttle unit; and an alignment visual inspection unit mounted above the alignment pickup having a hollow portion to perform a visual inspection of the internal pattern on the upper surface of the semiconductor package picked up by the alignment pickup through the hollow portion, wherein the alignment pickup is used to correct for pickup errors of the semiconductor package based on the result of the visual inspection of the internal pattern made by the alignment visual inspection unit.

[0016] According to embodiments of the present disclosure, the alignment pickup unit can be used to pre-calculate and store deformation data for the test stage based on temperature; and when the semiconductor package is placed on the test stage, the alignment pickup unit can be used to calculate the real-time deformation of the test stage based on the measured real-time temperature and deformation data; and the alignment pickup unit can be used to offset the placement position of the semiconductor package by the real-time deformation, thereby placing the semiconductor package on the test stage.

[0017] According to embodiments of this disclosure, a method for testing a semiconductor package using a test processor includes: a loader unit for removing the semiconductor package to be tested from a first annular frame on which it is placed, or for attaching a tested semiconductor package to a second annular frame; a tester unit for testing the semiconductor package loaded from the loader unit and for unloading the tested semiconductor package back to the loader unit; and a shuttle unit configured to connect the loader unit and the tester unit, for transferring the semiconductor package to the tester unit or to the loader unit, and for preheating or cooling the semiconductor package during transfer. The method includes the steps of: (a) transferring the first annular frame on which the semiconductor package to be tested is placed from a first box to an annular frame expander of the loader unit using a clamping unit of the loader unit; (b) removing the semiconductor package from the first annular frame using a loading pickup unit; and (c) placing the semiconductor package... On the shuttle table of the shuttle unit; (d) pick up the semiconductor package placed on the shuttle table of the tester unit, and place the semiconductor package on the test stage using the alignment pickup unit of the tester unit; (e) move the test stage on which the semiconductor package to be tested is placed to the position corresponding to the tester module; (f) make electrical contact between the tester module and the semiconductor package placed on the test stage, and test the semiconductor package; (g) move the test stage on which the tested semiconductor package is placed to the position corresponding to the alignment pickup unit; (h) pick up the tested semiconductor package from the test stage using the alignment pickup unit, and place the tested semiconductor package on the shuttle table; (i) pick up the tested semiconductor package from the shuttle table of the loader unit, and attach the tested semiconductor package to the second annular frame using the unloading pickup unit; and (j) store the second annular frame on which the tested semiconductor package is placed into the second box using the clamping unit. Attached Figure Description

[0018] The above and other features and advantages of the present invention will become more apparent from the detailed description of embodiments thereof with reference to the accompanying drawings.

[0019] Figure 1 This is a schematic diagram illustrating the configuration of a test processor according to an embodiment of the present disclosure.

[0020] Figure 2 It is a diagram. Figure 1 A schematic diagram of the configuration of the loading pickup unit of the test processor.

[0021] Figure 3 It is a diagram. Figure 1 A schematic diagram of the configuration of the unloading pickup unit of the test processor.

[0022] Figure 4 It is a diagram. Figure 1 A schematic diagram of the configuration of the shuttle unit of the test processor.

[0023] Figure 5 It is a diagram. Figure 1 A schematic diagram of the alignment pickup unit configuration of the test processor.

[0024] Figure 6 This is a schematic diagram illustrating the configuration of a test processor according to another embodiment of the present disclosure.

[0025] Figure 7 This is a flowchart illustrating sequentially a method for inspecting a semiconductor package according to another embodiment of the present disclosure. Detailed Implementation

[0026] Preferred embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0027] The embodiments of this disclosure are provided to fully illustrate the disclosure to those skilled in the art, and the following embodiments can be modified in various ways. The scope of this disclosure is not limited to the following embodiments. Rather, these embodiments are provided to enhance the completeness and understanding of the disclosure and to fully convey the spirit of the disclosure to those skilled in the art. Furthermore, for convenience and clarity of illustration, the thickness and size of each layer shown in the drawings may be exaggerated.

[0028] In the following description, embodiments of the present disclosure are illustrated with reference to the accompanying drawings, which schematically depict preferred embodiments of the present disclosure. For example, in the drawings, variations in the illustrated shapes may be expected depending on manufacturing techniques and / or tolerances. Therefore, embodiments of the present disclosure should not be construed as limited to the specific shapes of the areas shown herein, but should be understood to include shape variations that may occur due to manufacturing processes.

[0029] Figure 1 This is a schematic diagram illustrating the configuration of a test processor 1000 according to an embodiment of the present disclosure. Figure 2 It is a diagram. Figure 1 The diagram shows the configuration of the load pickup unit 140 of the test processor 1000. Figure 3 It is a diagram. Figure 1The diagram shows the configuration of the unloading pickup unit 150 of the test processor 1000. Figure 4 It is a diagram. Figure 1 The diagram shows the configuration of the shuttle unit 300 of the test processor 1000. Figure 5 It is a diagram. Figure 1 The diagram shows the configuration of the alignment pickup unit 220 of the test processor 1000.

[0030] like Figure 1 As shown, the test processor 1000 according to an embodiment of the present disclosure mainly includes a loader unit 100, a tester unit 200, and a shuttle unit 300.

[0031] like Figure 1 As shown, the loader unit 100 can detach the semiconductor package 1 from the first annular frame 10, and the semiconductor package 1 tested by the tester unit 200 is placed on the first annular frame 10, or the tested semiconductor package 1 can be attached to the second annular frame 20 after being tested by the tester unit 200.

[0032] Here, the second annular frame 20 to which the semiconductor package 1, which has been tested at the loader unit 100, is attached can reuse the first annular frame 10 from which the semiconductor package 1 was removed, or a new annular frame can be used. Furthermore, based on the inspection results of the semiconductor package 1 by the tester unit 200, at least two second annular frames 20 can be provided in the loader unit 100 to allow for separation and attachment based on whether the package is good or defective.

[0033] like Figure 1 As shown, the clamping unit 110 of the loader unit 100 can pull out a first annular frame 10 on which a plurality of semiconductor packages 1 to be tested are placed from the first box C1, or store a second annular frame 20 on which the semiconductor packages 1 to be tested are placed into the second box C2.

[0034] For example, the gripper unit 110 may include a gripper platform 111, which is formed to extend in a direction (Y-axis direction) perpendicular to the extending direction (X-axis direction) of the loading platform 141 of the parallel-formed loading pickup unit 140 and the unloading platform 151 of the unloading pickup unit 150, and is arranged to be vertically connected between the loading platform 141 and the unloading platform 151 below them. The gripper unit 110 may include a gripper 112, which is mounted to be slidable along the gripper platform 111, and the gripper 112 is formed with a gripping portion 112a to grip one side of the first annular frame 10 or the second annular frame 20. The clamp 112 can pull the first annular frame 10 from the first box C1 to the annular frame expander 120, or store the second annular frame 20 from the annular frame stage 130 into the second box C2.

[0035] like Figure 1 and Figure 2 As shown, the annular frame expander 120 of the loader unit 100 places the first annular frame 10 pulled out from the first box C1 by the clamping unit 110 and expands the dicing strip T attached to the semiconductor package 1, thereby increasing the spacing between the semiconductor packages 1.

[0036] For example, the annular frame expander 120 may include an expansion ring 121 for supporting the dicing strip T and a clamping unit 122 for lowering the first annular frame 10. More specifically, the expansion ring 121 may support the dicing strip T between the semiconductor package 1 and the edge of the first annular frame 10, and the clamping unit 122 may expand the dicing strip T by lowering the first annular frame 10. As a result of this expansion, the spacing between the semiconductor packages 1 may be increased.

[0037] A die ejector 123 can be disposed below the dicing tape T supported by the extension ring 121 for selectively separating the semiconductor package 1 from the dicing tape T. The die ejector 123 may include a vacuum hole (not shown) for vacuum suction of the underside of the dicing tape T and an ejector component (not shown) for lifting the target semiconductor package 1 to be picked up, thereby separating the target semiconductor package 1 from the dicing tape T.

[0038] In addition, the upper vision unit 143 mounted above the ring frame extender 120 can detect the position of the semiconductor package 1 placed on the cutting strip T of the first ring frame 10 and identify the semiconductor package 1 to be picked up from the first ring frame 10.

[0039] Although not shown, the annular frame expander 120 may also include an expander drive unit (not shown) for moving the annular frame expander 120 in a horizontal direction (X-axis) or a vertical direction (Y-axis). The expander drive unit can adjust the position of the annular frame expander 120 such that the semiconductor package 1 to be picked up is aligned above the die ejector 123.

[0040] like Figure 1 and Figure 2 As shown, the loading pickup unit 140 of the loader unit 100 can pick up the semiconductor package 1 from the first annular frame 10 placed on the annular frame expander 120 and transfer the semiconductor package 1 to the shuttle table 320 of the shuttle unit 300.

[0041] For example, the loading pickup unit 140 may include: a loading platform 141 formed to extend linearly in the horizontal direction (X-axis direction) along one side of the row-arranged annular frame expanders 120 and annular frame stages 130; and a loading pickup 142 mounted to be slidable along the loading platform 141 to pick up the semiconductor package 1 from the first annular frame 10 placed on the annular frame expander 120, and to slide along the loading platform 141 in the horizontal direction (X-axis direction) to place the picked-up semiconductor package 1 on the shuttle stage 320 of the shuttle unit 300.

[0042] like Figure 1 and Figure 3 As shown, the annular frame stage 130 can accommodate the second annular frame 20, and the semiconductor package 1, which has been tested by the tester unit 200 and has been transferred back to the loader unit 100 via the shuttle unit 300, will be attached to the second annular frame 20.

[0043] For example, in order to allow the semiconductor package 1 to be classified as good or defective based on the inspection results from the tester unit 200, and to be reattached accordingly to different second annular frames 20, it is preferable that at least two annular frame stages 130 are arranged in the loader unit 100. In this way, a plurality of annular frame stages 130 can be formed in the loader unit 100 and said plurality of annular frame stages 130 are aligned in a row in the horizontal direction (X-axis direction) together with the annular frame expander 120.

[0044] Although not shown, the annular frame stage 130 may also include a stage drive unit (not shown) for moving the annular frame stage 130 in a horizontal direction (X-axis direction) or a vertical direction (Y-axis direction). The stage drive unit can adjust the position of the annular frame stage 130 such that the tested semiconductor package 1 will be reattached and positioned below the unloading pickup 152 that picks up the semiconductor package 1 from the shuttle unit 300.

[0045] like Figure 1 and Figure 3 As shown, the unloading pickup unit 150 of the loader unit 100 can pick up the semiconductor package 1 that has been tested by the tester unit 200 and transferred back to the loader unit 100 via the shuttle unit 300 from the shuttle table 320, and transfer the semiconductor package 1 to the second annular frame 20 placed on the annular frame stage 130, so as to reattach the semiconductor package 1 to the appropriate second annular frame 20 according to the inspection result (good / defective).

[0046] For example, the unloading pickup unit 150 may include an unloading platform 151, which is formed to extend linearly in the horizontal direction (X-axis direction) along opposite sides of the annular frame extenders 120 and annular frame stages 130 arranged side-by-side, and is arranged parallel to the loading platform 141 in the vertical direction (Y-axis direction) at predetermined intervals. The unloading pickup unit 150 may include an unloading pickup 152, which is mounted to be slidable in the horizontal direction (X-axis direction) along the unloading platform 151 to pick up the semiconductor package 1 placed on the shuttle table 320 and reattach the semiconductor package 1 to the appropriate second annular frame 20 based on the inspection result (good / defective).

[0047] In addition, the unloading pickup unit 150 may also include an unloading visual inspection unit 153 installed below the movement path of the unloading pickup 152 to perform visual inspection on the exterior of the semiconductor package 1 picked up and transported by the unloading pickup 152.

[0048] For example, the unloading visual inspection unit 153 can capture the bottom surface of the semiconductor package 1 picked up and transported by the unloading pickup 152 from below. Based on the captured image of the outer surface (edge ​​portion) of the semiconductor package 1, the unloading visual inspection unit 153 can determine the pickup position of the semiconductor package 1. Therefore, the unloading visual inspection unit 153 can check for pickup errors (such as positional deviation from the correct pickup position in the X-axis or Y-axis direction, or rotational error about the Z-axis).

[0049] Therefore, the unloading pickup 152 can correct the pickup error of the semiconductor package 1 based on the visual inspection results from the unloading visual inspection unit 153. The unloading pickup 152 can offset the semiconductor package 1 from the attachment reference position on the annular frame stage 130 by the pickup error, so that it can be accurately attached to the second annular frame 20.

[0050] like Figure 1 and Figure 4As shown, the shuttle unit 300 is mounted to extend in the vertical direction (Y-axis direction) to connect the loader unit 100 and the tester unit 200, and the shuttle unit 300 is used to transfer the semiconductor package 1 to the tester unit 200 or to the loader unit 100. During transfer, the shuttle unit 300 can also preheat or cool the semiconductor package 1.

[0051] For example, the shuttle track unit 310 of the shuttle unit 300 can be configured to extend in a direction perpendicular to the extending direction of the parallel-formed loading platform 141 and unloading platform 151. One end of the shuttle track unit 310 can extend into the operating range of the alignment pickup unit 220 of the tester unit 200.

[0052] Furthermore, the shuttle table 320 of the shuttle unit 300 is mounted to be slidable along the shuttle track unit 310, and the shuttle table 320 of the shuttle unit 300 is used to transfer the semiconductor package 1 between the loader unit 100 and the tester unit 200.

[0053] The shuttle table 320 may also include a heater unit 321 installed inside the shuttle table 320 for heating the semiconductor package 1 placed on its upper surface to a preset test temperature before testing. The shuttle table 320 may also include a cooling unit 322 installed on the side of the shuttle table 320 and including a nozzle N that blows air A toward the semiconductor package 1 after testing to cool the tested semiconductor package 1 to room temperature.

[0054] like Figure 1 As shown, the tester unit 200 can test the semiconductor package 1 loaded from the loader unit 100 and unload the tested semiconductor package 1 back into the loader unit 100.

[0055] For example, the tester module 210 of the tester unit 200 can perform tests on the semiconductor package 1.

[0056] More specifically, the tester module 210 may include a tester body 211 positioned on one side of the sliding movement path of the test stage 230 (described below); a tester 212 rotatably mounted on the tester body 211 via a hinge axis 212a, such that the tester 212 can be selectively positioned above the test stage 230 along its sliding path, and the tester 212 is used to provide test signals for electrical testing of the semiconductor package 1; and a probe module 213 mounted to be slidable back and forth from the tester body 211 in the direction of the sliding movement path facing the test stage 230, such that the probe module 213 can be selectively positioned between the tester 212 and the test stage 230, and the probe module 213 is used to electrically connect the tester 212 to the semiconductor package 1 placed on the test stage 230.

[0057] Therefore, the tester 212 can be electrically connected to the semiconductor package 1 placed on the test stage 230 via the probe module 213 described above. The tester 212 provides electrical signals to the semiconductor package 1 and analyzes the output signals from the semiconductor package 1 to determine whether the semiconductor package 1 on the test stage 230 is good or defective.

[0058] like Figure 1 and Figure 5 As shown, the alignment pickup unit 220 of the tester unit 200 can pick up the semiconductor package 1 that has been transferred to the tester unit 200 via the shuttle unit 300 from the shuttle table 320 and place the semiconductor package 1 on the test stage 230 for testing, or pick up the tested semiconductor package 1 from the test stage 230 and place the tested semiconductor package 1 on the shuttle unit 300.

[0059] For example, the alignment stage 221 of the alignment pickup unit 220 can be configured to extend linearly in the vertical direction (Y-axis direction) between one end of the shuttle unit 300 and the position corresponding to the sliding movement path of the test stage 230.

[0060] The alignment pickup 222 of the alignment pickup unit 220 can be mounted to be slidable along the alignment stage 221 in the vertical direction (Y-axis direction). The alignment pickup 222 of the alignment pickup unit 220 can pick up the semiconductor package 1 conveyed via the shuttle unit 300 from the shuttle table 320 and place the semiconductor package 1 on the test stage 230, or pick up the tested semiconductor package 1 from the test stage 230 and place the tested semiconductor package 1 on the shuttle table 320 of the shuttle unit 300 for conveying to the loader unit 100.

[0061] Furthermore, the alignment visual inspection unit 223 of the alignment pickup unit 220 can be mounted above the alignment pickup 222, which includes a hollow portion 222a. The alignment visual inspection unit 223 can perform visual inspection on the internal pattern on the upper surface of the semiconductor package 1 picked up by the alignment pickup 222 through the hollow portion 222a.

[0062] For example, the alignment vision inspection unit 223 can capture an image of the upper surface of the semiconductor package 1 picked up and transported by the alignment pickup 222 from above by vertically (in the Z-axis direction) penetrating the hollow portion 222a of the alignment pickup 222. Based on the internal pattern including micropillar bumps 1a and pads 1b on the upper surface of the semiconductor package 1, the pickup position of the semiconductor package 1 can be determined. Therefore, the alignment vision inspection unit 223 can detect pickup errors (such as deviations in the X-axis or Y-axis direction, or rotational errors about the Z-axis) relative to the ideal pickup position.

[0063] Therefore, the alignment pickup 222 can correct the pickup error of the semiconductor package 1 based on the visual inspection results of the alignment vision inspection unit 223 regarding the internal pattern of the semiconductor package 1. The corrected pickup error can be applied as an offset from the ideal placement position on the test stage 230 (i.e., the test position where the probes of the probe module 213 and the pads 1b of the semiconductor package 1 are accurately connected). By doing so, the placement operation on the test stage 230 can be performed with high precision, thereby enabling the tester module 210 to perform accurate testing of the semiconductor package 1.

[0064] like Figure 1 As further shown, the test stage 230 of the tester unit 200 is mounted to be slidable between the alignment pickup unit 220 and the tester module 210, and is used to move the semiconductor package 1 to be tested to a position corresponding to the tester module 210, or to move the semiconductor package 1 that has been tested to a position corresponding to the alignment pickup unit 220.

[0065] The test stand 230 can be used as a chuck to support the semiconductor package 1 during testing by the tester module 210, and the chuck can be a multi-parameter structure chuck capable of temperature control through areas adapted to various parameters.

[0066] Additionally, the test stage 230 may undergo deformation, such as expansion or contraction, depending on its temperature. As a result of such deformation, even if the alignment pick-up 222 places the semiconductor package 1 in the intended placement position, positioning errors may still occur.

[0067] Therefore, the alignment pickup unit 220 can pre-calculate and store deformation data corresponding to the deformation amount of the test stage 230 at various temperatures. When the alignment pickup unit 220 places the semiconductor package 1 on the test stage 230, the alignment pickup unit 220 can calculate the real-time deformation amount of the test stage 230 based on the measured real-time temperature of the test stage 230 and the stored deformation data. Then, the placement position of the semiconductor package 1 can be offset by the calculated deformation amount to ensure that the semiconductor package 1 is accurately placed on the test stage 230, thereby preventing placement errors caused by thermal deformation of the test stage 230.

[0068] In addition, such as Figure 1 As shown, two test stands 230 can be provided in a left-right symmetrical arrangement relative to the tester module 210 in the tester unit 200.

[0069] Therefore, while one test stage 230 moves toward the tester module 210 to perform the testing process of the semiconductor package 1, another test stage 230 can move toward the alignment pickup unit 220 to transfer the tested semiconductor package 1 to the loader unit 100 via the shuttle unit 300, and receive new semiconductor packages 1 from the loader unit 100 via the shuttle unit 300. In this way, the logistics process of the semiconductor package 1 can be managed efficiently, thereby reducing the testing time of the semiconductor package 1 in the test processor 1000.

[0070] like Figure 1 As shown, in order to accommodate such a dual-structure test bench 230, the alignment pickup unit 220 and the shuttle unit 300 can also be formed as a dual structure, and the two units are arranged symmetrically in the horizontal direction (X-axis direction) relative to the tester module 210.

[0071] In addition, an upper vision inspection device 240 can be installed above the movement path of the test stage 230. During the movement of the test stage 230 toward the tester module 210, the upper vision inspection device 240 can inspect the arrangement of the semiconductor packages 1 placed on the test stage 230 in multiple rows and columns, and rotate the test stage 230 as needed to perform alignment.

[0072] Figure 6 This is a schematic diagram illustrating the configuration of a test processor 2000 according to another embodiment of the present disclosure.

[0073] The layout of the loader unit 100 and shuttle unit 300 for loading the semiconductor package 1 to be tested into the tester unit 200 or unloading the semiconductor package 1 that has already been tested is not limited to the following: Figure 1 The configuration shown is not shown in the image. Instead, it can be arranged in various configurations depending on the available installation space.

[0074] For example, such as Figure 6 As shown, the shuttle unit 300 can be mounted to extend in the horizontal direction (X-axis direction) parallel to the loading platform 141 and the unloading platform 151 to connect the loader unit 100 and the tester unit 200. The shuttle unit 300 conveys the semiconductor package 1 to the tester unit 200 or to the loader unit 100, and can preheat or cool the semiconductor package 1 during conveyance.

[0075] For example, the shuttle track unit 310 of the shuttle unit 300 can be configured to extend in a horizontal direction (X-axis direction) parallel to the extension direction of the loading platform 141 and the unloading platform 151. One end of the shuttle track unit 310 can extend to reach the operating range of the alignment pickup unit 220 of the tester unit 200, thereby forming a perpendicular intersection with the alignment pickup unit 220.

[0076] Therefore, the shuttle table 320 of the shuttle unit 300 can be mounted to be slidable along the shuttle track unit 310 in the horizontal direction (X-axis direction), and the shuttle table 320 of the shuttle unit 300 is used to transfer the semiconductor package 1 between the loader unit 100 and the tester unit 200.

[0077] By forming the shuttle unit 300 to extend in a horizontal direction (X-axis direction) perpendicular to the extension direction of the holder stand 111, the overall layout of the equipment can be optimized, thereby reducing the footprint of the test processor 2000.

[0078] In this configuration, to ensure that the loading pickup 142 and the unloading pickup 152 can reach the operating range of the shuttle table 320 in the shuttle unit 300, the loading platform 141 on which the loading pickup 142 is mounted to slide in the horizontal direction (X-axis direction) and the unloading platform 151 on which the unloading pickup 152 is mounted to slide in the same direction can be further slidable in the vertical direction (Y-axis direction). To prevent interference between the loading platform 141 and the unloading platform 151, the loading platform 141 and the unloading platform 151 can be arranged at different heights in the vertical direction (Z-axis).

[0079] Furthermore, the shuttle table 320 of the shuttle unit 300 can be mounted on the shuttle track unit 310 to move up and down in the vertical direction (Z-axis). By moving upward or downward, the semiconductor package 1 can be transported in a multi-layer stacked configuration, thereby increasing the transport efficiency of the semiconductor package 1.

[0080] The following section provides a detailed description of the semiconductor packaging test method using the aforementioned test processor 1000.

[0081] Figure 7 This is a flowchart illustrating a semiconductor packaging inspection method according to another embodiment of the present disclosure.

[0082] like Figure 7As shown, a semiconductor package testing method according to another embodiment of the present invention can be performed in the following order: (a) using the clamping unit 110 of the loader unit 100 to transfer the first annular frame 10 on which the semiconductor package 1 to be tested is placed from the first box C1 to the annular frame expander 120 of the loader unit 100; (b) using the loading pickup unit 140 to remove the semiconductor package 1 from the first annular frame 10; (c) placing the semiconductor package 1 on the shuttle table 320 of the shuttle unit 300; (d) picking up the semiconductor package 1 placed on the shuttle table 320 of the tester unit 200, and using the alignment pickup unit 220 of the tester unit 200 to place the semiconductor package 1 on the test stage 230; (e) moving the test stage 230 on which the semiconductor package 1 to be tested is placed to the test stage 230. (f) Make electrical contact between the tester module 210 and the semiconductor package 1 placed on the test stage 230, and test the semiconductor package 1; (g) Move the test stage 230 on which the tested semiconductor package 1 is placed to the position corresponding to the alignment pickup unit 220; (h) Pick up the tested semiconductor package 1 from the test stage 230 using the alignment pickup unit 220, and place the tested semiconductor package 1 on the shuttle table 320; (i) Pick up the tested semiconductor package 1 from the shuttle table 320 that has been moved to the loader unit 100, and attach the tested semiconductor package 1 to the second annular frame 20 using the unloading pickup unit 150; and (j) Store the second annular frame 20 on which the tested semiconductor package 1 is placed into the second box C2 using the clamping unit 110.

[0083] Therefore, according to various embodiments of the test processor 1000 and semiconductor packaging test method of this disclosure, as an electrical inspection system for a semiconductor package 1 (HBM chip) with micropillar bumps, an electrical inspection process can be performed on the semiconductor package 1 mounted on the first annular frame 10, and based on the determination of whether the package is good or defective, the semiconductor package 1 mounted on the first annular frame 10 can be reattached to a new second annular frame 20.

[0084] Furthermore, the test stage 230, on which the semiconductor package 1 is placed for electrical inspection processes, is configured as a single chuck device with a multi-parameter configuration (the applied dual-chuck configuration), thereby allowing precise hot / cold temperature control of the chuck. Based on the amount of deformation of the chuck at a specific temperature (such as low temperature, ambient temperature, or high temperature), the alignment pickup unit 220 applies an offset to the placement position of the semiconductor package 1 on the chuck. This allows for precise placement of the semiconductor package 1 in response to temperature-induced chuck deformation.

[0085] Furthermore, an alignment pickup unit 220 is implemented using an alignment pickup 222 with a hollow portion. An alignment vision inspection unit 223, mounted above the alignment pickup 222, performs a visual inspection of the internal pattern on the top surface of the semiconductor package 1 picked up by the alignment pickup 222 through the hollow portion 222a, and corrects for pickup errors. Additionally, an unloading vision inspection unit 153, mounted below the movement path of the unloading pickup 152 that reattaches the inspected semiconductor package 1 to the new second annular frame 20, performs a visual inspection of the underside of the semiconductor package 1 picked up by the unloading pickup 152 to correct for pickup errors. Through the use of the vision system, precise alignment technology for the semiconductor package 1 can be achieved, thereby further improving the accuracy of the semiconductor package inspection process.

[0086] Therefore, high-bandwidth memory (HBM) devices formed by dies in which multiple memory elements and logic elements are stacked together can be positioned precisely and subjected to electrical inspection processes, thereby improving the testing accuracy of HBM devices. Consequently, the test processor 1000 and semiconductor package testing method of this disclosure can accurately classify HBM devices as being in good or defective condition.

[0087] According to embodiments of the present disclosure constructed as described above, the present disclosure serves as an electrical inspection system for semiconductor packages (HBM chips) with micropillar bumps. After performing an electrical inspection process on the semiconductor package mounted on a ring frame, the semiconductor package can be reattached to a new ring frame based on a determination of whether the semiconductor package is good or defective.

[0088] Furthermore, to enable electrical inspection processes, the test stage for mounting semiconductor packages consists of a single chuck unit with a multi-parameter structure (for dual-chuck applications) capable of adapting to various parameters. This configuration allows for precise thermal / cold temperature control of the chuck. Additionally, based on the amount of chuck deformation at specific temperatures (such as low, ambient, or high), the alignment pickup unit applies an offset to the placement position of the semiconductor package on the chuck, thereby compensating for temperature-induced chuck deformation and ensuring accurate placement of the semiconductor package.

[0089] Furthermore, the alignment pickup unit is implemented as an alignment pickup with a hollow portion, and an alignment vision inspection unit mounted above the alignment pickup performs visual inspection on the internal pattern on the top surface of the semiconductor package picked up by the alignment pickup through the hollow portion to correct for pickup errors. Additionally, an unloading vision inspection unit mounted below the movement path of the unloading pickup, which reattaches the inspected semiconductor package to a new ring frame, performs visual inspection on the bottom exterior of the semiconductor package picked up by the unloading pickup to correct for pickup errors. The use of this vision system enables precise alignment of the semiconductor package, thereby further enhancing the accuracy of the semiconductor package inspection process.

[0090] In this way, high-bandwidth memory (HBM) devices formed by dies in which multiple memory devices and logic devices are stacked together can be precisely aligned and electrically tested. Therefore, the testing accuracy of high-bandwidth memory devices can be improved, enabling test processors and testing methods for semiconductor packaging to accurately classify HBM devices as being in good or defective condition. Of course, the scope of this disclosure is not limited to these effects.

[0091] This disclosure has been described with reference to embodiments illustrated in the accompanying drawings, but these are merely exemplary. It will be understood by those skilled in the art that various modifications and equivalent embodiments are possible with this disclosure. Therefore, the true technical scope of this disclosure should be defined by the spirit of the appended claims.

Claims

1. A test processor, comprising: A loader unit is used to detach the semiconductor package to be tested from a first annular frame on which the semiconductor package to be tested is placed, or to attach the tested semiconductor package to a second annular frame. A tester unit for testing the semiconductor package loaded from the loader unit and for unloading the tested semiconductor package back into the loader unit; as well as A shuttle unit is mounted to connect the loader unit and the tester unit for transferring the semiconductor package to the tester unit or to the loader unit, and for preheating or cooling the semiconductor package during transfer.

2. The test processor according to claim 1, wherein, The loader unit includes: A clamping unit is used to pull out the first annular frame containing a plurality of semiconductor packages to be tested from the first box, or to store the second annular frame containing the tested semiconductor packages into the second box. An annular frame expander is used to hold the first annular frame pulled out from the first box and to expand the dicing tape attached to the semiconductor package to increase the spacing between the semiconductor packages; A ring frame stage, on which the second ring frame to which the tested semiconductor package is to be attached is placed; A loading pickup unit is configured to pick up the semiconductor package from the first annular frame placed on the annular frame expander and transfer the semiconductor package to the shuttle unit; and The unloading pickup unit is used to pick up the semiconductor package that has been tested by the tester unit and transferred back to the loader unit via the shuttle unit, and to transfer the semiconductor package to the second annular frame placed on the annular frame stage.

3. The test processor according to claim 2, wherein, The loading pickup unit includes: A loading platform is formed to extend linearly along one side of the row of annular frame extenders and the annular frame platform; and A loading pickup, mounted so as to be slidable along the loading platform, is used to pick up the semiconductor package from the first annular frame placed on the annular frame expander. The unloading pickup unit includes: The unloading platform is formed to extend linearly along the opposite sides of the row of annular frame extenders and the annular frame platforms, such that it is parallel to the loading platform; and The unloading pickup, mounted so as to be slidable along the unloading platform, picks up the semiconductor package placed on the shuttle unit. The clamping unit includes: A clamping platform is formed to extend in a direction perpendicular to the extending directions of the parallel-formed loading platform and the unloading platform, and the clamping platform is used to connect the loading platform and the unloading platform; and A gripper, mounted to be slidable along the gripper platform, the gripper having a gripping portion to grip one side of the first annular frame or the second annular frame, and the gripper being used to pull the first annular frame from the first box to the annular frame extender, or to store the second annular frame from the annular frame platform into the second box.

4. The test processor according to claim 3, wherein, The unloading pickup unit further includes: An unloading visual inspection unit is installed below the movement path of the unloading pickup, and the unloading visual inspection unit is used to perform visual inspection on the exterior of the semiconductor package picked up and transported by the unloading pickup, and wherein, based on the results of the visual inspection performed by the unloading visual inspection unit, the unloading pickup is used to correct the pickup error of the semiconductor package.

5. The test processor according to claim 3, wherein, The shuttle unit includes: A shuttle track unit is formed to extend in a direction perpendicular to the extending directions of the parallel-formed loading platform and the unloading platform, and extends to the tester unit; and A shuttle table is mounted so as to be slidable along the shuttle track unit, and the shuttle table is used to transfer the semiconductor package between the loader unit and the tester unit.

6. The test processor according to claim 5, wherein, The shuttle table includes: A heater unit, installed inside the shuttle table, for heating the semiconductor package placed on the upper surface of the shuttle table; and A cooling unit comprising: a nozzle mounted on one side of the shuttle table to spray air toward the semiconductor package placed on the upper surface of the shuttle table to cool the semiconductor package.

7. The test processor according to claim 1, wherein, The tester unit includes: A tester module for testing the semiconductor package; Align the pickup unit to pick up the semiconductor package transferred to the tester unit via the shuttle unit; and The test stage is mounted so as to be slidable between the alignment pickup unit and the test module, so as to move the semiconductor package to a position corresponding to the test module or to a position corresponding to the alignment pickup unit. The alignment pickup unit places the semiconductor package on the test stage for testing, or picks up the tested semiconductor package from the test stage and places the tested semiconductor package on the shuttle unit.

8. The test processor according to claim 7, wherein, The alignment pickup unit includes: The alignment frame is configured to extend linearly in the direction between one end of the shuttle unit and the position corresponding to the sliding movement path of the test platform; The alignment pick-up device is mounted so as to be slidable along the alignment stage to pick up the semiconductor package conveyed via the shuttle unit and place the semiconductor package on the test stage, or to pick up the tested semiconductor package from the test stage and place the tested semiconductor package on the shuttle unit; and An alignment visual inspection unit is mounted above the alignment pickup, which has a hollow portion, to perform visual inspection of the internal pattern on the upper surface of the semiconductor package picked up by the alignment pickup through the hollow portion. The alignment pickup is used to correct the pickup error of the semiconductor package based on the result of the visual inspection of the internal pattern made by the alignment visual inspection unit.

9. The test processor according to claim 8, wherein, The alignment pickup unit is used to pre-calculate and store deformation data for the test bench based on the temperature. Furthermore, when the semiconductor package is placed on the test stage, the alignment pickup unit calculates the real-time deformation of the test stage based on the measured real-time temperature and the deformation data. Furthermore, the alignment pickup unit is used to offset the placement position of the semiconductor package by the real-time deformation amount, thereby placing the semiconductor package on the test stage.

10. A method for testing a semiconductor package using a test processor, the test processor comprising: A loader unit is used to detach the semiconductor package to be tested from a first annular frame on which the semiconductor package to be tested is placed, or to attach the tested semiconductor package to a second annular frame. A tester unit for testing the semiconductor package loaded from the loader unit and for unloading the tested semiconductor package back into the loader unit; The method includes a shuttle unit, configured to connect the loader unit and the tester unit, for transferring the semiconductor package to the tester unit or to the loader unit, and for preheating or cooling the semiconductor package during transfer. (a) Using the clamping unit of the loader unit, the first annular frame containing the semiconductor package to be tested is transferred from the first box to the annular frame expander of the loader unit. (b) Using the loading pickup unit, the semiconductor package is removed from the first annular frame; (c) Place the semiconductor package on the shuttle table of the shuttle unit; (d) Pick up the semiconductor package placed on the shuttle table that has been moved to the tester unit, and place the semiconductor package on the test stage using the alignment pick-up unit of the tester unit; (e) Move the test stage, on which the semiconductor package to be tested is placed, to the position corresponding to the tester module; (f) Make electrical contact between the tester module and the semiconductor package placed on the test bench, and test the semiconductor package; (g) Move the test stage, on which the tested semiconductor package is placed, to the position corresponding to the alignment pickup unit; (h) Using the alignment pickup unit, pick up the tested semiconductor package from the test stage and place the tested semiconductor package on the shuttle table; (i) Picking up the tested semiconductor package from the shuttle that has moved to the loader unit, and attaching the tested semiconductor package to the second annular frame using the unloading pickup unit; and (j) Using the clamping unit, the second annular frame containing the tested semiconductor package is stored in the second box.

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