Multi-source data synchronization control method based on hardware virtualization

Abstract

The invention particularly relates to a multi-source data synchronization control method based on hardware virtualization. The method comprises the following steps: acquiring first time information by a first system; determining second time information corresponding to the first time information according to the proportional relation between the real physical time and the virtual time; sending the second time information to at least one second system based on a preset time interval, so that the second system executes a test task according to the second time information; wherein the second system is used for running in the first system and executing a test task. According to the method, the operation condition of the tested software is obtained through system environment binding monitoring based on the digital airborne embedded software, the operation process of the test environment is controlled by using a virtual crystal oscillator time service mechanism, and the working efficiency and accuracy of the dynamic test of the airborne embedded software are improved.

Description

Technical Field

[0001] This invention relates to the field of embedded computer software testing technology, and specifically to a multi-source data synchronization control method based on hardware virtualization. Background Technology

[0002] In related technologies, a virtual machine (VM) is a computer program or system that simulates the hardware operating environment of a physical computer through software, enabling multiple operating systems to run simultaneously on the same physical machine. Virtual machines use virtualization technology to abstract physical resources (such as CPU, memory, storage, and network) into logical resources, providing each VM with an independent computing environment. Therefore, VMs are isolated from each other and can run different operating systems and applications.

[0003] In dynamic testing, the efficiency of digital virtual machines constructed based on hardware virtualization technology depends on the processing power and resources of the PC, resulting in an unstable actual running cycle of the software under test. Since all virtual test components use the PC's system time as a reference, there is a lack of a unified time synchronization mechanism between the virtual machines, causing inconsistent time and asynchronous cycles among the components. This leads to uncertainty in the data transmission order during data interaction between virtual machines, posing a significant obstacle to testers in designing test cases and making it difficult to meet the high real-time requirements of embedded system software testing.

[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] This invention provides a multi-source data synchronization control method based on hardware virtualization, which can effectively overcome the defects existing in the prior art to a certain extent.

[0006] Other features and advantages of the invention will become apparent from the following detailed description, or may be learned in part by practice of the invention.

[0007] According to a first aspect of the present invention, a multi-source data synchronization control method based on hardware virtualization is provided, the method comprising: The first system obtains the information in real time; Based on the ratio between real physical time and virtual time, determine the second time information corresponding to the first time information; The second time information is sent to at least one second system based on a preset time interval, so that the second system can execute test tasks according to the second time information; wherein the second system is used to run in the first system and execute test tasks.

[0008] In some exemplary embodiments, the first system acquires the first-time information, including: The computer hardware timer of the first system is queried to obtain the first time information.

[0009] In some exemplary embodiments, querying the computer hardware timer of the first system to obtain the first time information includes: Call the first API function to obtain the clock frequency of the timer of the first system; Call the second API function to obtain a high-resolution timer count value; The time base interval is determined based on the difference between adjacent timer counts and the clock frequency, and configured as the preset time interval.

[0010] In some exemplary embodiments, the method further includes: The first system listens to the network port corresponding to the second system to obtain the connection status between each second system and the first system; After determining that the second system has connected to the first system based on the connection status, an automatic update of the current second time information to the second system is triggered; and Several secondary systems acquire time information from other secondary systems to control time synchronization between them.

[0011] In some exemplary embodiments, the method further includes: After determining that the connection with the first system is currently disconnected based on the connection status, the second system triggers the virtual crystal oscillator corresponding to the virtual clock to stop timing.

[0012] In some exemplary embodiments, the method further includes: The virtual clock is used to obtain the task completion markers returned by each second system in a preset task cycle; the task completion markers include time information. If the delay of one of the task completion markers exceeds a preset period, the virtual clock is controlled to stop sending the second time information until the task completion marker is returned by the second system. Update the ratio of real physical time to virtual time based on the task completion marker. The updated second time information is determined based on the updated ratio between real physical time and virtual time, and then sent to each second system.

[0013] According to a second aspect of the present invention, a computer program product is provided, on which a computer program is stored, wherein the computer program, when executed by a processor, implements the above-described hardware virtualization-based multi-source data synchronization control method.

[0014] According to a third aspect of the present invention, a storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the above-described hardware virtualization-based multi-source data synchronization control method.

[0015] According to a fourth aspect of the present invention, an electronic device is provided, comprising: Processor; and Memory for storing the executable instructions of the processor; The processor is configured to implement the above-described hardware virtualization-based multi-source data synchronization control method by executing the executable instructions.

[0016] The multi-source data synchronization control method based on hardware virtualization provided by the embodiments of the present invention acquires a first time (real physical time) in a first system, determines a corresponding second time information based on the ratio between real physical time and virtual time, and sends the second time information to a second system based on a virtual system. This allows the second system and the virtual machine to execute test tasks according to the second time information, thereby enabling multiple virtual systems to achieve synchronous control under time synchronization conditions. By defining the ratio between real physical time and virtual time, a mechanism for defining the operating frequency of the virtual system is established, thereby achieving dynamic monitoring and real-time adjustment capabilities of the system clock.

[0017] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Attached Figure Description

[0018] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention. It is obvious that the drawings described below are merely some embodiments of the invention, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0019] Figure 1 The illustration shows a schematic diagram of a multi-source data synchronization control method based on hardware virtualization, an exemplary embodiment of the present invention. Figure 2 The diagram illustrates a frequency control principle according to an exemplary embodiment of the present invention. Figure 3 This illustration schematically depicts a time adjustment process between a first system and a second system, according to an exemplary embodiment of the present invention. Figure 4 The diagram illustrates the composition of an electronic device according to an exemplary embodiment of the present invention. Detailed Implementation

[0020] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that the invention will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0021] Furthermore, the accompanying drawings are merely illustrative of the invention and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0022] To address the shortcomings and deficiencies of existing technologies, this exemplary embodiment provides a multi-source data synchronization control method based on hardware virtualization. (Reference) Figure 1 As shown, the specific steps may include: Step S11: The first system obtains the first-time information; Step S12: Determine the second time information corresponding to the first time information based on the ratio between real physical time and virtual time; Step S13: The second time information is sent to at least one second system based on a preset time interval, so that the second system can execute a test task according to the second time information; wherein the second system is used to run in the first system and execute the test task.

[0023] This method adopts the design concept of hardware crystal oscillators in digital circuits to design and implement "pulse generation" to produce "virtual clock pulses," enabling unified time synchronization among components in the virtual environment. Simultaneously, it utilizes a designed "clock pulse" frequency control algorithm to control the clock pulse frequency. The "virtual clock" sends the generated time to each accompanying virtual machine and the test virtual machine via a virtual network, acting as a time management server.

[0024] The following will describe in more detail each step of a hardware virtualization-based multi-source data synchronization control method in this exemplary embodiment, with reference to the accompanying drawings and embodiments.

[0025] In step S11, the first system acquires the first time information.

[0026] For example, obtaining the first time information by the first system includes: querying the computer hardware timer of the first system to obtain the first time information.

[0027] For example, a specific implementation of the above method may include: Step S21: Call the first API function to obtain the clock frequency of the timer of the first system; Step S22: Call the second API function to obtain a high-resolution timer count value; Step S23: Determine the time reference interval based on the difference between adjacent timer counts and the clock frequency, and configure it as the preset time interval.

[0028] Specifically, the first system can be the host operating system of the user-side smart terminal device; for example, the Windows operating system. Specifically, it can utilize a Windows operating system kernel timer to generate clock signals by periodically triggering events, and use this as the first time information. That is, the first time information is the actual physical time collected by the Windows operating system.

[0029] Specifically, a clock pulse generation module can be provided to convert real physical time into adjustable virtual time. During the conversion process, the real physical time is obtained from the Windows system. Based on the configured ratio between real and virtual time, the virtual time is calculated and sent to the test system at intervals. To obtain an accurate time base from the Windows system (accurate to 1ms), the real time is calculated by directly querying the computer's hardware timer.

[0030] For example, the first API function mentioned above can be a high-precision timing function (QueryPerformanceFrequency function), and the second API function can be a high-precision timer (QueryPerformanceCounter).

[0031] Specifically, the system first uses the API function (QueryPerformanceFrequency) to obtain the clock frequency of the machine's internal timer, and then calls the API function (QueryPerformanceCounter) to obtain a high-resolution timer count value. The difference between the counts and the clock frequency are used to calculate the accurate time base interval, avoiding the large errors caused by using functions such as Sleep.

[0032] In step S12, the second time information corresponding to the first time information is determined based on the ratio between real physical time and virtual time.

[0033] Specifically, the aforementioned second time information can be the virtual time information used by the virtual machine when executing test tasks, executed by a virtual clock. The ratio between real physical time and virtual time can be pre-configured according to test requirements. The initial value of this ratio can be manually defined or a preset default value. Based on the preset ratio, the virtual time corresponding to the real physical time, i.e., the second time information, can be calculated. For example, the ratio of real physical time to virtual time can be 1:20 or 1:30, etc. The specific ratio value can be configured according to the actual needs of the test task.

[0034] In step S13, the second time information is sent to at least one second system based on a preset time interval, so that the second system can execute test tasks according to the second time information; wherein, the second system is used to run in the first system and execute test tasks.

[0035] For example, the second system described above could be a system executed by a virtual machine created under the Windows operating system, i.e., a virtual system. The virtual machine is used to execute test cases and complete testing tasks. For example, refer to... Figure 3 As shown, there can be multiple virtual machines, including one virtual machine under test (VM) for executing the target test cases, and multiple companion VMs. A virtual clock can be provided to allocate virtual time to each VM and receive task completion markers returned by each VM.

[0036] Specifically, during the execution of test cases, the actual time consumed by the virtual machine to execute a program cycle is unstable. In order to ensure that the test framework and the virtual machine clock are always in the same cycle, it is necessary to be able to automatically adjust the ratio of the virtual clock.

[0037] In a virtualized environment, the timestamp counter is calibrated by the host operating system to ensure clock consistency among virtual machines. A "virtual clock" is defined for each virtual machine. This virtual clock can be used to receive task completion markers returned by the test framework and virtual machines each cycle in real time and adjust the virtual time accordingly. Once the marker returned by the virtual machine is delayed beyond the time interval, the virtual clock immediately suspends sending time for the week until it receives the task completion marker from the virtual machine. After that, the "virtual clock" will send virtual time at the new time interval.

[0038] For example, the method further includes: Step S31: Use a virtual clock to obtain the task completion marker returned by each second system in a preset task cycle; wherein, the task completion marker contains time information; Step S32: When the delay of one of the task completion markers exceeds a preset period, control the virtual clock to stop sending the second time information until the task completion marker returned by the second system is received; Step S33: Update the ratio of real physical time to virtual time based on the task completion marker. Step S34: Determine the updated second time information based on the updated ratio of real physical time to virtual time, and send the updated second time information to each second system.

[0039] Specifically, refer to Figure 2 , Figure 3 As shown, to ensure that all virtual machine clocks are always in the same cycle, the virtual clock's ratio needs to be automatically adjusted. The "virtual clock" receives the task completion flags returned by each virtual machine in real time each cycle. Once the flag returned by the virtual machine is delayed beyond the time interval, the "virtual clock" immediately suspends sending the time for the week until it receives the task completion flag from the virtual machine. After that, the "virtual clock" will send virtual time at the updated time interval.

[0040] For example, the method further includes: Step S41: The first system listens to the network port corresponding to the second system to obtain the connection status between each second system and the first system; Step S42: After determining that the second system has connected to the first system based on the connection status, trigger the automatic update of the current second time information to the second system; and Step S33: Several second systems obtain time information from other second systems to control time synchronization between them.

[0041] Specifically, before executing the test task, a network port listening task can be created to listen on a specified network port and record the connection status between each virtual machine and the host operating system, as well as the connection status between each virtual machine.

[0042] Once each virtual machine connects to the network, the virtual clock is triggered to automatically update the current time in real time and send the virtual time to each virtual machine.

[0043] For example, the method further includes: In step S43, after the second system determines that the connection with the first system is currently disconnected based on the connection status, it triggers the virtual crystal oscillator corresponding to the virtual clock to stop timing.

[0044] Specifically, when any virtual machine disconnects, the virtual crystal oscillator corresponding to the virtual clock stops timing, and the system time is paused. After the connection is restored, the timing is automatically resumed. The system monitors the task execution time cycle of the software under test in each virtual machine and adjusts the "clock pulse" frequency according to the time.

[0045] For example, after obtaining the real time, the host system calculates the corresponding virtual time based on a preset ratio between the real time and the virtual time. This virtual time is then sent to the virtual machine under test and the accompanying virtual machine via a virtual clock within the virtual environment. The virtual machines can periodically synchronize with the software under test using the T command.

[0046] Each virtual machine executes test tasks according to its current virtual time and returns a task completion marker to the virtual clock at a preset task cycle. If the task completion markers returned by the tested virtual machine and the companion virtual machine are asynchronous (i.e., the time intervals are different), for example, if the companion virtual machine's task completion marker is received at the preset time interval, and the tested virtual machine's task completion marker is received after a certain delay, then the time asynchrony between the tested and companion virtual machines is detected. In this case, based on the time data corresponding to the delayed task completion marker, the host system can reconfigure the ratio between real time and virtual time, for example, by increasing the ratio, so that the tested and companion virtual machines can return task completion markers to the virtual clock at the same time, achieving data and time synchronization between different virtual systems.

[0047] The method provided by this invention defines a runtime frequency generation mechanism, which achieves cross-system time synchronization by allocating virtual time to different virtual machines using a virtual clock. Furthermore, by adjusting the time ratio based on the task completion flags returned by virtual machines from system tasks, it achieves dynamic monitoring and real-time adjustment of the system clock.

[0048] This invention obtains the operating status of the software under test by binding and monitoring the system environment based on digital airborne embedded software, and uses a virtual crystal oscillator timing mechanism to control the operation of the test environment, thereby improving the efficiency and accuracy of dynamic testing of airborne embedded software.

[0049] It should be noted that the above figures are merely illustrative of the processes included in the method according to exemplary embodiments of the present invention, and are not intended to be limiting. It is readily understood that the processes shown in the above figures do not indicate or limit the temporal order of these processes. Furthermore, it is readily understood that these processes may, for example, be executed synchronously or asynchronously in multiple modules.

[0050] It should be noted that although several modules or units of the device for performing actions have been mentioned in the detailed description above, this division is not mandatory. In fact, according to embodiments of the present invention, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0051] Figure 4 A schematic diagram of an electronic device suitable for implementing embodiments of the present invention is shown.

[0052] It should be noted that, Figure 4 The electronic device 1000 shown is merely an example and should not be construed as limiting the functionality and scope of use of the embodiments of the present invention.

[0053] like Figure 4 As shown, the electronic device 1000 includes a Central Processing Unit (CPU) 1001, which can perform various appropriate actions and processes based on programs stored in Read-Only Memory (ROM) 1002 or programs loaded from storage section 1008 into Random Access Memory (RAM) 1003. The RAM 1003 also stores various programs and data required for system operation. The CPU 1001, ROM 1002, and RAM 1003 are interconnected via a bus 1004. An Input / Output (I / O) interface 1005 is also connected to the bus 1004. Furthermore, the electronic device 1000 also includes an FPGA device and a System-on-a-Chip (SoC) device.

[0054] The following components are connected to I / O interface 1005: an input section 1006 including a keyboard, mouse, etc.; an output section 1007 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and speakers, etc.; a storage section 1008 including a hard disk, etc.; and a communication section 1009 including a network interface card such as a LAN (Local Area Network) card, modem, etc. The communication section 1009 performs communication processing via a network such as the Internet. A drive 1010 is also connected to I / O interface 1005 as needed. Removable media 1011, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., are installed on drive 1010 as needed so that computer programs read from them can be installed into storage section 1008 as needed.

[0055] In particular, according to embodiments of the present invention, the processes described below with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of the present invention include a computer program product comprising a computer program carried on a storage medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication section 1009, and / or installed from removable medium 1011. When the computer program is executed by central processing unit (CPU) 1001, it performs various functions defined in the system of this application.

[0056] Specifically, the aforementioned electronic devices can be airborne intelligent electronic devices, such as airborne video processing equipment.

[0057] It should be noted that the storage medium shown in the embodiments of the present invention can be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), flash memory, optical fiber, portable compact disc read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In the present invention, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In the present invention, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, wherein computer-readable program code is carried. Such transmitted data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The computer-readable signal medium can also be any storage medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the storage medium can be transmitted using any suitable medium, including but not limited to wireless, wired, etc., or any suitable combination thereof.

[0058] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0059] The units described in the embodiments of the present invention can be implemented in software or hardware, and the described units can also be located in a processor. The names of these units do not necessarily limit the specific unit itself.

[0060] It should be noted that, as another aspect, this application also provides a storage medium, which may be included in an electronic device or may exist independently without being assembled into the electronic device. The aforementioned storage medium carries one or more programs, which, when executed by an electronic device, cause the electronic device to perform the methods described in the following embodiments. For example, the electronic device may perform... Figure 1 The steps of the method shown.

[0061] In one embodiment, this application provides a computer program product including a computer program that, when executed by a processor, implements the steps in the above-described method embodiments.

[0062] Furthermore, the above figures are merely illustrative of the processes included in the method according to exemplary embodiments of the present invention, and are not intended to be limiting. It is readily understood that the processes shown in the above figures do not indicate or limit the temporal order of these processes. Additionally, it is readily understood that these processes may be executed synchronously or asynchronously, for example, in multiple modules.

[0063] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention herein. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the claims.

[0064] It should be understood that the present invention is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A multi-source data synchronization control method based on hardware virtualization, characterized in that, The method includes: The first system obtains the information in real time; Based on the ratio between real physical time and virtual time, determine the second time information corresponding to the first time information; The second time information is sent to at least one second system based on a preset time interval, so that the second system can execute test tasks according to the second time information; wherein the second system is used to run in the first system and execute test tasks.

2. The method according to claim 1, characterized in that, The first system obtains first-time information, including: The computer hardware timer of the first system is queried to obtain the first time information.

3. The method according to claim 2, characterized in that, Query the computer hardware timer of the first system to obtain the first time information, including: Call the first API function to obtain the clock frequency of the timer of the first system; Call the second API function to obtain a high-resolution timer count value; The time base interval is determined based on the difference between adjacent timer counts and the clock frequency, and configured as the preset time interval.

4. The method according to claim 1, characterized in that, The method further includes: The first system listens to the network port corresponding to the second system to obtain the connection status between each second system and the first system; After determining that the second system has connected to the first system based on the connection status, an automatic update of the current second time information to the second system is triggered; and Several secondary systems acquire time information from other secondary systems to control time synchronization between them.

5. The method according to claim 4, characterized in that, The method further includes: After determining that the connection with the first system is currently disconnected based on the connection status, the second system triggers the virtual crystal oscillator corresponding to the virtual clock to stop timing.

6. The method according to claim 1, characterized in that, The method further includes: The virtual clock is used to obtain the task completion markers returned by each second system in a preset task cycle; the task completion markers include time information. If the delay of one of the task completion markers exceeds a preset period, the virtual clock is controlled to stop sending the second time information until the task completion marker is returned by the second system. Update the ratio of real physical time to virtual time based on the task completion marker. The updated second time information is determined based on the updated ratio between real physical time and virtual time, and then sent to each second system.

7. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the hardware virtualization-based multi-source data synchronization control method as described in any one of claims 1 to 6.

8. A storage medium, characterized in that, It stores a computer program, which, when executed by a processor, implements the hardware virtualization-based multi-source data synchronization control method as described in any one of claims 1 to 6.

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