PCBA manufacturing process optimization method, apparatus and device, and storage medium

Abstract

The invention provides a PCBA manufacturing process optimization method and device, equipment and a storage medium, and the method comprises the steps: obtaining a mounting point data set of a to-be-assembled PCB, and dividing the mounting point data set into a plurality of mounting period subsets according to the number of mounting heads of a chip mounter and the type distribution of components; inputting the mounting period subset into a deep learning model, performing feature coding on the mounting point data through an encoder to obtain a feature matrix, and sequentially determining a matching relationship between each mounting point and a mounting head through a decoder according to the feature matrix to obtain a mounting point distribution scheme; and sorting the mounting points in each mounting period subset according to coordinate information and mounting angle information of each mounting point in the mounting point distribution scheme to obtain an execution sequence of the mounting head. According to the method, the global feature relationship and constraint conditions between the mounting points are automatically learned through the deep learning model, the optimization strategy is automatically adjusted according to the characteristics of different PCBs, and the mounting path length is shortened.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a method, apparatus, equipment and storage medium for optimizing PCBA manufacturing process. Background Technology

[0002] In the printed circuit board assembly (PCBA) production process, the pick-and-place machine is the core equipment for surface mount technology (SMT). It uses multiple placement heads to pick up components from the feeder and place them onto designated locations on the PCB board. Existing PCBA placement process optimization methods mainly rely on heuristic algorithms or metaheuristic algorithms. These methods determine the placement path and placement head allocation scheme through preset rules or random search strategies.

[0003] However, existing technologies have the following main technical problems: traditional heuristic algorithms rely too much on manually designed rules and expert experience, making it difficult to capture the global feature relationships between placement points. This results in the inability to obtain the globally optimal placement path when dealing with placement optimization problems under complex constraints. Furthermore, the algorithms have poor generalization ability and require readjustment of rule parameters for different types of PCB boards. Summary of the Invention

[0004] The main objective of this invention is to solve the technical problems of existing PCBA mounting process optimization methods that rely too heavily on manual rules, cannot effectively capture the global feature relationships of mounting points, and result in poor mounting path optimization effects and weak generalization ability. This invention provides a PCBA manufacturing process optimization method, the PCBA manufacturing process optimization method comprising: Obtain the placement point dataset of the PCB to be assembled, and divide the placement point dataset into multiple placement cycle subsets according to the number of placement heads of the placement machine and the distribution of component types; The mounting cycle subset is input into a deep learning model. The encoder performs feature encoding on the mounting point data to obtain a feature matrix. The decoder determines the matching relationship between each mounting point and the chip head according to the feature matrix to obtain a mounting point allocation scheme. Based on the coordinate information and mounting angle information of each mounting point in the mounting point allocation scheme, the mounting points in each mounting cycle subset are sorted to obtain the execution sequence of the mounting head.

[0005] The present invention also provides a PCBA manufacturing process optimization device, the PCBA manufacturing process optimization device comprising: The data partitioning module is used to obtain the mounting point dataset of the PCB to be assembled, and to divide the mounting point dataset into multiple mounting cycle subsets according to the number of mounting heads of the pick-and-place machine and the distribution of component types. The intelligent allocation module is used to input the subset of the mounting cycle into a deep learning model, encode the mounting point data by an encoder to obtain a feature matrix, and then use a decoder to determine the matching relationship between each mounting point and the mounting head according to the feature matrix to obtain a mounting point allocation scheme. The path optimization module is used to sort the placement points in each placement cycle subset according to the coordinate information and placement angle information of each placement point in the placement point allocation scheme, so as to obtain the execution sequence of the placement head.

[0006] The present invention also provides a PCBA manufacturing process optimization apparatus, comprising: a memory and at least one processor, wherein the memory stores instructions, and the memory and the at least one processor are interconnected via a circuit; the at least one processor invokes the instructions in the memory to cause the PCBA manufacturing process optimization apparatus to perform the steps of the PCBA manufacturing process optimization method described above.

[0007] The present invention also provides a computer-readable storage medium storing instructions that, when executed on a computer, cause the computer to perform the steps of the above-described PCBA manufacturing process optimization method.

[0008] The aforementioned PCBA manufacturing process optimization method, apparatus, equipment, and storage medium acquire a dataset of mounting points for the PCB to be assembled. Based on the number of mounting heads and component type distribution of the pick-and-place machine, the dataset is divided into multiple mounting cycle subsets. These subsets are then input into a deep learning model. An encoder performs feature encoding on the mounting point data to obtain a feature matrix. A decoder determines the matching relationship between each mounting point and the mounting head based on the feature matrix, resulting in a mounting point allocation scheme. Based on the coordinate and mounting angle information of each mounting point in the allocation scheme, the mounting points within each mounting cycle subset are sorted to obtain the execution sequence of the mounting heads. This invention automatically learns the global feature relationships and constraints between mounting points using a deep learning model, and automatically adjusts the optimization strategy according to the characteristics of different PCBs, thereby shortening the mounting path length.

[0009] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention are realized and obtained in accordance with the structures particularly pointed out in the description, claims and drawings.

[0010] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0011] Figure 1This is a schematic diagram of the first embodiment of the PCBA manufacturing process optimization method in this invention; Figure 2 This is a schematic diagram of the second embodiment of the PCBA manufacturing process optimization method in this invention; Figure 3 This is a schematic diagram of one embodiment of the PCBA manufacturing process optimization device in this invention. Figure 4 This is a schematic diagram of one embodiment of the PCBA manufacturing process optimization equipment in this invention. Detailed Implementation

[0012] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0013] The terms "comprising" and "having," and any variations thereof, used in the embodiments of this invention are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the steps or units listed, but may optionally include other steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0014] To facilitate understanding of this embodiment, a PCBA manufacturing process optimization method disclosed in this embodiment will first be described in detail. For example... Figure 1 As shown, this method includes the following steps: 101. Obtain the placement point dataset of the PCB to be assembled, and divide the placement point dataset into multiple placement cycle subsets according to the number of placement heads of the placement machine and the distribution of component types; In this embodiment, obtaining the mounting point dataset of the PCB to be assembled and dividing the mounting point dataset into multiple mounting cycle subsets based on the number of placement heads of the pick-and-place machine and the component type distribution includes: obtaining the mounting point dataset of the PCB to be assembled; statistically analyzing the component types of each mounting point in the mounting point dataset; grouping mounting points with the same component type into a component type group to obtain multiple component type groups; calculating the number of mounting cycles required for each component type group based on the number of mounting points in each component type group and the number of placement heads of the pick-and-place machine; sorting the multiple component type groups according to the material bin location distribution and component picking distance of the pick-and-place machine to obtain a component type group sequence; and sequentially selecting mounting points from each component type group, not exceeding the number of placement heads, to form a mounting cycle subset according to the component type group sequence and the number of mounting cycles for each component type group, until all mounting points are assigned, thus obtaining the multiple mounting cycle subsets.

[0015] Specifically, the pick-and-place machine control module first extracts placement point data from the PCB design file, which contains detailed information about all placement points on the PCB to be assembled. Each placement point includes attributes such as its horizontal and vertical coordinate positions on the PCB, component placement angle, component type code, and the required quantity for that position. For example, a typical automotive control board may contain 120 placement points, involving various component types such as resistors, capacitors, diodes, and integrated circuits.

[0016] During the component type statistics phase, the control module iterates through all mounting point data and uses a hash table structure to classify the mounting points. The component type code is used as the index key to group mounting points with the same type code into the same list. For example, if the PCB board has 30 0805 package surface mount resistors, 45 0603 package surface mount capacitors, 25 SOT23 package transistors, and 20 QFP package integrated circuits, then four independent component type groups will be formed. Each type group records the location coordinates and quantity information of all mounting points of that type.

[0017] Calculating the number of placement cycles requires planning based on the hardware configuration of the pick-and-place machine. Assuming the machine has 6 placement heads, for a resistor group with 30 placement points, divide 30 by 6 and round up to the nearest integer, resulting in 5 placement cycles needed to complete all placement tasks for that group. Similarly, 45 capacitors require 8 cycles, 25 transistors require 5 cycles, and 20 integrated circuits require 4 cycles.

[0018] The component type sorting process considers multiple optimization factors. First, the actual installation position of the feeder for each component in the feed hopper is obtained. The feed hopper is typically located at the front or side of the pick-and-place machine, and the distance between the feeder and the placement area varies depending on the location. The time cost of different placement sequences is evaluated by calculating the path length of the placement head from the placement area to each feeder position. Component types with adjacent feeder positions are prioritized in consecutive placement sequences to reduce the travel distance of the placement head during the picking process. Simultaneously, frequently used component types with higher usage are given higher priority, allowing them to enter the placement process earlier.

[0019] The process of forming a subset of the placement cycle adopts a sequential allocation strategy. Starting from the first type group in the sorted component type group sequence, placement points are extracted sequentially. A capacity counter for the current placement cycle is maintained, with an initial value set to the number of chip heads (6). Placement points are taken one by one from the current type group and added to the current cycle subset. Each time a placement point is added, the capacity counter is decremented by 1. When the counter reaches 0, it indicates that the current cycle is full and a new placement cycle needs to begin. If all placement points in the current type group have been allocated but there is still remaining capacity in the current cycle, placement points are extracted from the next type group until the current cycle reaches its capacity limit.

[0020] In the actual allocation process, the physical spacing constraints of the placement heads also need to be considered. Since the placement heads are arranged linearly in the horizontal direction, there is a fixed physical spacing between adjacent placement heads, typically an integer multiple of 32 mm or 16 mm. This spacing limits the spatial distribution of placement points that can be placed within the same cycle. If the distance between two placement points on the PCB board is less than the placement head spacing, they cannot be placed on adjacent placement heads in the same cycle. The allocation algorithm checks the spatial relationship between the placement point to be added and the already allocated placement points to avoid mechanical interference.

[0021] Through the above partitioning process, multiple placement cycle subsets are ultimately obtained. Each subset contains no more than the number of placement points in the placement head, and the spatial distribution of these placement points satisfies the physical constraints of the placement head. This partitioning method ensures the feasibility and efficiency of subsequent placement processes.

[0022] 102. Input the subset of the mounting cycle into a deep learning model, use an encoder to encode the features of the mounting point data to obtain a feature matrix, and use a decoder to determine the matching relationship between each mounting point and the mounting head in sequence according to the feature matrix to obtain a mounting point allocation scheme. In this embodiment, the process of inputting the subset of placement cycles into the deep learning model for processing is implemented using a heuristic algorithm. Specifically, for each subset of placement cycles, the placement point information contained therein is first extracted, including the coordinate position of the placement point, placement angle, component type, and other attributes. This attribute information is organized into a structured data format to facilitate subsequent allocation algorithm processing.

[0023] The matching process between placement points and chip heads employs a greedy algorithm strategy. At the start of the algorithm, an empty allocation table is initialized, recording the matching relationship between each chip head and its corresponding placement point. For placement points in the current placement cycle subset, they are sorted according to their position on the PCB board, with priority given to placement points closer to the pick-up position.

[0024] The specific matching process is as follows: The first unassigned placement point is selected from the placement cycle subset, and the allocation cost from this placement point to each idle placement head is calculated. The allocation cost mainly considers two factors: the distance the placement head travels from its current position to the target placement point, and the current load status of the placement head. The distance is calculated using the Manhattan distance method, which is the sum of the absolute values ​​of the horizontal and vertical distances. Regarding the load of the placement heads, if a placement head has already been assigned a large number of placement tasks, its allocation cost weight is increased to achieve load balancing.

[0025] After calculating all feasible allocation costs, the placement head with the lowest cost is selected and matched with the current placement point. This matching relationship is recorded in the allocation scheme table, and the status of the placement head is updated to occupied. Then, the process continues to process the next unallocated placement point, repeating the above matching process until all placement points in the current placement cycle subset have been allocated.

[0026] To optimize the allocation, the algorithm also introduces a local search optimization mechanism. After the initial allocation, the allocation scheme is locally adjusted. Specifically, two patch heads are randomly selected, and their assigned placement points are swapped. The difference in total cost before and after the swap is calculated. If the total cost after the swap is lower, the swap is accepted; otherwise, the original allocation remains unchanged. This optimization process is repeated for a preset number of iterations, typically 100 to 500 times, to obtain a better allocation scheme.

[0027] When processing multiple subsets of placement cycles, the algorithm employs a pipelined approach. Once the first subset of placement cycles is assigned, the processing of the second subset begins immediately, while the placement operations for the first subset can commence. This pipelined approach improves overall production efficiency and reduces waiting time.

[0028] For handling special cases, the algorithm incorporates multiple constraint checking mechanisms. For example, some large components may require specific placement heads for processing; the algorithm will check whether the nozzle type of the placement head matches the requirements before allocation. For placement points with high precision requirements, priority will be given to placement heads with higher positioning accuracy. These constraints are managed through a pre-defined rule base to ensure the feasibility of the allocation scheme.

[0029] The allocation process also considers placement order optimization. For multiple placement points handled by the same placement head, the access order is determined based on their positional relationship on the PCB board. A nearest neighbor algorithm is used, starting from the initial position and selecting the nearest unvisited placement point as the next target, forming an optimized placement path. While this method cannot guarantee global optimality, it achieves good results in practical applications and has low computational complexity.

[0030] After all placement points are assigned, the algorithm outputs a complete placement point allocation scheme. This scheme includes a task list for each placement head, which details all placement point information for that placement head, including placement order, position coordinates, and component type. This allocation scheme will serve as the guide for subsequent placement operations.

[0031] By employing the heuristic algorithm described above, a feasible placement point allocation scheme can be obtained in a relatively short time, meeting the basic needs of actual production. Although this method may not achieve the theoretically optimal solution, it is computationally efficient and simple to implement, making it suitable as a basic solution.

[0032] 103. Based on the coordinate information and mounting angle information of each mounting point in the mounting point allocation scheme, sort the mounting points in each mounting cycle subset to obtain the execution sequence of the mounting head.

[0033] In this embodiment, the step of sorting the mounting points within each mounting cycle subset according to the coordinate and mounting angle information of each mounting point in the mounting point allocation scheme to obtain the execution sequence of the mounting head includes: extracting the coordinate and mounting angle information of each mounting point from the mounting point allocation scheme, establishing a correspondence table between the mounting head and the coordinate and mounting angle information of the corresponding mounting point; calculating the movement distance between mounting heads according to the coordinate information in the correspondence table to obtain a distance matrix; calculating the angle difference between adjacent mounting heads according to the mounting angle information in the correspondence table, converting the angle difference into time cost, combining it with the distance matrix to obtain a comprehensive cost matrix, performing path optimization calculation on the comprehensive cost matrix, and determining the shortest path through all mounting points using a dynamic programming method to obtain the execution sequence of the mounting head.

[0034] Specifically, the control module first reads the detailed information of the placement points assigned to each placement head from the placement point allocation scheme. For a placement cycle containing 6 placement heads, a correspondence table is established. Each row in the table records the placement head number, the x-coordinate and y-coordinate of its corresponding placement point, and the placement angle value. For example, the placement point corresponding to placement head number 1 is located at coordinates 100 mm and 50 mm, with a placement angle of 0 degrees; the placement point corresponding to placement head number 2 is located at coordinates 120 mm and 55 mm, with a placement angle of 90 degrees, and so on, completing the information recording for all placement heads.

[0035] When calculating the travel distance between placement heads, the mechanical structure characteristics of the pick-and-place machine must be considered. Since the placement heads are arranged linearly in the transverse direction, there is a fixed physical interval between adjacent placement heads, typically 32 mm. Therefore, when calculating the travel distance from the i-th placement head to the j-th placement head, a correction for the transverse distance is required. The specific calculation method is as follows: First, calculate the absolute value of the difference in the transverse coordinates of the two placement points, and then subtract the product of the difference in placement head number and the physical interval. The longitudinal distance is directly calculated by determining the absolute value of the difference in the longitudinal coordinates of the two placement points. The final travel distance is taken as the larger of the transverse correction distance and the longitudinal distance. This is because the gantry structure of the pick-and-place machine allows simultaneous transverse and longitudinal movement, and the total travel time is determined by the slower axis.

[0036] The handling of placement angles involves the characteristics of the placement head rotation mechanism. In actual pick-and-place machines, two adjacent placement heads typically share a single rotary motor. This design reduces costs but introduces additional constraints. When adjacent placement heads require different placement angles, the shared motor needs to switch between the two angles, incurring additional time overhead. When calculating the angle difference, the periodicity of the angle is considered; for example, the shortest rotation path from 350 degrees to 10 degrees is 20 degrees, not 340 degrees. In converting the angle difference into time cost, the calculation is based on the rated speed of the rotary motor. A typical rotation speed is 360 degrees per second, so a 90-degree angle difference corresponds to a time cost of 0.25 seconds.

[0037] When constructing the overall cost matrix, distance cost and angle cost are weighted and combined. Distance cost is converted into time based on the placement machine's movement speed; the lateral movement speed is typically 800 mm / s, and the longitudinal movement speed is 600 mm / s. For each pair of placement heads, the overall cost equals the movement time cost plus the angle adjustment time cost. This results in a 6x6 cost matrix, where each element represents the total time cost of moving from one placement head position to another.

[0038] The path optimization is solved using a dynamic programming algorithm. State variables are defined to represent the set of visited patch heads and the current patch head position. The state transition equation calculates the minimum cost of accessing the next unvisited patch head from the current state. The algorithm maintains a two-dimensional array to store intermediate calculation results to avoid redundant calculations. The initial state starts from the pick-up position, and the goal is to find a path that passes through all patch head positions exactly once, minimizing the total time cost.

[0039] In the implementation of dynamic programming, a bitmask technique is used to represent the set of visited tile headers. For 6 tile headers, a 6-bit binary number is used, with each bit representing whether the corresponding tile header has been visited. The algorithm starts from the initial state and gradually expands the visited set, calculating the cost of each possible access order. A memoized search technique is used to store the calculated results of subproblems; when the same subproblem is encountered again, the result is retrieved directly from the table, significantly improving computational efficiency.

[0040] Ultimately, the dynamic programming algorithm outputs the optimal placement head execution sequence, which specifies the access order of the placement heads to minimize the total time required to complete the entire placement cycle. For example, the optimized execution sequence might be placement heads 3, 1, 5, 2, 6, and 4 in that order. This sequence takes into account both the time cost of movement distance and angle adjustment, thus optimizing placement efficiency.

[0041] Furthermore, the step of calculating the movement distance between patch heads based on the coordinate information in the correspondence table to obtain the distance matrix includes: extracting the x-coordinate and y-coordinate of the mounting point corresponding to each patch head from the correspondence table to construct a set of patch head coordinate pairs; calculating the x-direction distance difference for any two patch heads in the set of patch head coordinate pairs, where the x-direction distance difference is equal to the absolute value of the difference in the x-coordinates of the mounting points minus the product of the physical interval between the patch heads and the difference in the patch head sequence number; calculating the y-direction distance difference for any two patch heads in the set of patch head coordinate pairs, where the y-direction distance difference is equal to the absolute value of the difference in the y-coordinates of the mounting points; taking the maximum value of the x-direction distance difference and the y-direction distance difference for each pair of patch heads, and using the maximum value as the equivalent movement distance of the corresponding patch head pair to construct the distance matrix.

[0042] Specifically, the control module first reads data row by row from the correspondence table, extracting the placement point coordinates for each placement head. For example, in a placement cycle with 6 placement heads, the placement point coordinates for the first placement head are 100 mm x and 50 mm y, the second placement head is 120 mm x and 55 mm y, the third placement head is 95 mm x and 48 mm y, and so on. These coordinate data are organized into a structured set of coordinate pairs, where each element contains the placement head number and its corresponding x and y coordinate values.

[0043] Calculating the distance difference in the x-direction requires considering the unique mechanical structure of the pick-and-place machine. The placement heads are arranged linearly laterally, with a fixed physical interval between adjacent heads. This interval is typically designed to be an integer multiple of 32 mm or 16 mm; this embodiment uses a standard interval of 32 mm. When calculating the x-direction distance between the i-th and j-th placement heads, first calculate the difference in x-coordinates between the two placement points and take its absolute value. Then, subtract the offset caused by the physical arrangement of the placement heads. This offset is equal to the absolute value of the difference in placement head numbers multiplied by the 32 mm physical interval.

[0044] For example, if the x-coordinate of the placement point of the second placement head is 120 mm and the x-coordinate of the placement point of the fifth placement head is 180 mm, then the original x-coordinate difference is 60 mm. Since the second and fifth placement heads differ by 3 positions, the physical spacing offset is 3 multiplied by 32, which equals 96 mm. Therefore, the actual x-direction distance difference is 60 minus the absolute value of 96, which is 36 mm. This calculation method reflects the actual physical constraints during the movement of the placement head array.

[0045] Calculating the distance difference in the y-direction is relatively simple because the placement heads have no physical spacing restrictions in the longitudinal direction and can move freely to any longitudinal position on the PCB board. Simply calculate the absolute value of the difference in the y-coordinates of the two placement points. For example, if the y-coordinate of the placement point of placement head #2 is 55 mm and the y-coordinate of the placement point of placement head #5 is 80 mm, then the distance difference in the y-direction is 25 mm.

[0046] The equivalent movement distance is determined using the Chebyshev distance concept, which takes the larger of the differences between the x-axis and y-axis distances. This calculation method is based on the motion characteristics of the pick-and-place machine gantry, which allows the x-axis and y-axis to move independently and simultaneously. Therefore, the total time to move from one position to another is determined by the axis with the longer movement distance. For example, if the x-axis distance difference is 36 mm and the y-axis distance difference is 25 mm, then the equivalent movement distance is 36 mm.

[0047] Constructing the complete distance matrix requires performing the above calculations on all patch head pairs. For 6 patch heads, 15 different patch head pair combinations need to be calculated, forming a 6x6 symmetric matrix. The diagonal elements of the matrix are 0, representing the distance from the patch head to itself. The element in the i-th row and j-th column of the matrix represents the equivalent distance from the i-th patch head position to the j-th patch head position.

[0048] In the actual calculation process, a double loop is used to traverse all patch head pairs. The outer loop traverses the starting patch head, and the inner loop traverses the target patch head. For each patch head pair, the distance difference in the x and y directions is calculated using the method described above, and the maximum value is filled into the corresponding position in the distance matrix. Due to the symmetry of the distance, only the upper triangular matrix needs to be calculated; the lower triangular part is obtained by transposing it.

[0049] The distance matrix directly reflects the spatial cost of moving between placement heads. Smaller matrix element values ​​indicate that the two placement heads are close to each other, resulting in low switching costs; larger values ​​indicate that a longer movement time is required. This distance matrix serves as input to subsequent path optimization algorithms to calculate the optimal placement head execution sequence. By accurately calculating the movement distance between each pair of placement heads, a precise data foundation is provided for optimizing the placement path.

[0050] In this embodiment, by acquiring the placement point dataset of the PCB to be assembled, the dataset is divided into multiple placement cycle subsets based on the number of placement heads and component type distribution of the pick-and-place machine. These placement cycle subsets are input into a deep learning model. An encoder performs feature encoding on the placement point data to obtain a feature matrix. A decoder then determines the matching relationship between each placement point and the placement head based on the feature matrix, resulting in a placement point allocation scheme. Based on the coordinate and placement angle information of each placement point in the allocation scheme, the placement points within each placement cycle subset are sorted to obtain the execution sequence of the placement head. This invention automatically learns the global feature relationships and constraints between placement points using a deep learning model, and automatically adjusts the optimization strategy according to the characteristics of different PCB boards, thereby shortening the placement path length.

[0051] Please see Figure 2 Another embodiment of the PCBA manufacturing process optimization method in this application includes: 201. Obtain the placement point dataset of the PCB to be assembled, and divide the placement point dataset into multiple placement cycle subsets according to the number of placement heads of the placement machine and the distribution of component types; In this embodiment, step 201 is similar to step 101, and will not be described again here.

[0052] 202. Input the subset of the mounting cycle into the deep learning model, perform feature mapping on the coordinates, angles, component types and demand data of each mounting point in the subset of the mounting cycle, and obtain the mounting point embedding vector; In this embodiment, the encoder of the deep learning model first preprocesses a subset of the input mounting cycle. For the raw data of each mounting point, including information in five dimensions—horizontal coordinate, vertical coordinate, mounting angle, component type code, and required quantity—feature mapping is performed through a linear transformation layer. The linear transformation adopts a fully connected neural network structure with an input dimension of 5 and an output dimension of 128. This dimension selection is based on experimental verification that it can fully express the feature information of the mounting point.

[0053] During feature mapping, the coordinate data is first normalized to map the physical coordinates on the PCB board to a standard range of 0 to 1, avoiding the impact of numerical range differences on model training. The mounting angle values ​​are normalized by dividing by 360, and component types are converted into vector representations using one-hot encoding. These processed features are then input into a linear transformation layer, where matrix multiplication and bias term addition are performed, followed by a nonlinear transformation using the ReLU activation function to obtain the preliminary feature representation.

[0054] To enhance feature representation, the encoder employs a multilayer perceptron architecture with three hidden layers of dimensions 128, 256, and 128, respectively. Batch normalization is added between each layer to stabilize the training process and accelerate convergence. The final output patch point embedding vector has a dimension of 128, with each patch point corresponding to a dense 128-dimensional vector representation. This vector contains all the key attribute information of the patch point, providing a foundation for subsequent masking and feature encoding.

[0055] 203. Construct a mask matrix based on the component type constraints and placement status of the current placement cycle, and perform masking processing on the placement point embedding vector to obtain effective placement point features; In this embodiment, the step of constructing a mask matrix based on the component type constraints and placement status of the current placement cycle, and performing masking processing on the placement point embedding vector to obtain effective placement point features includes: matching and judging the component type of each placement point in the placement point embedding vector according to the component type list required for the current placement cycle, marking successfully matched placement points as 1 and unmatched placement points as 0, to obtain a component type mask vector; marking the status of placement points already assigned to the chip header, marking unassigned placement points as 1 and assigned placement points as 0, to obtain an allocation status mask vector; performing element-wise multiplication of the component type mask vector and the allocation status mask vector to obtain a combined mask matrix; performing a masking operation on the combined mask matrix and the placement point embedding vector, assigning negative infinity values ​​to placement point features with a mask value of 0, and retaining the original feature values ​​for placement points with a mask value of 1, to obtain effective placement point features.

[0056] Specifically, generating the component type mask first requires parsing the task configuration for the current placement cycle. The control module reads the component type list for the current cycle from the placement task scheduler. This list is determined during the data partitioning phase based on the hopper layout and retrieval efficiency optimization. For example, in the third placement cycle, the task list might include 0805-package surface mount resistors, 0603-package surface mount capacitors, and SOT23-package transistors. For the 120 placement points to be processed, the component type attribute of each placement point is checked one by one. The checking process uses hash table lookup technology, storing the available types for the current cycle in the hash table to achieve type matching and judgment with constant time complexity.

[0057] In the specific implementation of type matching, the type code of each mounting point is compared with a hash table. If the type code of the mounting point is "R0805" and this type is in the available list for the current cycle, then a 1 is written to the corresponding position in the component type mask vector; if the type of the mounting point is "IC_QFP" ​​but is not in the available list for the current cycle, then a 0 is written. This binary mask representation clearly marks which mounting points can be considered in the current cycle and which need to be excluded.

[0058] The allocation status mask is maintained using a bitmap data structure for efficient state management. A bit array with a length equal to the total number of mount points is created, with each bit representing the allocation status of the corresponding mount point. Initially, all bits are set to 1, indicating that no mount points have been allocated. During decoding, whenever a mount point is successfully allocated to a patch header, the corresponding bit for that mount point is immediately flipped to 0. This bit manipulation method offers advantages such as low memory usage and fast update speed, making it particularly suitable for real-time dynamic mask updates.

[0059] The state update triggering mechanism is closely related to the decoder's output. After the decoder outputs a placement point selection decision at each time step, it triggers the state update module. The update module not only modifies the state bit of the selected placement point but also checks for any associated constraints. For example, some large components may occupy multiple placement positions; once the primary position is assigned, the related auxiliary positions also need to be synchronously marked as assigned.

[0060] The generation of the combined mask matrix employs vectorized operations to improve computational efficiency. Utilizing the tensor operations provided by the deep learning framework, element-wise multiplication is performed on the component type mask vector and the allocation state mask vector. This operation can be executed in parallel on the GPU, and the mask calculation for 120 mounting points can be completed in microseconds. In the combined mask matrix, positions with a value of 1 indicate that the mounting point meets the type requirements of the current cycle and is in an unallocated state, making it a valid candidate mounting point.

[0061] The combination of masking operations and patch point embedding vectors employs attention masking techniques from deep learning. For each patch point's 128-dimensional embedding vector, conditional processing is performed based on the combined mask value. When the mask value is 0, instead of simply clearing the features to zero, it is filled with a sufficiently large negative number, typically -10000. This value is chosen based on the range of floating-point representations and the numerical stability of the subsequent softmax function.

[0062] The theoretical basis of the negative infinity strategy comes from the mathematical properties of the softmax function. When calculating the attention score, the softmax function transforms the input value into a probability distribution. For extremely small values ​​like -10000, the exponential operation yields a result close to 0, which has almost no weight in the normalized probability distribution. This approach ensures that invalid patch points do not affect subsequent decisions, while maintaining the continuity of gradient propagation, which is beneficial for model training convergence.

[0063] The retention of effective mounting point features employs a selective copying strategy. For mounting points with a mask value of 1, their 128-dimensional feature vectors are fully preserved without any modification. These feature vectors are then input into subsequent multi-head attention layers for further feature extraction and relationship modeling. Through this masking mechanism, the model can flexibly adapt to the dynamic changes of different mounting cycles, ensuring that each decision step is based on an effective candidate set, avoiding invalid computation and incorrect allocation, and significantly improving the quality and computational efficiency of the mounting scheme.

[0064] 204. Input the effective mounting point features into the encoder, and perform feature encoding through a multi-layer attention network and a feedforward network to obtain the feature matrix; In this embodiment, the encoder employs a multi-layer coding structure based on the Transformer architecture to perform deep feature extraction on the effective mounting point features. The encoder contains six identical coding layers, each consisting of a multi-head attention sublayer and a feedforward network sublayer. The multi-head attention mechanism uses eight attention heads, each independently calculating the correlation between mounting points to capture the dependencies between features from different perspectives.

[0065] In the multi-head attention computation process, the 128-dimensional patch point features are first transformed into a query matrix, a key matrix, and a value matrix through three independent linear transformations, with each matrix maintaining a dimension of 128. These matrices are then partitioned according to the number of attention heads, with each head processing a 16-dimensional subspace feature. Dot-product attention is used to obtain the correlation scores between patch points, which are then scaled and normalized using softmax to obtain attention weights. The attention weights are multiplied by the value matrix to obtain the weighted feature representation.

[0066] The feedforward network employs a two-layer fully connected structure, with the intermediate layer's dimension expanded to 512. The GELU activation function is used to enhance non-linear expressiveness. Residual connections and layer normalization operations are added after each sub-layer to ensure the training stability of the deep network. After six layers of encoding, the output feature matrix maintains the same dimensional structure as the input but contains richer global feature information, providing sufficient contextual representation for the decoder.

[0067] 205. Input the feature matrix into the decoder, extract historical allocation information through a recurrent neural network, calculate the selection probability of each mounting point by combining the attention mechanism, and determine the matching relationship between each mounting point and the mounting head in turn according to the selection probability to obtain the mounting point allocation scheme. In this embodiment, the step of inputting the feature matrix into the decoder, extracting historical allocation information through a recurrent neural network, calculating the selection probability of each mounting point using an attention mechanism, and determining the matching relationship between each mounting point and the patch head according to the selection probability to obtain the mounting point allocation scheme includes: constructing a decoding input vector based on the feature matrix and the current allocation state; inputting the decoding input vector into a recurrent neural network for sequence processing to obtain a hidden state vector containing historical allocation information; using the hidden state vector as a query vector and performing attention operations with the feature matrix to obtain the attention score of each candidate mounting point; normalizing the attention score to generate a selection probability distribution; determining the mounting point corresponding to the current patch head according to the selection probability distribution; iteratively executing the decoding input construction, recurrent neural network processing, and mounting point selection until the matching of all patch heads in the current mounting cycle is completed to obtain the mounting point allocation scheme.

[0068] Specifically, the decoding process uses an autoregressive approach to progressively generate the patch point allocation sequence. At each decoding time step, the current decoding input vector is first constructed. If the current time step is the first time step, the features of the starting position are extracted from the feature matrix as the initial input; otherwise, the features of the selected patch point from the previous time step are extracted. Simultaneously, the remaining capacity information of the current patch header is encoded as a numerical feature, which is concatenated with the patch point features to form a complete input vector with a dimension of 129.

[0069] The recurrent neural network employs a gated recurrent unit (GRU) structure, containing two GRU layers with a hidden state dimension of 256. The GRU selectively retains and forgets historical information through update and reset mechanisms. The update gate controls the degree to which the previous hidden state is retained, while the reset gate determines how the current input is fused with historical information. Specifically, the update gate uses a sigmoid function to map the linear combination of the input vector and the previous hidden state to the interval between 0 and 1, serving as the weights for information retention. The reset gate uses a similar mechanism but controls the degree to which historical information is reset.

[0070] The state update of GRU consists of two steps: First, candidate hidden states are calculated by multiplying the previous hidden state by the reset gate and concatenating it with the current input, and then generating candidate values ​​through the tanh activation function; then, the previous hidden state and candidate hidden states are weighted and combined through the update gate to obtain the hidden state at the current time step. This gating mechanism enables GRU to effectively capture long-term dependencies in the placement sequence and remember the information of the assigned placement points.

[0071] The attention mechanism employs a scaled dot product attention method. The 256-dimensional hidden state output by the GRU is mapped to a 128-dimensional query vector through a linear transformation, and attention is calculated between this vector and the feature matrix output by the encoder. First, the dot product between the query vector and the feature of each patch point is calculated to obtain the original attention score. To maintain numerical stability, the score is scaled by dividing by the square root of the dimension. Then, the previously generated combined mask is applied, setting the score of invalid patch points to negative infinity.

[0072] The probability distribution is generated using a softmax function. The attention scores, after scaling and masking, are input into the softmax function to obtain a normalized probability distribution. The probability value of each patch point reflects its likelihood of being selected. During the training phase, a sampling strategy is used to randomly select patches from the probability distribution, increasing the diversity of exploration; during the inference phase, a greedy strategy is used to directly select the patch point with the highest probability, ensuring the determinism of the output.

[0073] The iterative process continues until all patch heads are matched or all valid placement points are allocated. Each time a placement point is selected, the allocation status mask is immediately updated, marking the placement point as allocated to prevent duplicate selections. Simultaneously, the capacity counter of the patch head is updated. When a patch head completes its placement task, the decoder automatically switches to the next patch head. The entire decoding process generates an ordered sequence of placement points, explicitly specifying the target points that each patch head should place and their order, forming a complete placement point allocation scheme.

[0074] 206. Based on the coordinate information and mounting angle information of each mounting point in the mounting point allocation scheme, sort the mounting points in each mounting cycle subset to obtain the execution sequence of the mounting head.

[0075] In this embodiment, step 206 is similar to step 103 in the first embodiment, and will not be described again here.

[0076] In this embodiment, by acquiring the placement point dataset of the PCB to be assembled, the dataset is divided into multiple placement cycle subsets based on the number of placement heads and component type distribution of the pick-and-place machine. These placement cycle subsets are input into a deep learning model. An encoder performs feature encoding on the placement point data to obtain a feature matrix. A decoder then determines the matching relationship between each placement point and the placement head based on the feature matrix, resulting in a placement point allocation scheme. Based on the coordinate and placement angle information of each placement point in the allocation scheme, the placement points within each placement cycle subset are sorted to obtain the execution sequence of the placement head. This invention automatically learns the global feature relationships and constraints between placement points using a deep learning model, and automatically adjusts the optimization strategy according to the characteristics of different PCB boards, thereby shortening the placement path length.

[0077] The PCBA manufacturing process optimization method in the embodiments of the present invention has been described above. The PCBA manufacturing process optimization apparatus in the embodiments of the present invention will be described below. Please refer to [link to relevant documentation] for details on this PCBA manufacturing process optimization apparatus. Figure 3 One embodiment of the PCBA manufacturing process optimization device in this invention includes: The data partitioning module 301 is used to obtain the mounting point dataset of the PCB to be assembled, and to divide the mounting point dataset into multiple mounting cycle subsets according to the number of mounting heads of the pick-and-place machine and the distribution of component types. The intelligent allocation module 302 is used to input the subset of the mounting cycle into a deep learning model, encode the mounting point data by an encoder to obtain a feature matrix, and then determine the matching relationship between each mounting point and the mounting head by a decoder according to the feature matrix to obtain a mounting point allocation scheme. The path optimization module 303 is used to sort the mounting points in each mounting cycle subset according to the coordinate information and mounting angle information of each mounting point in the mounting point allocation scheme, so as to obtain the execution sequence of the mounting head.

[0078] In this embodiment of the invention, the PCBA manufacturing process optimization device runs the aforementioned PCBA manufacturing process optimization method. The device acquires a dataset of mounting points for the PCB to be assembled, and divides this dataset into multiple mounting cycle subsets based on the number of mounting heads and component type distribution of the pick-and-place machine. The mounting cycle subsets are input into a deep learning model. An encoder performs feature encoding on the mounting point data to obtain a feature matrix. A decoder determines the matching relationship between each mounting point and the mounting head based on the feature matrix, resulting in a mounting point allocation scheme. Based on the coordinate and mounting angle information of each mounting point in the allocation scheme, the mounting points within each mounting cycle subset are sorted to obtain the execution sequence of the mounting heads. This invention automatically learns the global feature relationships and constraints between mounting points using a deep learning model, and automatically adjusts the optimization strategy according to the characteristics of different PCBs, thereby shortening the mounting path length.

[0079] above Figure 3 The PCBA manufacturing process optimization device in this embodiment of the invention will be described in detail from the perspective of unitized functional entities. The PCBA manufacturing process optimization equipment in this embodiment of the invention will be described in detail from the perspective of hardware processing.

[0080] Figure 4 This is a schematic diagram of a PCBA manufacturing process optimization device 300 provided in an embodiment of the present invention. The PCBA manufacturing process optimization device 300 can vary significantly due to different configurations or performance. It may include one or more central processing units (CPUs) 410 (e.g., one or more processors) and a memory 420, and one or more storage media 430 (e.g., one or more mass storage devices) for storing application programs 333 or data 432. The memory 420 and storage media 430 can be temporary or persistent storage. The program stored in the storage media 430 may include one or more units (not shown in the diagram), each unit may include a series of instruction operations on the PCBA manufacturing process optimization device 400. Furthermore, the processor 410 may be configured to communicate with the storage media 430 and execute the series of instruction operations in the storage media 430 on the PCBA manufacturing process optimization device 400 to implement the steps of the aforementioned PCBA manufacturing process optimization method.

[0081] The PCBA manufacturing process optimization equipment 400 may also include one or more power supplies 440, one or more wired or wireless network interfaces 450, one or more input / output interfaces 460, and / or one or more operating systems 431, such as Windows Server, Mac OS X, Unix, Linux, FreeBSD, etc. Those skilled in the art will understand that... Figure 4 The illustrated PCBA manufacturing process optimization equipment structure does not constitute a limitation on the PCBA manufacturing process optimization equipment provided by the present invention. It may include more or fewer components than illustrated, or combine certain components, or have different component arrangements.

[0082] The present invention also provides a computer-readable storage medium, which can be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium, wherein the computer-readable storage medium stores instructions that, when the instructions are executed on a computer, cause the computer to perform the steps of the PCBA manufacturing process optimization method.

[0083] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the system, device, or unit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0084] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0085] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for optimizing PCBA manufacturing process, characterized in that, The PCBA manufacturing process optimization method includes: Obtain the placement point dataset of the PCB to be assembled, and divide the placement point dataset into multiple placement cycle subsets according to the number of placement heads of the placement machine and the distribution of component types; The mounting cycle subset is input into a deep learning model. The encoder performs feature encoding on the mounting point data to obtain a feature matrix. The decoder determines the matching relationship between each mounting point and the chip head according to the feature matrix to obtain a mounting point allocation scheme. Based on the coordinate information and mounting angle information of each mounting point in the mounting point allocation scheme, the mounting points in each mounting cycle subset are sorted to obtain the execution sequence of the mounting head.

2. The PCBA manufacturing process optimization method according to claim 1, characterized in that, The step of obtaining the placement point dataset of the PCB to be assembled, and dividing the placement point dataset into multiple placement cycle subsets according to the number of placement heads of the placement machine and the distribution of component types, includes: Obtain the mounting point dataset of the PCB to be assembled, count the component types of each mounting point in the mounting point dataset, and group the mounting points with the same component type into one component type group to obtain multiple component type groups. Calculate the number of placement cycles required for each component type group based on the number of placement points in each component type group and the number of placement heads of the placement machine; Based on the distribution of the material bins and the component picking distance of the chip mounter, the multiple component type groups are sorted to obtain a component type group sequence; According to the component type group sequence and the number of placement cycles for each component type group, placement points not exceeding the number of chip heads are selected from each component type group to form a placement cycle subset, until all placement points are assigned, thus obtaining the multiple placement cycle subsets.

3. The PCBA manufacturing process optimization method according to claim 1, characterized in that, The process of inputting the subset of mounting cycles into a deep learning model, encoding the mounting point data using an encoder to obtain a feature matrix, and then using a decoder to sequentially determine the matching relationship between each mounting point and the chip header based on the feature matrix to obtain a mounting point allocation scheme includes: Input a subset of the mounting cycle into a deep learning model, perform feature mapping on the coordinates, angles, component types and demand data of each mounting point in the subset of the mounting cycle, and obtain the mounting point embedding vector; A mask matrix is ​​constructed based on the component type constraints and placement status of the current placement cycle. The embedding vector of the placement point is then masked to obtain the effective placement point features. The effective mounting point features are input into the encoder, and feature encoding is performed through a multi-layer attention network and a feedforward network to obtain the feature matrix; The feature matrix is ​​input into the decoder, historical allocation information is extracted through a recurrent neural network, and the selection probability of each mounting point is calculated by combining an attention mechanism. Based on the selection probability, the matching relationship between each mounting point and the mounting head is determined in sequence to obtain the mounting point allocation scheme.

4. The PCBA manufacturing process optimization method according to claim 3, characterized in that, The process of constructing a mask matrix based on the component type constraints and placement status of the current placement cycle, and then masking the placement point embedding vector to obtain effective placement point features includes: Based on the list of component types required for the current mounting cycle, the component type of each mounting point in the mounting point embedding vector is matched and judged. The mounting points that match successfully are marked as 1, and the mounting points that do not match are marked as 0, thus obtaining the component type mask vector. The placement points assigned to the placement head are marked with status, with unassigned placement points marked as 1 and assigned placement points marked as 0, to obtain the allocation status mask vector; The component type mask vector and the allocation status mask vector are multiplied element-wise to obtain a combined mask matrix. The combined mask matrix and the mounting point embedding vector are subjected to a mask operation. The mounting point features with a mask value of 0 are assigned a negative infinity value, while the original feature values ​​of the mounting points with a mask value of 1 are retained, thus obtaining the effective mounting point features.

5. The PCBA manufacturing process optimization method according to claim 3, characterized in that, The process of inputting the feature matrix into the decoder, extracting historical allocation information through a recurrent neural network, calculating the selection probability of each mounting point using an attention mechanism, and determining the matching relationship between each mounting point and the chip header according to the selection probability to obtain the mounting point allocation scheme includes: A decoding input vector is constructed based on the feature matrix and the current allocation state. The decoding input vector is then input into a recurrent neural network for sequence processing to obtain a hidden state vector containing historical allocation information. The hidden state vector is used as the query vector, and attention operation is performed with the feature matrix to obtain the attention score of each candidate patch point. The attention score is normalized to generate a selection probability distribution, and the placement point corresponding to the current placement head is determined based on the selection probability distribution. The process iteratively executes the decoding input construction, recurrent neural network processing, and placement point selection until all placement heads in the current placement cycle are matched, resulting in a placement point allocation scheme.

6. The PCBA manufacturing process optimization method according to claim 1, characterized in that, The step of sorting the placement points within each placement cycle subset according to the coordinate and placement angle information of each placement point in the placement point allocation scheme to obtain the execution sequence of the placement head includes: Extract the coordinate information and mounting angle information of each mounting point from the mounting point allocation scheme, and establish a correspondence table between the mounting head and the coordinate information and mounting angle information of the corresponding mounting point; The movement distance between the patch heads is calculated based on the coordinate information in the correspondence table to obtain the distance matrix; The angle difference between adjacent patch heads is calculated based on the mounting angle information in the corresponding relationship table. The angle difference is converted into time cost and combined with the distance matrix to obtain the comprehensive cost matrix. The comprehensive cost matrix is ​​used to perform path optimization calculations, and the shortest path through all mounting points is determined by dynamic programming to obtain the execution sequence of the mounting head.

7. The PCBA manufacturing process optimization method according to claim 6, characterized in that, The step of calculating the movement distance between the patch heads based on the coordinate information in the correspondence table to obtain the distance matrix includes: Extract the x and y coordinates of the mounting points corresponding to each patch head from the correspondence table, and construct a set of patch head coordinate pairs; For any two patch heads in the set of patch head coordinate pairs, calculate the distance difference in the x-direction, where the distance difference in the x-direction is equal to the absolute value of the difference in the x-coordinates of the mounting points minus the product of the physical interval between the patch heads and the difference in the patch head sequence number; For any two patch heads in the set of patch head coordinate pairs, calculate the distance difference in the y-direction, where the distance difference in the y-direction is equal to the absolute value of the difference in the y-coordinates of the mounting points; For each pair of patch heads, the maximum value of the distance difference in the x-direction and the distance difference in the y-direction is taken, and the maximum value is used as the equivalent movement distance of the corresponding patch head pair to construct a distance matrix.

8. A PCBA manufacturing process optimization device, characterized in that, The PCBA manufacturing process optimization device includes: The data partitioning module is used to obtain the mounting point dataset of the PCB to be assembled, and to divide the mounting point dataset into multiple mounting cycle subsets according to the number of mounting heads of the pick-and-place machine and the distribution of component types. The intelligent allocation module is used to input the subset of the mounting cycle into a deep learning model, encode the mounting point data by an encoder to obtain a feature matrix, and then use a decoder to determine the matching relationship between each mounting point and the mounting head according to the feature matrix to obtain a mounting point allocation scheme. The path optimization module is used to sort the placement points in each placement cycle subset according to the coordinate information and placement angle information of each placement point in the placement point allocation scheme, so as to obtain the execution sequence of the placement head.

9. A PCBA manufacturing process optimization device, characterized in that, The PCBA manufacturing process optimization equipment includes: a memory and at least one processor, wherein the memory stores instructions; The at least one processor invokes the instructions in the memory to cause the PCBA manufacturing process optimization apparatus to perform the steps of the PCBA manufacturing process optimization method as described in any one of claims 1-7.

10. A computer-readable storage medium storing instructions thereon, characterized in that, When the instruction is executed by the processor, it implements the steps of the PCBA manufacturing process optimization method as described in any one of claims 1-7.

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