PCIe switching device, message processing method, storage medium and electronic device

Abstract

The embodiment of the invention provides PCIe switching equipment, a message processing method, a storage medium and electronic equipment.The PCIe switching equipment comprises a central processing unit used for sending abnormal information to a second port connected with second equipment under the condition that the situation that the second equipment is in an abnormal state is detected, multiple first equipment comprises the second equipment, and the second port is connected with the second equipment; the plurality of first ports comprise second ports; the first message processing module is arranged in the second port, is connected with the interconnection arbitration module, and is used for discarding a plurality of first messages sent by the interconnection arbitration module under the condition that the abnormal information is received, and sending power-on prompt information to the central processing unit under the condition that the condition that the plurality of first messages are all discarded is determined, the interconnection arbitration module is connected with the plurality of first ports, the interconnection arbitration module is used for routing messages sent by the plurality of first ports, and the power-on prompt information is used for indicating that the second equipment can be powered on again.

Description

Technical Field

[0001] This application relates to the field of computers, and more specifically, to a PCIe switching device and message processing method, storage medium and electronic device. Background Technology

[0002] With the rapid development of computer and communication technologies, PCI Express (Peripheral Component Interconnect Express, or PCIe for short) has become one of the widely used high-speed interface standards in modern computer systems. As a high-performance and highly scalable bus architecture, PCIe enables fast data transmission and communication between various devices, and its application areas cover computers, servers, embedded systems, network devices, and more.

[0003] In complex PCIe systems, the PCIe switch is a crucial foundational component. Its primary responsibility is to extend and connect communication between different PCIe devices, ensuring reliable data transmission. Located on the data path, the PCIe switch acts as a data forwarder bridging different PCIe devices. This bridging operation is visible to the devices in the system; once connected to the PCIe network via the PCIe switch, devices can communicate normally.

[0004] The typical DPC implementation of a 32-port PCIe switch is as follows: There is one upstream port and 31 downstream ports. The message distribution module sends all received unicast / multicast messages to the multicast message modification module. The multicast message modification module modifies up to 32 multicast messages to be output according to the multicast configuration before sending them to up to 32 ports. Messages sent to each port are arbitrated through a direct point-to-point connection to the arbitration module at the destination port. The multicast message modification module outputs multicast messages in parallel to the 32 ports, and each port is connected to one of the 32 ports' transmission links, for a total of 32 connections. 3 With as many as 2, the back-end layout and wiring are quite difficult, and the connection method is as follows: Figure 2 As shown, with the increasing demand for the number of ports, the direct connection between internal ports places stringent requirements on the back-end layout and wiring, making it impossible to meet the DPC function.

[0005] In response to the technical problem that traditional DPC implementation methods cannot meet the current PCIeSwitch's requirements for multiple ports and have poor scalability, no effective solution has yet been proposed. Summary of the Invention

[0006] This application provides a PCIe switching device and message processing method, storage medium and electronic device, to at least solve the problem in the related art that the traditional DPC function implementation method cannot meet the current PCIe Switch's requirement for multiple ports and has poor scalability.

[0007] According to one embodiment of this application, a PCIe switching device is provided. The PCIe switching device includes a plurality of first ports, each of which is connected to a plurality of first devices. The device includes: a central processing unit (CPU) configured to send abnormal information to a second port connected to the second device when an abnormal state is detected in a second device, wherein the plurality of first devices includes the second device and the plurality of first ports includes the second port; and a first message processing module disposed in the second port and connected to an interconnect arbitration module, configured to discard a plurality of first messages sent by the interconnect arbitration module upon receiving the abnormal information, and to send a power-on prompt message to the CPU when it is determined that all the plurality of first messages have been discarded, wherein the interconnect arbitration module is connected to the plurality of first ports and is configured to route messages sent from the plurality of first ports, and the power-on prompt message indicates that the second device can be powered on again.

[0008] In one exemplary embodiment, the PCIe switching device further includes: a plurality of packet distribution modules, respectively disposed on the plurality of first ports, for parsing the second packet and sending the obtained packet information and the second packet to a packet modification module, wherein the packet information is at least used to indicate the receiving port of the second packet; a plurality of packet modification modules, connected one-to-one with the plurality of packet distribution modules, for modifying the packet information according to a preset modification rule and sending the modified packet information and the second packet to an interconnect arbitration module; the interconnect arbitration module, connected to the plurality of packet modification modules, for determining a third port according to the modified packet information and routing the second packet to a second packet processing module on the third port.

[0009] In an exemplary embodiment, the central processing unit is further configured to: send abnormal configuration information corresponding to the second port to a fourth port when the second device is detected to be in an abnormal state, wherein the plurality of first ports include the second port and the fourth port.

[0010] In an exemplary embodiment, the PCIe switching device includes multiple message processing modules, all connected to the interconnect arbitration module. The multiple message processing modules include a first message processing module and further include a third message processing module, which is located in the fourth port and is used to generate an abnormal configuration message based on the abnormal configuration information, and send the third message and the abnormal configuration message to the first message processing module through the interconnect arbitration module. The multiple first messages include the third message.

[0011] In an exemplary embodiment, the first message processing module is further configured to: upon receiving the third message and the abnormal configuration message, verify the abnormal configuration message according to the abnormal configuration information; if the abnormal configuration message passes the verification, discard the abnormal configuration message; determine the message type of the third message; if the message type of the third message is a first type, generate a response abnormal message, send the response abnormal message to the third message processing module, and discard the third message, wherein the response abnormal message is used to indicate that the third message transmission was abnormal; and If the message type of the third message is the second type, the third message is discarded; the abnormal configuration messages that pass the verification are counted by the message reception statistics counter, and a preset value is obtained from the central processing unit, wherein the preset value is used to indicate the number of the plurality of first messages to be received by the first message processing module before the second device is powered on again; it is determined whether the count value of the message reception statistics counter has reached the preset value; if the count value has reached the preset value, it is determined that the plurality of first messages have been discarded, and the power-on prompt information is sent to the central processing unit.

[0012] In an exemplary embodiment, the PCIe switching device includes multiple message processing modules, each connected to a corresponding message distribution module. A first message distribution module among the multiple message distribution modules is connected to a third message processing module among the multiple message processing modules. The first message distribution module is configured to: parse the second message; determine whether the second message is an abnormal message based on the message information; if the second message is determined to be an abnormal message, perform abnormal processing on the second message and prohibit sending the message information and the second message to the message modification module; if the second message is determined not to be an abnormal message, determine the message category of the second message, determine a routing method based on the message category, and send the routing method, the message information, and the second message to the message modification module. The message category includes: unicast message, multicast message, and broadcast message.

[0013] In an exemplary embodiment, the interconnect arbitration module is further configured to: determine the first port number of the third port and the second port number of the fifth port where the third message modification module is located based on the modified message information; match a routing algorithm according to the routing method; calculate the routing path between the second port number and the first port number using the routing algorithm; and route the second message to the second message processing module according to the routing path.

[0014] According to another embodiment of this application, a message processing method is provided, characterized in that it includes: when a second device is detected to be in an abnormal state, discarding a plurality of first messages sent by an interconnect arbitration module to a first message processing module, wherein the interconnect arbitration module is connected to a plurality of first ports of the PCIe switching device, the interconnect arbitration module is used to route messages sent from the plurality of first ports, the first message processing module is located in a second port among the plurality of first ports, and the second port is connected to the second device; when it is determined that all the plurality of first messages have been discarded, sending a power-on prompt message to a central processing unit, wherein the power-on prompt message is used to indicate that the second device can be powered on again.

[0015] According to yet another embodiment of this application, a computer-readable storage medium is also provided, wherein a computer program is stored therein, and the computer program is configured to perform the steps in any of the above method embodiments when it is run.

[0016] According to yet another embodiment of this application, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0017] According to yet another embodiment of this application, a computer program product is also provided, including a computer program that, when executed by a processor, implements the steps of the methods described in various embodiments of this application.

[0018] This application proposes a novel PCIe switching device. The PCIe switching device includes multiple first ports, each connected to a corresponding first device. It also includes a central processing unit (CPU) for sending an exception message to a second port connected to a second device when an exception is detected. The multiple first devices include the second device, and the multiple first ports include the second port. A first message processing module, located in the second port and connected to an interconnect arbitration module, discards multiple first messages sent by the interconnect arbitration module upon receiving the exception message. After determining that these first messages have been discarded, it sends a power-on prompt to the CPU, indicating that the second device can be powered on again. The interconnect arbitration module, connected to the multiple first ports, routes messages sent from these first ports. This solution achieves DPC functionality by setting a DPC message processing module (the aforementioned message processing module) in the PCIe switch and avoids the difficulty of multi-port cabling through the interconnect arbitration module. This solves the problem that traditional DPC implementation methods in related technologies cannot meet the requirements of current PCIe... Switches have issues with the requirement for a large number of ports and poor scalability. Attached Figure Description

[0019] Figure 1 This is a hardware structure block diagram of a computer terminal according to an embodiment of the message processing method of this application;

[0020] Figure 2 This is a block diagram of an optional DPC function implementation according to an embodiment of this application;

[0021] Figure 3 This is a structural block diagram of an optional PCIe switching device according to an embodiment of this application;

[0022] Figure 4 This is a block diagram of another optional DPC function implementation according to an embodiment of this application;

[0023] Figure 5 This is a functional block diagram of an optional PCIe Switch chip according to an embodiment of this application;

[0024] Figure 6 This is a flowchart of a message processing method according to an embodiment of this application. Detailed Implementation

[0025] The embodiments of this application will be described in detail below with reference to the accompanying drawings and examples.

[0026] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0027] The methods and embodiments provided in this application can be executed on a computer terminal or similar computing device. Taking running on a computer terminal as an example, Figure 1 This is a hardware structure block diagram of a computer terminal for a message processing method according to an embodiment of this application. For example... Figure 1 As shown, a computer terminal may include one or more ( Figure 1 Only one is shown in the diagram. A processor 102 (which may include, but is not limited to, a microprocessor MCU or a programmable logic device FPGA, etc.) and a memory 104 for storing data are also shown. The computer terminal may further include a transmission device 106 for communication functions and an input / output device 108. Those skilled in the art will understand that... Figure 1 The structure shown is for illustrative purposes only and does not limit the structure of the computer terminal described above. For example, the computer terminal may also include components that are more complex than those described above. Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown.

[0028] Memory 104 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the buffer partitioning method in this embodiment. Processor 102 executes various functional applications and data processing by running the computer programs stored in memory 104, thus implementing the above-described method. Memory 104 may include high-speed random access memory and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, memory 104 may further include memory remotely located relative to processor 102, and these remote memories can be connected to a computer terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0029] The transmission device 106 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider for the computer terminal. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module used for wireless communication with the Internet.

[0030] The following explains the technical terms used in this application:

[0031] PCIe (Peripheral Component Interconnect Express): A high-speed serial computer expansion bus standard;

[0032] CPU (central processing unit): The core processing unit of a computer;

[0033] Switch (PCIe Switch): A PCIe switching device used to expand PCIe bus ports;

[0034] EP (End Point): PCIe terminal devices, such as graphics cards and sound cards;

[0035] DSP (Downstream Port): The downstream port in a PCIe switch;

[0036] USP (Upstream Port): The upstream port in a PCIe switch;

[0037] BAR (Base Address Register): Located in the PCIe device configuration space, the base address register determines the amount of system memory required by a function and provides a base address for mapping to the function's memory space. The base address register can be mapped to either memory space or I / O space.

[0038] In related technologies, the specific DPC register configuration and event triggering are implemented in the DSP / USP, such as... Figure 2 As shown, assuming that after DPS31 triggers a DPC event, the RX link of DSP31 will no longer send packets to other ports, and other ports, after obtaining the DPC event status of DSP31, will also not send packets to DSP31, thus blocking packet propagation at both the source and destination ends. Simultaneously, when the link state of DSP31 changes from 1 to 0, it will trigger a simultaneous reset of the port and other modules (packet distribution module, multicast packet modification module, arbitration module). Therefore, packets during propagation will also be cleared. This ensures that when the link state is restored, no residual packets will be sent to the EP connected to DSP31 (i.e., the first device mentioned above), preventing EP malfunction.

[0039] by Figure 2Although the architecture shown can implement DPC functionality, the connection methods between the multicast message modification modules and arbitration modules on multiple ports are too complex, making the backend layout quite difficult.

[0040] To address the aforementioned issues, this embodiment provides a PCIe switching device. The PCIe switching device includes multiple first ports, each of which is connected to a corresponding multiple first devices. Figure 3 This is a structural block diagram of a PCIe switching device according to an embodiment of this application, such as... Figure 3 As shown, the device includes:

[0041] The central processing unit 32 is configured to send abnormal information to a second port connected to the second device when an abnormal state is detected in the second device, wherein the plurality of first devices includes the second device and the plurality of first ports includes the second port;

[0042] The first message processing module 34, located in the second port and connected to the interconnect arbitration module, is used to discard multiple first messages sent by the interconnect arbitration module when receiving the abnormal information, and to send a power-on prompt message to the central processing unit when it is determined that all the multiple first messages have been discarded. The interconnect arbitration module is connected to the multiple first ports and is used to route the messages sent from the multiple first ports. The power-on prompt message is used to indicate that the second device can be powered on again.

[0043] This application proposes a novel PCIe switching device. The PCIe switching device includes multiple first ports, each connected to a corresponding first device. It also includes a central processing unit (CPU) for sending an exception message to a second port connected to a second device when an exception is detected. The multiple first devices include the second device, and the multiple first ports include the second port. A first message processing module, located in the second port and connected to an interconnect arbitration module, discards multiple first messages sent by the interconnect arbitration module upon receiving the exception message. After determining that these first messages have been discarded, it sends a power-on prompt to the CPU, indicating that the second device can be powered on again. The interconnect arbitration module, connected to the multiple first ports, routes messages sent from these first ports. This solution achieves DPC functionality by setting a DPC message processing module (the aforementioned message processing module) in the PCIe switch and avoids the difficulty of multi-port cabling through the interconnect arbitration module. This solves the problem that traditional DPC implementation methods in related technologies cannot meet the requirements of current PCIe... Switches have issues with the requirement for a large number of ports and poor scalability.

[0044] Optionally, the PCIe switching device further includes: multiple message distribution modules, respectively disposed on the multiple first ports, for parsing the second message, sending the obtained message information and the second message to the message modification module, wherein the message information is at least used to indicate the receiving port of the second message; multiple message modification modules, connected one-to-one with the multiple message distribution modules, for modifying the message information according to preset modification rules, and sending the modified message information and the second message to the interconnect arbitration module; the interconnect arbitration module, connected to the multiple message modification modules, for determining a third port according to the modified message information, and routing the second message to the second message processing module of the third port.

[0045] The overall architecture of the PCIe switching device is as follows: Figure 4 As shown, the PCIe switching device includes a message distribution module, a multicast message modification module (i.e., the aforementioned message modification module), a DPC message processing module (i.e., the aforementioned message processing module), an interconnect arbitration module, and a CPU (i.e., the aforementioned central processing unit). Optionally, this PCIe switching device has 64 ports, including 1 Upstream Port and 63 Downstream Ports. The receiving ends of the 64 ports parse different types of messages through the message distribution module, and then connect to the interconnect arbitration module through the multicast message modification module. The interconnect arbitration module then sends the received messages to be forwarded to the transmission links of all ports. The data sending ends of the 63 downstream ports connect to the interconnect arbitration module through the DPC message processing module, and then send the data packets to be sent through the port transmission links via the interconnect arbitration module. Based on this architecture, a typical unicast message transmission process is as follows: CPU -> Upstream Port -> Message Distribution Module -> Multicast Message Modification Module -> Interconnect Arbitration Module -> DPC Message Processing Module -> Downstream Port xx -> PCIe EP Device (i.e., the first device mentioned above).

[0046] The message distribution module, a standard module in the PCIe protocol stack for sending and receiving, primarily handles message parsing, acknowledgment, and exception handling at the PCIe transaction layer. It parses PCIe transaction layer (TLP) messages according to the protocol, distinguishing between different message types, such as unicast / multicast / broadcast messages. It then responds to, forwards, or handles exceptions for each message type.

[0047] The multicast message modification module is a standard module for PCIe protocol stack transmission and reception processing. It distributes multicast messages according to the configuration registers of the multicast group (MCG), MC_Receive Register, and MC_Block_All Register, and modifies the destination address of the input multicast message according to the MC_Overlay_BAR Register in the MC_Overlay mechanism.

[0048] The interconnect arbitration module is a crucial component for interconnecting ports within a PCIe switch. It handles multi-data path routing for up to 64 channels, arbitrarily routing input data packets to the destination port number based on the input data packet and the destination port number. This module can adapt to different algorithms to meet varying performance requirements, such as the traditional two-level CLOS routing algorithm or the Spidergon routing algorithm.

[0049] Through the above embodiments, multiple arbitration modules in the prior art are integrated into an interconnected arbitration module, and then the message routing between multiple ports is completed through the interconnected arbitration module. Thus, point-to-point transmission of messages can be completed without cumbersome and complicated wiring methods. As a result, the number of ports of the PCIe switching device is unlimited and can be expanded according to needs.

[0050] Optionally, the central processing unit is further configured to: when the second device is detected to be in an abnormal state, send the abnormal configuration information corresponding to the second port to the fourth port, wherein the plurality of first ports include the second port and the fourth port.

[0051] If a second device among the multiple first devices is detected to be in an abnormal state, the abnormal configuration information corresponding to the second port connected to the second device will be sent to the fourth port, which is a device other than the second device among the multiple first devices. Specifically, the abnormal configuration information may include a flush message type and the destination port (i.e., the second port) ID.

[0052] In this embodiment, when a port malfunctions, other ports are notified so that when other ports need to send messages to this port, they can process the messages accordingly, making it easier for the malfunctioning port to discard these messages.

[0053] Optionally, the PCIe switching device includes multiple message processing modules, all connected to the interconnect arbitration module. The multiple message processing modules include the first message processing module and further include a third message processing module, which is located in the fourth port and is used to generate an abnormal configuration message based on the abnormal configuration information, and send the third message and the abnormal configuration message to the first message processing module through the interconnect arbitration module. The multiple first messages include the third message.

[0054] Each port in a PCIe switching device is equipped with a message processing module for handling DPC events. These message processing modules are all connected to the interconnect arbitration module. The third message processing module among these multiple message processing modules is located in the fourth port. When the fourth port needs to send a message to the second port, it generates an abnormal configuration message based on the abnormal configuration information. Then, the third message to be sent and the abnormal configuration message are sent together through the interconnect arbitration module to the first message processing module.

[0055] In this embodiment, after a DPC event is determined to be triggered, the port generates a flush message (i.e., the above-mentioned abnormal configuration message) that is routed according to the destination port (i.e., the second port) based on the port where the DPC event occurred and the type of flush message configured by the CPU. This message is sent together with the message to be sent so that the receiving end can perform statistics on the received messages based on the flush message.

[0056] Optionally, the first message processing module is further configured to: upon receiving the third message and the abnormal configuration message, verify the abnormal configuration message according to the abnormal configuration information; if the abnormal configuration message passes the verification, discard the abnormal configuration message; determine the message type of the third message; if the message type of the third message is a first type, generate a response abnormal message, send the response abnormal message to the third message processing module, and discard the third message, wherein the response abnormal message is used to indicate that the third message transmission is abnormal; and, in the case of receiving the third message and the abnormal configuration message, verify the abnormal configuration message according to the abnormal configuration information; if the abnormal configuration message passes the verification, discard the abnormal configuration message; wherein the response abnormal message is used to indicate that the third message transmission is abnormal; and, in the case of receiving the third message and the abnormal configuration message, verify the abnormal configuration message according to the abnormal configuration information; if the abnormal configuration message passes the verification, discard the abnormal configuration message; wherein the abnormal configuration message is used to indicate that the third message transmission is abnormal; and, in the case of receiving the third message and the abnormal configuration message, verify the abnormal configuration message according to the abnormal configuration information; if the abnormal configuration message passes the verification, discard the abnormal configuration message; determine the message type of the third message; if the message type of the third message is a first type, generate a response abnormal message, send the response abnormal message to the third message processing module, and discard the abnormal configuration message; wherein the response abnormal message is used to indicate that the third message transmission is abnormal; and, in the case of receiving the third message and the abnormal configuration message, verify the abnormal configuration message according to the abnormal configuration information; if the abnormal configuration message passes the verification, discard the abnormal configuration message; if the abnormal configuration message passes the verification, discard the abnormal configuration message; wherein the response abnormal message is used to indicate that the third message transmission is abnormal; and, in the case of receiving the third message and the abnormal configuration message, verify the abnormal configuration message according to the abnormal configuration information ... If the message type of the third message is type two, the third message is discarded; the abnormal configuration messages that pass the verification are counted by the message reception statistics counter, and a preset value is obtained from the central processing unit, wherein the preset value is used to indicate the number of the plurality of first messages to be received by the first message processing module before the second device is powered on again; it is determined whether the count value of the message reception statistics counter has reached the preset value; if the count value has reached the preset value, it is determined that the plurality of first messages have been discarded, and the power-on prompt information is sent to the central processing unit.

[0057] The second port that triggers the DPC event, upon receiving the message, verifies the flush message received by the DPC message processing module according to the flush message type and destination port ID configured in the CPU. If the verification passes, the flush message reception statistics counter is incremented by 1, and the message is discarded. When the statistics counter value equals the configured value (i.e., the preset value mentioned above), it indicates that flush messages sent from all ports have been received. At this point, the CPU can be notified that all flush messages have been received, and only after this can the device reconnect and come back online.

[0058] During this process, the first message processing module also needs to process the third message as follows: determine the message type of the third message. If the received message type is Non-posted (i.e., the first type mentioned above), it means that the message is a message that requires a response. Then, receive the requester ID and the ID of this port in the message, reply with Compotion CA / UR (i.e., the response exception message mentioned above) according to the DPC response configuration of this port, and then discard the message. If it is the second type, that is, the type that does not require a response, then discard the message directly.

[0059] It should be noted that the main type of Flush message is message, i.e., fmt=3'b001 or 3'b011, which can be configured as type=5'b 1 001 0; it supports 256 different types of message codes and is fully configurable.

[0060] The first message processing module in this embodiment provides a port-expandable, synthesizable, and implementable DPC function solution for a PCIeSwitch. Furthermore, this message processing module possesses flexible configuration and expansion capabilities, supports sending different types of nush messages, and can meet the functional requirements of various application scenarios.

[0061] Optionally, the PC Ie switching device includes multiple message processing modules, each corresponding to one of the multiple message distribution modules. A first message distribution module among the multiple message distribution modules is connected to a third message processing module among the multiple message processing modules. The first message distribution module is used to: parse the second message; determine whether the second message is an abnormal message based on the message information; if the second message is determined to be an abnormal message, perform abnormal processing on the second message and prohibit sending the message information and the second message to the message modification module; if the second message is determined not to be an abnormal message, determine the message category of the second message, determine the routing method based on the message category, and send the routing method, the message information, and the second message to the message modification module. The message category includes: unicast message, multicast message, and broadcast message.

[0062] The message distribution module needs to parse the received second message and determine whether the message is abnormal based on the parsed message information. If it is an abnormal message, it will be handled as an exception and will not be forwarded. If it is not an abnormal message, the message category will be further determined. The message categories include unicast, multicast and broadcast message categories. Different categories of messages correspond to different routing methods. This information and the message will be forwarded together to the message modification module.

[0063] Optionally, the interconnect arbitration module is further configured to: determine the first port number of the third port and the second port number of the fifth port where the third message modification module is located based on the modified message information; match the routing algorithm according to the routing method; calculate the routing path between the second port number and the first port number through the routing algorithm, and route the second message to the second message processing module according to the routing path.

[0064] The interconnection arbitration module routes the message based on its final destination port number (i.e., the first port number mentioned above) and sending port number (i.e., the second port number mentioned above). The specific routing method is as follows: first, the routing algorithm is matched according to the routing method corresponding to the message type; then, the routing path is planned based on the destination port number and sending port number to determine the most suitable routing path; finally, the second message is routed to the second message processing module according to the routing path.

[0065] In this embodiment, an interconnected arbitration module is used to replace multiple arbitration modules in the prior art. This interconnected arbitration module acts as a bridge between the sending end and the receiving end, simplifying the originally complex wiring methods between many ports, allowing the PCIe Switch ports to be freed from the trouble of wiring methods and easily expanded.

[0066] Based on the above embodiments, the improved PCIe Switch architecture of this application, by providing a DPC message processing module in conjunction with an interconnect arbitration module, can easily expand the number of ports and achieve better overall performance. Simultaneously, the flush message sent by the DPC message processing module solves the problem of unrecoverable residual messages caused by the arbitration module's inability to reset residual messages when reconnecting to the network, leading to malfunctions. In addition to supporting residual message discarding and proxying, it also supports configurable flush message types to support different application scenarios.

[0067] To better understand the working principle of the message processing module, the following will combine... Figure 5 The operation steps of the message processing module are explained, such as... Figure 5 As shown, the specific operating steps include:

[0068] 1. Input message data `tlp_rx_data` is fed into the `flush tlp filter&stat` function block to filter and statistically process flush messages. Specifically, depending on the input message type `fmt=3'b001` or `3'b011` (configurable as `type=5'b10010`), the message code and target ID are compared. If all four comparisons pass, it indicates the message is a target flush message. The flush message count counter is incremented, and the counter value is compared to the configured value. If they match, it indicates the flush message reception is complete, all residual messages destined for this port in the interconnect module have been cleared, and a signal is reported to the CPU. Finally, this flush message must be discarded; other message types are output without further action.

[0069] 2. Determine whether a DPC event is triggered on this port, i.e., whether dpc_actived is 1. If dpc_actived is 0, the input data packet is output directly. If dpc_actived is 1, all input data packets are discarded.

[0070] 3. The FIFO RW Ctrl function block determines the type of the input message. If the input message is a non-posted message (i.e., of type Memory Read, IO Read, IO Write, Configuration Read, or ConfigurationWrite), the message header must be stored in the FIFO for subsequent response. When the FIFO is not empty and the output is ready, the message header is read, and a CPL UR / CA is replied according to the configuration. The Requester ID in the CPL uses the Requester ID from the original message, and the Completion ID uses the port ID.

[0071] 4. When the CPU is configured to send a flush message, the flush tlp gen function block uses the local port ID for the RequesterID and the CPU configuration for the destination ID, based on the message type fmt and messagecode configured by the CPU.

[0072] 5. When the CPU is configured to send a flush message, the output will select to send a flush message; otherwise, the output will select to send a CPL message. The final message is output to the DSP's RX link, which will then send it out.

[0073] This embodiment provides a message processing method applied to the aforementioned PCIe switching device. Figure 6 This is a flowchart of a message processing method according to an embodiment of this application, such as... Figure 6As shown, the process includes the following steps:

[0074] Step S602: When the second device is detected to be in an abnormal state, multiple first packets sent by the interconnect arbitration module to the first packet processing module are discarded. The interconnect arbitration module is connected to multiple first ports of the PCIe switching device. The interconnect arbitration module is used to route packets sent from the multiple first ports. The first packet processing module is set in the second port among the multiple first ports. The second port is connected to the second device.

[0075] Step S604: If it is determined that all of the plurality of first messages have been discarded, a power-on prompt message is sent to the central processing unit, wherein the power-on prompt message is used to indicate that the second device can be powered on again.

[0076] Using the above method, when the second device is detected to be in an abnormal state, multiple first packets sent by the Interconnect Arbitration Module to the First Message Processing Module are discarded. The Interconnect Arbitration Module is connected to multiple first ports of the PCIe switch, and it routes packets from these first ports to the destination ports. The First Message Processing Module is located in a second port connected to the second device. After confirming that all first packets have been discarded, a power-on prompt is sent to the central processing unit, indicating that the second device can be powered on again. By employing these steps, the DPC function is completed through the message processing module, and message routing is completed through the Interconnect Arbitration Module. This solves the problem that traditional DPC implementation methods in related technologies cannot meet the current PCIe Switch's requirement for multiple ports and have poor scalability.

[0077] Optionally, the method further includes: parsing the second message to obtain message information; modifying the message information according to a preset modification rule, and sending the modified message information and the second message to the interconnect arbitration module; determining a third port according to the modified message information, and routing the second message to the second message processing module of the third port through the interconnect arbitration module.

[0078] Optionally, the method further includes: when the second device is detected to be in an abnormal state, sending the abnormal configuration information corresponding to the second port to the fourth port, wherein the plurality of first ports include the second port and the fourth port.

[0079] Optionally, the method further includes: generating an abnormal configuration message based on the abnormal configuration information, and sending the third message and the abnormal configuration message to the first message processing module through the interconnection arbitration module, wherein the plurality of first messages include the third message.

[0080] Optionally, the method further includes: upon receiving the third message and the abnormal configuration message, verifying the abnormal configuration message according to the abnormal configuration information; discarding the abnormal configuration message if it passes verification; determining the message type of the third message; generating an acknowledgment abnormal message if the message type of the third message is a first type, sending the acknowledgment abnormal message to the third message processing module, and discarding the third message, wherein the acknowledgment abnormal message is used to indicate that the third message transmission is abnormal; and discarding the third message if the message type of the third message is a second type; counting the verified abnormal configuration messages using a message reception statistics counter, and obtaining a preset value from the central processing unit, wherein the preset value is used to indicate the number of the plurality of first messages to be received by the first message processing module before the second device is powered on again; determining whether the count value of the message reception statistics counter has reached the preset value; and determining that all the plurality of first messages have been discarded if the count value has reached the preset value, and sending the power-on prompt information to the central processing unit.

[0081] Optionally, the method further includes: parsing the second message and determining whether the second message is an abnormal message based on the message information; if the second message is determined to be an abnormal message, performing abnormal processing on the second message and prohibiting the sending of the message information and the second message to the message modification module; if the second message is determined not to be an abnormal message, determining the message category of the second message, determining the routing method based on the message category, and sending the routing method, the message information, and the second message to the message modification module, wherein the message category includes: unicast message, multicast message, and broadcast message.

[0082] Optionally, the method further includes: determining the first port number of the third port and the second port number of the fifth port where the third message modification module is located based on the modified message information; matching a routing algorithm according to the routing method; calculating the routing path between the second port number and the first port number using the routing algorithm; and routing the second message to the second message processing module according to the routing path.

[0083] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0084] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0085] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above method embodiments when run.

[0086] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0087] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0088] In one exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0089] Embodiments of this application also provide a computer program product, including a non-volatile computer-readable storage medium storing the computer program product, wherein the computer program, when executed by a processor, implements the steps of the methods described in various embodiments of this application.

[0090] Specific examples in this embodiment can be found in the examples described in the above embodiments and exemplary implementations, and will not be repeated here.

[0091] Obviously, those skilled in the art should understand that the modules or steps of this application described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. They can be implemented using computer-executable program code, and thus can be stored in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented here, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, this application is not limited to any particular combination of hardware and software.

[0092] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A PCIe switching device, characterized in that, The PCIe switching device includes multiple first ports, each of which is connected to a corresponding first device. include: A central processing unit is configured to send abnormal information to a second port connected to the second device when an abnormal state is detected in the second device, wherein the plurality of first devices includes the second device and the plurality of first ports includes the second port; The first message processing module, located in the second port and connected to the interconnect arbitration module, is used to discard multiple first messages sent by the interconnect arbitration module when receiving the abnormal information, and to send a power-on prompt message to the central processing unit when it is determined that all the multiple first messages have been discarded. The interconnect arbitration module is connected to the multiple first ports and is used to route the messages sent from the multiple first ports. The power-on prompt message is used to indicate that the second device can be powered on again.

2. The PCIe switching device according to claim 1, characterized in that, The PCIe switching device also includes: Multiple message distribution modules are respectively set on the multiple first ports, used to parse the second message, and send the obtained message information and the second message to the message modification module, wherein the message information is at least used to indicate the receiving port of the second message; Multiple message modification modules are connected one-to-one with the multiple message distribution modules, and are used to modify the message information according to preset modification rules, and send the modified message information and the second message to the interconnection arbitration module; The interconnected arbitration module is connected to the plurality of message modification modules and is used to determine the third port based on the modified message information and route the second message to the second message processing module of the third port.

3. The PCIe switching device according to claim 1, characterized in that, The central processing unit is also used for: If the second device is detected to be in an abnormal state, the abnormal configuration information corresponding to the second port is sent to the fourth port, wherein the plurality of first ports include the second port and the fourth port.

4. The PCIe switching device according to claim 3, characterized in that, The PCIe switching device includes multiple message processing modules, all connected to the interconnect arbitration module. The multiple message processing modules include the first message processing module, and further include: The third message processing module, located in the fourth port, is used to generate an abnormal configuration message based on the abnormal configuration information, and send the third message and the abnormal configuration message to the first message processing module through the interconnection arbitration module, wherein the plurality of first messages include the third message.

5. The PCIe switching device according to claim 4, characterized in that, The first message processing module is further configured to: Upon receiving the third message and the abnormal configuration message, the abnormal configuration message is verified based on the abnormal configuration information; If the abnormal configuration message passes the verification, the abnormal configuration message will be discarded. Determine the message type of the third message; If the message type of the third message is the first type, a response error message is generated, the response error message is sent to the third message processing module, and the third message is discarded, wherein the response error message is used to indicate that the third message was sent abnormally; and if the message type of the third message is the second type, the third message is discarded. The error configuration messages that pass the verification are counted by the message reception statistics counter, and a preset value is obtained from the central processing unit. The preset value is used to indicate the number of the plurality of first messages to be received by the first message processing module before the second device is powered on again. Determine whether the count value of the message reception statistics counter has reached the preset value; When the count value reaches the preset value, it is determined that all of the first messages have been discarded, and the power-on prompt message is sent to the central processing unit.

6. The PCIe switching device according to claim 2, characterized in that, The PCIe switching device includes multiple message processing modules, each corresponding to one of the multiple message distribution modules. A first message distribution module among the multiple message distribution modules is connected to a third message processing module among the multiple message processing modules, and is used for: The second message is parsed, and it is determined whether the second message is an abnormal message based on the message information; If the second message is determined to be an abnormal message, the second message is processed abnormally, and the message information and the second message are prohibited from being sent to the message modification module. If it is determined that the second message is not an abnormal message, the message category of the second message is determined, and the routing method is determined according to the message category. The routing method, the message information and the second message are sent to the message modification module. The message category includes: unicast message, multicast message and broadcast message.

7. The PCIe switching device according to claim 6, characterized in that, The interconnected arbitration module is also used for: The first port number of the third port is determined based on the modified message information, and the second port number of the fifth port where the third message modification module is located is determined. The routing algorithm is matched according to the described routing method; The routing algorithm calculates the routing path between the second port number and the first port number, and routes the second packet to the second packet processing module according to the routing path.

8. A message processing method, characterized in that, Applicable to the PCIe switching device according to any one of claims 1 to 7, include: If the second device is detected to be in an abnormal state, multiple first packets sent by the interconnect arbitration module to the first packet processing module are discarded. The interconnect arbitration module is connected to multiple first ports of the PCIe switching device. The interconnect arbitration module is used to route packets sent from the multiple first ports. The first packet processing module is set in a second port among the multiple first ports. The second port is connected to the second device. If it is determined that all of the plurality of first messages have been discarded, a power-on prompt message is sent to the central processing unit, wherein the power-on prompt message is used to indicate that the second device can be powered on again.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method of claim 7.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method of claim 7.

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