Weighted alternating paths in graph for quantum computing

Abstract

A computer-implemented method for extending a set of matching nodes in a partially-matched graph may include obtaining, by a computing system, a partially-matched graph having a matching set, the partially-matched graph including one or more edges and a plurality of nodes, the one or more edges having a matching tag. The method may include obtaining at least two unmatched nodes. The method may include determining an alternating path from a first unmatched node of the at least two unmatched nodes to a second unmatched node of the at least two unmatched nodes, the alternating path including at least one edge of the one or more edges. The method may include inverting a match tag of at least one edge of the alternating path such that the at least two unmatched nodes are included in a match set of the partially matched graph.

Description

[0001] This application is a divisional application of the invention patent application filed on November 29, 2021, with application number 202180081902.0 and invention title "Weighted Alternating Paths in a Graph for Quantum Computing".

[0002] Priority Statement

[0003] This application claims the benefit of priority to U.S. Provisional Application Serial No. 63 / 121,027, filed December 3, 2020, entitled “Algorithm for calculating the cost of weighted alternating paths in a graph for quantum computing,” which is incorporated herein by reference. Technical Field

[0004] This disclosure generally relates to algorithms for calculating the cost of weighted alternating paths in a graph, and more specifically to algorithms for calculating the cost of weighted alternating paths in an error graph of a quantum computing system. Background Technology

[0005] Quantum computing is a computational approach that utilizes quantum effects such as the superposition of ground states and entanglement to perform some calculations more efficiently than classical digital computers. Unlike digital computers, which store and manipulate information in the form of bits (e.g., "1" or "0"), quantum computing systems can manipulate information using qubits ("quantum bits"). A qubit can refer to a quantum device capable of superimposing multiple states (e.g., data in both "0" and "1" states), and / or to the superposition of data itself in multiple states. In conventional terms, the superposition of "0" and "1" states in a quantum system can be represented, for example, as |0〉+b|1〉. The "0" and "1" states of a digital computer are analogous to the |0〉 ground state and |1〉 ground state of a qubit, respectively. Summary of the Invention

[0006] Many aspects and advantages of embodiments of this disclosure will be set forth in part in the description which follows, or may be learned from the description or by practice of the embodiments.

[0007] One example aspect of this disclosure relates to a computer-implemented method for expanding the set of matching nodes in a partially matched graph. The method may include: obtaining a partially matched graph having a matching set by a computing system including one or more computing devices, the partially matched graph comprising one or more edges and a plurality of nodes, the one or more edges having matching labels. The method may include: obtaining at least two non-matching nodes by the computing system. The method may include: determining an alternating path by the computing system from a first non-matching node among the at least two non-matching nodes to a second non-matching node among the at least two non-matching nodes, the alternating path comprising at least one edge among the one or more edges. The method may include: reversing the matching label of at least one edge of the alternating path by the computing system such that the at least two non-matching nodes are included in the matching set of the partially matched graph.

[0008] In some implementations, at least one node can be a boundary node. A boundary node can have an invariant boundary state such that it is neither matched nor isolated. A boundary node can be matched any suitable number of times, such as zero or more times. In some implementations, the algorithm described herein can be configured to discover alternating paths from unmatched nodes to boundary nodes. For example, to discover alternating paths, a boundary node can always be considered an unmatched node, since a boundary node is always available for matching, regardless of any pre-existing matching.

[0009] Another example aspect of this disclosure relates to a method for error detection in a quantum computing system. The method may include: obtaining, by a computing system including one or more computing devices, a matching graph comprising one or more edges and a plurality of nodes, the plurality of nodes corresponding to a plurality of qubits in the quantum computing system, the one or more edges having matching labels. The method may include: obtaining, by the computing system, an error detection signal comprising a first endpoint and a second endpoint, the first endpoint and the second endpoint corresponding to a first qubit and a second qubit among the plurality of qubits. The method may include: determining, by the computing system, an alternating path from the first endpoint to the second endpoint, the alternating path comprising at least one edge among the one or more edges. The method may include: detecting at least one erroneous location in the quantum computing system, by the computing system, at least partially based on the alternating path.

[0010] Another example aspect of this disclosure relates to a quantum computing system. The quantum computing system may include: quantum hardware comprising a plurality of qubits. The quantum hardware may include one or more classical processors. The one or more classical processors are configured to perform operations. The operations may include: obtaining a matching graph comprising one or more edges and a plurality of nodes, the plurality of nodes corresponding to the plurality of qubits, the one or more edges having matching labels. The operations may include: obtaining an error detection signal comprising a first endpoint and a second endpoint, the first endpoint and the second endpoint corresponding to a first qubit and a second qubit among the plurality of qubits. The operations may include: determining an alternating path from the first endpoint to the second endpoint, the alternating path comprising at least one edge among the one or more edges. The operations may include: detecting at least one erroneous location in the quantum hardware, at least in part based on the alternating path.

[0011] Other aspects of this disclosure relate to various systems, methods, apparatuses, non-transitory computer-readable media, computer-readable instructions, and computing devices.

[0012] These and other features, aspects, and advantages of the various embodiments of this disclosure will be better understood by referring to the following description and the appended claims. The accompanying drawings, which are incorporated in and form a part of this specification, illustrate exemplary embodiments of the disclosure and, together with the description, explain the relevant principles. Attached Figure Description

[0013] A detailed description of embodiments for those skilled in the art will be set forth in the specification with reference to the accompanying drawings, in which:

[0014] Figure 1 Depicts an example quantum computing system according to an example embodiment of the present disclosure;

[0015] Figure 2 Depicting an example qubit grid according to an example embodiment of this disclosure;

[0016] Figure 3 Example diagrams depicting exemplary embodiments according to this disclosure;

[0017] Figure 4A and Figure 4B Example diagrams depicting error messages according to exemplary embodiments of the present disclosure;

[0018] Figure 5 A flowchart depicting an example method for expanding a set of matching nodes in a graph for partial matching, according to an example embodiment of the present disclosure;

[0019] Figure 6 A flowchart depicting an example method for error detection in a quantum computing system according to an example embodiment of the present disclosure; and

[0020] Figure 7 An example computing system is described according to an example embodiment of the present disclosure. Detailed Implementation

[0021] Example aspects of this disclosure relate to systems and methods for expanding the matching of partially matched graphs (e.g., matching sets of matched and / or isolated nodes and / or edges) and / or computing the cost of weighted alternating paths in the graph. Specifically, the systems and methods described herein can be used for error detection in quantum computing systems comprising one or more qubits. A graph may include one or more nodes and / or one or more edges. Each edge may be shared by two nodes. For example, each edge may connect a first node to a second node. A graph (e.g., one or more edges) may have a matching set (e.g., a set of nodes and / or edges) such that each edge is either "matched" or "unmatched". Furthermore, the matching set may include nodes that are either matched or isolated. Two nodes are considered matched if they share a matching edge. A node may share at most one matching edge with another node. For example, a node may be linked to at most one matching edge according to the constraints of the graph. As another example, the set of matching edges may be a set of edges that do not share any nodes or vertices with two edges. A node without a matching edge is an isolated node. In some implementations, edges may be weighted edges. For example, each edge may have an associated weight.

[0022] It should be understood that the exemplary aspects of this disclosure are discussed in terms of match labels at reference nodes (e.g., matched nodes versus isolated nodes) and edges (e.g., matched edges versus unmatched edges). In some implementations, only match labels may be used to indicate a match, and a matched node may typically refer to a node that shares a matching edge. Thus, a pair of matched nodes may refer to two nodes with matching edges. Additionally and / or alternatively, node labels may be applied to nodes to indicate whether the node is matched, isolated, and / or unmatched.

[0023] According to exemplary aspects of this disclosure, one or more unmatched nodes may be introduced and / or otherwise represented in the graph. The matching of the graph can be extended to include unmatched nodes. As used herein, an "unmatched node" means a node that is neither matched nor isolated, such as a node not currently included in the matching set of the graph. For example, a partially matched graph may include one or more unmatched nodes that are neither matched nor isolated when the graph is partially matched. Unmatched nodes may only be connected to unmatched edges, but may become matched or isolated in a solution to a partially matched graph. For example, the set of matched nodes and / or edges in a partially matched graph can be extended to include unmatched nodes, for example, by changing the matching labels of the edges in the graph to include some or all of the unmatched nodes. The set of matched nodes and / or edges can be extended while satisfying one or more constraints of the matching. As an example, a constraint may be that a node is part of a matching pair with exactly one other node or is isolated. As another example, a constraint may be that each node can contact at most one matching edge.

[0024] Additionally and / or alternatively, the matching of a graph can be extended by referring to a cost function, such as optimizing (e.g., minimizing and / or maximizing) the cost function. For example, in some implementations, the cost function may be based at least in part on the edge weights of the matching edges. For instance, the cost function may seek to minimize the sum of the edge weights of the set of matching edges. When an edge is included in the matching set, the cost function may reward lower edge weights and / or penalize higher edge weights. As another example, the cost function may be chosen to minimize the cost of an alternating path from the first unmatched node to the second unmatched node.

[0025] Example aspects of this disclosure may include an algorithm for computing a redistribution of matching labels to expand a partial match, given a graph and a partial match of the graph (e.g., the assignment of matching labels covering a subset of nodes and / or edges in the graph). The algorithm can expand a partial match to a complete match through one or more iterations. For example, the algorithm may repeat several iterations until every node and / or edge in the graph has a matching and / or isolated assignment to provide a complete match of the graph.

[0026] Specifically, the algorithm may include: discovering the cost of alternating paths, such as minimum-cost alternating paths, and / or the cost of alternating paths from one unmatched node to another node, such as a second unmatched node. As used herein, an alternating path is a sequence of edges and / or nodes that are alternately labeled as unmatched and matched. Specifically, if the matching labels along the edges of an alternating path terminating at an unmatched node are reversed, the matching remains valid and includes unmatched nodes in addition to each existing matched node. If the alternating path spans two unmatched nodes, both unmatched nodes are included in the new matching when the matching labels are reversed. Furthermore, the total cost of the matched edges changes with the cost of the alternating path. In some implementations, the cost of the alternating path may be the sum of the weights of all unmatched edges in the path minus the sum of the weights of all matched edges in the path. Thus, by augmenting the minimum-cost path, unmatched nodes are included in the matching with the lowest total cost increase. This can be repeated to discover the globally optimal weighted matching. In some implementations, the path cost can be determined by constructing a tree rooted at the unmatched node. Then, for each node reachable through the graph, a minimum-cost alternating path to that node and a path (tree) to that node can be established. This prevents the formation of cycles, which is beneficial for quantum computing applications. In some implementations, the tree can be generated using the Bellman-Ford algorithm, which can be modified to avoid cycles when generating the tree. For example, the algorithm can be modified so that nodes that are ancestors of the current node are not visited as candidates for the next node in the tree.

[0027] According to an example aspect of this disclosure, the algorithm can be applied to error detection in quantum computing systems. For example, the algorithm can be implemented using an error detection and / or error correction system for identifying errors in quantum computing. For instance, in some implementations, nodes in the matching graph can correspond to the positions of one or more qubits in the quantum computing system. The existing matching graph can be a matching graph from a previous time point. As an example, the one or more qubits can be arranged in a grid or array of qubits. For example, nodes in the graph can correspond to the coordinates of qubits within the array of qubits. The weights of the edges in the graph can correspond to the probability of an error at a point in the quantum computing system. These weights can be learned from historical usage data of the quantum computing system, estimated from simulation or design, or established by any other suitable method. For example, higher weights can be assigned to points with a lower probability of error, such that the minimum cost path is also the path most likely to result in an error. The weights can be pre-existing while the quantum computer is running.

[0028] In some implementations, a qubit grid may include one or more computation qubits and one or more auxiliary qubits. For example, in some implementations, the qubit grid may be an interleaved grid of auxiliary qubits and computation qubits. The computation qubits may perform computations for evaluating one or more quantum algorithms. Additionally and / or alternatively, the auxiliary qubits may be configured to monitor the parity of the quantum computing system (e.g., the computation qubits) to detect errors in the quantum computing system.

[0029] For example, in some implementations, the computing system may receive error information including coordinates of the endpoints describing the mismatched parity. For example, the coordinates may correspond to the positions of auxiliary qubits in a qubit grid where the mismatched parity was detected. In some cases, the error information may be received in real time, such as in time slices and / or continuously. For example, each time slice may correspond to a set of quantum gate operations at each qubit of a plurality of qubits. Error information may be received with microsecond-level precision (e.g., half a microsecond). For example, in some embodiments, the computing system may receive error information including pairs of endpoints with mismatched parity in real time.

[0030] Systems and methods according to exemplary aspects of this disclosure can support resolving minimum-cost alternation paths between endpoint pairs. A minimum-cost alternation path can indicate the most probable source of error at the endpoints that leads to a mismatch in parity. Therefore, a minimum-cost alternation path can indicate the location of the computationally faulty qubit. For example, a minimum-cost alternation path may include erratic qubits. In some cases, these errors can propagate via quantum computing, so timely detection and / or correction can be beneficial.

[0031] For illustrative purposes, this document describes exemplary aspects of this disclosure in relation to quantum computing applications and error detection. These exemplary aspects can be helpful in evaluating errors in quantum computing systems. Furthermore, the general problem of weighted matching in the figure may be useful in other applications, including many engineering disciplines. According to this disclosure, the exemplary aspects of this disclosure can be applied to such other applications.

[0032] The systems and methods according to the exemplary aspects of this disclosure can provide numerous technical effects and benefits, including but not limited to improvements in computational techniques (e.g., quantum computing techniques). For example, the exemplary aspects of this disclosure can provide reduced evaluation time for error information, particularly for smaller graphs, such as graphs comprising nodes on the order of orders of magnitude of qubits in an exemplary quantum computing system. This is particularly beneficial in quantum computing applications where rapid resolution of small graph problems may be required. For example, it may be desirable to resolve the two-endpoint error information problem as quickly as possible to meet the precise timing requirements of quantum computing control systems, e.g., fast enough to allow errors to be accounted for and / or corrected. In particular in these cases, the systems and methods according to the exemplary aspects of this disclosure can have reduced evaluation time compared to some existing methods, such as the Blossom algorithm.

[0033] Example embodiments of this disclosure will now be discussed in more detail with reference to the accompanying drawings. As used herein, the term "about" in conjunction with numerical values ​​means within 20% of that value.

[0034] Figure 1 An example quantum computing system 100 is depicted. Example system 100 is an example of a system on one or more classical computers or quantum computing devices at one or more locations, wherein the systems, components, and techniques described below can be implemented. Using the disclosure provided herein, those skilled in the art will understand that other quantum computing architectures or systems can be used without departing from the scope of this disclosure.

[0035] System 100 includes one or more classical processors 104 that communicate data with quantum hardware 102. Quantum hardware 102 includes components for performing quantum computing. For example, quantum hardware 102 includes a quantum system 110, a control device 112, and a readout device 114 (e.g., a readout resonator). Quantum system 110 may include one or more multilevel quantum subsystems, such as qubit registers. In some implementations, the multilevel quantum subsystem may include superconducting qubits, such as flux qubits, charge qubits, transport qubits, gmon qubits, etc.

[0036] The type of multilevel quantum system utilized by system 100 can vary. For example, in some cases, one or more readout devices 114, including those attached to one or more superconducting qubits (e.g., transport qubits, flux qubits, gmon qubits, xmon qubits, or other qubits), may be convenient. In other cases, ion traps, photonic devices, or superconducting cavities may be used (e.g., thereby allowing states to be prepared without the need for qubits). Other examples of implementations of multilevel quantum systems include magnetic flux qubits, silicon quantum dots, or phosphorus impurity qubits.

[0037] Quantum circuits can be constructed and applied to qubit registers included in quantum system 110 via multiple control lines coupled to one or more control devices 112. Example control devices 112 that operate on the qubit registers can be used to implement quantum gates or quantum circuits with multiple quantum gates, such as Pauli gates, Hadamard gates, controlled-NOT (CNOT) gates, controlled-phase gates, T-gates, multi-qubit quantum gates, coupler quantum gates, etc. The one or more control devices 112 can be configured to operate quantum system 110 via one or more corresponding control parameters (e.g., one or more physical control parameters). For example, in some implementations, the multi-level quantum subsystem can be superconducting qubits, and control devices 112 can be configured to provide control pulses to the control lines to generate magnetic fields to adjust the frequency of the qubits.

[0038] Quantum hardware 102 may also include a readout device 114 (e.g., a readout resonator). Measurement results 108 obtained via the measurement device can be provided to classical processor 104 for processing and analysis. In some implementations, quantum hardware 102 may include quantum circuits, and control device 112 and readout device 114 may implement one or more quantum logic gates that operate the quantum system 102 via physical control parameters (e.g., microwave pulses), which are transmitted via wires included in quantum hardware 102. Other examples of control devices include arbitrary waveform generators, where a DAC (digital-to-analog converter) creates the signal.

[0039] Readout device 114 can be configured to perform quantum measurements on quantum system 110 and send the measurement result 108 to classical processor 104. Furthermore, quantum hardware 102 can be configured to receive data from classical processor 104 specifying physical control qubit parameter values ​​106. Quantum hardware 102 can use the received physical control qubit parameter values ​​106 to update the actions of control device 112 and readout device 114 on quantum system 110. For example, quantum hardware 102 can receive data specifying new values ​​representing the voltage strength of one or more DACs included in control device 112 and can update the actions of the DACs on quantum system 110 accordingly. Classical processor 104 can be configured to initialize quantum system 110 to an initial quantum state, for example, by sending data specifying an initial set of parameters 106 to quantum hardware 102.

[0040] The readout device 114 can use the impedance difference to measure the state of an element (e.g., a qubit) in a quantum system, specifically the |0> and |1> states. For example, due to the nonlinearity of the qubit, the resonant frequency of the readout resonator can exhibit different values ​​when the qubit is in state |0> or state |1>. Therefore, the microwave pulse reflected from the readout device 114 carries an amplitude and phase shift depending on the qubit state. In some implementations, a Purcell filter can be used in conjunction with the readout device 114 to block microwave propagation at the qubit frequency.

[0041] Figure 2 An example qubit grid 200 is depicted according to an example embodiment of this disclosure. For example... Figure 2 As shown, the qubit grid 200 can be an interleaved qubit grid of one or more auxiliary qubits 202 (shown as solid circles) and / or one or more computation qubits 204 (shown as unshaded circles). The auxiliary qubits 202 can be configured to measure errors (e.g., parity) in the output of the computation qubits 204. For example, some of the computation qubits 204 may have a time series of quantum gate operations defining a quantum algorithm spanning some or all of the computation qubits 204. Errors in the execution of these quantum gate operations can propagate through the qubit grid 200 and are eventually detected at the auxiliary qubits 202 via parity checks. Error information, including endpoints corresponding to the coordinates of the auxiliary qubits 202 responsible for error detection, is then generated and / or transmitted to a control system for error detection and / or correction.

[0042] Figure 3 Example Figure 300 depicts an exemplary embodiment according to the present disclosure. Figure 300 includes nodes 302 and edges 304. According to an exemplary aspect of the present disclosure, node 302 may correspond to an auxiliary qubit in a quantum computing system. Figure 3 As shown, node 302 can be connected via edge 304. Some or all of edge 304 can be associated with computational qubit 305. For example, according to an exemplary aspect of this disclosure, if an error message is received that includes two nodes 302 as endpoints, the computational qubit 305 responsible for the error can be associated with edge 304 of the minimum-cost alternating path between the two nodes (e.g., matching).

[0043] Figure 4A and Figure 4B Example figures 400 and 450 depict error messages according to exemplary embodiments of the present disclosure. For example, Figure 4AAn example graph 400 is depicted, including error endpoints 402, 404, 406, and 408. Graph 400 may include nodes 410 and edges 420. Nodes may correspond to auxiliary qubits. Additionally and / or alternatively, some or all of the edges 420 may represent computational qubits. For example, in some implementations, each edge 420 may represent a single computational qubit. Additionally and / or alternatively, in some implementations, edges may represent errors affecting more than one qubit (e.g., auxiliary qubits and computational qubits). As shown, each node 410 can be connected to one or more other nodes 410 via edges 420. In some implementations, each edge 420 may have associated weights. Endpoints 402, 404, 406, and 408 may correspond to auxiliary qubits that detect errors, such as auxiliary qubits that fail parity checks.

[0044] Figure 4B Example Figure 450 depicts a larger number of endpoints 452 than Figure 400. For example, Figure 450 illustrates how the complexity of finding the error location can increase as the number of endpoints 452 increases. For example, as from... Figure 4A and Figure 4B The comparison makes it understandable that solving a graph 400 with fewer endpoints (e.g., assigning matching edges to it) can be easier than solving a graph 400 with fewer endpoints (e.g., assigning matching edges to it) compared to a graph 450 which includes a larger number of endpoints 452. For example, it can be easily inferred (without considering weights) that edge 422 matches endpoints 402 and 404, and edge 424 most likely matches endpoints 406 and 408. However, as from... Figure 4B As can be seen from this, assigning a match to Figure 450 may be computationally more complex.

[0045] Example aspects of this disclosure can support the determination of matches in Figures 400 and / or 450. For example, systems and methods according to example aspects of this disclosure can assign a match label of “match” or “mismatch” (or other similar binary quality) to edge 420, such that each endpoint (e.g., 402-408) is included in the match. For example, systems and methods according to example aspects of this disclosure can discover minimum-cost alternating paths from a first mismatch node (e.g., a first endpoint) to a second mismatch node (e.g., a second endpoint). For example, a minimum-cost alternating path can include an edge corresponding to the qubit most likely to have led to the erroneous endpoint. Match labels along the alternating path can be reversed to obtain a new optimal (e.g., minimum-cost) match including the mismatch node. This can be repeated until an overall optimal (e.g., most likely) solution is obtained. In this way, the propagation of errors and / or multiple errors through the system can be continuously considered while the quantum computing system is running.

[0046] Figure 5A flowchart depicts an example method 500 for expanding a set of matching nodes in a graph for partial matching, according to an example embodiment of this disclosure. Although for illustrative and discussion purposes... Figure 5 The steps are described in a specific order, but the method of this disclosure is not limited to the specifically described order or arrangement. Without departing from the scope of this disclosure, the various steps of method 500 may be omitted, rearranged, combined, and / or adapted in various ways.

[0047] Method 500 may include, at 502, (e.g., via a computing system including one or more computing devices) obtaining a partially matched graph comprising one or more edges and a plurality of nodes. The one or more edges may have matches. For example, a match label may be assigned to the one or more edges, indicating whether the edge is matched or not. For example, in some implementations, for each edge, a match may be or may include a match label indicating either a matched edge with a matching condition or a non-matching edge with a non-matching condition. The graph may define matched nodes and / or edges according to some constraints. For example, in some implementations, the graph is matched such that each of the plurality of nodes contacts at most one matched edge.

[0048] In some implementations, each of the one or more edges may include a weight. For example, in some implementations, such as in a graph corresponding to multiple qubits, each edge may be weighted based on the probability of error at that edge. For example, in some implementations, the edge weights may be established at least in part based on previous analysis and / or simulation of the quantum computing system. In some implementations, the weights may be inversely correlated with the probability of error. For example, edges with a low probability of error may have a high weight.

[0049] Method 500 may include, at 504, (e.g., via a computing system) obtaining at least two mismatched nodes. For example, the at least two mismatched nodes may be new nodes, such as nodes that were not in the graph before the at least two mismatched nodes were obtained. Additionally and / or alternatively, the at least two mismatched nodes may be existing nodes with an updated state, such as nodes that have switched from being previously matched (e.g., matched and / or mismatched) to mismatched. In some implementations, the at least two mismatched nodes may be or may be endpoints (e.g., a first endpoint and / or a second endpoint) included in error information from the quantum computing system.

[0050] Method 500 may include, at 506, determining, by the computing system, an alternating path from a first mismatched node among the at least two mismatched nodes to a second mismatched node among the at least two mismatched nodes. The alternating path may include at least one edge among the one or more edges. For example, the alternating path may alternate between matching edges and non-matching edges. As an example, the order of the edges from the first mismatched node to the second mismatched node may alternate between matching edges and non-matching edges. In some implementations, for an alternating path with only one edge, that edge may be either matching or non-matching.

[0051] In some implementations, the alternating path can be the minimum-cost alternating path. For example, in some implementations, the cost of the alternating path can be the sum of the mismatch weights of the mismatched edges in the alternating path, wherein the sum of the matching weights of the matching edges in the alternating path is subtracted from the sum of the mismatch weights. For example, in an implementation of quantum computing error detection, the alternating path according to this cost function can therefore correspond to the most probable erroneous path.

[0052] In some implementations, determining an alternating path from a first mismatched node among the at least two mismatched nodes to a second mismatched node among the at least two mismatched nodes includes: determining, by a computational system, a tree having multiple alternating paths from the first mismatched node to each of the plurality of nodes; and selecting an alternating path from the tree. For example, a tree of alternating paths from a selected mismatch pattern to each node in the graph can be determined. Additionally and / or alternatively, the alternating path can be a minimum-cost alternating path. Thus, an alternating path leading to the second mismatched node can be selected. A tree of alternating paths is advantageous in avoiding cycles, which is particularly beneficial in quantum computing applications. For example, in some implementations, none of the multiple alternating paths may include cycles. In two or more instances, cycles may exist in paths using a single edge. As another example, a cycle may occur twice or more in a path including a single node. A tree of alternating paths can be determined by any suitable algorithm. For example, in some implementations, determining a tree including multiple alternating paths is performed by applying the Bellman-Ford algorithm. The Bellman-Ford algorithm can be modified to prevent the formation of cycles, for example, by selecting only paths that do not contain cycles. For example, you can prevent the algorithm from accessing nodes that are ancestors of the current node.

[0053] Method 500 may include, at 508, reversing the matching label of at least one edge of the alternating path. For example, once the alternating path is identified, the matching label of each edge along the alternating path can be reversed. For example, a matching edge along the alternating path can be reversed to a non-matching edge, and / or a non-matching edge along the alternating path can be reversed to a matching edge. According to an exemplary aspect of this disclosure, reversing the matching label along an alternating path from a first non-matching node to a second non-matching node can expand the matching set of the graph to include non-matching nodes while remaining valid for existing nodes. Furthermore, if the minimum-cost alternating path is reversed, the new matching may be the overall optimal matching (e.g., defined by a cost function).

[0054] Figure 6 A flowchart depicts an example method 600 for error detection in a quantum computing system according to an example embodiment of the present disclosure. Although for illustrative and discussion purposes... Figure 6 The steps described are executed in a specific order, but the method of this disclosure is not limited to the specific order or arrangement described. Without departing from the scope of this disclosure, the various steps of method 600 may be omitted, rearranged, combined and / or adapted in various ways.

[0055] Method 600 may include, at 602, (e.g., via a computing system including one or more computing devices) obtaining a matching graph comprising one or more edges and a plurality of nodes. The one or more edges may have matches. For example, a matching label may be assigned to the one or more edges, indicating whether the edge is matched or not. For example, in some implementations, for each edge, a match may be or may include a matching label indicating either a matched edge with a matching condition or a non-matching edge with a non-matching condition. The graph may define matching nodes and / or edges according to some constraints. For example, in some implementations, the graph is matched such that each of the plurality of nodes contacts at most one matching edge.

[0056] The plurality of nodes may correspond to a plurality of qubits in a quantum computing system. For example, in some implementations, the plurality of qubits may correspond to an interleaved grid of qubits. The interleaved grid may include a plurality of computational qubits interleaved with a plurality of auxiliary qubits. For example, each node may correspond to an auxiliary qubit. Additionally and / or alternatively, each of the one or more edges may correspond to a computational qubit. Figure 2 An example qubit grid is shown. Based on example aspects of this disclosure, any suitable qubit grid and / or other multiple qubits can be employed.

[0057] In some implementations, each of the one or more edges may include a weight. For example, in some implementations, each edge may be weighted based on the error probability at that edge and / or at the nodes (e.g., qubits) of that edge. For example, in some implementations, the edge weights may be established at least in part based on previous analysis and / or simulation of the quantum computing system. In some implementations, the weights may be inversely correlated with the error probability. For example, edges with a low error probability may have a high weight.

[0058] Method 600 may include, at 604, (e.g., via a computing system) obtaining error detection signals describing the first endpoint and the second endpoint. For example, in some implementations, the first endpoint and / or the second endpoint may be mismatched nodes in a matching graph. The first endpoint and the second endpoint may correspond to a first qubit and a second qubit in a plurality of qubits. For example, in some implementations, each of the first endpoint and the second endpoint corresponds to an auxiliary qubit. The computing system may receive error information including the coordinates of the endpoints describing the mismatch parity. For example, the endpoints may correspond to the positions of auxiliary qubits in a qubit grid where the mismatch parity was detected. In some cases, the error information including the endpoints may be received in real time, for example, in time slices and / or continuously. For example, each time slice may correspond to a set of quantum gate operations at each qubit in a plurality of qubits. The error information may be received with microsecond-level precision. For example, in some embodiments, the computing system may receive error information including pairs of endpoints with mismatch parity in real time.

[0059] Method 600 may include, at 606, (e.g., via a computing system) determining an alternating path from the first endpoint to the second endpoint. The alternating path may include at least one edge from the one or more edges. For example, the alternating path may alternate between matching and non-matching edges. For example, the order of the edges from the first endpoint to the second endpoint may alternate between matching and non-matching edges. In some implementations, for an alternating path with only one edge, that edge may be either matching or non-matching.

[0060] In some implementations, the alternating path can be the minimum-cost alternating path. For example, in some implementations, the cost of the alternating path can be the sum of the mismatch weights of the mismatched edges in the alternating path, wherein the sum of the matching weights of the matching edges in the alternating path is subtracted from the sum of the mismatch weights. For example, in an implementation of quantum computing error detection, the alternating path according to this cost function can therefore correspond to the most probable erroneous path.

[0061] In some implementations, determining an alternating path from a first endpoint of the at least two endpoints to a second endpoint of the at least two endpoints includes: determining, by the computing system, a tree having multiple alternating paths from the first endpoint to each of the plurality of nodes; and selecting an alternating path from the tree. For example, a tree of alternating paths from a selected mismatch pattern to each node in the graph can be determined. Additionally and / or alternatively, the alternating path can be a minimum-cost alternating path. Thus, an alternating path leading to the second endpoint can be selected. Alternating path trees are advantageous for avoiding cycles, which is particularly beneficial in quantum computing applications. For example, in some implementations, none of the multiple alternating paths may include a cycle. The tree of alternating paths can be determined by any suitable algorithm. For example, in some implementations, determining a tree including multiple alternating paths is performed by applying the Bellman-Ford algorithm. The Bellman-Ford algorithm can be modified to prevent the formation of cycles, for example, by selecting only paths that do not contain cycles.

[0062] Method 600 may include, at 608, detecting at least one erroneous location in the quantum computing system, at least in part, based on alternating paths. For example, the alternating paths may be compared with the plurality of qubits to identify the erroneous location in the quantum computing. As an example, a matching edge may indicate an unstable qubit. Therefore, the erroneous location may correspond to, for example, a qubit index, coordinates, and / or other identifiers.

[0063] In some implementations, method 600 may further include, at 610, the computational system correcting the quantum measurement from the at least one erroneous location at the quantum computing system. For example, in some implementations, the erroneous quantum algorithm can be rerun to correct the error. As another example, in some implementations, the measurement from the erroneous location can be corrected, and the quantum algorithm can continue to be evaluated with the corrected value.

[0064] Figure 7 A block diagram of an example computing system 1000 is depicted, which can be used to implement systems and methods according to example embodiments of this disclosure, for example, referring to... Figure 1 The system discussed. System 1000 includes a control system 1010 and a quantum computing system 1030 communicatively coupled via a network 1050. One or more aspects of any of the methods described herein can be implemented on the control system 1010 and / or the quantum computing system 1030.

[0065] The control system 1010 may include any type of computing device (e.g., a classical computing device). The control system 1010 includes one or more processors 1012 and a memory 1014. The one or more processors 1012 may include any suitable processing device (e.g., a processor core, microprocessor, ASIC, FPGA, controller, microcontroller, etc.) and may be a single processor or multiple processors operatively connected. The memory 1014 may include one or more non-transitory computer-readable storage media, such as RAM, ROM, EEPROM, EPROM, flash memory devices, disks, etc., and combinations thereof. The memory 1014 may store data 1016 (e.g., qubit parameters, measurements, etc.) and instructions 1018, which are executed by the processor 1012 to cause the control system 1010 to perform operations, such as one or more aspects of any of the methods disclosed herein. According to an example embodiment of this disclosure, the control system 1010 may be configured to process error information 1020 obtained by measuring the output of a quantum system (e.g., quantum system 1040) to identify errors in quantum computing.

[0066] Quantum computing system 1030 includes one or more processors 1032 and memory 1034. The one or more processors 1032 may include suitable processing devices (e.g., processor cores, microprocessors, ASICs, FPGAs, controllers, microcontrollers, etc.) and may be a single processor or multiple processors operatively connected. Memory 1034 may include one or more non-transitory computer-readable storage media, such as RAM, ROM, EEPROM, EPROM, flash memory devices, disks, etc., and combinations thereof. Memory 1034 may store data 1036 and instructions 1038, which are executed by processor 1032 to cause quantum computing system 1030 to perform operations, such as implementing a quantum circuit with one or more quantum gates on a quantum system 1040 having multiple qubits and obtaining associated measurements (e.g., error messages 1020). Quantum computing system 1030 may be similar to reference [reference missing]. Figure 1 The quantum computing system discussed and described. Other suitable quantum computing systems may be used without departing from the scope of this disclosure.

[0067] Network 1050 can be any type of communication network, such as a local area network (e.g., intranet), a wide area network (e.g., the Internet), or some combination thereof, and can include any number of wired or wireless links. Generally, communication on network 1050 can be performed via any type of wired and / or wireless connection using various communication protocols (e.g., TCP / IP, HTTP, SMTP, FTP), encodings or formats (e.g., HTML, XML), and / or protection schemes (e.g., VPN, Secure HTTP, SSL). In some implementations, network 1050 can be omitted, allowing control system 1010 to communicate directly with quantum computing system 1030 via signals.

[0068] The digital, classical, and / or quantum themes described in this specification, as well as the implementations of digital functional operations and quantum operations, can be implemented in digital electronic circuits, suitable quantum circuits, or more generally, in quantum computing systems, as physically implemented digital and / or quantum computer software or firmware, as digital and / or quantum computer hardware (including the structures disclosed in this specification and their structural equivalents), or as a combination of one or more of them. The term "quantum computing system" can include, but is not limited to, quantum computer / computing systems, quantum information processing systems, quantum cryptography systems, or quantum simulators.

[0069] The implementation of the digital and / or quantum themes described in this specification can be implemented as one or more digital and / or quantum computer programs, i.e., one or more modules of digital and / or quantum computer program instructions encoded on a tangible, non-transitory storage medium, for execution by a data processing device or for controlling the operation of a data processing device. The digital and / or quantum computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access storage device, one or more qubit / qubit structures, or a combination of one or more of these. Alternatively or additionally, the program instructions can be encoded on an artificially generated propagation signal (e.g., a machine-generated electrical, optical, or electromagnetic signal) capable of encoding digital and / or quantum information, which is generated to encode digital and / or quantum information for transmission to a suitable receiver device for execution by the data processing device.

[0070] The terms quantum information and quantum data refer to information or data carried, held, or stored by quantum systems, the smallest nontrivial system being a qubit, i.e., a system that defines a unit of quantum information. It should be understood that the term "qubit" encompasses all quantum systems that can be appropriately approximated as a two-level system in the corresponding context. Such quantum systems can include multi-level systems, for example, having two or more energy levels. For example, such systems can include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational ground state is identified by the ground state and the first excited state; however, it should be understood that other settings are possible that identify the computational state using higher-order excited states (e.g., qubits).

[0071] The term "data processing device" refers to digital and / or quantum data processing hardware and encompasses all kinds of devices, apparatuses, and machines for processing digital and / or quantum data, including programmable digital processors, programmable quantum processors, digital computers, quantum computers, or multiple digital and quantum processors or computers, and combinations thereof. The device may also be or further include special-purpose logic circuitry, such as FPGAs (Field-Programmable Gate Arrays) or ASICs (Application-Specific Integrated Circuits), or a quantum simulator, i.e., a quantum data processing device designed to simulate or generate information about a particular quantum system. Specifically, a quantum simulator is a special-purpose quantum computer that does not have the capability to perform general-purpose quantum computing. In addition to the hardware, the device may optionally include code that creates an execution environment for digital and / or quantum computer programs, such as code constituting processor firmware, protocol stacks, database management systems, operating systems, or combinations thereof.

[0072] Digital or classical computer programs (also referred to or described as programs, software, software applications, modules, software modules, scripts, or code) can be written in any form of programming language, including compiled or interpreted languages ​​or declarative or procedural languages, and can be deployed in any form, including as standalone programs or as modules, components, subroutines, or other units suitable for digital computing environments. Quantum computer programs (also referred to or described as programs, software, software applications, modules, software modules, scripts, or code) can be written in any form of programming language, including compiled or interpreted languages ​​or declarative or procedural languages, and can be translated into a suitable quantum programming language, or can be written in a quantum programming language (e.g., QCL, Quipper, Cirq, etc.).

[0073] Digital and / or quantum computer programs may, but do not need to, correspond to files in a file system. Programs may be stored as a portion of a file containing other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple collaborative files (e.g., a file storing one or more modules, subroutines, or code sections). Digital and / or quantum computer programs may be deployed to execute on a single digital or quantum computer, or on multiple digital and / or quantum computers located in one location or distributed across multiple locations and interconnected via digital and / or quantum data communication networks. A quantum data communication network is understood as a network that can transmit quantum data using quantum systems (e.g., qubits). Typically, digital data communication networks cannot transmit quantum data; however, quantum data communication networks can transmit both quantum data and digital data.

[0074] The processes and logical flows described in this specification can be executed by one or more programmable digital and / or quantum computers, operating where appropriate with one or more digital and / or quantum processors, to execute one or more digital and / or quantum computer programs to perform functions by manipulating input digital and quantum data and generating outputs. The processes and logical flows can also be executed by dedicated logic circuits, and the device can be implemented as dedicated logic circuits, such as FPGAs or ASICs or quantum simulators, or executed by a combination of dedicated logic circuits or quantum simulators and one or more programmable digital and / or quantum computers.

[0075] For a system of one or more digital and / or quantum computers or processors, being "configured to" or "operable to" perform a specific operation or action means that the system has software, firmware, hardware, or a combination thereof installed thereon that, when operated, causes the system to perform said operation or action. One or more digital and / or quantum computer programs being configured to perform a specific operation or action means that one or more programs include instructions that, when executed by a digital and / or quantum data processing device, cause the device to perform the operation or action. A quantum computer can receive instructions from a digital computer that, when executed by a quantum computing device, cause the device to perform an operation or action.

[0076] Digital and / or quantum computers suitable for executing digital and / or quantum computer programs can be based on general-purpose or special-purpose digital and / or quantum microprocessors or both, or any other type of central digital and / or quantum processing unit. Typically, the central digital and / or quantum processing unit receives instructions and digital and / or quantum data from read-only memory, or random access memory, or a quantum system suitable for transmitting quantum data (e.g., photons), or a combination thereof.

[0077] Some example elements of a digital and / or quantum computer are a central processing unit (CPU) for executing instructions and one or more storage devices for storing the instructions and digital and / or quantum data. The CPU and memory may be supplemented or incorporated into dedicated logic circuitry or a quantum simulator. Typically, a digital and / or quantum computer will also include, or be operatively coupled (to receive, transmit, or both of digital and / or quantum data) to, one or more high-capacity storage devices (e.g., magnetic disks, magneto-optical disks, or optical disks, or quantum systems suitable for storing quantum information) for storing the digital and / or quantum data. However, digital and / or quantum computers do not require such devices.

[0078] Digital and / or quantum computer-readable media suitable for storing digital and / or quantum computer program instructions and digital and / or quantum data include all forms of non-volatile digital and / or quantum memories, media, and storage devices, such as: semiconductor storage devices, such as EPROM, EEPROM, and flash storage devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; CD-ROMs and DVD-ROMs; and quantum systems, such as trapped atoms or electrons. To understand this, a quantum memory is a device capable of storing quantum data for long periods of time with high fidelity and efficiency, for example, using a light-matter interface for transmission, and a substance for storing and preserving quantum characteristics (e.g., superposition or quantum coherence) of the quantum data.

[0079] Control of the various systems or portions thereof described in this specification may be implemented in a digital and / or quantum computer program product comprising instructions stored on one or more tangible, non-transitory machine-readable storage media and executable on one or more digital and / or quantum processing devices. The systems or portions thereof described in this specification may each be implemented as an apparatus, method, or electronic system, which may include one or more digital and / or quantum processing devices and a memory storing executable instructions to perform the operations described in this specification.

[0080] While this specification contains numerous specific implementation details, these should not be construed as limiting the scope of the claims, but rather as descriptions of features that may be specific to a particular implementation. Some features described in this specification in the context of an independent implementation may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented individually in multiple implementations or in any suitable sub-combination. Furthermore, although features may be described above as functioning in some combinations, and even initially claimed in this way, one or more features from a claimed combination may, in some cases, be removed from that combination, and the claimed combination may be for sub-combinations or variations thereof.

[0081] Similarly, although operations are described in a specific order in the accompanying drawings, this should not be construed as requiring such operations to be performed in the specific order or sequence shown, or requiring all shown operations to be performed to obtain the desired result. In some cases, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above implementation should not be interpreted as requiring such separation in all implementations. It should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0082] Specific implementations of the subject matter have been described. Other embodiments are within the scope of the following claims. For example, the actions described in the claims can be performed in a different order and the desired result can still be obtained. As an example, the processes depicted in the figures do not necessarily require the specific order or sequence shown to achieve the desired result. In some cases, multitasking and parallel processing may be advantageous.

Claims

1. A method for error detection in a quantum computing system, the method comprising: obtaining, by a computing system comprising one or more computing devices, a matching graph comprising one or more edges and a plurality of nodes, the plurality of nodes corresponding to a plurality of qubits of a quantum computing system, the one or more edges having a matching label; obtaining, by the computing system, an error detection signal comprising a first endpoint and a second endpoint, the first and second endpoints corresponding to a first qubit and a second qubit of the plurality of qubits; determining, by the computing system, an alternating path from the first endpoint to the second endpoint, the alternating path comprising at least one edge of the one or more edges; and detecting, by the computing system, at least one error location in the quantum computing system based at least in part on the alternating path. correcting, by the computing system, a quantum measurement from the at least one error location at the quantum computing system.

2. The method of claim 1, further comprising: the plurality of qubits comprises a staggered grid of qubits comprising a plurality of computational qubits staggered with a plurality of ancilla qubits.

3. The method of claim 1 or 2, wherein, each of the first and second endpoints corresponds to an ancilla qubit.

4. The method of any of claims 1 to 3, wherein, each of the one or more edges corresponds to a computational qubit.

5. The method of any of claims 1 to 4, wherein, determining, by the computing system, an alternating path from the first endpoint to the second endpoint comprises:

6. The method of any of claims 1 to 5, wherein, determining, by the computing system, a tree comprising a plurality of alternating paths from the first endpoint to each of the plurality of nodes; and selecting, from the tree, an alternating path that terminates at the second endpoint. each of the one or more edges comprises a weight, and wherein the weight is based at least in part on a likelihood of an error.

7. The method of any of claims 1 to 6, wherein, the alternating path comprises a minimum cost alternating path.

8. The method of any of claims 1 to 7, wherein, the matching label indicates one of a matching edge having a matching condition or a non-matching edge having a non-matching condition, and wherein the alternating path alternates between matching edges and non-matching edges.

9. The method of any of claims 1 to 8, wherein, a cost of the alternating path comprises a sum of non-matching weights of non-matching edges in the alternating path, wherein a sum of matching weights of matching edges in the alternating path is subtracted from the sum of non-matching weights.

10. The method of any of claims 1 to 9, wherein, at least one of the first or second endpoints comprises a boundary node.

11. The method of any of claims 1 to 10, wherein, 12. A quantum computing system comprising: quantum hardware comprising a plurality of qubits; and one or more classical processors; wherein the one or more classical processors are configured to perform operations comprising: obtaining a matching graph comprising one or more edges and a plurality of nodes, the plurality of nodes corresponding to the plurality of qubits, the one or more edges having a matching label; obtaining an error detection signal comprising a first endpoint and a second endpoint, the first and second endpoints corresponding to a first qubit and a second qubit of the plurality of qubits; determining an alternating path from the first endpoint to the second endpoint, the alternating path comprising at least one edge of the one or more edges; and detecting at least one error location in the quantum hardware based at least in part on the alternating path. at least one of the first or second endpoints comprises a boundary node. ​ 13. The quantum computing system of claim 12, wherein, ​ 14. A computer-implemented method for expanding a set of matching nodes in a partially matched graph, the method comprising: obtaining, by a computing system comprising one or more computing devices, a partially matched graph having a matching set, the partially matched graph comprising one or more edges and a plurality of nodes, the one or more edges having matching labels; obtaining, by the computing system, at least two unmatched nodes; determining, by the computing system, an alternating path from a first unmatched node of the at least two unmatched nodes to a second unmatched node of the at least two unmatched nodes, the alternating path comprising at least one edge of the one or more edges, wherein the alternating path is one of a plurality of alternating paths in a tree from the first unmatched node to each node of the plurality of nodes, wherein in the tree, the second unmatched node is not an ancestor of the first unmatched node; and reversing, by the computing system, a matching label of at least one edge of the alternating path such that the at least two unmatched nodes are included in the matching set of the partially matched graph.

15. The method of claim 14, wherein, determining, by the computing system, an alternating path from a first unmatched node of the at least two unmatched nodes to a second unmatched node of the at least two unmatched nodes comprises: determining, by the computing system, a tree comprising a plurality of alternating paths from the first unmatched node to each node of the plurality of nodes; and selecting, by the computing system, the alternating path from the tree.

16. The method of claim 15, wherein, determining, by the computing system, the tree comprising the plurality of alternating paths is performed by applying a Bellman-Ford algorithm to the partially matched graph.

17. The method of claim 14, wherein, each edge of the one or more edges comprises a weight.

18. The method of claim 14, wherein, the alternating path comprises a minimum cost alternating path.

19. The method of claim 14, wherein, the matching label indicates one of a matching edge having a matching condition or an unmatched edge having an unmatched condition, and wherein the alternating path alternates between matching edges and unmatched edges.

20. The method of claim 14, wherein, matching the graph such that each node of the plurality of nodes is incident to at most one matching edge.

21. A quantum computing system comprising: quantum hardware comprising a plurality of qubits; and one or more classical processors; wherein the one or more classical processors are configured to perform operations comprising: obtaining a partially matched graph comprising one or more edges and a plurality of nodes, the plurality of nodes corresponding to the plurality of qubits, the one or more edges having matching labels; obtaining at least two unmatched nodes; determining an alternating path from a first unmatched node of the at least two unmatched nodes to a second unmatched node of the at least two unmatched nodes, the alternating path comprising at least one edge of the one or more edges, wherein the alternating path is one of a plurality of alternating paths in a tree from the first unmatched node to each node of the plurality of nodes, wherein in the tree, the second unmatched node is not an ancestor of the first unmatched node; and reversing a matching label of at least one edge of the alternating path such that the at least two unmatched nodes are included in the matching set of the partially matched graph.

22. The quantum computing system of claim 21, wherein, determining an alternating path from a first unmatched node of the at least two unmatched nodes to a second unmatched node of the at least two unmatched nodes includes: determining a tree including a plurality of alternating paths from the first unmatched node to each node of the plurality of nodes; and selecting the alternating path from the tree.

23. The quantum computing system of claim 22, wherein, determining the tree including the plurality of alternating paths is performed by applying a Bellman-Ford algorithm to the partially matched graph.

24. The quantum computing system of claim 21, wherein, each edge of the one or more edges includes a weight.

25. The quantum computing system of claim 21, wherein, the alternating path includes a minimum cost alternating path.

26. The quantum computing system of claim 21, wherein, the matching label indicates one of a matching edge having a matching condition or an unmatched edge having a non-matching condition, and wherein the alternating path alternates between matching edges and unmatched edges.

27. The quantum computing system of claim 21, wherein, matching the graph such that each node of the plurality of nodes is incident to at most one matching edge.

28. One or more tangible, non-transitory computer-readable media storing computer-readable instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising: obtaining, by a computing device comprising one or more processors, a partially matched graph including one or more edges and a plurality of nodes, the plurality of nodes corresponding to a plurality of qubits, the one or more edges having a matching label; obtaining, by the computing device, at least two unmatched nodes; determining, by the computing device, an alternating path from a first unmatched node of the at least two unmatched nodes to a second unmatched node of the at least two unmatched nodes, the alternating path including at least one edge of the one or more edges, wherein the alternating path is one of a plurality of alternating paths in a tree from the first unmatched node to each node of the plurality of nodes, wherein in the tree the second unmatched node is not an ancestor of the first unmatched node; and reversing, by the computing device, the matching label of at least one edge of the alternating path such that the at least two unmatched nodes are included in a matching set of the partially matched graph.

29. The one or more tangible, non-transitory computer-readable media of claim 28, wherein, determining, by the computing device, an alternating path from a first unmatched node of the at least two unmatched nodes to a second unmatched node of the at least two unmatched nodes includes: determining, by the computing device, a tree including a plurality of alternating paths from the first unmatched node to each node of the plurality of nodes; and selecting, by the computing device, the alternating path from the tree.

30. The one or more tangible, non-transitory computer-readable media of claim 29, wherein, determining, by the computing device, the tree including the plurality of alternating paths is performed by applying a Bellman-Ford algorithm to the partially matched graph.

31. The one or more tangible, non-transitory computer-readable media of claim 28, wherein, each edge of the one or more edges includes a weight.

32. The one or more tangible, non-transitory computer-readable media of claim 28, wherein, the alternating path includes a minimum cost alternating path.

33. The one or more tangible, non-transitory computer-readable media of claim 28, wherein, the matching label indicates one of a matching edge having a matching condition or an unmatched edge having a non-matching condition, and wherein the alternating path alternates between matching edges and unmatched edges.

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