LED display device and display control method

Abstract

The invention provides LED display equipment and a display control method, and the equipment comprises a first input interface and a second input interface which are used for receiving video data from an upper computer or a pre-stage sub-display screen; the first output interface and the second output interface are used for transmitting video data to the rear-stage sub display screen; the micro-control unit is used for acquiring coordinate information and on-load information of the current sub-display screen; and the control chip is used for segmenting and intercepting the video data according to the configuration signal so as to obtain video block data matched with the coordinate information of the current sub-display screen. The sub-display screens are in cascade connection through the high-definition multimedia interface, automatic identification and transmission of position information among the sub-display screens are achieved through the UART communication function, multi-direction automatic screen connection can be achieved, and the purposes that the number of nodes of a routing path is small, and the backup path is high in reliability are achieved.

Description

Technical Field

[0001] This invention relates to the field of display control technology, and in particular to a display device and a display control method. Background Technology

[0002] LED display cabinets are the core components of LED displays. They are mainly assembled from several LED modules, receiver cards, and cabinet power supplies. In practical applications, multiple sub-displays can be spliced ​​together to form LED displays of different resolutions to meet the display needs of various scenarios. Currently, mainstream LED display cabinet and display splicing solutions generally use Ethernet for data transmission. However, this technology is limited by Ethernet bandwidth bottlenecks and has many application pain points.

[0003] Specifically, due to bandwidth limitations, the maximum load capacity of a single network cable is only 650,000 dots. This directly limits the data transmission capability of the receiving card, allowing it to transmit only a quarter of the data volume required for 2K resolution displays. Consequently, the setup of displays with different resolutions requires a large number of network cables: 4 network cables for a 2K resolution display, 16 for a 4K resolution display, and a staggering 64 for an 8K resolution display. Furthermore, the setup of 4K and higher resolution displays also requires multiple transmitting cards; for example, 4 transmitting cards are typically needed for 4K resolution. This increased number of transmitting cards further complicates the system.

[0004] Furthermore, in existing technical solutions, the wiring method for each transmitting card within the cabinet is fixed, and the number of load points is also preset. Even if it can adapt to the needs of building displays of different sizes, the deployment of a large number of network cables and transmitting cards significantly increases the difficulty of installation and the complexity of debugging, placing extremely high demands on the professional operation skills of the construction personnel. Crucially, this solution is extremely unfriendly to rental applications that require high flexibility. In rental scenarios, if minor adjustments to the display screen are needed based on actual usage requirements, it is necessary to connect to a computer and use dedicated screen configuration software to reconfigure the screen connection. This operation is cumbersome and inefficient, severely hindering the promotion and use of LED displays in flexible application scenarios such as rental. Summary of the Invention

[0005] In view of the above problems, the purpose of this invention is to provide an LED display device and a display control method. The sub-display screens are cascaded through a high-definition multimedia interface, and the automatic identification and transmission of position information between the sub-display screens is realized through UART communication function. Multi-directional automatic screen connection can be achieved, resulting in fewer wiring path nodes and high reliability of backup paths.

[0006] According to one aspect of the present invention, an LED display device is provided, comprising a host computer and a display screen, the display screen comprising a plurality of sub-display screens cascaded in an array, wherein each sub-display screen comprises: a first input interface and a second input interface for receiving video data from the host computer or a previous-level sub-display screen, the first input interface and the second input interface being connected to different previous-level sub-display screens; a first output interface and a second output interface for transmitting video data to a subsequent-level sub-display screen, the first output interface and the second output interface being connected to different subsequent-level sub-display screens; and a microcontroller unit electrically connected to the first input interface, the second input interface, the first output interface and the second output interface, the microcontroller unit being connected via the first input interface and / or The second input interface acquires the coordinate information of the current sub-display screen, acquires the load information of the current sub-display screen through the first output interface and / or the second output interface, and transmits the load information of the current sub-display screen to the microcontroller unit of the first-level sub-display screen. The microcontroller unit of the first-level sub-display screen generates a configuration signal based on the load information transmitted by the subsequent sub-display screens and sends it to each subsequent sub-display screen. The control chip is electrically connected to the first input interface, the second input interface, the first output interface, the second output interface, and the microcontroller unit. The control chip segments and truncates the video data according to the configuration signal to obtain video block data that matches the coordinate information of the current sub-display screen, and converts the video block data into drive signals.

[0007] Optionally, the microcontroller unit includes: a first asynchronous transceiver connected to the first input interface; a second asynchronous transceiver connected to the second input interface; a third asynchronous transceiver connected to the first output interface; and a fourth asynchronous transceiver connected to the second output interface.

[0008] Optionally, the microcontroller sends a first query signal to the corresponding connected front-end sub-display or host computer via the first asynchronous transceiver and the first input interface, and / or sends the first query signal to the corresponding connected front-end sub-display or host computer via the second asynchronous transceiver and the second input interface, and obtains the coordinate information of the current sub-display based on the response; the microcontroller sends a second query signal to the corresponding connected rear-end sub-display via the third asynchronous transceiver and the first output interface, and / or sends the second query signal to the corresponding connected rear-end sub-display via the fourth asynchronous transceiver and the second output interface, and obtains the load information of the current sub-display based on the response.

[0009] Optionally, the microcontroller includes a digital label, and when the first query signal sent by the current sub-display does not receive a response, the previous sub-display becomes the primary sub-display.

[0010] Optionally, the microcontroller sends the load information of the current sub-display to the corresponding connected front-end sub-display via the first asynchronous transceiver and the first input interface, and / or sends the load information of the current sub-display to the corresponding connected front-end sub-display via the second asynchronous transceiver and the second input interface.

[0011] Optionally, the first input interface, the second input interface, the first output interface, and the second output interface are all high-definition multimedia interfaces. In the first input interface and the second input interface, pin 13 of the high-definition multimedia interface serves as the transmitting signal terminal of the corresponding connected asynchronous transceiver, and pin 14 serves as the receiving signal terminal. In the first output interface and the second output interface, pin 13 of the high-definition multimedia interface serves as the receiving signal terminal of the corresponding connected asynchronous transceiver, and pin 14 serves as the transmitting signal terminal.

[0012] Optionally, the microcontroller unit sends a first query signal and a second query signal in real time or at intervals.

[0013] Optionally, the first input interface and the second input interface are respectively disposed on two adjacent sides of the sub-display screen, and the first output interface and the second output interface are respectively disposed on the other two adjacent sides of the sub-display screen. The two adjacent sides extend along a first direction and a second direction, respectively, and the first direction and the second direction are perpendicular to each other.

[0014] Optionally, the host computer is connected to the primary sub-display screen in the display screen via a high-definition multimedia interface.

[0015] Optionally, it also includes: a display area connected to the system-on-chip, which displays according to the drive signal output by the system-on-chip.

[0016] According to another aspect of the present invention, a display control method is provided, comprising: receiving video data and forwarding it to a subsequent stage; acquiring the coordinate information and load information of the current sub-display screen and generating a configuration signal; segmenting and truncating the video data according to the configuration signal; and converting the truncated video data into a drive signal.

[0017] The LED display device and display control method provided in this application connect to different front-end sub-display screens via a first input interface and a second input interface, and to different rear-end sub-display screens via a first output interface and a second output interface, forming a multi-path cascaded structure. When a transmission path of an adjacent sub-display screen fails, data can still be transmitted via another transmission path, ensuring high reliability and stability of the display system. Simultaneously, the multi-path cascaded structure enables the final-level sub-display screen to quickly acquire data, significantly shortening data transmission nodes and reducing latency compared to traditional single-path transmission methods, thereby improving display response speed.

[0018] Furthermore, multiple asynchronous transceivers in the microcontroller are electrically connected to the first input interface, second input interface, first output interface, and second output interface, respectively, to achieve automatic transmission and identification of coordinate and load information between sub-displays. This eliminates the need for pre-stored wiring tables in traditional sending or receiving cards, avoiding the cumbersome reconfiguration required after hardware replacement. Through multiple asynchronous transceivers, each sub-display can autonomously exchange coordinate and load information, achieving plug-and-play automatic screen connection. Regardless of cascading in any direction (up, down, left, or right), the system can identify the physical location in real time and dynamically generate a display splicing scheme, significantly reducing construction difficulty and debugging time. In addition, both the input and output interfaces are high-definition multimedia interfaces. The asynchronous transceivers communicate by reusing pins 13 and 14 of the high-definition multimedia interface, eliminating the need for additional communication lines, saving interface resources, and improving system integration and reliability.

[0019] Furthermore, the control chip receives configuration signals from the microcontroller unit, segments and truncates the input video data according to the configuration signals, and precisely maps video frames to the corresponding sub-display areas according to the actual physical location information of the splicing, achieving seamless splicing display. Simultaneously, the control chip, in conjunction with the configuration signals transmitted by the microcontroller unit, automatically adjusts the output resolution and refresh rate to ensure synchronous output of the displayed image across different cascaded paths, avoiding screen tearing or flickering caused by transmission delay differences. Moreover, for changes in the connection method and number of sub-displays within the display screen, the control chip can update the video data segmentation logic and output timing in real time based on dynamic configuration signals, ensuring the continuity and consistency of the displayed content and screen size. Attached Figure Description

[0020] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0021] Figure 1 A structural diagram of an LED display device according to an embodiment of the present invention is shown;

[0022] Figure 2 A structural diagram of a sub-display screen in an LED display device according to an embodiment of the present invention is shown;

[0023] Figure 3 A pin structure diagram and pin definition table of a high-definition multimedia interface in an LED display device according to an embodiment of the present invention are shown;

[0024] Figure 4 A diagram showing coordinate information of multiple sub-displays of a display screen in an LED display device according to an embodiment of the present invention is provided.

[0025] Figure 5 A transmission path diagram between multiple sub-displays of a display screen in an LED display device according to an embodiment of the present invention is shown;

[0026] Figure 6 A flowchart of a display control method according to an embodiment of the present invention is shown. Detailed Implementation

[0027] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0028] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples.

[0029] Figure 1 A structural diagram of an LED display device according to an embodiment of the present invention is shown; Figure 2 A structural diagram of a sub-display screen in an LED display device according to an embodiment of the present invention is shown; Figure 3 A pin structure diagram and pin definition table of a high-definition multimedia interface in an LED display device according to an embodiment of the present invention are shown; Figure 4 A diagram showing coordinate information of multiple sub-displays of a display screen in an LED display device according to an embodiment of the present invention is provided. Figure 5 A transmission path diagram between multiple sub-displays of a display screen in an LED display device according to an embodiment of the present invention is shown.

[0030] like Figure 1 As shown, the LED display device includes a host computer 200 and a display screen 100. The host computer 200 sends control commands and display data to the display screen 100 through an interface; the display screen 100 includes multiple cascaded sub-display screens 110. After parsing the data, the display screen 100 distributes it to the corresponding sub-display screens 110, and each sub-display screen 110 independently completes the driving and display of local images, realizing seamless splicing of the entire screen.

[0031] The host computer 200 includes a computer, tablet computer, or dedicated control terminal, capable of running supporting display management software to perform operations such as layout configuration, brightness adjustment, fault monitoring, and remote upgrades of the display screen 100. The host computer 200 transmits image and control signals to the display screen 100 via a high-definition multimedia input interface (HDMI IN) and an RJ45 port.

[0032] The High-Definition Multimedia Interface (HDMI) input interface is a digital video / audio interface standard capable of simultaneously transmitting uncompressed high-definition video signals and multi-channel audio signals. It features high transmission speed, low signal loss, and convenient connection. In this application, the HDMI IN interface serves as the signal access channel between the host computer 200 and the display screen 100.

[0033] RJ45 (Registered Jack 45) refers to an Ethernet interface that conforms to the IEEE 802.3 standard. Unlike high-definition multimedia input interfaces, RJ45 interfaces focus on the distributed transmission of control data and display data, and are a key hardware interface for realizing large-scale splicing of 100 displays.

[0034] The display screen 100 is constructed by cascading multiple sub-display screens 110, each of which is a rectangle with a fixed aspect ratio, facilitating close splicing to form a complete display area. Figure 1 In the illustrated embodiment, the display screen 100 consists of nine sub-display screens 110 (D1-D9) arranged in a 3×3 array. In other embodiments, the array arrangement can be expanded to 2×2, 4×4 or irregular arrangement to adapt to the size and shape requirements of different display scenarios.

[0035] Further, refer to Figure 2 Each sub-display 110 includes a display area 111, a system on a chip (SOC chip) 112, a microcontroller unit (MCU) 113, an input interface 114, and an output interface 115.

[0036] Specifically, the display area 111 is composed of an LED array used to present image content, and its resolution and physical size are configured according to the actual application scenario.

[0037] Each sub-display 110 includes a first input interface 114a, a second input interface 114b, a first output interface 115a, and a second output interface 115b. The first input interface 114a and the second input interface 114b are used to receive video data and signal transmission from the preceding sub-display or the host computer, respectively. The first output interface 115a and the second output interface 115b transmit video data and signals to the following sub-display, realizing continuous signal flow in the cascaded system.

[0038] In this embodiment, on multiple sides extending along the first and second directions of the sub-display screen 110, the first input interface 114a and the second input interface 114b are respectively located on two adjacent sides. That is, the first input interface 114a is located on one side extending along the first direction, and the second input interface 114b is located on the adjacent side extending along the second direction, forming an L-shaped layout, which facilitates flexible signal access during multi-directional cascading. Similarly, the first output interface 115a and the second output interface 115b are respectively located on two adjacent sides extending along the first and second directions, forming an L-shaped layout. This L-shaped layout of the input interfaces complements the first input interface layout to ensure smooth transmission of cascaded signals in both horizontal and vertical directions. In this embodiment, the sub-display screen 110 is rectangular. For example, the first input interface 114a is located on the left side of the sub-display screen 110, the second input interface 114b is located on its lower side, the first output interface 115a is located on its upper side, and the second output interface 115b is located on its right side, forming a bidirectional redundant signal transmission channel. Between two adjacent sub-displays 100 along a first direction, such as sub-displays D1 and D4, video data and signals are transmitted through the second output interface 115b of sub-display D1 and the first input interface 114a of sub-display D4; between two adjacent sub-displays along a second direction, such as sub-displays D1 and D2, video data and signals are transmitted through the first output interface 115a of sub-display D1 and the second input interface 114b of sub-display D2, thereby constructing a modular display architecture that is scalable both horizontally and vertically.

[0039] like Figure 1 As shown, the first direction is, for example, the X direction, and the second direction is, for example, the Y direction. The first and second directions are perpendicular to each other, forming the two-dimensional splicing foundation of the sub-display screen 110, providing geometric coordinate support for the planar expansion of the display screen. The sub-display screen 110 located in the lower left corner serves as the starting cascade node of the display screen 100, with geometric coordinates, for example, (X0, Y0). Along the first direction, the X coordinate of the sub-display screen increases while the Y coordinate remains unchanged, achieving horizontal expansion; along the second direction, the Y coordinate increases while the X coordinate remains unchanged, completing vertical extension. Through this layout, each level of sub-display screen is connected sequentially, and signals are transmitted level by level from the starting node, ensuring synchronized and delay-free display content.

[0040] The microcontroller unit 113 includes UART1-UART4, where UART stands for Universal Asynchronous Receiver / Transmitter, responsible for coordinating coordinate data communication between the sub-displays. In this embodiment, the microcontroller unit 113 is connected to the first input interface 114a via the first asynchronous receiver / transmitter (UART1) and to the second input interface 114b via the second asynchronous receiver / transmitter (UART2), achieving dual-channel signal reception; simultaneously, it is connected to the first output interface 115a via the third asynchronous receiver / transmitter (UART3) and to the second output interface 115b via the fourth asynchronous receiver / transmitter (UART4), achieving dual-channel signal forwarding.

[0041] In this embodiment, when multiple sub-displays 110 form a cross-shaped splicing structure, multiple asynchronous transceivers are used to transmit and exchange key information such as the coordinate mapping relationship between the sub-displays 110, the load parameters of the sub-displays 110, and the physical connection status. This enables the microcontroller unit 113 to dynamically identify the topology of the cascaded system of multiple sub-displays 110 in the display screen 100 and generate a configuration signal. This configuration signal is used to transmit to the control chip 112 for configuration. The configuration signal includes the coordinate position, orientation identifier, and load parameters of the sub-display. The coordinate position, for example, refers to the two-dimensional coordinates (Xn, Yn) of the sub-display 110 where the current microcontroller unit 113 is located in the overall display screen 100. The orientation identifier is used to identify the relative position in the signal transmission path, which is usually related to the position of the input and output interfaces. The load parameters indicate the number of subsequent sub-displays that the current sub-display can connect to, ensuring that the control chip 112 completes the accurate configuration of core parameters such as screen segmentation, timing synchronization, and brightness equalization according to the configuration signal, thereby achieving seamless splicing of multiple screens and overall display consistency.

[0042] In each sub-display 110 of the display screen 100, the microcontroller unit 113 is equipped with a numerical label, which is used to identify whether the current sub-display 110 is the first node of the cascaded system. Figure 1In the 3×3 array structure shown, the primary node is the sub-display D1 located in the lower left corner. When the display 100 is initially powered on, the microcontroller unit 113 of each sub-display 110 sends a first query signal to the preceding sub-display through the input interface to determine whether it is the primary node. If no response is received, it is determined to be the primary sub-display, and its position information is the coordinate origin (X0, Y0) and recorded. If a response is received, the position is confirmed based on the coordinate information returned by the preceding sub-display, and its own two-dimensional coordinates (Xn, Yn) are generated incrementally and recorded. Simultaneously, upon receiving the response... After receiving the query signal from the sub-display 110, the updated coordinate information of the sub-display 100 is transmitted to the subsequent sub-display through the output interface. In addition, the current sub-display also sends a second query signal to the subsequent sub-display through the output interface to confirm whether the current sub-display has a connected subsequent sub-display. If no response is received within a specified time, it is determined that no subsequent sub-display is connected. If a response is received, it is considered that a subsequent sub-display is connected, the connection direction is recorded, and the load parameters are fed back to the preceding sub-display until the load parameters of all sub-displays are summarized to the microcontroller unit 113 of the first-level node.

[0043] The microcontroller unit 113 achieves automatic coordinate mapping and cascade topology recognition of multiple sub-displays 110 through the relationship between the asynchronous transceiver, input interface, output interface, and coordinate system, ensuring that a unique and continuous two-dimensional coordinate sequence can be dynamically generated regardless of the physical connection order. For example... Figure 5 and Figure 6 As shown, after the current sub-display D5 sends a first query signal through the first input interface 114a and receives the coordinate response from the preceding sub-display D2, it confirms that its own coordinate information is (X1, Y1) with the X-axis incremented by 1 on the coordinate information (X0, Y1) of D2. Therefore, the coordinate information of D5 is (X1, Y1). If D5 sends a first query signal through the second input interface 114b and receives the coordinate response from the sub-display D4, it confirms that its own coordinate information is (X1, Y0) with the Y-axis incremented by 1 on the coordinate information (X1, Y0) of D4. Therefore, the coordinate information of D5 is (X0, Y1). If D5 sends a second query signal through the first output interface 115a and receives a response signal from the sub-display D6, it records that D5 has a subsequent load in the Y direction and reports the load information to the first node D1 level by level; if D5 sends a second query signal through the second output interface 115b and receives a response signal from the sub-display D8, it records that D5 has a subsequent load in the X direction and reports the load information to the first node D1 level by level, confirming the number of rows and columns of the sub-displays in the display 100, thereby completing the dynamic construction and coordinate mapping of the topology.

[0044] The control chip 112 is connected to the input / output interface, the display area 111, and the microcontroller unit 113. As the core processing unit of the sub-display screen 110, the control chip 112 includes a storage unit, a driving unit, and a timing unit. The control chip 112 receives configuration signals from the microcontroller unit 113 and dynamically adjusts the operating parameters of the driving unit and the timing unit according to the configuration signals to ensure that the image output of the display area 111 is strictly synchronized with the overall screen splicing topology.

[0045] In one embodiment, the control chip 112 receives and stores video data input from the first input interface 114a and / or the second input interface 114b, and then decodes and converts the video data. The control chip 112 receives configuration signals sent by the microcontroller unit 113, parses the coordinate position and load parameters of the current sub-display screen 110 contained therein, and performs block processing on the received video data accordingly. The control chip 112 selects the video data block corresponding to the current sub-display screen 110 according to the coordinate position of the current sub-display screen 110, and converts the data block into a drive signal through the drive unit and timing unit and sends it to the display area 111 for display.

[0046] In one embodiment, the video data received by the control chip 112 in each sub-display 110 is complete raw video data, which is complete image data covering the entire display screen 100. The control chip 112 calculates the display area range of the current sub-display 110 within the entire screen based on the coordinate position (Xn, Yn) information sent by the microcontroller unit 113, and extracts image data blocks from the corresponding positions in the raw video data for display. By uniformly receiving the full video data and independently cropping and outputting it, each sub-display 110 achieves pixel-level alignment and seamless splicing, while avoiding differences in screen latency caused by distributed transmission. For example... Figure 1 In the display screen 100 shown, the raw video data received by sub-display screens D1 to D9 are all complete image data covering the entire display screen 100.

[0047] In another embodiment, after the control chip 112 of the first sub-display 110 decodes the received complete video stream, it strips and caches the data blocks that it needs to display. The remaining video data is compressed and transmitted to the next sub-display through the cascaded output interface. Subsequently, each level of control chip performs data splitting and area clipping in sequence to form a chain distribution architecture, which reduces the bandwidth pressure on the main control terminal while ensuring the independent processing capability of each unit.

[0048] Furthermore, in this application, the first input interface 114a, the second input interface 114b, the first output interface 115a, and the second output interface 115b of each sub-display 110 are all high-definition multimedia interfaces, supporting hot-swapping and plug-and-play. High-definition multimedia interfaces include Type-A and Type-C. Type-A interfaces are standard high-definition multimedia interfaces, suitable for transmitting high-bandwidth digital signals; Type-C interfaces are mini high-definition multimedia interfaces, smaller in size, and commonly used in mobile devices such as mobile phones and tablets.

[0049] like Figure 3 As shown, the high-definition multimedia interface of this application is Type A, including 19 pins. Among them, pin 13 was originally a CEC (Consumer Electronics Control) function pin, and pin 14 was originally a reserved NC (NoConnect) pin, which is reused in this application as a transceiver channel with the asynchronous transceiver transmitter (UART) in the microcontroller unit 113.

[0050] Specifically, the input interface 114 of the sub-display 110 is connected to an asynchronous transceiver (UART). Pin 13 of the input interface 114 serves as the transmit (TX) signal terminal of the UART, and pin 14 serves as the receive (RX) signal terminal. Similarly, pin 13 of the output interface 115 serves as the receive (RX) signal terminal of the UART, and pin 14 serves as the transmit (TX) signal terminal. Thus, in the process of the microcontroller 113 acquiring coordinate information of the sub-displays via the UART, each sub-display 110 can send a first query signal to the preceding sub-display 110 via the input interface 114 and receive a response, and can also send a second query signal to the following sub-display 110 via the output interface 115 and receive a response, achieving bidirectional communication between adjacent sub-displays in the cascaded topology.

[0051] In this application, the process by which the microcontroller 113 generates configuration signals via an asynchronous transceiver is either real-time or triggered at intervals, so that when the number of sub-displays 110 in the display 100 changes, the system can dynamically sense and reconstruct the cascaded topology.

[0052] Furthermore, when transmitting video data between the primary sub-display and the host computer 200 via the high-definition multimedia interface, pin 17 of the high-definition multimedia interface, i.e., the DDC channel, is used. This allows pins 13 and 14 of the high-definition multimedia interface to be used entirely for UART communication without affecting the normal reading and writing of the DDC channel. This approach retains the device control and identification capabilities of the high-definition multimedia interface standard while also achieving coordinate synchronization and status feedback between multiple display levels. Through this multiplexing mechanism, the system can automatically configure and interconnect various sub-displays without the need for additional communication lines, significantly reducing system deployment and maintenance costs.

[0053] In such Figure 1 In the display screen 100 shown, due to the cross connection method, data can be transmitted between each sub-display screen 110 in both the horizontal and vertical directions. Data can be flexibly transmitted in both row and column directions, achieving dual-path backup. When either the horizontal or vertical transmission path fails, data can be transmitted through the other transmission path, ensuring normal system display and improving system reliability.

[0054] Furthermore, the cross-connection method can significantly improve data transmission efficiency and shorten data transmission latency. Compared to the traditional single-line serial transmission path, the data transmission path between sub-displays D1 to D9 in the 3x3 architecture of this application only requires 3 nodes, while the traditional single-line path requires 7 nodes through the intermediate D2-D8. Therefore, the cross-connection method of this application can greatly shorten the data transmission path, reduce cascading latency, and improve the overall response speed.

[0055] Furthermore, since the coordinate information and load information of each sub-display screen are collected and transmitted through the asynchronous transceiver of the microcontroller unit 113 in this application, after the display screen is expanded, the expanded coordinate information and load status can still be obtained through the asynchronous transceiver and a new configuration signal can be generated. Then, the control chip 112 can re-segment and capture the video data according to the new configuration signal to achieve normal display. Therefore, the LED display device of this application can complete automatic identification and configuration and complete normal display without manual intervention after expansion.

[0056] Figure 6 A flowchart of a display control method according to an embodiment of the present invention is shown. Reference will be made below. Figure 1-6 The display control method of this application is described in detail.

[0057] Step S10: Receive video data and forward it to the next stage.

[0058] In this step, the primary sub-display D1 in display screen 100 is connected to the host computer 200 via a high-definition multimedia interface, receiving video data sent by the host computer. After storing the video data in the storage unit, it forwards the video data to the subsequent sub-displays D2 and D4 along the horizontal and vertical directions respectively through the first output interface 115a and the second output interface 115b, ensuring that the data is transmitted synchronously to each level of sub-screen. This dual-path parallel forwarding mechanism effectively distributes the transmission load, avoids single-path congestion, and improves the overall stability and real-time performance of the system.

[0059] Step S20: Obtain the coordinate information and load information of the current sub-display and generate a configuration signal.

[0060] In this step, the microcontroller unit 113 of each sub-display sends a first query signal to the preceding sub-display 110 through the first input interface 114a and / or the second input interface 114b to obtain the digital label of the preceding sub-display. If it does not receive the digital label of the preceding sub-display, it confirms itself as the first-level sub-display and sets its coordinates to (X0, Y0). After receiving the digital label of the preceding sub-display, it calculates its own coordinate position by combining the coordinate information of the preceding sub-display and its own connection direction. Then, it sends a second query signal to the following sub-display to obtain the connection status of the following sub-display, thereby obtaining its own load information, and transmits the load information to the first-level sub-display for aggregation.

[0061] The first-level sub-display unit binds the aggregated load information with the coordinate information of each sub-display unit, generates a configuration signal containing the position and load distribution of each sub-display unit, and sends it to the microcontroller unit 113 of all subsequent sub-display units to ensure that each sub-display unit processes the video data separation logic synchronously.

[0062] Step S30: Segment and cut the video data according to the configuration signal.

[0063] In this step, after receiving the configuration signal from the microcontroller unit, the control chip divides the received complete video data into corresponding segments based on the load information in the configuration signal; and combines the coordinate position information of each sub-display to accurately extract video block data that matches its own display area.

[0064] Step S40: Convert the captured video data into a drive signal.

[0065] In this step, the control chip converts the captured video block data into drive signals adapted to the physical parameters of the sub-display through the drive unit and timing unit, and provides the drive signals to the display area 111 for display on the corresponding sub-display.

[0066] The LED display device and display control method provided in this application connect to different front-end sub-display screens via a first input interface and a second input interface, and to different rear-end sub-display screens via a first output interface and a second output interface, forming a multi-path cascaded structure. When a transmission path of an adjacent sub-display screen fails, data can still be transmitted via another transmission path, ensuring high reliability and stability of the display system. Simultaneously, the multi-path cascaded structure enables the final-level sub-display screen to quickly acquire data, significantly shortening data transmission nodes and reducing latency compared to traditional single-path transmission methods, thereby improving display response speed.

[0067] Furthermore, multiple asynchronous transceivers in the microcontroller are electrically connected to the first input interface, second input interface, first output interface, and second output interface, respectively, to achieve automatic transmission and identification of coordinate and load information between sub-displays. This eliminates the need for pre-stored wiring tables in traditional sending or receiving cards, avoiding the cumbersome reconfiguration required after hardware replacement. Through multiple asynchronous transceivers, each sub-display can autonomously exchange coordinate and load information, achieving plug-and-play automatic screen connection. Regardless of cascading in any direction (up, down, left, or right), the system can identify the physical location in real time and dynamically generate a display splicing scheme, significantly reducing construction difficulty and debugging time. In addition, both the input and output interfaces are high-definition multimedia interfaces. The asynchronous transceivers communicate by reusing pins 13 and 14 of the high-definition multimedia interface, eliminating the need for additional communication lines, saving interface resources, and improving system integration and reliability.

[0068] Furthermore, the control chip receives configuration signals from the microcontroller unit, segments and truncates the input video data according to the configuration signals, and precisely maps video frames to the corresponding sub-display areas according to the actual physical location information of the splicing, achieving seamless splicing display. Simultaneously, the control chip, in conjunction with the configuration signals transmitted by the microcontroller unit, automatically adjusts the output resolution and refresh rate to ensure synchronous output of the displayed image across different cascaded paths, avoiding screen tearing or flickering caused by transmission delay differences. Moreover, for changes in the connection method and number of sub-displays within the display screen, the control chip can update the video data segmentation logic and output timing in real time based on dynamic configuration signals, ensuring the continuity and consistency of the displayed content and screen size.

[0069] As described above, these embodiments of the present invention do not exhaustively cover all details, nor do they limit the invention to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. An LED display device comprising a host computer and a display screen, the display screen comprising a plurality of sub-displays cascaded in an array, wherein, Each sub-display screen comprises: a first input interface and a second input interface for receiving video data from a host computer or a previous sub-display screen, the first input interface and the second input interface being connected to different previous sub-display screens; a first output interface and a second output interface for transmitting video data to a subsequent sub-display screen, the first output interface and the second output interface being connected to different subsequent sub-display screens; a micro control unit electrically connected to the first input interface, the second input interface, the first output interface and the second output interface, the micro control unit acquiring coordinate information of a current sub-display screen via the first input interface and / or the second input interface, acquiring load information of the current sub-display screen via the first output interface and / or the second output interface, and transmitting the load information of the current sub-display screen to a micro control unit of a first sub-display screen, the micro control unit of the first sub-display screen generating a configuration signal according to the load information transmitted by the subsequent sub-display screen and issuing the configuration signal to each subsequent sub-display screen; a control chip electrically connected to the first input interface, the second input interface, the first output interface, the second output interface and the micro control unit, wherein the control chip divides and cuts the video data according to the configuration signal to obtain video block data matching the coordinate information of the current sub-display screen, and converts the video block data into a driving signal. 2.The LED display apparatus of claim 1, wherein, The micro control unit comprises: a first asynchronous transceiver connected to the first input interface; a second asynchronous transceiver connected to the second input interface; a third asynchronous transceiver connected to the first output interface; a fourth asynchronous transceiver connected to the second output interface.

3. The LED display apparatus of claim 2, wherein, The micro control unit sends a first query signal to a corresponding connected previous sub-display screen or host computer via the first asynchronous transceiver and the first input interface, and / or sends a first query signal to a corresponding connected previous sub-display screen or host computer via the second asynchronous transceiver and the second input interface, and acquires coordinate information of the current sub-display screen according to the response; The micro control unit sends a second query signal to a corresponding connected subsequent sub-display screen via the third asynchronous transceiver and the first output interface, and / or sends a second query signal to a corresponding connected subsequent sub-display screen via the fourth asynchronous transceiver and the second output interface, and acquires load information of the current sub-display screen according to the response. 4.The LED display apparatus of claim 3, wherein, The micro control unit comprises a digital label, and when the first query signal sent by the current sub-display screen does not receive a response, the previous sub-display screen serves as the first sub-display screen. 5.The LED display apparatus of claim 3, wherein, The micro control unit sends the load information of the current sub-display screen to a corresponding connected previous sub-display screen via the first asynchronous transceiver and the first input interface, and / or sends the load information of the current sub-display screen to a corresponding connected previous sub-display screen via the second asynchronous transceiver and the second input interface. 6.The LED display apparatus of claim 5, wherein, The first input interface, the second input interface, the first output interface and the second output interface are all high-definition multimedia interfaces. In the first input interface and the second input interface, the 13th pin of the HDMI is a transmitting signal end of the corresponding connected asynchronous transceiver, and the 14th pin is a receiving signal end; In the first output interface and the second output interface, the 13th pin of the HDMI is a receiving signal end of the corresponding connected asynchronous transceiver, and the 14th pin is a transmitting signal end. 7.The LED display apparatus of claim 3, wherein, The micro control unit sends the first query signal and the second query signal in real time or at interval time. 8.The LED display apparatus of claim 1, wherein, The first input interface and the second input interface are arranged on two adjacent edges of the sub display screen respectively, and the first output interface and the second output interface are arranged on the other two adjacent edges of the sub display screen respectively, the two adjacent edges extend along the first direction and the second direction respectively, and the first direction and the second direction are perpendicular to each other. 9.The LED display apparatus of claim 1, wherein, The host computer is connected with the first-level sub display screen in the display screen through the HDMI. 10.The LED display apparatus of claim 1, wherein, Further comprising: a display area connected with the control chip and displaying according to the driving signal output by the control chip.

11. A display control method, comprising: receiving video data and forwarding to the next stage; obtaining coordinate information and load information of the current sub display screen and generating a configuration signal; segmenting and intercepting the video data according to the configuration signal; converting the intercepted video data into a driving signal.

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