A pin-exposed packaging structure and a packaging method

Abstract

The application discloses a pin-exposed packaging structure and a packaging method, and comprises the following steps: encapsulating a whole packaging body with multiple uniformly arranged and interval cutting channels, taking the intersection point of the diagonal lines of the adjacent packaging bodies as the etching center point of each group, etching the cutting channel and extending to the packaging body to form a groove; electroplating a pin A on the first surface of the packaging body, the pin A being electrically connected with the inside of the packaging body; electroplating a connecting rib: the connecting rib is electroplated at the position close to the step of the pin A; electroplating a pin B: the pin B is electroplated on the side away from the pin A of the connecting rib, and the pin B is extended and electroplated on the edge of the groove; electroplating a pin C: the pin C is electroplated to cover the inner surface of the groove; cutting and separating: the cutting channel is removed by cutting to separate into packaging body units, so that the first surface of the packaging body is removed as a step at right angles, and the pin C left after cutting covers the step surface; the finished product of the application does not have the risk of pin corner collapse, and soldering is convenient for tin climbing observation.

Description

Technical Field

[0001] This invention belongs to the field of chip packaging technology, and particularly relates to a packaging structure and packaging method with exposed pins. Background Technology

[0002] After the chip is mounted and its electrical wiring is completed, it needs to be encapsulated with encapsulating material to form an encapsulation structure. The electrical parts are exposed on the encapsulation structure. External leads are electroplated on the outer surface of the encapsulation structure. The external leads are electrically connected to the exposed parts. The external leads serve as the medium for soldering the encapsulation structure to the working area and realizing the electrical connection of the internal chip. These external leads are protruding leads, and there are also planar leads that are encapsulated and ground to expose the surface.

[0003] For encapsulation structures with protruding or planar leads, solder paste is applied to the outer leads before soldering when mounting and soldering to the working area. The soldering quality needs to be judged by observing solder creep. However, there is a certain distance between the outer leads and the side edge of the encapsulation structure, and the encapsulation material on the side of the encapsulation structure is not conducive to solder creep, which affects the judgment of the soldering effect. Summary of the Invention

[0004] To address the problems in the prior art, the present invention provides a package structure and packaging method with exposed pins.

[0005] To achieve the above objectives, the present invention proposes a packaging method with exposed pins, comprising the following steps:

[0006] Etched grooves: The entire package has multiple evenly arranged and spaced cuts. The intersection of the diagonally right-angled lines connecting adjacent packages is the center point of each group of etching. The etched cuts extend to the package to form grooves.

[0007] Electroplated pin A: Pin A is electroplated on the first surface of the package, and pin A is electrically connected to the inside of the package;

[0008] Electroplated connecting ribs: The connecting ribs are electroplated and connected at the position of pin A near the step;

[0009] Electroplated pin B: Pin B is electroplated on the side of the connecting rib away from pin A, and pin B extends to be electroplated on the edge of the groove;

[0010] Electroplated pin C: Pin C is electroplated to cover the inner surface of the groove;

[0011] Cutting and separating: Cutting removes the cutting channel to separate the package unit, so that the first surface of the package is removed at a right angle to form a step, and the pin C left by cutting covers the step surface.

[0012] Furthermore, in the etching groove step, the etching spreads from the center point along the horizontal plane to the right angle of the first surface of the package, and then vertically penetrates the encapsulating material to form a groove.

[0013] Furthermore, in the step of electroplating pin A, the internal chip electrical circuitry is led out through a circuit, with one end of the circuit flush with and exposed on the first surface of the package. Pin A is electroplated and connected to the circuit, covering the circuit.

[0014] Furthermore, in the electroplating connecting rib step, the width of the connecting rib is 50μm to 200μm.

[0015] Furthermore, in the steps of electroplating pin A, electroplating pin B, and electroplating pin C, pin A is connected to pin B through a connecting rib, pin B and pin C are electroplated together as one unit, and the end faces of pin A, pin B, connecting rib and pin C are flush, and the side faces of pin B and pin C left after cutting are flush with the side face of the package body near the step and exposed.

[0016] An exposed pin package structure includes a package body having a first surface, and further includes:

[0017] The steps are created by removing the four right-angle etched portions on the first surface of the package.

[0018] Pin A is electroplated on the first surface of the package and is electrically connected to the inside of the package.

[0019] The connecting ribs are electroplated and connected at the position of pin A near the step;

[0020] Pin B is plated on the side of the connecting rib away from pin A, and the extension of pin B is plated on the edge of the step;

[0021] Pin C is electroplated onto the stepped surface, and the end face of pin C is electroplated to connect with pin B.

[0022] Furthermore, the steps are formed by etching, with the intersection of the diagonally right-angled lines connecting adjacent packages as the center point of each group of etching. The etching spreads from the center point along the horizontal plane to the right angle of the first surface of the package, and then vertically penetrates the encapsulating material to form a groove, removing the cutting path, so that the right angle of the first surface of the package is removed to form a step.

[0023] Furthermore, the internal chip of the package is electrically led out through a circuit, one end of which is flush with the first surface of the package and exposed. Pin A is electroplated and connected to the circuit and covers the circuit.

[0024] Furthermore, the width of the connecting rib is 50μm to 200μm.

[0025] Furthermore, pin A is connected to pin B via a connecting rib, and pin B and pin C are electroplated together as one unit. The end faces of pin A, pin B, connecting rib, and pin C are flush, and the sides of pin B and pin C are flush with and exposed to the side of the package body near the step.

[0026] Beneficial effects of this invention:

[0027] 1. In this invention, the four corners of the mounting surface of the package are provided with recessed steps. The steps are plated with pins C. The sides of pins C and B are flush with each other and exposed on the side of the package near the steps. The solder overflows from pin B to the end face of pin C. Due to the wetting effect, it spreads and extends from the end face of pin C along the side face of pin C into the step, which is convenient for observation of soldering quality.

[0028] 2. In this invention, pin A is connected to pin B and pin C on the step by a thinner connecting rib. There is a safety space left at the edge of pin A. There is no risk of chipping of the main body of pin A when the finished product is cut. There is no physical delamination between pin A and the encapsulation material caused by cutting vibration. The thrust strength of pin A is higher and the risk of detachment in drop test is low. Attached Figure Description

[0029] Figure 1 This is one of the schematic diagrams of the etching groove step in a packaging method with exposed pins according to the present invention;

[0030] Figure 2 This is a second schematic diagram of the etching groove step in a packaging method with exposed pins according to the present invention;

[0031] Figure 3 This is a third schematic diagram of the etching groove step in a packaging method with exposed pins according to the present invention;

[0032] Figure 4 This is a schematic diagram of the electroplating pin A step in a packaging method with exposed pins according to the present invention;

[0033] Figure 5 This is one of the schematic diagrams of the electroplating connecting rib step in a packaging method with exposed pins according to the present invention;

[0034] Figure 6 This is a second schematic diagram of the electroplating connecting rib step in a packaging method with exposed pins according to the present invention;

[0035] Figure 7 This is one of the schematic diagrams of the electroplating pin B step in a packaging method with exposed pins according to the present invention;

[0036] Figure 8 This is a second schematic diagram of the electroplating pin B step in a packaging method with exposed pins according to the present invention;

[0037] Figure 9 This is one of the schematic diagrams of the electroplating pin C step in a packaging method with exposed pins according to the present invention;

[0038] Figure 10 This is a second schematic diagram of the electroplating pin C step in a packaging method with exposed pins according to the present invention;

[0039] Figure 11 This is one of the schematic diagrams illustrating the cutting and separation steps of a packaging method with exposed pins according to the present invention;

[0040] Figure 12 This is a second schematic diagram of the cutting and separating steps of a packaging method with exposed pins according to the present invention;

[0041] Figure 13 This is a third schematic diagram of the cutting and separating steps in a packaging method with exposed pins according to the present invention;

[0042] Figure 14 This is a schematic diagram of a package structure with exposed pins according to the present invention.

[0043] In the diagram: 1. Package; 2. Groove; 3. Pin A; 4. Connecting rib; 5. Pin B; 6. Pin C; 7. Step. Detailed Implementation

[0044] The present invention will now be described in conjunction with specific embodiments, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar components or components having the same or similar functions throughout.

[0045] The directional terms used in this invention, such as up, down, left, right, front, back, inside, outside, front, back, side, etc., are merely for reference to the accompanying drawings. The embodiments and directional terms used in the following description with reference to the accompanying drawings are exemplary and are only used to explain this invention, and should not be construed as limiting this invention. Furthermore, the various specific processes and materials provided in this invention are examples that those skilled in the art will recognize for the application of other processes and / or the use of other materials.

[0046] To better understand the purpose, structure, and function of this invention, the following detailed description, in conjunction with the accompanying drawings, provides an exposed pin packaging structure and packaging method proposed in this invention.

[0047] The encapsulation method specifically includes the following steps:

[0048] S1: A substrate (not shown in the figure) is provided. Multiple chips are mounted on the substrate to form an electrical connection circuit. Encapsulation material is used to encapsulate the chips into multiple packages 1. The multiple packages 1 are spaced apart by dicing channels formed by the encapsulation material (the dicing channels are shaded areas in the attached figure). The dimensions of the dicing channels are designed and reserved according to the specific product requirements during the product design phase, and are conventional dicing channels in this field. The multiple packages 1 are arranged at even intervals. After encapsulation, the packages 1 and the dicing channels constitute a complete encapsulation unit, that is, the encapsulation material encapsulates the multiple packages 1 into a complete and continuous whole. The dicing channels connect the multiple packages 1 into a single unit (e.g., ...). Figure 1As shown), each package 1 has a first surface and a second surface opposite to each other, and a side surface connected to the first surface and the second surface. The side surface of each package 1 is surrounded by encapsulating material with cut grooves. The second surface of each package 1 is mounted facing the substrate, and the first surface of the package 1 is exposed. In the art, the package 1 is a conventional flat cuboid or cube structure or other shape. In this invention, it is a flat cuboid structure.

[0049] The entire package can be separated into multiple packages 1 via a dicing channel. Each package 1 contains a chip and a corresponding circuit connection structure. One end of the circuit is flush with and exposed on the surface of the package 1, serving as a medium for electrical connection between the outside and the chip and circuit inside the package 1. In this invention, one end of the circuit is flush with and exposed on the first surface of the package 1. The circuit connects the chip, devices, and electrical structures inside the package, and its shape can be circular, square, or irregular, etc.

[0050] S2: Clean the surface of the encapsulated assembly that has been molded and cured in step S1 to remove residual mold release agent and dust. Protect areas that do not require etching by applying photoresist and exposure development, exposing only the areas to be etched. In particular, protect the circuitry flush with the first surface of package 1 in step S1 by masking. Depending on the material of the encapsulating material, select either wet etching or dry etching. Use the intersection of the diagonally perpendicular lines connecting the first surfaces of four adjacent packages 1 as the center point of each etch path. Start etching from the center point and spread the etching along the horizontal surface of the entire encapsulation to the surrounding area, etching the etch path and extending it to the package 1. The etching penetrates vertically into the encapsulating material to a certain depth, forming grooves 2 (e.g., Figure 2 and Figure 3 (As shown).

[0051] The center point of the surface to be etched is the center point of the projection surface of the groove 2 in the horizontal direction of the entire encapsulation. Starting from the center point, the etching spreads outwards along the horizontal direction of the entire encapsulation, extending to the package 1, and vertically penetrating into the encapsulation material to a certain depth to form the groove 2. The groove 2 is set with a diffusion distance from the center point according to different products and different cut widths, and then vertically penetrating into the encapsulation material to a certain depth, with a depth of 50μm to 500μm. The etched groove 2 of this invention can be adapted to cuts with a width of 40μm to 300μm. During the etching process, the diffusion etching is anisotropic or isotropic etching. In this invention, isotropic etching is used for easier control of etching parameters. The etchant will etch along the encapsulation material at the same rate. The groove 2 formed by etching is cylindrical, and the projection surface of the groove 2 in the horizontal direction of the entire encapsulation is circular. Other etching methods can form grooves 2 in the shape of cubes, cuboids, etc., and the projection surface of the groove 2 in the horizontal direction of the entire encapsulation is a square or rectangle with the same center point.

[0052] The groove 2 extends to the package 1, so that the right-angle etched portion of the first surface of the package 1 is removed to form the step 7. Moreover, the etching is performed simultaneously on multiple areas of the cutting path to ensure that the right angles of the first surface of the package 1 are all etched to form each step 7. In this invention, the groove 2 is cylindrical and the package 1 is cuboid. The portion of each right angle of the first surface of the package 1 that is etched is the same. The cylindrical groove 2 makes the step 7 of the package 1 a fan-shaped bottom surface and a prism notch extending to the first surface of the package 1. If the groove 2 is a cube or cuboid, then the step 7 is a square or rectangular bottom surface and a prism notch extending to the first surface of the package 1. Step S2 is the etching groove 2 step.

[0053] S3: After etching the groove 2, clean the residual encapsulation material and etching agent, and remove the mask protection. At this time, the encapsulation on the substrate is a horizontal structure with multiple grooves 2 etched, exposing the circuit of each package 1. Electroplating is performed on the horizontal surface of the first surface of the encapsulation exposed by the package 1.

[0054] Electroplating creates pins A3 (e.g., on the first surface of each package 1) Figure 4 As shown, each circuit exposed on the first surface of each package 1 has a pin A3 plated on it. The pin A3 covers each circuit. In actual product design, in order to ensure the firmness of the package 1, the pins A3 need to be evenly arranged on the first surface of the package 1, and the plated pins A3 should be of the same height, so that the structure of the package 1 remains stable when the pins A3 on the first surface of the package 1 are mounted. The pins A3 are electrically connected to the chip inside the package 1 through the circuit. The pins A3 serve as the intermediate medium for mounting the package 1 unit to the working area. The package 1 is soldered to the working area by applying solder paste to the pins A3.

[0055] Electroplating creates connecting ribs 4 that are laid flat on the first surface of each package 1 (such as...) Figure 5 and Figure 6 As shown, where Figure 6 for Figure 5 (Enlarged view at point A) The right angle of pin A3 near step 7 of package 1 is replaced by connecting rib 4. The width of connecting rib 4 extends towards step 7, extending the electrical conductivity of pin A3 towards step 7. The width of connecting rib 4 is 50-200μm, significantly smaller than the width of pin A3. Connecting rib 4 allows the electrical conductivity of pin A3 to be connected to pins B and C that are subsequently plated. Furthermore, during the separation cutting process, the small width of connecting rib 4 provides a safety margin at the edge of pin A, preventing the risk of chipping of the pin A body and avoiding physical delamination caused by cutting vibration with the encapsulating material. The plating of connecting rib 4 is set at the right angle of each step 7 of package 1 corresponding to the pin A3, and the connecting rib 4 and the corresponding pin A3 are connected as a whole.

[0056] Electroplating creates pins B5 (e.g., on the first surface of each package 1) Figure 7 and Figure 8 As shown, where Figure 8 for Figure 7 (Enlarged view at point B) Pin B5 is plated at the end of the connecting rib 4 away from pin A3, and is plated and connected to the connecting rib 4 as a whole. Pin B5 is closer to step 7 than the connecting rib 4. Pin B5 plated extends into the cutting channel. The pins B5 of the four adjacent package bodies 1 are plated and connected as a whole, together surrounding the periphery of the groove 2. Pin B5 is close to the edge of the groove 2 and the inner wall of the groove 2. In this invention, the groove 2 is cylindrical, and the plated pin B5 surrounding the groove 2 is also cylindrical. For other shapes of groove 2, the plated pin B5 surrounding the groove 2 is also of the same shape. Pin B5 is plated on the edge of step 7 and groove 2, and is electrically connected to the connecting rib 4 and pin C6, which strengthens the adhesion between the narrow connecting rib 4 and the encapsulating material, and prevents the connecting rib 4 from falling off after the cutting channel is removed, making the pin structure more robust.

[0057] Electroplating creates pins C6 covering the inner surface of each step 7 (e.g.) Figure 9 and Figure 10 As shown, where Figure 10 for Figure 9 (Enlarged view at point C) The pins C6 of the four adjacent package bodies 1 are electroplated and extended to form a single unit, covering the inner surface of the groove 2 (bottom surface and the inner side connected to the bottom surface). The end face of pin C6 overflows the end face of the groove 2 and is flush with the end face of pin B5, and the electroplating is integrated. Pin C6 does not fill the groove 2 with electroplating, but rather electroplats metal along the inner surface of the groove 2 to cover the inner surface. Pin C is made of metal, and the solder climbs up from the metal pin C. The climbing is easy, and the space of step 7 facilitates observation of the solder climbing.

[0058] Pins A3, B5, C6, and connecting rib 4 can be electroplated simultaneously or separately; this invention does not impose any restrictions on this. Step S3 is the electroplating of pins A3, connecting rib 4, pin B5, and pin C6.

[0059] S4: After the electroplating of each pin is completed, a protective layer is electroplated on the exposed pins. In this invention, pins A3, B5, C6, and connecting rib 4 are made of copper, but other materials are also acceptable. This invention does not impose any restrictions. The protective layer protects the pin metal. The protective layer can be a nickel-gold layer or other suitable plating layers. The protective layer can improve the solderability, corrosion resistance, conductivity, and mechanical reliability of the pins, and prevent the pins from failing during storage, packaging, soldering, etc. The thickness of the electroplated protective layer is the conventional electroplating thickness in this field, and it is also the conventional electroplating protective layer process in this field.

[0060] S5: The dicing groove is cut away along its edge in the dicing groove area, separating the entire package into multiple package 1 product units. Simultaneously, the portion of pin B5 and pin C6 extending to the dicing groove is cut away, and the groove 2 is cut away to remove the portion of the dicing groove, forming a step 7 for each package 1 (e.g., ...). Figure 11 As shown), each package 1 unit has a pin C6 plated along step 7 (the pin C6 remaining on the package 1 after the cutting groove is removed covers the surface of step 7), a pin B5 plated flush with the end face of pin C6, the sides of pin B5 and pin C6 exposed on the two side edges adjacent to step 7 of package 1, and pin A3 connected to the side of connecting rib 4B away from pin C6 via connecting rib 4 (as shown). Figure 12 and Figure 13 As shown), the end faces of pins A3, rib 4, pin B5, and pin C6 are flush. Step S5 is the cutting and separation step.

[0061] In the fields of consumer electronics, automotive electronics, and industrial control, especially for power chips and large-size QFP / BGA packages, drop tests are required to verify the shock resistance of chip devices. These tests simulate the reliability of devices during transportation, assembly, and use, and their core purpose is to verify the strength of the bond between the package body, leads, plating, and interfaces, focusing on identifying failure risks such as lead detachment, delamination, and cracking. Lead detachment risk essentially occurs when the mechanical stress generated by a drop impact exceeds the bonding strength between the lead and the package body, leading to failures such as lead breakage and delamination. In this invention, pin A3 is electrically connected to the internal circuitry of package 1 and serves as the primary external solder joint for mounting the product unit of package 1 to the working area. Pin A3 is connected to pin B5 via a connecting rib 4. The connecting rib 4 is relatively thin, with a width of 50–200 μm. It connects to pin B5 and pin C6 on step 7. A safety margin is provided at the edge of pin A3, preventing chipping of the pin A3 body during finished product cutting. There is no physical delamination between pin A3 and the encapsulation material caused by cutting vibration. Pin A3 has higher thrust strength, resulting in a lower risk of detachment during drop tests. This is especially true for modular products with a large single-piece weight, where the risk of detachment during drop testing is even lower.

[0062] The product unit of the package 1 of this invention is suitable for upright, flip-chip, and modular packaging. The leads of the package 1 protrude, which is beneficial for soldering. The exposed surfaces of leads A3, connecting ribs 4, leads B5, and leads C6 are all electroplated with a protective layer. The surface where the leads of the package 1 are located is the mounting surface of the product unit. The mounting surface of the package 1 has recessed steps 7 at the four corners. Leads C6 are electroplated on the steps 7. The sides of leads C6 and B5 are flush with each other and exposed on the side of the package 1 near the steps 7. When the package 1 is mounted to the working area, solder paste adheres to leads A3, connecting ribs 4, and even leads B5. During soldering, the solder melts at a high temperature (usually 180-260°C, depending on the specific type of solder). The lead surface is clean, free of oxidation, and has strong adhesion. The solder overflows from lead B5 to the end face of lead C6 and spreads from the end face of lead C6 along the side face of lead C6 into the step 7 due to the wetting effect. The soldering quality can be easily judged by observing the solder crawling. The solder crawling of the package 1 is convenient for observation.

[0063] This invention first etches a groove 2 at the center point of a dicing channel, extending to the package 1. Then, electroplated pins B5 extend to the outer edge of the groove 2 surrounding the dicing channel. Pins C6 are electroplated inside the groove 2. After the dicing channel is cut away, a step 7 covered by pins C6 is formed. The process is simple and suitable for substrate-level packaging processes. The size of the groove 2 can be flexibly adjusted according to the dicing channel and product unit size, providing a wide range of process adaptability, suitable for dicing channels with widths of 40μm to 300μm. The etching depth of the groove 2 is 50μm to 500μm, determined according to specific product requirements. The groove 2 extends to a right angle position on the first surface of the adjacent package 1, where the right angle is etched away. The extension width of the groove 2 on the first surface of the package 1 is set according to actual product requirements. The groove 2 is horizontal and flat at the bottom, meaning the depth of the etching on the package 1 to form the step 7 is the same as the etching depth on the dicing channel. In other embodiments, different etching depths can be set at the bottom of the groove 2; this invention does not limit this.

[0064] In all the encapsulation steps involved in this invention, the encapsulating material used is a molding compound, specifically epoxy resin, cyanate ester, polyimide, etc. These materials are low in cost, have good curing performance, and are commonly used encapsulation methods in the field. Encapsulation technology plays an important role in semiconductor manufacturing, mainly in protecting chips, connecting the whole structure, supporting the structure, improving reliability, and promoting technological progress. The encapsulation method in this invention is the commonly used molding injection molding method, but other suitable encapsulation methods are also acceptable. After the encapsulating material cures, the outer surface of the entire encapsulation structure is smooth and flat.

[0065] In all process steps of this invention involving electroplating, a photoresist film is first adhered, followed by photolithography techniques such as exposure and development to form an electroplating protection layer on the surface of the area. Areas not requiring electroplating are protected by the photoresist film, exposing the areas to be electroplated. Then, a metal seed layer is formed on the exposed areas to be electroplated using suitable methods such as sputtering or copper deposition. The metal seed layer is made of copper or other metals. The metal seed layer ensures the bonding strength between subsequent metal-to-metal and metal-to-encapsulating materials, while also providing a surface for conductive ion adhesion, ensuring the electroplating effect. The entire electroplating process and the materials used are common knowledge in the field. In the electroplating process of pin A3, connecting rib 4, pin B5, and pin C6 of this invention, the electroplated metal can be copper, and the protective layer can be a nickel-gold layer, but this invention does not limit this.

[0066] Based on the above-described pin-exposed packaging method, a pin-exposed packaging structure is obtained (e.g., Figure 14 As shown), it includes a package 1, the package 1 having a first surface, and the structure includes the following parts:

[0067] Step 7 is formed by removing the four right-angle etched portions on the first surface of the package 1. Step 7 is formed by etching, with the intersection of the diagonally opposite right-angled lines of adjacent packages 1 as the center point of each group of etching. The etching spreads horizontally from the center point to the right angle of the first surface of the package 1, and then vertically penetrates to form a groove 2 by etching the encapsulating material, thus removing the cutting path. This removes the right angle of the first surface of the package 1 to form step 7. The etching depth of groove 2 is 50μm to 500μm, depending on the specific product requirements. Groove 2 extends to the right angle position of the first surface of the adjacent package 1, and the right angle of the first surface is etched away. The extension width of groove 2 on the first surface of the package 1 is set according to the actual product requirements. Groove 2 is horizontal and flat at the bottom, that is, the depth of etching to form step 7 on the package 1 is the same as the depth of etching on the cutting path. In other embodiments, different etching depths can also be set at the bottom of groove 2, which is not limited in this invention.

[0068] Pin A3 is electroplated on the first surface of package 1 and is electrically connected to the interior of package 1. The internal chip of package 1 is electrically led out through a circuit, one end of which is flush with the first surface of package 1 and exposed. Pin A3 is electroplated to the circuit and covers the circuit. The protruding pins of package 1 facilitate soldering.

[0069] Connecting rib 4 is electroplated and connected to pin A3 near step 7; the width of connecting rib 4 is 50μm~200μm.

[0070] Pin B5 is plated on the side of the connecting rib 4 away from pin A3, and pin B5 extends and is plated on the edge of step 7.

[0071] Pin C6 is electroplated on the surface of step 7, and the end face of pin C6 is electroplated to connect with pin B5.

[0072] Pin A3 is connected to pin B5 via rib 4. Pin B5 and pin C6 are electroplated together as one unit, and the end faces of pins A3, B5, rib 4, and C6 are flush. The sides of pins B5 and C6 are flush with the side of package 1 near step 7 and exposed. The exposed surfaces of pins A3, rib 4, B5, and C6 are all electroplated with a protective layer.

[0073] In this invention, pin A3 is electrically connected to the internal circuitry of package 1 and serves as the main external solder joint for mounting the product unit of package 1 to the working area. It is connected to the edge of pin B5 and pin C6 on step 7 via a thin connecting rib 4. A safety margin is provided at the edge of pin A3, eliminating the risk of chipping of the pin A3 body during finished product cutting. There is no physical delamination between pin A3 and the encapsulating material caused by cutting vibration. Pin A3 has higher thrust strength, resulting in a lower risk of detachment during drop tests. This is especially beneficial for modular products with significant individual component weight, where the risk of detachment during drop testing is even lower.

[0074] The product unit of the package 1 of this invention is suitable for upright, flip-chip, and modular packaging. The surface of the package 1 where the pins are located is the mounting surface of the product unit. The mounting surface of the package 1 has recessed steps 7 at the four corners. Pins C6 are electroplated on the steps 7. The sides of pins C6 and B5 are flush with each other and exposed on the side of the package 1 near the steps 7. When the package 1 is mounted to the working area, solder paste adheres to pins A3, connecting ribs 4, and even pins B5. During soldering, the solder overflows from pin B5 to the end face of pin C6 and spreads from the end face of pin C6 along the side face of pin C6 into the step 7 due to the wetting effect, which facilitates observation of solder flow to judge the soldering quality.

[0075] The present invention first etches a groove 2 at the center point of the dicing channel, extending to the package body 1, and electroplats pins B5 extending to the outer edge of the groove 2 surrounding the dicing channel. Pins C6 are electroplated inside the groove 2. After the dicing channel is cut away, a structure such as a step 7 covered by pins C6 is formed. The process is simple and suitable for substrate-level packaging processes. The size of the groove 2 can be flexibly adjusted according to the dicing channel and product unit size. The process has a wide range of adaptability and is suitable for dicing channels with a width of 40μm to 300μm.

[0076] It is understood that this invention has been described through some embodiments, and those skilled in the art will recognize that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of this invention. Furthermore, under the teachings of this invention, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of this invention. Therefore, this invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this invention are within the protection scope of this invention.

Claims

1. A packaging method with exposed pins, characterized in that, Includes the following steps: Etching groove: The package has multiple uniformly arranged and spaced cuts. The intersection of the right-angled lines connecting adjacent packages is the center point of each group of etching. The etched cuts extend to the package to form a groove. The groove removes the right-angle etched part of the first surface of the package as a step. Electroplated pin A: Pin A is electroplated on the first surface of the package, and pin A is electrically connected to the inside of the package; Electroplated connecting ribs: The connecting ribs are electroplated and connected at the position of pin A near the step; Electroplated pin B: Pin B is electroplated on the side of the connecting rib away from pin A, and pin B extends to be electroplated on the edge of the groove; Electroplated pin C: Pin C is electroplated to cover the inner surface of the groove; Cutting and separating: Cutting removes the cutting path to separate the package unit, and the remaining pins C cover the stepped surface.

2. The packaging method with exposed pins according to claim 1, characterized in that, In the etching groove step, the etching spreads from the center point along the horizontal plane to the right angle of the first surface of the package, and then vertically penetrates the encapsulating material to form a groove.

3. The packaging method with exposed pins according to claim 2, characterized in that, In the step of electroplating pin A, the internal chip of the package is electrically led out through the circuit. One end of the circuit is flush with the first surface of the package and exposed. Pin A is electroplated and connected to the circuit and covers the circuit.

4. The packaging method with exposed pins according to claim 1, characterized in that, In the electroplating connecting rib step, the width of the connecting rib is 50μm to 200μm.

5. The packaging method with exposed pins according to claim 1, characterized in that, In the steps of electroplating pin A, electroplating pin B, and electroplating pin C, pin A is connected to pin B through a connecting rib, and pin B and pin C are electroplated together as one unit. The end faces of pin A, pin B, connecting rib, and pin C are flush, and the side faces of pin B and pin C left after cutting are flush with the side face of the package body near the step and exposed.

6. A package structure with exposed pins, comprising a package body having a first surface, characterized in that, Also includes: The steps are created by removing the four right-angle etched portions on the first surface of the package. Pin A is electroplated on the first surface of the package and is electrically connected to the inside of the package. The connecting ribs are electroplated and connected at the position of pin A near the step; Pin B is plated on the side of the connecting rib away from pin A, and the extension of pin B is plated on the edge of the step; Pin C is electroplated onto the stepped surface, and the end face of pin C is electroplated to connect with pin B.

7. The package structure with exposed pins according to claim 6, characterized in that, The steps are formed by etching. The center point of each group of etching is the intersection of the diagonally right-angled lines connecting adjacent packages. The etching spreads from the center point along the horizontal plane to the right angle of the first surface of the package, and then vertically penetrates the encapsulating material to form a groove, removing the cutting path, so that the right angle of the first surface of the package is removed to form a step.

8. The package structure with exposed pins according to claim 7, characterized in that, The internal chip of the package is electrically led out through a circuit. One end of the circuit is flush with the first surface of the package and exposed. Pin A is electroplated and connected to the circuit and covers the circuit.

9. The package structure with exposed pins according to claim 6, characterized in that, The width of the connecting rib is 50μm to 200μm.

10. The package structure with exposed pins according to claim 6, characterized in that, Pin A is connected to pin B via a connecting rib. Pin B and pin C are electroplated together as one unit. The end faces of pin A, pin B, connecting rib, and pin C are flush. The sides of pin B and pin C are flush with the side of the package body near the step and exposed.

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