PCB production defect detection method based on image analysis
By using image analysis technology, combined with multi-scale feature extraction and defect prediction models, the problems of accuracy and quantitative assessment of defect detection in PCB circuit board production have been solved. This has enabled efficient identification of minute defects and early warning of quality risks, thereby improving the accuracy of detection and production control capabilities.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-01
- Publication Date
- 2026-03-10
AI Technical Summary
Existing PCB manufacturing defect detection methods rely on manual visual inspection, which is inefficient and easily affected by subjective factors. Traditional automated inspection methods have limited ability to identify minute defects and lack quantitative assessment of defect severity, resulting in a high misjudgment rate and failing to meet the production requirements of high precision and high efficiency.
An image-based approach is employed, employing image preprocessing, multi-scale feature extraction, feature map registration and comparison, regional statistics, and difference analysis to construct a model for predicting defects in circuits and solder resist. By combining historical performance feedback data, the severity of defects is quantified and predicted.
It significantly improves the accuracy of identifying minute defects, realizes the transformation from qualitative judgment to quantitative assessment, has the ability to predict defects in newly produced PCB boards, and enhances the initiative and accuracy of quality control throughout the entire process.
Smart Images

Figure CN121639620A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of image analysis technology, and in particular to a method for detecting defects in PCB circuit board production based on image analysis. Background Technology
[0002] Currently, defect detection in PCB manufacturing primarily relies on manual visual inspection or traditional automated optical inspection methods. However, manual inspection is inefficient, susceptible to subjective factors, and fails to meet the demands for high precision and efficiency in production. Existing automated inspection methods are mostly based on single-scale image feature comparison, which has limited ability to identify complex defects such as minute defects, dense circuits, and solder mask deviations. Furthermore, they lack the ability to quantitatively assess and predict the severity of defects, resulting in a high misjudgment rate in practical applications and failing to effectively support the entire process control and optimization of production quality.
[0003] An existing patent discloses a method and system for detecting defects in PCB circuit board production based on image analysis (Publication No. CN120070375A). The technology disclosed in this existing patent suffers from poor environmental adaptability, static feature focus, and insufficient ability to detect minute defects. Specifically, the existing method struggles to maintain detection accuracy under dynamic environmental changes (such as lighting and shooting angle), cannot adaptively adjust the focus on different visual features (such as texture and brightness), and has limited ability to identify minute defects obscured by complex PCB surfaces, resulting in unstable detection results and a high false positive rate. Summary of the Invention
[0004] This invention provides a PCB circuit board manufacturing defect detection method based on image analysis to solve existing technical problems, thereby addressing the issues of over-reliance on manual visual inspection and traditional automated optical inspection.
[0005] To solve the above-mentioned technical problems, according to one aspect of the present invention, more specifically, a method for detecting defects in PCB circuit board manufacturing based on image analysis, comprising the following steps:
[0006] S1. Obtain a surface image of the PCB circuit board and perform image preprocessing on the surface image, including grayscale conversion, noise filtering, and image enhancement.
[0007] S2. Perform multi-scale feature extraction on the preprocessed image to obtain feature maps at multiple scales. The multi-scale feature extraction is based on Gaussian pyramid decomposition and local binary pattern texture feature fusion.
[0008] S3. Based on the feature map, the collected feature map is registered and compared with the feature map of the standard template. Combined with image segmentation, regional statistics and difference analysis, the line defect features and solder resist defect features are obtained.
[0009] The solder resist defect characteristics include solder resist alignment deviation and surface contamination and discoloration; the line defect characteristics include line connectivity defect index and line integrity defect index.
[0010] S4. Based on the circuit connectivity defect index and circuit integrity defect index of the delivered PCB circuit boards in the historical database, construct a circuit defect prediction model for the same model of PCB circuit board.
[0011] S5. Based on the solder mask alignment deviation and surface contamination and discoloration of the delivered PCB circuit boards in the historical database, construct a solder mask defect prediction model for the same model of PCB circuit board.
[0012] S6. Use the model value output by the line defect prediction model to determine whether the newly acquired PCB circuit board has line defects and the severity of the line defects.
[0013] S7. Then, by using the model value output by the solder resist defect prediction model, we can further determine whether the newly acquired PCB circuit board has solder resist defects and the severity of the solder resist defects.
[0014] Furthermore, the image preprocessing in step S1 specifically includes:
[0015] Median filtering was used for noise removal, histogram equalization was used for image enhancement, and gamma correction was used to adjust image contrast to adapt to image acquisition environments under different lighting conditions.
[0016] Furthermore, the multi-scale feature extraction in step S2 further includes:
[0017] Image layers of different resolutions are obtained by Gaussian pyramid decomposition. LBP texture features and gradient magnitudes are calculated for each image layer. Multi-scale feature maps are then weighted and fused to enhance the perception of minute defects and dense lines.
[0018] Furthermore, in step S4, the step of obtaining the line connectivity defect index is as follows:
[0019] 1) Perform skeletonization on the preprocessed and feature-extracted binary image of the line layer to obtain a line skeleton with a single pixel width;
[0020] 2) Perform connectivity analysis on the line skeleton image to identify and count all independently connected line networks, thereby obtaining the actual number of connected networks. ;
[0021] 3) The actual number of connected networks The number of theoretically connected networks obtained from standard template images The connection defect index n of the line was calculated by comparison. The calculation formula is as follows:
[0022] ;
[0023] Furthermore, the steps for obtaining the line integrity defect index are as follows:
[0024] 1) Accurately register the preprocessed and feature-extracted actual line layer binary image with the standard template binary image;
[0025] 2) Perform a logical XOR operation on the two registered images to obtain the difference regions, and separate the short-circuit regions from the difference regions based on morphological operations. Inadequate etching areas and over-etched areas ;
[0026] 3) Combine the total pixel area of the three types of defective regions with the total pixel area of the line region in the standard template. The line integrity defect index 'a' is calculated by comparison as follows:
[0027] .
[0028] Furthermore, in step S5, the step of obtaining the solder resist alignment deviation is as follows:
[0029] 1) From the preprocessed and feature-extracted images, the actual solder mask coverage area mask and the standard pad area mask are obtained respectively through image segmentation technology;
[0030] 2) Calculate the area where the solder mask layer incorrectly covers the solder pads through logical operations. And areas where the solder mask layer should cover in the design but is actually missing. ;
[0031] 3) Compare the total pixel area of the two deviation regions with the total pixel area of the standard pad region. The comparison and calculation yielded the following solder resist alignment deviation s:
[0032] ;
[0033] The steps to obtain surface contamination and discoloration are as follows:
[0034] 1) Extract the grayscale image of the pad surface treatment area from the preprocessed image;
[0035] 2) Calculate the standard deviation of pixel intensity in the grayscale image of the pad area. , used to characterize surface inhomogeneity;
[0036] 3) Standard deviation Compared with the benchmark standard deviation pre-determined using known good samples After normalization, the surface contamination and discoloration d are calculated as follows:
[0037] .
[0038] Furthermore, in step S6, the specific steps for constructing the line defect prediction model are as follows:
[0039] S601. Obtain the circuit connectivity defect index, circuit integrity defect index, and feedback information of the PCB circuit board in subsequent use from the historical database for each PCB circuit board.
[0040] S602. The relationship between the line connectivity defect index and the feedback information and the line integrity defect index and the feedback information are determined sequentially by the control variable method.
[0041] S603. Based on the correlation between the line connectivity defect index and the line integrity defect index, a line defect prediction model is generated by fitting.
[0042] Furthermore, the circuit defect prediction model is a mathematical prediction model generated by using the correlation between the circuit connectivity defect index and the circuit integrity defect index and the performance feedback coefficient in the subsequent use of the PCB circuit board in historical data, determining the impact of each defect index on the performance feedback coefficient by using the control variable method, and fitting the correlation between the circuit connectivity defect index and the circuit integrity defect index.
[0043] This circuit defect prediction model is used to output a comprehensive evaluation value that characterizes the existence and severity of circuit defects based on the circuit connectivity defect index and circuit integrity defect index of newly collected PCB circuit boards.
[0044] Furthermore, in step S7, the specific steps for constructing the weld resistance defect prediction model are as follows:
[0045] S701. Obtain the solder mask alignment deviation, surface contamination and discoloration of each PCB circuit board in the historical database, as well as the feedback information of the PCB circuit board in subsequent use.
[0046] S702. The relationship between solder resist alignment deviation and feedback information, and the relationship between surface contamination and discoloration and feedback information are determined sequentially by the controlled variable method.
[0047] S703. Based on the correlation between solder resist alignment deviation and surface contamination and discoloration, a solder resist defect prediction model is generated.
[0048] Furthermore, the solder mask defect prediction model is based on the correlation between solder mask alignment deviation, surface contamination and discoloration and the performance feedback coefficient of the PCB circuit board in the subsequent use of historical data. The influence of each defect feature on the performance feedback coefficient is determined by the control variable method, and the mathematical prediction model is generated by fitting the correlation between solder mask alignment deviation and surface contamination and discoloration.
[0049] This solder mask defect prediction model is used to output a comprehensive evaluation value characterizing the existence and severity of solder mask defects based on the solder mask alignment deviation and surface contamination and discoloration of newly acquired PCB circuit boards.
[0050] This invention provides a PCB manufacturing defect detection method based on image analysis. Compared with existing technologies, this method achieves the following advantages:
[0051] 1. By integrating multi-scale image feature extraction and defect quantification analysis, this invention significantly improves the identification accuracy of minute defects and dense line anomalies on PCB circuit boards, effectively overcoming the limitations of traditional detection methods in perceiving subtle features, and achieving accurate mapping from the image level to defect features.
[0052] 2. By constructing a defect prediction model based on historical performance feedback, this invention advances defect detection from qualitative judgment to quantitative assessment. It can objectively evaluate the severity of defects based on the model output value, providing reliable data support and decision-making basis for production quality control.
[0053] 3. By introducing quantitative indicators of solder resist layer deviation and surface condition and combining them with historical data modeling, this invention achieves intelligent evaluation of solder resist process defects, effectively solving the problem that traditional methods rely on subjective experience and are difficult to quantify in the detection of solder resist alignment and surface anomalies.
[0054] 4. By establishing prediction models for circuit and solder mask defects respectively and integrating actual performance feedback, this invention has the ability to predict defects in newly produced PCBs. It can detect potential quality risks at an early stage, thereby realizing the transformation from "post-event detection" to "pre-event warning" and improving the initiative of quality control throughout the entire process. Attached Figure Description
[0055] Figure 1 This is a schematic diagram of the present invention;
[0056] Figure 2 This is a graph showing the relationship between the line connectivity defect index and the feedback coefficient in this invention.
[0057] Figure 3 This is a graph showing the relationship between the line integrity defect index and the feedback coefficient in this invention;
[0058] Figure 4 This is a graph showing the relationship between the line connectivity defect index and the line integrity defect index in this invention. Detailed Implementation
[0059] To make the technical solution of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0060] Example 1:
[0061] like Figure 1 As shown, a PCB manufacturing defect detection method based on image analysis includes the following steps:
[0062] Step 1: Obtain a surface image of the PCB circuit board and perform image preprocessing on the surface image, including grayscale conversion, noise filtering, and image enhancement; the image preprocessing in this step specifically includes:
[0063] Median filtering was used for noise removal, histogram equalization was used for image enhancement, and gamma correction was used to adjust image contrast to adapt to image acquisition environments under different lighting conditions.
[0064] Step 2: Perform multi-scale feature extraction on the preprocessed image to obtain feature maps at multiple scales. Multi-scale feature extraction is based on Gaussian pyramid decomposition and local binary pattern texture feature fusion. This step further includes:
[0065] Image layers of different resolutions are obtained by Gaussian pyramid decomposition. LBP texture features and gradient magnitudes are calculated for each image layer. Multi-scale feature maps are then weighted and fused to enhance the perception of minute defects and dense lines.
[0066] Step 3: Based on the feature map, the collected feature map is registered and compared with the feature map of the standard template. Combined with image segmentation, regional statistics and difference analysis, the line defect features and solder resist defect features are obtained. Solder resist defect features include solder resist alignment deviation and surface contamination and discoloration. Line defect features include line connectivity defect index and line integrity defect index.
[0067] Step 4: Based on the circuit connectivity defect index and circuit integrity defect index of delivered PCB circuit boards in the historical database, construct a circuit defect prediction model for the same model of PCB circuit board; the steps to obtain the circuit connectivity defect index in this step are as follows:
[0068] 1) Perform skeletonization on the preprocessed and feature-extracted binary image of the line layer to obtain a line skeleton with a single pixel width;
[0069] 2) Perform connectivity analysis on the line skeleton image to identify and count all independently connected line networks, thus obtaining the actual number of connected networks. ;
[0070] 3) The actual number of connected networks The number of theoretically connected networks obtained from standard template images The connection defect index n of the line was calculated by comparison. The calculation formula is as follows:
[0071] ;
[0072] Furthermore, the steps for obtaining the line integrity defect index are as follows:
[0073] 1) Accurately register the preprocessed and feature-extracted actual line layer binary image with the standard template binary image;
[0074] 2) Perform a logical XOR operation on the two registered images to obtain the difference regions, and separate the short-circuit regions from the difference regions based on morphological operations. Inadequate etching areas and over-etched areas ;
[0075] 3) Combine the total pixel area of the three types of defective regions with the total pixel area of the line region in the standard template. The line integrity defect index 'a' is calculated by comparison as follows:
[0076] .
[0077] Step 5: Determine whether the newly acquired PCB board has circuit defects and the severity of those defects by using the model values output by the circuit defect prediction model. The specific steps for constructing the circuit defect prediction model in this step are as follows:
[0078] 1) Obtain the circuit connectivity defect index, circuit integrity defect index, and feedback information of the PCB circuit board in subsequent use from the historical database for each PCB circuit board;
[0079] Feedback on the PCB circuit board during subsequent use can be evaluated by in-house professionals in this field based on its electrical performance. Electrical performance includes:
[0080] Insulation resistance: Measure the insulation resistance between different networks and layers in a high humidity environment to assess whether it meets the design specifications and prevent leakage or short circuit.
[0081] On-resistance: Measure the DC resistance of traces and vias to ensure it is low enough not to cause excessive voltage drop and heat generation.
[0082] Impedance control: For high-speed digital or radio frequency circuits, use a TDR (time domain reflectometer) to measure the actual impedance of critical signal lines to see if it matches the design value. Mismatch will cause signal reflection and integrity degradation.
[0083] Current carrying capacity: Under actual or simulated load conditions, monitor the temperature rise of critical power lines to ensure that the line width is sufficient to carry the current without overheating.
[0084] High-frequency performance: Use a vector network analyzer (VNA) to evaluate S-parameters (such as insertion loss and return loss) to ensure that signal attenuation and reflection are within acceptable ranges at high frequencies.
[0085] The PCBs are then ranked according to their assessed electrical performance, and a performance feedback coefficient between 0 and 1 is output. For example, if 1000 sample PCBs are tested, and one sample PCB is assessed by a professional in the field as having better electrical performance than the other 500 sample PCBs, then the performance feedback coefficient for that sample PCB is 0.50.
[0086] 2) Determine the relationship between the circuit connectivity defect index and the performance feedback coefficient of the PCB board in subsequent use by using the controlled variable method;
[0087] For example, from 1000 PCBs, 100 samples with a circuit integrity defect index of 0.5 are selected, and the performance feedback coefficient of these 100 PCBs is denoted as coefficient N. Then, the output value of the circuit defect prediction model is... The mathematical relationship between the line connectivity defect index and the line connectivity defect index is as follows:
[0088] (Formula 1);
[0089] In Formula 1 above, , Used for control A constant that approximates the coefficient N. And by... Figure 2 The data in the middle can be determined , When, in Formula 1 It approximates the coefficient N (where, express Figure 2 The curve in the middle, Figure 2 The dots in the diagram represent coefficients N).
[0090] 3) Determine the relationship between the circuit integrity defect index and the performance feedback coefficient of the PCB board in subsequent use by using the controlled variable method;
[0091] 4) For example, from 1000 PCBs, select 100 samples where the circuit connectivity defect index is 0.5, and denote the performance feedback coefficient of these 100 PCBs as coefficient A. Then, the output value of the circuit defect prediction model is... The mathematical relationship between the line integrity defect index and the line integrity defect index is as follows:
[0092] (Formula 2);
[0093] In formula 2 above, , Used for control A constant that approximates coefficient A. And by... Figure 2 The data in the middle can be determined , When, in Formula 2 It approximates the coefficient A (where, express Figure 3 The curve in the middle, Figure 3 The point in the diagram represents the coefficient A).
[0094] 4) Based on the correlation between the line connectivity defect index and the line integrity defect index, a line defect prediction model is generated by fitting.
[0095] For example, select 100 consecutive sample data points from 1000 PCB circuit boards, including the circuit connectivity defect index, the circuit integrity defect index, and the coefficient X. Then, the relationship between Formula 1 and Formula 2 above is:
[0096] × (Formula 1) × (Formula 2) + ;
[0097] In the above, , Used for control A constant that approximates the coefficient X. And by... Figure 4 The data in the middle can be determined , When, in the above formula It approximates the coefficient X (where, express Figure 3 The curve in the middle, Figure 3 The points in the diagram represent coefficients A. Therefore, the mathematical expression for the circuit defect prediction model that can be obtained from these 1000 PCB circuit boards is:
[0098] ;
[0099] In the above formula, This represents the value output by the line defect prediction model, when The larger the value, the greater the failure caused by circuit defects in the PCB circuit board analyzed by the circuit defect prediction model.
[0100] The innovation of this embodiment lies in constructing a line defect prediction model based on historical performance feedback by combining multi-scale feature extraction with a quantified defect index.
[0101] First, the ability to perceive minute circuit features is enhanced by fusing Gaussian pyramids and LBP textures. Then, the circuit connectivity defect index is accurately calculated through skeletonization and connectivity analysis. The circuit integrity defect index is quantified by combining morphological difference separation technology. Finally, based on the correlation between the defect index and electrical performance feedback in historical data, a mathematical model that can accurately predict the existence and severity of circuit defects on new boards is fitted using the controlled variable method. This achieves a closed-loop judgment from image features to quality warning, significantly improving the accuracy and predictability of detection.
[0102] Example 2:
[0103] like Figure 1 As shown, a PCB manufacturing defect detection method based on image analysis includes the following steps:
[0104] Step 1: Acquire the surface image of the PCB circuit board and perform image preprocessing on the surface image, including grayscale conversion, noise filtering, and image enhancement. The image preprocessing in this step specifically includes: using median filtering to remove noise, using histogram equalization to enhance the image, and using gamma correction to adjust the image contrast to adapt to the image acquisition environment under different lighting conditions.
[0105] Step 2: Perform multi-scale feature extraction on the preprocessed image to obtain feature maps at multiple scales. Multi-scale feature extraction is based on Gaussian pyramid decomposition and local binary pattern texture feature fusion. This step further includes:
[0106] Image layers of different resolutions are obtained by Gaussian pyramid decomposition. LBP texture features and gradient magnitudes are calculated for each image layer. Multi-scale feature maps are then weighted and fused to enhance the perception of minute defects and dense lines.
[0107] Step 3: Based on the feature map, the collected feature map is registered and compared with the feature map of the standard template. Combined with image segmentation, regional statistics and difference analysis, the features of line defects and solder resist defects are obtained.
[0108] Solder mask defect characteristics include solder mask alignment deviation and surface contamination and discoloration; line defect characteristics include line connectivity defect index and line integrity defect index.
[0109] Step 4: Based on the solder mask alignment deviation and surface contamination and discoloration of delivered PCBs in the historical database, construct a solder mask defect prediction model for the same model of PCB. The steps for obtaining the solder mask alignment deviation are as follows:
[0110] 1) From the preprocessed and feature-extracted images, the actual solder mask coverage area mask and the standard pad area mask are obtained respectively through image segmentation technology;
[0111] 2) Calculate the area where the solder mask layer incorrectly covers the solder pads through logical operations. And areas where the solder mask layer should cover in the design but is actually missing. ;
[0112] 3) Compare the total pixel area of the two deviation regions with the total pixel area of the standard pad region. The comparison and calculation yielded the following solder resist alignment deviation s:
[0113] ;
[0114] The steps to obtain surface contamination and discoloration are as follows:
[0115] 1) Extract the grayscale image of the pad surface treatment area from the preprocessed image;
[0116] 2) Calculate the standard deviation of pixel intensity in the grayscale image of the pad area. , used to characterize surface inhomogeneity;
[0117] 3) Standard deviation Compared with the benchmark standard deviation pre-determined using known good samples After normalization, the surface contamination and discoloration d are calculated as follows:
[0118] .
[0119] Step 5: Next, using the model values output by the solder mask defect prediction model, further determine whether the newly acquired PCB board has solder mask defects and the severity of these defects. The specific steps for constructing the solder mask defect prediction model in this step are as follows:
[0120] 1) Obtain the solder mask alignment deviation, surface contamination and discoloration of each PCB in the historical database, as well as the feedback information of the PCB in subsequent use;
[0121] 2) The relationship between solder resist alignment deviation and feedback information, and the relationship between surface contamination and discoloration and feedback information are determined sequentially by using the controlled variable method;
[0122] 3) Based on the correlation between solder resist alignment deviation and surface contamination and discoloration, a solder resist defect prediction model is generated.
[0123] The solder mask alignment deviation, surface contamination, and discoloration in the new PCB are input into the solder mask defect prediction model. The output value of the solder mask defect prediction model is then used to determine whether the PCB has failed due to solder mask defects.
[0124] The core innovation of this embodiment lies in the construction of a defect prediction model for solder resist processes:
[0125] By accurately locating the solder mask alignment deviation area through image segmentation and logical operations, and quantifying the degree of surface contamination and discoloration using the grayscale statistical characteristics of the pad area, two key features are formed: solder mask alignment deviation degree and surface contamination and discoloration degree. Then, by combining the correlation between the above features in historical data and subsequent performance feedback, the influence weight of each feature is analyzed using the controlled variable method, and a comprehensive evaluation model for solder mask defects is fitted. This model can automatically output the severity evaluation value of solder mask defects based on the feature values of the newly acquired board, effectively solving the problem of insufficient quantitative evaluation of minor defects and surface anomalies in the solder mask layer by traditional methods.
[0126] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.
Claims
1. A method for detecting defects in PCB production based on image analysis, characterized in that, The method comprises the following steps: S1, acquiring a surface image of a PCB circuit board, and performing image preprocessing on the surface image, including grayscale, noise filtering and image enhancement; S2, performing multi-scale feature extraction on the preprocessed image to obtain feature maps at multiple scales, the multi-scale feature extraction being based on Gaussian pyramid decomposition and local binary pattern texture feature fusion; S3, based on the feature maps, registering and comparing the feature maps collected with the feature maps of a standard template, and combining image segmentation, region statistics and difference analysis to obtain circuit defect features and solder mask defect features; The solder mask defect features include solder mask alignment deviation and surface contamination and discoloration, and the circuit defect features include circuit connectivity defect index and circuit integrity defect index; S4, based on the circuit connectivity defect index and the circuit integrity defect index of the delivered PCB circuit boards in the historical database, a circuit defect prediction model of the same type of PCB circuit board is constructed; S5, and then based on the solder mask alignment deviation and the surface contamination and discoloration of the delivered PCB circuit boards in the historical database, a solder mask defect prediction model of the same type of PCB circuit board is constructed; S6, the model value output by the circuit defect prediction model is used to determine whether the newly collected PCB circuit board has a circuit defect and the severity of the circuit defect; S7, and then the model value output by the solder mask defect prediction model is used to further determine whether the newly collected PCB circuit board has a solder mask defect and the severity of the solder mask defect.
2. The image analysis based PCB line board production defect detection method according to claim 1, characterized in that: The image preprocessing in step S1 specifically includes: Using median filtering for noise removal, using histogram equalization for image enhancement, and adjusting image contrast through gamma correction to adapt to different image acquisition environments under different lighting conditions.
3. The image analysis based PCB line board production defect detection method according to claim 1, characterized in that: The multi-scale feature extraction in step S2 further includes: Obtaining image layers of different resolutions through Gaussian pyramid decomposition, calculating LBP texture features and gradient amplitudes for each layer of images, and performing weighted fusion on multi-scale feature maps to enhance the perception ability of micro defects and dense circuits.
4. The image analysis based PCB line board production defect detection method according to claim 1, characterized in that: In step S4, the steps of obtaining the circuit connectivity defect index are as follows: 1) Skeletonization processing is performed on the binary image of the circuit layer after preprocessing and feature extraction to obtain a single-pixel-width circuit skeleton; 2) Perform connected component analysis on the line skeleton image, identify and count all independent line networks that are electrically connected to each other, and obtain the actual number of connected networks ; 3) the actual number of connected networks the theoretical number of connected networks obtained from the standard template image are compared, and the connectivity defect index n of the line is calculated according to the following formula: ; And the steps of obtaining the circuit integrity defect index are as follows: 1) Accurately register the actual circuit layer binary image after preprocessing and feature extraction with the standard template binary image; 2) performing logical exclusive-or operation on the two registered images to obtain a difference region, and separating a short-circuit region from the difference region based on morphological operation , an under-etch region , and an over-etch region ; 3) Calculate the total area of the three types of defect regions and the total area of the circuit region in the standard template The line integrity defect index a is calculated by comparison. 。 5. The image analysis based PCB line board production defect detection method according to claim 1, characterized in that: In step S5, the steps of obtaining the solder mask alignment deviation are as follows: 1) From the image after preprocessing and feature extraction, the actual solder mask layer coverage area mask and the standard pad area mask are obtained through image segmentation technology; 2) Calculate the area of the solder resist layer error covering the pad by logical operation and the area of the solder resist layer missing in design ; 3) the total pixel area of the two deviation regions and the total pixel area of the standard pad region The alignment deviation degree s of the solder resist is calculated by comparison as follows: ; Then, the steps of obtaining the surface contamination and discoloration are as follows: 1) Extract the grayscale image of the pad surface treatment area from the preprocessed image; 2) calculating the standard deviation of pixel intensity of the solder pad area grayscale image to characterize the non-uniformity of the surface; 3) the standard deviation with the reference standard deviation predetermined in advance by a known good sample The surface contamination and the degree of discoloration d are calculated by normalizing the above-mentioned values as follows: 。 6. The image analysis based PCB line board production defect detection method according to claim 1, characterized in that: In step S6, the specific steps of constructing the circuit defect prediction model are: S601, acquire the line connectivity defect index, the line integrity defect index of each PCB in the historical database, and the feedback information of the PCB in subsequent use; S602, determine the relationship between the line connectivity defect index and the feedback information, and the relationship between the line integrity defect index and the feedback information by the control variable method; S603, generate a line defect prediction model according to the correlation between the line connectivity defect index and the line integrity defect index.
7. The image analysis based PCB line board production defect detection method according to claim 6, characterized in that: The line defect prediction model is a mathematical prediction model generated by determining the influence of each defect index on the performance feedback coefficient by the control variable method, and fitting according to the correlation between the line connectivity defect index and the line integrity defect index and the performance feedback coefficient in subsequent use of the PCB based on the correlation between the line connectivity defect index and the line integrity defect index and the performance feedback coefficient in the historical data. The line defect prediction model is used to output a comprehensive evaluation value representing the existence and severity of line defects according to the line connectivity defect index and the line integrity defect index of the newly collected PCB.
8. The image analysis based PCB line board production defect detection method according to claim 1, characterized in that: The specific steps of constructing the solder mask defect prediction model in step S7 are: S701, acquire the solder mask alignment deviation, surface contamination and discoloration of each PCB in the historical database, and the feedback information of the PCB in subsequent use; S702, determine the relationship between the solder mask alignment deviation and the feedback information, and the relationship between the surface contamination and discoloration and the feedback information by the control variable method; S703, generate a solder mask defect prediction model according to the correlation between the solder mask alignment deviation and the surface contamination and discoloration.
9. The image analysis based PCB line board production defect detection method according to claim 8, characterized in that: The solder mask defect prediction model is a mathematical prediction model generated by determining the influence of each defect feature on the performance feedback coefficient by the control variable method, and fitting according to the correlation between the solder mask alignment deviation and the surface contamination and discoloration and the performance feedback coefficient in subsequent use of the PCB based on the correlation between the solder mask alignment deviation and the surface contamination and discoloration and the performance feedback coefficient in the historical data. The solder mask defect prediction model is used to output a comprehensive evaluation value representing the existence and severity of solder mask defects according to the solder mask alignment deviation and the surface contamination and discoloration of the newly collected PCB.
Citation Information
Patent Citations
PCB production defect detection method and system based on image analysis
CN120070375A