Configurable multi-specification video stream transmission method and device based on FPGA chip AXI bus

Abstract

The invention discloses a configurable multi-specification video stream transmission method and device based on an FPGA chip AXI bus, and is applied to the technical field of data processing.The method comprises the steps that a single FPGA chip serves as a core, a user transmission instruction is received firstly, pre-stored AXI bus bandwidth allocation, PL / PS end interaction, video source access and coding and decoding parameters are combined, and a multi-specification video stream is obtained; and generating transmission mode starting and bus configuration information. Then, PS end encoding and decoding are started, a PL end preset path is triggered to be started, and video source information and bus real-time bandwidth data are obtained; through standardized conversion and bandwidth processing, comparison reference information of the size of an RGB image and a bus target bandwidth is generated, an error signal and channel adjustment information are generated based on a bandwidth dynamic random allocation control rule, channel control operation information is obtained in combination with a chip internal resource state, and finally the channel control operation information is converted into a transmission action. According to the method, adaptive parameters, calibration rules and the like are extracted, classified and generated, efficient transmission of multi-specification video streams is achieved, the total bandwidth is fixed, and the bandwidth of each path of coding is flexibly allocated.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a configurable multi-specification video stream transmission method and apparatus based on the FPGA chip AXI bus. Background Technology

[0002] Existing single-chip solutions mostly adopt a "fixed bandwidth allocation" strategy (e.g., allocating a fixed 1.2GB / s bandwidth to a 4K@60 stream), failing to consider the different bandwidth requirements of different video stream specifications (e.g., one 4K@60 stream requires approximately 1.44GB / s bandwidth, while two 4K@30 streams each require only 0.72GB / s bandwidth). This leads to two types of problems: bandwidth waste: when transmitting low-specification video streams (e.g., two 4K@30 streams), the total bandwidth utilization is less than 50% (the fixed allocation of 1.44GB / s is not actually needed; although the values ​​are the same, resources are not optimized according to the "equal distribution" logic); insufficient bandwidth: when transmitting high-specification video streams (e.g., one 4K@60 stream), the fixed bandwidth is lower than the actual requirement, resulting in stuttering and packet loss (packet loss rate is usually ≥0.5%). Furthermore, existing solutions do not set a "total bandwidth benchmark," making it easy for the total bandwidth to exceed limits when transmitting multiple streams (e.g., the total bandwidth of four 2K@60 streams exceeds 1.5GB / s), causing data corruption.

[0003] FPGA chips consist of a PL (programmable logic part, responsible for hardware-accelerated transmission) and a PS (ARM processor part, responsible for encoding and decoding). Existing technologies have the following coordination defects: encoding / decoding and path activation are not synchronized: after the PS starts encoding and decoding, the PL bus path needs to be manually configured and enabled (e.g., triggered by external commands), with a synchronization delay of ≥200ms, resulting in a "black screen" during the initial transmission phase of the video stream; fixed interaction parameters: the interaction clock (e.g., 300MHz) and data bit width (e.g., 128bit) of the PL / PS end are not matched with the video stream specifications. When transmitting 4K@60 streams, insufficient bit width leads to bandwidth bottlenecks, and when transmitting 2K@60 streams, excessive clock speeds lead to power consumption waste.

[0004] Existing technologies lack compatibility with video source formats and have not established a "format-path" adaptation mechanism. Format conversion is not standardized: different conversion algorithms are required for different video sources, but existing solutions lack unified grouping and classification of these algorithms, resulting in chaotic output formats (e.g., some are YUV420, some are RGB565), making direct access to the AXI bus for transmission impossible. Path activation is not dynamically adjusted: the number of transmission paths is fixed (e.g., fixed at 4 paths), and is not adjusted according to video stream specifications (e.g., 4 paths are still activated when transmitting 1 4K@60 stream, leading to resource waste). Furthermore, the data type of the paths (e.g., whether they include frame synchronization signals) does not match the video stream requirements, resulting in image offset (offset ≥ 2 pixels). Summary of the Invention

[0005] To solve the above-mentioned technical problems, the present invention provides the following technical solution: A configurable multi-specification video stream transmission method based on an FPGA chip's AXI bus includes: receiving a user's video transmission specification command and pre-stored FPGA system basic configuration information to generate transmission mode startup and AXI bus configuration basic setting information; based on the transmission mode startup command and AXI bus configuration settings, starting the encoding / decoding function on the FPGA chip's PS side and triggering the PL side bus path activation to generate video source information and raw data of the AXI bus real-time transmission bandwidth; receiving a pre-stored video stream standardization conversion algorithm and bandwidth data processing rules, processing the video source information and raw data of the AXI bus real-time transmission bandwidth, and generating a benchmark information comparing the size of the RGB image with the bus target bandwidth. The system processes the RGB image size and bus target bandwidth ratio against a reference information based on bandwidth dynamic random allocation control rules to generate bandwidth allocation error signals and path activation adjustment information. It then processes the path activation adjustment information and FPGA chip internal resource status information to generate bus path quantity and video stream specification matching control operation information. Based on preset video transmission mode operation requirements and real-time bandwidth feedback, the control operation information is transformed into actual video stream transmission actions. The system extracts and classifies transmission mode requirements, bandwidth feedback, control operation information, and FPGA chip attributes to generate transmission mode adaptation parameters, bandwidth calibration rules, resource occupancy thresholds, and video stream and AXI bus linkage mapping information.

[0006] A configurable multi-specification video stream transmission device based on an FPGA chip's AXI bus includes: a construction module for receiving user video transmission specification commands and pre-stored FPGA system basic configuration information, and generating transmission mode startup and AXI bus configuration basic setting information; a processing module for, based on the transmission mode startup command and AXI bus configuration settings, starting the FPGA chip's PS-side encoding / decoding function and triggering the PL-side bus path activation, generating video source information and raw AXI bus real-time transmission bandwidth data; receiving pre-stored video stream standardization conversion algorithms and bandwidth data processing rules, processing the video source information and raw AXI bus real-time transmission bandwidth data, and generating the size of the RGB image and the bus path... The system compares the bandwidth with the baseline information; it processes the comparison information between the size of the RGB image and the target bandwidth of the bus based on the bandwidth dynamic random allocation control rules, generating bandwidth allocation error signals and path activation adjustment information; it processes the path activation adjustment information and the internal resource status information of the FPGA chip to generate control operation information for matching the number of bus paths with the video stream specifications; based on the preset video transmission mode operation requirements and real-time bandwidth feedback, it transforms the control operation information into actual video stream transmission actions, extracts and classifies the transmission mode requirements, bandwidth feedback, control operation information and FPGA chip attributes, and generates transmission mode adaptation parameters, bandwidth calibration rules, resource occupancy thresholds, and video stream and AXI bus linkage mapping information.

[0007] Its beneficial effects are as follows: This invention provides a configurable multi-specification video stream transmission method based on the FPGA chip AXI bus. By receiving user instructions and pre-stored configurations (including AXI bandwidth allocation, PL / PS interaction parameters, etc.), it generates transmission and bus configuration information; then it starts PS-side encoding and decoding, triggers PL-side paths, and obtains initial decoding and real-time bandwidth data; after standardization conversion and bandwidth processing, it generates a benchmark information comparing the size of the RGB image with the bus target bandwidth; based on the bandwidth dynamic random allocation control rules, it generates error signals and path adjustment information; combined with the chip's internal resources, it generates control information matching the path and video stream specifications; finally, it transforms into transmission actions, extracts adaptation parameters, and realizes efficient transmission of multi-specification video streams, with a fixed total bandwidth and flexible bandwidth allocation for each encoded path. Attached Figure Description

[0008] Figure 1 A flowchart illustrating a configurable multi-specification video stream transmission method based on an FPGA chip AXI bus, provided as an embodiment of the present invention; Figure 2 This is a schematic diagram of a configurable multi-specification video stream transmission device based on an FPGA chip AXI bus, provided as an embodiment of the present invention. Detailed Implementation

[0009] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention. Figure 1 This application describes a configurable multi-specification video stream transmission method based on an FPGA chip AXI bus according to an exemplary embodiment of the present application.

[0010] In this application embodiment, a configurable multi-specification video stream transmission method based on the FPGA chip AXI bus is provided, such as... Figure 1 As shown: S101 receives user video transmission specification instructions and pre-stored FPGA system basic configuration information, and generates transmission mode startup and AXI bus configuration basic setting information.

[0011] In one implementation, the user's video transmission specification command focuses on the specific specification requirements of the video stream transmission and can be flexibly configured. The number of channels can be 1, 2, 3, or 4, and the resolution can be 4K@60, 4K@30, 2K@60, or 2K@30, in any combination. This solution takes three configurable transmission requirements—one 4K@60 channel, two 4K@30 channels, and four 2K@60 channels—as examples. Each requirement corresponds to specific video stream parameters and application scenarios. For the requirement of one 4K@60 video stream transmission, when the user needs to display ultra-high-definition video (such as real-time display of 4K resolution monitoring footage or playback of ultra-high-definition video content), a one-channel 4K@60 video stream transmission command will be initiated. This command explicitly requires the transmitted video stream resolution to be 3840×2160 (4K), the frame rate to be 60fps, and only a single transmission channel is required. It is suitable for scenarios with extremely high requirements for image clarity and smoothness, such as professional film and television production monitoring and high-end conference large-screen displays.

[0012] For the requirement of transmitting two 4K@30 video streams, if a user needs to process two ultra-high-definition video data streams simultaneously (such as synchronous transmission of monitoring footage from two 4K cameras, or split-screen display of two 4K document presentations), a two-channel 4K@30 video stream transmission command will be initiated. The command specifies that each video stream has a resolution of 3840×2160 (4K) and a frame rate of 30fps, requiring two transmission channels. This is suitable for scenarios that require high image clarity but can appropriately reduce the frame rate and need to transmit multiple streams in parallel, such as dual-area 4K monitoring in shopping malls or dual-screen 4K document presentations in enterprises.

[0013] For the requirement of transmitting 4-channel 2K@60 video streams, when a user needs to transmit multiple high-definition video streams simultaneously (such as data acquisition from four 2K resolution cameras or multi-screen preview of four 2K video content streams), a 4-channel 2K@60 video stream transmission command will be initiated. The command specifies that each video stream has a resolution of 1920x1080 (2K) and a frame rate of 60fps, requiring a total of four transmission channels. This is suitable for scenarios that require parallel processing of multiple high-definition video streams and have certain requirements for smooth video playback, such as the initial video acquisition for multi-camera live streaming and the synchronous transmission of 2K monitoring data from multiple areas.

[0014] The pre-stored basic configuration information of the FPGA system is a core set of parameters supporting configurable video stream transmission. It covers three major categories of key parameters: AXI bus bandwidth allocation, PL-PS interaction, and video source access and encoding / decoding. Each parameter has a clear configuration standard and example. For AXI bus bandwidth allocation parameters corresponding to various transmission specifications, the system pre-stores AXI bus bandwidth allocation rules matching the transmission specifications of 1 channel 4K@60, 2 channels 4K@30, and 4 channels 2K@60, with the core total bandwidth fixed at 1.5GB (bytes). For a single 4K@60 stream, the pre-stored bandwidth allocation parameter is "1.5GB bandwidth dedicated to each stream" to ensure the high bandwidth requirements of the 4K@60 video stream. For a two-stream 4K@30 stream, the pre-stored parameter is "1.5GB bandwidth shared equally between the two streams, 0.75GB per stream," to ensure simultaneous transmission of the two 4K@30 video streams with sufficient bandwidth. For a four-stream 2K@60 stream, the pre-stored parameter is "1.5GB bandwidth shared equally between the four streams, 0.375GB per stream," to meet the bandwidth requirements for parallel transmission of the four 2K@60 video streams. All bandwidth allocation parameters are clearly labeled in GB (bytes) to avoid unit confusion.

[0015] Regarding the basic interaction parameters between the PL (Programmable Logic Unit) and PS (ARM Processor Unit) sides of the FPGA chip, the system pre-stores the basic parameters for interaction between the PL side (Programmable Logic Unit) and the PS side (ARM Processor Unit) via the AXI bus, including the interaction clock frequency, data bit width, and transmission protocol version. Specifically, the interaction clock frequency is pre-stored at 100MHz to ensure timing stability of bus transmission; the data bit width is pre-stored at 128bit to adapt to high-bandwidth data transmission requirements; and the transmission protocol version is pre-stored at AXI4, compatible with mainstream FPGA chip AXI bus standards.

[0016] The signal access rules are as follows: For the input video source, the system pre-stores explicit access rules. The pre-stored access rules are: "Supports RTSP / RTP protocol, default port number 554, maximum access bitrate 100Mbps; supports USB 3.0 interface, compatible with FAT32 / NTFS file system, can recognize MP4 / AVI / MKV format video files; supports UVC1.1 protocol, default resolution adaptation 2K / 4K, frame rate adaptation 30 / 60fps", ensuring that the video data of the input video source can be stably accessed to the FPGA system through standard network protocols, USB interface or direct access.

[0017] Based on the received user video transmission specification instructions and the pre-stored FPGA system basic configuration information, the system automatically matches the corresponding parameters, generates transmission mode start instructions and AXI bus configuration basic settings, ensuring that video stream transmission can be accurately started and run according to user needs.

[0018] S102, based on the transmission mode start command and AXI bus configuration settings, starts the encoding and decoding function of the FPGA chip PS side and triggers the PL side bus path to be enabled, generating video source information and raw data of AXI bus real-time transmission bandwidth.

[0019] In one implementation, the encoding and decoding parameters of the FPGA chip's PS side are grouped and categorized according to preset encoding and decoding startup rules, generating encoding and decoding modes and associated processing parameter information corresponding to each rule. The preset encoding and decoding startup rules use "video source type + transmission specification" as the core classification basis, clarifying the encoding and decoding parameter configuration standards of the FPGA chip's PS side (ARM part) in different scenarios. Grouping and categorization ensures accurate matching between encoding and decoding functions and video stream transmission requirements. For IP streams (RTSP / RTP protocol access, H.265 encoding) requiring one-channel 4K@60 transmission, the encoding and decoding parameters are categorized into "Ultra-High Definition Single-Channel Decoding Group" according to preset rules, generating the encoding and decoding mode as "Single-Channel 4K@60 H.265 Decoding Mode." Associated processing parameters include: 4 decoding reference frames, CABAC entropy encoding method, adaptive resolution of 3840×2160, RGB888 (24-bit color depth) output format after decoding, and a decoding rate adapted to 60fps. Simultaneously, the encoding and decoding buffer size is configured to 16MB (to meet the temporary storage requirements of 4K@60 video frames).

[0020] For USB 3.0 devices (USB flash drives / hard drives storing H.264 encoded MP4 files) requiring dual-channel 4K@30 transmission, they are categorized as "Ultra-HD Dual-Channel Parallel Decoding Group" according to preset rules. The encoding / decoding mode is "Dual-channel 4K@30 H.264 Decoding Mode". The associated processing parameters include: 16×16 macroblock size per channel, 9 intra-frame prediction modes, fixed resolution of 3840×2160, frame rate of 30fps, output format RGB888, and dual independent decoding channels (channel 1 corresponds to USB device 1 interface, and channel 2 corresponds to USB device 2 interface). Each channel has an 8MB decoding buffer to ensure interference-free parallel processing of dual-channel data. For the UVC1.1 camera (outputting raw YUV422 video) requiring 4-channel 2K@60 transmission, it is grouped into a "high-definition four-channel parallel encoding and decoding group" according to preset rules (encoding before transmission to ensure bandwidth adaptation). The encoding and decoding mode is "four-channel 2K@60 YUV to RGB + H.265 encoding mode". The associated processing parameters include: YUV422 to RGB color space conversion matrix (BT.709 standard), H.265 encoding bitrate control method CBR (target bitrate of 5Mbps per channel), resolution 1920x1080, frame rate 60fps. It is configured with four-channel parallel encoding and decoding units, each channel has a 4MB encoding buffer, and the encoded data is automatically marked with "camera number + frame number" for easy subsequent path matching.

[0021] Based on the video stream transmission requirements, the layout design of the AXI bus paths on the PL side is carried out. The path activation standards, data types, and transmission range information are obtained to generate bus path activation design information. The transmission requirement is a single-channel 4K@60 target RGB image (3840×2160, 60fps, approximately 24MB per frame). Based on this, the path activation content is designed as follows: the path activation standard is "enable any one of the four preset PL side paths (e.g., path 1), and disable the other three paths"; the path data type is "standard RGB888 image data (24 bits / pixel), with frame synchronization signals (HSYNC / VSYNC)"; and the transmission range information is "single-channel transmission bandwidth 1.5GB (bytes) / s (sufficient for 4K@60 video)". The bandwidth requirement for the stream is 24MB / frame × 60 frames / s = 1.44GB / s, with a 0.06GB / s redundancy reserved. The transmission direction is fixed as PS end → PL end, and the data transmission address of the path is mapped to the display buffer area of ​​the PL end (address range 0x40000000-0x47FFFFFF). The final bus path activation design information is "AXI bus path 1 enabled, transmitting RGB888 image data (including frame synchronization signal), bandwidth 1.5GB / s, address mapping 0x40000000-0x47FFFFFF".

[0022] The transmission requirement is two channels of 4K@30 target RGB images (3840×2160 each, 30fps, 24MB per frame, single-channel bandwidth 0.72GB / s). The channel activation criteria are: "Enable PL-end preset channels 1 and 2, disable channels 3 and 4"; channel data type is "two independent RGB888 image data channels (each with frame synchronization signals, labeled 'channel 1 data' and 'channel 2 data')"; transmission range information is "0.75GB (bytes) / s per channel (meeting the 0.72GB / s requirement, reserving 0.03GB / s redundancy)". The total bandwidth is 1.5GB / s, the transmission direction is PS end → PL end, the data address of channel 1 is mapped to 0x40000000-0x43FFFFFF, and the data address of channel 2 is mapped to 0x44000000-0x47FFFFFF. The bus channel enable design information is "AXI bus channels 1 and 2 enabled, each transmitting RGB888 image data (including frame synchronization signal), single channel bandwidth 0.75GB / s, address mapping is 0x40000000-0x43FFFFFF and 0x44000000-0x47FFFFFF respectively".

[0023] The transmission requirement is four channels of 2K@60 target RGB images (1920x1080 per channel, 60fps, approximately 10.37MB per frame, single channel bandwidth 0.62GB / s). The channel activation criteria are: "Enable all four preset channels on the PL end (channels 1-4)"; channel data type is "four independent RGB888 image data channels (each with frame synchronization signal and camera number marking)"; transmission range information is "0.375GB (bytes) / s transmission bandwidth per channel (meeting the 0.62GB / s requirement, reserving 0.005GB / s redundancy), total bandwidth 1.5GB / s transmission..." The direction is PS end → PL end, and the data address mapping of channels 1-4 is 0x40000000-0x41FFFFFF, 0x42000000-0x43FFFFFF, 0x44000000-0x45FFFFFF, 0x46000000-0x47FFFFFF respectively. The generated bus channel enable design information is "AXI bus channels 1-4 are fully enabled, each transmitting RGB888 image data (including frame synchronization signals and device markers), single channel bandwidth 0.375GB / s, address mapping is divided into four segments 0x40000000-0x41FFFFFF".

[0024] Based on the video stream transmission mode operation plan and bandwidth monitoring requirements, corresponding bandwidth verification nodes are set for the bus path of each encoding and decoding rule. For the "Ultra-High Bandwidth Single-Channel Decoding Group" and Path 1, the transmission mode is single-channel high-bandwidth transmission, and the bandwidth monitoring requirement is "to ensure that the single-channel bandwidth is stable at 1.5GB / s, with fluctuations not exceeding ±5%". Based on this, the bandwidth verification node is configured as follows: the verification frequency is "verified once every 100ms (each frame of 4K@60 video is about 16.7ms, and 100ms covers 6 frames of data to ensure the timeliness of verification)"; the verification indicators are "the real-time transmission bandwidth of channel 1 (calculate the total amount of data transmitted within 100ms / time) and the bandwidth fluctuation range ((real-time bandwidth - 1.5GB / s) / 1.5GB / s × 100%)"; the abnormal triggering condition is "real-time bandwidth < 1.425GB / s or > 1.575GB / s (outside the ±5% range), or the fluctuation range of 3 consecutive verifications is > 3%", and the feedback mechanism of the verification node is set as "sending a 'insufficient bandwidth / overload' interrupt signal to the PS end when an abnormality occurs, triggering bandwidth fine-tuning".

[0025] Corresponding to the "Ultra-HD Dual-Channel Parallel Decoding Group" and the design of enabling channels 1 and 2, the transmission mode is dual-channel bandwidth sharing transmission, and the bandwidth monitoring requirement is "stable bandwidth of 0.75GB / s per channel, total bandwidth of 1.5GB / s". Set bandwidth verification nodes: the verification frequency is "verify once every 150ms (each frame of 4K@30 video is about 33.3ms, 150ms covers 4-5 frames of data)"; the verification indicators are "real-time bandwidth of channel 1, real-time bandwidth of channel 2, total bandwidth of dual channels, and single-channel bandwidth deviation ((single-channel real-time bandwidth - 0.75GB / s) / 0.75GB / s × 100%)"; the abnormal triggering conditions are "single-channel bandwidth < 0.7125GB / s or > 0.7875GB / s, or total bandwidth < 1.425GB / s or > 1.575GB / s, or the difference in bandwidth deviation between the two channels > 2%"; the feedback mechanism is "when a single channel is abnormal, only the buffer allocation of the corresponding channel is adjusted, and when the total bandwidth is abnormal, the PS end encoding and decoding rate is fine-tuned".

[0026] The design corresponds to the "high-definition four-channel parallel encoding and decoding group" and the activation of channels 1-4. The transmission mode is four-channel bandwidth sharing transmission, and the bandwidth monitoring requirement is "stable bandwidth of 0.375GB / s per channel, total bandwidth of 1.5GB / s". Set bandwidth verification nodes: the verification frequency is "verify once every 200ms (each frame of 2K@60 video is about 16.7ms, 200ms covers 12 frames of data)"; the verification indicators are "the real-time bandwidth of each of the four channels, the total bandwidth of the four channels, and the maximum deviation of the single channel bandwidth ((maximum single channel bandwidth - minimum single channel bandwidth) / 0.375GB / s×100%)"; the abnormal trigger conditions are "single channel bandwidth < 0.356GB / s or > 0.394GB / s, or total bandwidth < 1.425GB / s or > 1.575GB / s, or maximum deviation of single channel bandwidth > 3%"; the feedback mechanism is "when a single channel is abnormal, adjust the encoding bitrate of that channel (e.g., reduce it from 5Mbps to 4.8Mbps), and when the total bandwidth is abnormal, shut down the data transmission of one non-critical camera channel (e.g., channel 4 marked as 'backup')".

[0027] The PS-end encoding and decoding grouping results, PL-end bus path activation design information, and bandwidth verification nodes are processed to generate video source information and raw AXI bus real-time transmission bandwidth data, which include encoding and decoding rule grouping information, bus path activation scheme, and bandwidth verification standards. Process the results of the "Ultra-High Single-Channel Decoding Group" (H.265 decoding, RGB888 output), "Channel 1 Enabled Design" (bandwidth 1.5GB / s, address 0x40000000-0x47FFFFFF), and "100ms Check Node" information to generate video source information: "Video source type: IP stream (RTSP protocol, port 554); Decoding mode: Single-channel 4K@60H.265 decoding; Decoded data specifications: 3840×2160, 60fps, RGB888 (24-bit), 24MB per frame; Data transmission path: AXI bus channel 1; Data address mapping: 0x40000000-0x47FFFFFF; Bandwidth check node: Checked every 100ms, threshold 1.425-1.575GB / s."

[0028] Simultaneously, raw data of the real-time transmission bandwidth of the AXI bus was collected: "Collection frequency 10ms / time, continuous collection 10 times (covering 1 verification cycle), raw data is [1.502GB / s, 1.498GB / s, 1.505GB / s, 1.495GB / s, 1.501GB / s, 1.499GB / s, 1.503GB / s, 1.497GB / s, 1.500GB / s, 1.496GB / s]". The system processes the results of the "Ultra-HD Dual-Channel Parallel Decoding Group" (dual-channel H.264 decoding, independent channels), the "Path 1-2 Enabled Design" (0.75GB / s per channel, separate address settings), and the "150ms Verification Node" information to generate video source information: "Video Source Type: Dual-channel USB 3.0 hard drive (Device 1: USB flash drive, Device 2: external hard drive); Decoding Mode: Dual-channel 4K@30H.264 parallel decoding; Decoded Data Specifications: 3840×2160 per channel, 30fps, RGB888, 24MB per frame; Data Transmission Paths: Path 1 (Device 1), Path 2 (Device 2); Data Address Mapping: Path 1 0x40000000-0x43FFFFFF, Path 2 0x44000000-0x47FFFFFF; Bandwidth Verification Node: Verified every 150ms, single-channel threshold 0.7125-0.7875GB / s, total bandwidth 1.425-1.575GB / s."

[0029] The raw data of the real-time transmission bandwidth of the AXI bus is collected as follows: "Data collected by channel 1 [0.751GB / s, 0.748GB / s, 0.753GB / s, 0.749GB / s, 0.750GB / s, 0.747GB / s] (6 times, 150ms), data collected by channel 2 [0.749GB / s, 0.752GB / s, 0.748GB / s, 0.751GB / s, 0.749GB / s, 0.750GB / s], and the total raw bandwidth data is the result of summing the data from the two channels one after another." The system processes the results of the "High-Definition Four-Channel Parallel Encoding and Decoding Group" (YUV to RGB + H.265 encoding, four independent channels), the "Channel 1-4 Enabled Design" (0.375GB / s per channel, separate addresses), and the "200ms Verification Node" information to generate video source information: "Video Source Type: Four UVC Cameras (numbered 1-4, UVC1.1 Protocol); Encoding and Decoding Mode: Four-channel 2K@60YUV to RGB + H.265 parallel encoding; Encoded Data Specifications: 1920x1080 per channel, 60fps, RGB888, 10.3 Mbps per frame." 7MB; Data transmission paths: Path 1 (Camera 1) - Path 4 (Camera 4); Data address mapping: Path 1 0x40000000-0x41FFFFFF, Path 2 0x42000000-0x43FFFFFF, Path 30x44000000-0x45FFFFFF, Path 40x46000000-0x47FFFFFF; Bandwidth verification node: Verified every 200ms, single-channel threshold 0.356-0.394GB / s, total bandwidth 1.425-1.575GB / s. Acquisition of raw AXI bus real-time transmission bandwidth data: "Each channel acquisition frequency 10ms / time, continuous acquisition 20 times (200ms), raw data of Path 1 [0.374GB / s, 0.376GB / s,...] (20 values), Paths 2-4 are similar, the raw data of total bandwidth is the result of successive summation of the four channels."

[0030] S103 receives the pre-stored video stream standardization conversion algorithm and bandwidth data processing rules, processes the video source information and the raw data of the real-time transmission bandwidth of the AXI bus, and generates the size of the RGB image and the comparison reference information between the bus target bandwidth and the reference information.

[0031] In one implementation, pre-stored video stream standardization conversion algorithms are grouped and categorized according to preset video source-format mapping rules, generating video source types and associated format conversion model information corresponding to each rule. The preset video source-format mapping rules are based on the core principle of "original video source data format + transmission specification adaptation requirements," clearly defining the standardization conversion logic for different video sources and ensuring that the converted data format can be directly adapted for AXI bus transmission.

[0032] IP stream video sources transmitted in H.265 encoding format (such as remote IP camera data in a monitoring system) are classified into the "encoded stream-HD conversion group" according to preset mapping rules, and the corresponding video source type is "IP stream (RTSP / RTP protocol, H.265 encoding)". The associated format conversion model information is "H.265 decoding → YUV420 to RGB888 → resolution adaptation". Specific model parameters include: 4 H.265 decoding reference frames, CABAC entropy coding method, and YUV420 to RGB888 using the BT.709 color space conversion matrix (conversion formula: R=1.164(Y-16)+1.596(Cr-128); G=1.164(Y-16)-0.813(Cr-128)-0.391(Cb-128); B=1.164(Y-16)+2.018(Cb-128)). The resolution is adaptively adjusted to 3840×2160 (4K) or 1920x1080 (2K) to ensure adaptation to the transmission specifications of 1 channel 4K@60, 2 channels 4K@30, or 4 channels 2K@60.

[0033] Videos stored on USB devices (USB flash drives, hard drives) are mostly H.264 encoded MP4 files (such as local video files). According to preset rules, these are categorized into the "Local Files - Ultra HD Conversion Group," with the video source type being "USB 3.0 Device (FAT32 / NTFS file system, H.264 encoded MP4)." The associated format conversion model information is "H.264 Decoding → YUV422 to RGB888 → Frame Synchronization Processing." Model parameters include: H.264 decoding macroblock size 16×16, 9 intra-frame prediction modes, YUV422 to RGB888 using the BT.601 color space conversion matrix, automatic addition of frame synchronization signals after decoding (HSYNC low level active, VSYNC high level active), and a fixed resolution of 3840×2160 (compatible with 2-channel 4K@30 transmission) or 1920x1080 (compatible with 4-channel 2K@60 transmission).

[0034] The UVC camera directly outputs raw YUV422 format video (unencoded, such as real-time surveillance footage), which is categorized into the "Raw Video - Real-time Conversion Group" according to preset rules. The video source type is "UVC1.1 Camera (YUV422 format, 30 / 60fps)". The associated format conversion model information is "YUV422 to RGB888 → H.265 encoding (optional) → Resolution calibration". The model parameters include: hardware acceleration for YUV422 to RGB888 conversion (reducing latency); H.265 encoding can be enabled after conversion to adapt to low-bandwidth scenarios (bitrate control is CBR, target bitrate 5Mbps); the resolution is calibrated to 1920x1080 (4 channels 2K@60) according to transmission specifications, ensuring that the data size per frame is approximately 10.37MB (adapting to 0.375GB / s single-channel bandwidth).

[0035] Based on data standardization requirements, the calculation content of bandwidth data processing rules is designed and arranged. Calculation standards, data types, and derivation range information are obtained to generate bandwidth data processing design information. The transmission requirement is a single-channel 4K@60 video stream (3840×2160, 60fps), and the data standardization requirement is to "ensure a stable single-channel bandwidth of 1.5GB / s, with fluctuations not exceeding ±5%". Based on this, the calculation content is designed as follows: The calculation standard is "single-channel bandwidth = data size per frame × frame rate, data size per frame = resolution × color depth (RGB888 is 24 bits / pixel = 3 bytes / pixel)," that is, 3840×2160×3 bytes = 24883200 bytes ≈ 24MB / frame, 24MB×60fps = 1440MB / s = 1.44GB / s (0.06GB / s redundancy is reserved, and the total bandwidth is calculated as 1.5GB / s); the data type is "AXI total". The raw data of the line real-time transmission bandwidth (unit: GB / s, 3 decimal places) is generated. The derivation range information is "single-channel bandwidth derivation range 1.425-1.575GB / s (1.5GB / s±5%), and exceeding the range is judged as bandwidth abnormality". The final bandwidth data processing design information is "calculation standard: single-channel bandwidth = resolution × color depth × frame rate + 5% redundancy; data type: GB / s (3 decimal places); derivation range: 1.425-1.575GB / s".

[0036] The transmission requirement is two 4K@30 video streams (3840×2160, 30fps each). The data standardization requirement is "a fixed total bandwidth of 1.5GB / s, with dynamic random allocation of bandwidth per stream, ranging from 0.6 to 0.9GB / s, ensuring that the total bandwidth of both streams remains stable at 1.425-1.575GB / s". Design calculation content: The calculation standard is "single-channel bandwidth = total bandwidth × random allocation coefficient (coefficient range 0.4-0.6), total bandwidth = 1.5GB / s, random allocation coefficient is dynamically adjusted in real time", data volume per channel per frame = 3840×2160×3 bytes ≈ 24MB, 24MB×30fps = 720MB / s = 0.72GB / s (allocation range covers actual needs, with reserved redundancy for dynamic adjustment); data types are "single-channel bandwidth data (GB / s, 3 decimal places), total bandwidth data (GB / s, 3 decimal places), random allocation coefficient (retain 2 decimal places)"; derived range information is "single-channel bandwidth derived range 0.6-0.9GB / s, total bandwidth derived range 1.425-1.575GB / s, random allocation coefficient derived range 0.4-0.6", generated bandwidth data processing design information is "calculation standard: single-channel bandwidth = 1.5GB / s × Dynamic random allocation coefficient (0.4-0.6), total bandwidth real-time verification; data type: single channel / total bandwidth (GB / s, 3 decimal places), random allocation coefficient (2 decimal places); derivation range: single channel 0.6-0.9GB / s, total bandwidth 1.425-1.575GB / s, allocation coefficient 0.4-0.6.

[0037] The transmission requirement is four 2K@60 video streams (1920x1080, 60fps each). The data standardization requirement is "a fixed total bandwidth of 1.5GB / s, with dynamic random allocation of bandwidth per stream, ranging from 0.25 to 0.5GB / s, ensuring that the total bandwidth of the four streams remains stable at 1.425-1.575GB / s". Design calculation content: The calculation standard is "single-channel bandwidth = total bandwidth × dynamic random allocation coefficient (coefficient range 0.167-0.333), total bandwidth = 1.5GB / s, random allocation coefficient is dynamically adjusted in real time", data volume per channel per frame = 1920×1080×3 bytes ≈ 10.37MB, 10.37MB×60fps ≈ 622.2MB / s = 0.622GB / s (allocation range covers actual needs, with reserved redundancy for dynamic adjustment); data types are "single-channel bandwidth data (GB / s, 3 decimal places), four-channel total bandwidth data (GB / s, 3 decimal places), dynamic random allocation coefficient (reserved 3)". The derivation range information is "single-channel bandwidth derivation range 0.25-0.5GB / s, total bandwidth derivation range 1.425-1.575GB / s, dynamic random allocation coefficient derivation range 0.167-0.333", and the generated bandwidth data processing design information is "calculation standard: single-channel bandwidth = 1.5GB / s × dynamic random allocation coefficient (0.167-0.333), total bandwidth real-time verification; data type: single-channel / total bandwidth (GB / s, 3 decimal places), dynamic random allocation coefficient (3 decimal places); derivation range: single-channel 0.25-0.5GB / s, total bandwidth 1.425-1.575GB / s, allocation coefficient 0.167-0.333".

[0038] Based on the video stream transmission quality requirements and bandwidth stability requirements, corresponding bandwidth calibration nodes are set for the bandwidth data processing design information of each rule. The bandwidth calibration nodes are used to calibrate the bandwidth data processing results in real time to ensure that the bus bandwidth always meets the transmission specifications. The calibration frequency, calibration indicators, and anomaly handling methods need to be set according to the transmission quality requirements of different scenarios (such as high smoothness for 4K@60 and low latency for 2K@60) and bandwidth stability requirements (total bandwidth fluctuation range ±5%).

[0039] The transmission quality requirements are "ultra-high definition, low latency, and smooth video playback," and the bandwidth stability requirement is "single-channel bandwidth fluctuation ≤ ±5%." Based on this, the calibration nodes are set as follows: the calibration frequency is "one calibration every 50ms (each frame of 4K@60 video takes approximately 16.7ms, and 50ms covers 3 frames of data to ensure real-time performance)"; the calibration indicators are "real-time single-channel bandwidth value and bandwidth fluctuation range ((real-time bandwidth - 1.5GB / s) / 1.5GB / s × 100%)"; the anomaly handling method is "if the real-time bandwidth < 1.425GB / s, trigger the PS end to increase the decoding output rate (fine-tuning from 60fps to 61fps to increase the data transmission volume per frame); if the real-time bandwidth > 1.575GB / s, trigger the PL end to temporarily reduce the display cache write rate (delaying the write by 1ms to reduce instantaneous bandwidth pressure)," while recording the calibration log (including calibration time, original bandwidth, and post-calibration bandwidth).

[0040] The transmission quality requirements are "dual-channel synchronous display with no image offset," and the bandwidth stability requirements are "single-channel bandwidth fluctuation ≤ ±5%, and two-channel bandwidth deviation ≤ 2%." The calibration nodes are set as follows: the calibration frequency is "calibrate once every 100ms (each frame of 4K@30 video is approximately 33.3ms, 100ms covers 3 frames of data, ensuring dual-channel synchronization)"; the calibration indicators are "two-channel real-time bandwidth values, single-channel bandwidth fluctuation amplitude, and two-channel bandwidth deviation (|channel 1 bandwidth - channel 2 bandwidth| / 0.75GB / s×100%)"; the anomaly handling method is "if the single-channel bandwidth exceeds 0.7125-0.7875GB / s, adjust the corresponding channel's encoding bitrate (e.g., if channel 1 bandwidth is insufficient, increase it from 10Mbps to 10.5Mbps); if the two-channel bandwidth deviation is > 2%, simultaneously fine-tune the two-channel decoding buffer sizes (e.g., increase channel 1 buffer from 8MB to 8.2MB, and decrease channel 2 buffer from 8MB to 7.8MB)."

[0041] The transmission quality requirements are "four-channel parallel acquisition with no data packet loss," and the bandwidth stability requirements are "single-channel bandwidth fluctuation ≤ ±5%, and total bandwidth fluctuation of the four channels ≤ ±5%." The calibration nodes are set as follows: the calibration frequency is "one calibration every 150ms (each frame of 2K@60 video takes approximately 16.7ms, and 150ms covers 9 frames of data, balancing real-time performance and resource consumption)"; the calibration indicators are "real-time bandwidth values ​​of the four channels, single-channel bandwidth fluctuation amplitude, and total bandwidth value of the four channels"; the anomaly handling method is "if the single-channel bandwidth < 0.356GB / s, disable unnecessary frame synchronization verification for that channel (reduce processing latency and improve transmission rate); if the total bandwidth > 1.575GB / s, temporarily reduce the frame rate of one backup camera (from 60fps to 55fps, reducing the total data volume)."

[0042] The video stream standardization conversion algorithm grouping results, bandwidth data processing design information, and bandwidth calibration nodes are processed to generate an RGB image containing algorithm grouping information, data processing scheme, and calibration standards. The size of the RGB image is compared with the bus target bandwidth benchmark information. The results of the "IP stream-HD conversion group" (H.265 decoding → YUV420 to RGB888, resolution 3840×2160), the "1-channel bandwidth data processing design" (calculated standard 1.5GB / s, derived range 1.425-1.575GB / s), and the "50ms calibration node" information are processed to generate an RGB image with the following dimensions: "Video source type: IP stream (RTSP protocol, H.265 encoding); RGB image specifications: 3840×2160, 60fps, RGB888 (24-bit color depth), 24MB data per frame, frame synchronization signal HSYNC low level, VSYNC high level; conversion algorithm: H.265 decoding (reference frame 4) + BT.709 color conversion". Generate bus target bandwidth comparison benchmark information: "Comparison index: single channel real-time bandwidth; target bandwidth value: 1.5GB / s; comparison range: 1.425-1.575GB / s; calibration node: calibration every 50ms, adjust decoding rate / cache write rate when abnormal; comparison method: if the difference between real-time bandwidth data and target value is > ±5%, it is judged as mismatch."

[0043] Process the results of the "Local File - Ultra HD Conversion Group" (H.264 decoding → YUV422 to RGB888, resolution 3840×2160), the "2-channel bandwidth data processing design" (single channel 0.75GB / s, total bandwidth 1.5GB / s), and the "100ms calibration node" information to generate the following RGB image size: "Video source type: USB3.0 device (MP4 file, H.264 encoding); RGB image specifications: 3840×2160 per channel, 30fps, RGB888 (24-bit), 24MB per frame, dual-channel independent frame synchronization; Conversion algorithm: H.264 decoding (macroblock 16×16) + BT.601 color conversion." Generate bus target bandwidth comparison benchmark information: "Comparison indicators: single-channel bandwidth, total bandwidth of dual channels; target bandwidth value: 0.75GB / s for single channel, 1.5GB / s for total bandwidth; comparison range: 0.7125-0.7875GB / s for single channel, 1.425-1.575GB / s for total bandwidth; calibration node: calibration every 100ms, adjusting the encoding rate / buffer size when abnormal; comparison method: if the single-channel deviation is > ±5% or the total bandwidth deviation is > ±5%, it is judged as a mismatch."

[0044] Process the results of the "Raw Video - Real-time Conversion Group" (YUV422 to RGB888 → optional H.265 encoding, resolution 1920x1080), the "4-channel bandwidth data processing design" (0.375GB / s per channel, total bandwidth 1.5GB / s), and the "150ms calibration node" information to generate RGB image sizes as follows: "Video source type: UVC camera (YUV422 format); RGB image specifications: 1920x1080 per channel, 60fps, RGB888 (24-bit), 10.37MB per frame, four channels with camera number markings; Conversion algorithm: hardware-accelerated YUV to RGB + optional H.265 encoding (CBR bitrate 5Mbps)." Generate bus target bandwidth comparison benchmark information: "Comparison indicators: single-channel bandwidth, total bandwidth of four channels; target bandwidth value: single channel 0.375GB / s, total bandwidth 1.5GB / s; comparison range: single channel 0.356-0.394GB / s, total bandwidth 1.425-1.575GB / s; calibration node: calibration every 150ms, frame check is turned off / frame rate is reduced when abnormal; comparison method: if the single-channel deviation is > ±5% or the total bandwidth deviation is > ±5%, it is judged as mismatch."

[0045] S104 processes the comparison information between the size of the RGB image and the target bandwidth of the bus based on the bandwidth dynamic random allocation control rules, and generates bandwidth allocation error signal and path activation adjustment information.

[0046] In one implementation, the size of the RGB image is compared with the target bandwidth of the bus based on the bandwidth dynamic random allocation control rule. Features of RGB image format compliance, single-channel bandwidth allocation accuracy, and total bandwidth occupancy stability are then extracted. The bandwidth dynamic random allocation control rule is based on the core principle of "a fixed total bandwidth of 1.5GB (bytes) and dynamic random allocation of single-channel bandwidth within a preset range during multi-channel transmission." Based on this rule, three key features ensuring normal video stream transmission are extracted from the RGB image size and bus target bandwidth comparison reference information. Specific examples are as follows: Obtain the size of the RGB image (3840×2160, 60fps, RGB888 format) and compare it with the bus target bandwidth benchmark information (total bandwidth 1.5GB / s, single-channel dynamic random allocation range 1.425-1.575GB / s). Extract the following features: ① RGB image format compliance features: whether the resolution is 3840×2160, whether the color space is RGB888 (24-bit), and whether it has a frame synchronization signal; ② Single-channel bandwidth allocation accuracy features: whether the actual single-channel bandwidth fluctuates randomly within the range of 1.425-1.575GB / s, and whether the allocation frequency conforms to the preset dynamic adjustment period (e.g., 50ms / time); ③ Total bandwidth occupancy stability features: whether the real-time total bandwidth is stably maintained at around 1.5GB / s, and whether there are instantaneous fluctuations exceeding the total bandwidth due to random allocation.

[0047] The size of the RGB images (3840×2160 per channel, 30fps, RGB888 format) is compared with the bus target bandwidth benchmark information (0.75GB / s per channel, total bandwidth 1.5GB / s). The following features are extracted: ① RGB image format compliance features: whether the resolution of both images is 3840×2160, whether the color space is uniformly RGB888, and whether the frame synchronization signal is independent and free from interference; ② Single channel bandwidth allocation accuracy features: whether the actual bandwidth of each channel is close to 0.75GB / s, and whether the bandwidth deviation between the two channels is ≤2% (meeting the equal distribution requirement); ③ Total bandwidth usage stability features: whether the total bandwidth of the two channels is maintained between 1.425-1.575GB / s, and whether the total bandwidth fluctuates due to abnormal single channel bandwidth.

[0048] The size of the RGB images (1920x1080 per channel, 60fps, RGB888 format) is compared with the target bandwidth of the bus to obtain the baseline information (0.375GB / s per channel, total bandwidth 1.5GB / s). The following features are extracted: ① RGB image format compliance features: whether the resolution of the four images is 1920x1080, whether the color space is uniformly RGB888, and whether they are marked with camera numbers (to avoid data confusion); ② Single channel bandwidth allocation accuracy features: whether the actual bandwidth of each channel is close to 0.375GB / s, and whether the maximum deviation of the bandwidth of the four channels is ≤3% (meeting the equal distribution requirement); ③ Total bandwidth usage stability features: whether the total bandwidth of the four channels is maintained between 1.425-1.575GB / s, and whether there is any single channel bandwidth exceeding the limit that causes the total bandwidth to be abnormal.

[0049] The accuracy of single-channel bandwidth allocation is verified by checking the bandwidth deviation of several encoded channels and generating a bandwidth allocation accuracy factor. The deviation rate between the actual bandwidth and the standard value is calculated by comparing it with the average bandwidth standards of 1 channel 4K@60 (1.5GB / s), 2 channels 4K@30 (0.75GB / s / channel), and 4 channels 2K@60 (0.375GB / s / channel), and quantifying the bandwidth allocation accuracy factor (value 0-1, 1 for complete accuracy, 0 for severe deviation). An example of verification and factor generation for a 1-channel 4K@60 scenario is shown below, with an average bandwidth standard of 1.5GB / s and an allowable deviation of ±5% (1.425-1.575GB / s). The actual collected bandwidth data is [1.43GB / s, 1.45GB / s, 1.44GB / s]. The average actual bandwidth is calculated to be 1.44GB / s, and the deviation rate is (1.44-1.5) / 1.5×100%=-4% (within the allowable range). Quantification: 1 point is awarded for an absolute deviation rate of ≤5%, and the final bandwidth allocation accuracy factor is 1.0 (accurate allocation).

[0050] The following is an example of verification and factor generation for a 2-channel 4K@30 scenario. The average bandwidth standard is 0.75GB / s / channel, with an allowable deviation of ±5% (0.7125-0.7875GB / s), and the deviation between the two channels is ≤2%. Actual acquisition: Channel 1 average bandwidth 0.73GB / s (deviation rate -2.67%), Channel 2 average bandwidth 0.74GB / s (deviation rate -1.33%), the deviation between the two channels = (0.74-0.73) / 0.75×100%≈1.33% (both meet the requirements). Quantification: 0.5 points are awarded for compliance with single-channel deviation, and 0 points are added for compliance with both channels. The bandwidth allocation accuracy factor = 0.5 + 0.5 = 1.0 (accurate allocation). The following is an example of verification and factor generation for a 4-channel 2K@60 scenario. The average bandwidth standard is 0.375GB / s / channel, with an allowable deviation of ±5% (0.356-0.394GB / s), and the maximum deviation for all four channels is ≤3%. Actual data collection: The average bandwidths for the four channels are 0.36GB / s (deviation -4%), 0.37GB / s (deviation -1.33%), 0.38GB / s (deviation +1.33%), and 0.39GB / s (deviation +4%), respectively. The maximum deviation is (0.39-0.36) / 0.375×100%=8% (exceeding the 3% requirement). Quantification: A single channel with compliant deviation receives 0.25 points (1.0 point total), and exceeding the maximum deviation deducts 0.5 points. The bandwidth allocation accuracy factor is 1.0-0.5=0.5 (significant allocation deviation).

[0051] The stability characteristics of total bandwidth usage were checked to confirm whether the total bandwidth remained at 1.5GB during multi-channel transmission and whether there was a risk of data corruption due to exceeding the bandwidth limit. A total bandwidth stability coefficient was then generated. An example of the check and coefficient generation for a single-channel 4K@60 scenario is shown below. The total bandwidth stability standard is "maintaining 1.425-1.575GB / s, with no data packet loss due to instantaneous bandwidth overruns." Monitoring revealed that the total bandwidth fluctuated between 1.41-1.58GB / s within one minute, with three instances below 1.425GB / s (the lowest being 1.41GB / s). There were no instances of bandwidth overruns and no data corruption. Quantitatively: 0.6 points are awarded for compliant fluctuation range, 0.2 points are deducted for instances of low bandwidth, and 0.2 points are added for no data corruption. The final total bandwidth stability coefficient = 0.6 - 0.2 + 0.2 = 0.6 (basically stable, but low bandwidth needs optimization).

[0052] The following is an example of verification and coefficient generation for a 2-channel 4K@30 scene. The total bandwidth stability standard is "maintaining 1.425-1.575GB / s, with no image shift caused by bandwidth anomalies." Monitoring revealed that the total bandwidth fluctuated between 1.43-1.56GB / s within one minute (meeting the requirements), but the bandwidth of channel 1 momentarily dropped to 0.68GB / s (causing the total bandwidth to drop to 1.40GB / s, exceeding the lower limit), resulting in two instances of image shift. Quantification: 0.6 points are awarded for compliant fluctuation range, 0.3 points are deducted for momentary low bandwidth, and 0.2 points are deducted for image shift. The final total bandwidth stability coefficient = 0.6 - 0.3 - 0.2 = 0.1 (severely unstable, requiring urgent adjustment).

[0053] The following is an example of verification and coefficient generation for a 4-channel 2K@60 scenario. The total bandwidth stability standard is "maintaining 1.425-1.575GB / s, with no data corruption due to exceeding bandwidth limits." Monitoring revealed that the total bandwidth fluctuation range within 1 minute was 1.44-1.55GB / s (meeting the requirements), and the bandwidth of all four channels did not exceed the upper limit, with no data corruption. Quantification: 0.7 points for compliance with fluctuation range, 0.2 points for no bandwidth exceeding limits, and 0.1 points for no data corruption. The final total bandwidth stability coefficient = 0.7 + 0.2 + 0.1 = 1.0 (completely stable).

[0054] Based on preset bandwidth control rules, the bandwidth allocation accuracy factor and total bandwidth stability coefficient are processed. An image format repair mechanism corrects RGB format deviations, dynamic bandwidth fine-tuning technology calibrates single-channel allocation errors, and an over-bandwidth warning mechanism prevents abnormal data transmission, generating bandwidth control preprocessing results. The preset bandwidth control rules specify "format compliance coefficient ≥ 0.8, bandwidth allocation accuracy factor ≥ 0.8, and total bandwidth stability coefficient ≥ 0.7" as normal thresholds. Corresponding repair techniques are used for coefficients that do not meet these standards, generating preprocessing results. An example of processing and results for a single 4K@60 scene is shown below. The three coefficients are: format compliance coefficient 0.1, bandwidth allocation accuracy factor 1.0, and total bandwidth stability coefficient 0.6, all of which do not reach the normal thresholds. The following methods are used: ① Image format repair mechanism: Converting YUV420 to RGB888 via hardware acceleration and adding HSYNC / VSYNC frame synchronization signals; ② Dynamic bandwidth fine-tuning technology: No adjustment required (accurate bandwidth allocation); ③ Over-bandwidth warning mechanism: Setting a lower limit of 1.425GB / s for total bandwidth; triggering the PS end to increase the decoding output rate when this limit is reached. The bandwidth control preprocessing result is as follows: "RGB format has been fixed (YUV420→RGB888, frame synchronization signal added); bandwidth allocation does not need to be adjusted; total bandwidth lower limit warning has been set, and real-time monitoring and triggering rate adjustment are implemented."

[0055] The following is an example of the processing and results for a 2-channel 4K@30 scene. The three coefficients are: format compliance coefficient 0.95, bandwidth allocation accuracy factor 1.0, and total bandwidth stability coefficient 0.1. The total bandwidth stability coefficient did not meet the standard. The following methods were used: ① Image format repair mechanism: no repair required (format basically compliant); ② Dynamic bandwidth fine-tuning technology: no adjustment required (bandwidth allocation accurate); ③ Over-bandwidth warning mechanism: for instantaneous low bandwidth in channel 1, its encoding bitrate was adjusted from 10Mbps to 10.5Mbps, while setting a lower limit for channel 1 bandwidth of 0.7125GB / s. The generated bandwidth control preprocessing result is: "RGB format no repair required; bandwidth allocation no adjustment required; channel 1 encoding bitrate has been increased to 10.5Mbps, setting a lower limit for bandwidth warning to avoid exceeding the total bandwidth limit."

[0056] The following is an example of the processing and results for a 4-channel 2K@60 scene. The three coefficients are: format compliance coefficient 0.8, bandwidth allocation accuracy factor 0.5, and total bandwidth stability coefficient 1.0. The bandwidth allocation accuracy factor did not meet the standard. The following methods were adopted: ① Image format repair mechanism: No repair required (format compliant); ② Dynamic bandwidth fine-tuning technology: For the maximum bandwidth deviation of 8% across the four channels, the bitrate of channel 4 was adjusted from 5Mbps to 4.8Mbps to balance the bandwidth of the four channels; ③ Over-bandwidth warning mechanism: No setting required (total bandwidth stable). The generated bandwidth control preprocessing result is: "RGB format requires no repair; the bitrate of channel 4 has been reduced to 4.8Mbps, the bandwidth deviation of the four channels has been calibrated to 2%; the total bandwidth is stable, no warning setting required."

[0057] The bandwidth control preprocessing results are integrated to generate a bandwidth allocation error signal reflecting format deviation, bandwidth allocation error, and path adaptation issues, as well as path activation adjustment information to adjust the number of activated paths and optimize the bandwidth allocation ratio. For a single 4K@60 scene, the integrated preprocessing results (format repair, bandwidth warning) are integrated to generate a bandwidth allocation error signal: "Error type: RGB format deviation (corrected), total bandwidth fluctuation (below 1.425GB / s); Error severity: total bandwidth fluctuation error -2% (1.47GB / s → 1.44GB / s); Impact: may cause slight stuttering." Path activation adjustment information is generated: "Current path: AXI bus path 1; Adjustment requirements: no need to change the number of paths, a frame synchronization signal transmission module needs to be added to path 1; Optimization suggestion: fine-tune the PS-end decoding output rate from 60fps to 61fps to ensure total bandwidth ≥ 1.425GB / s."

[0058] For the integrated results of the two 4K@30 scene channels, the preprocessing results (bitrate adjustment, bandwidth warning) are integrated to generate a bandwidth allocation error signal: "Error type: Channel 1 bandwidth is too low (already corrected by bitrate adjustment), total bandwidth instantaneously exceeds limit (already avoided); Error degree: Channel 1 bandwidth deviation -9.3% (0.75GB / s→0.68GB / s, corrected to 0.73GB / s); Impact: Before the repair, it caused two screen offsets, after the repair, there is no impact." Channel adjustment information is generated: "Current channels: AXI bus channels 1 and 2; Adjustment requirements: No need to change the number of channels, a bandwidth monitoring submodule needs to be added to channel 1; Optimization suggestion: Regularly calibrate the bitrate of both channels to ensure that the bandwidth of a single channel is stable at 0.7125-0.7875GB / s." For the integrated results of the 4-channel 2K@60 scenario, the preprocessed results (bitrate calibration) are integrated to generate a bandwidth allocation error signal: "Error type: Bandwidth deviation of four channels exceeds the limit (already corrected by bitrate adjustment); Error severity: Maximum deviation 8% (0.36-0.39GB / s, corrected to 2%); Impact: May have caused unbalanced data transmission before correction, no impact after correction." Channel adjustment information is generated: "Current channels: AXI bus channels 1-4; Adjustment requirements: No need to change the number of channels, bandwidth balancing submodules need to be added synchronously to the four channels; Optimization suggestion: Maintain the encoding bitrate of channel 4 at 4.8Mbps, and regularly monitor the bandwidth deviation of the four channels to ensure ≤3%."

[0059] S105 processes the channel activation adjustment information and the FPGA chip internal resource status information to generate bus channel quantity and video stream specification matching control operation information.

[0060] In one implementation, the channel activation quantity requirement and bandwidth adaptation requirement in the channel activation adjustment information are simulated using channel matching and analyzed for resource consumption. This generates simulation features of channel quantity adaptation for different video stream specifications and resource consumption response curves for channel activation, forming the basic information for channel adaptation simulation. For the core requirements (channel quantity and bandwidth adaptation) in the channel activation adjustment information, the compatibility between different video stream specifications and channel quantity is verified through channel matching simulation. Combined with resource consumption correlation analysis, the resource consumption of channel activation is quantified, generating two types of key features.

[0061] The following is an example of adaptation simulation and feature generation for a 1-channel 4K@60 scenario. The channel enable adjustment information is "Enable 1 AXI bus channel, single channel bandwidth 1.5GB / s". Path matching simulation was performed: Path 1, one of the four preset paths on the PL terminal, was simulated and tested to see if it supported 1.5GB / s bandwidth transmission. The results showed that the maximum transmission bandwidth of Path 1 was 1.6GB / s, which could meet the requirements of one 4K@60 channel, and the adaptability was up to standard. Resource usage correlation analysis: The cache utilization rate (initially 8%, rising to 15% during transmission) and logical unit utilization rate (initially 12%, rising to 20% during transmission) of Path 1 were recorded when it was enabled. The simulation characteristics of different video stream specifications and the number of paths were generated: "1 4K@60 channel - 1 path: adaptability level A (bandwidth met, no conflict), transmission latency ≤1ms". The resource consumption response curve characteristics of the path enabled were generated: "Number of paths 1 → cache utilization rate 15%, logical unit utilization rate 20%, with a transmission duration of 1 hour, the cache utilization rate fluctuated ≤±2%, and the logical unit utilization rate remained stable", forming the basic information for path adaptation simulation.

[0062] The following is an example of adaptation simulation and feature generation for a 2-channel 4K@30 scenario. The channel activation adjustment information is "Enable 2 AXI bus channels, each with a bandwidth of 0.75GB / s". Channel matching simulation: Simulate enabling channel 1 and channel 2, and test whether the bandwidth of each channel is stable at 0.75GB / s. The results show that the bandwidth deviation between the two channels is ≤1%, with no mutual interference, and the adaptation meets the standard. Resource usage correlation analysis: Record the cache utilization rate (22%) and logic unit utilization rate (28%) when the two channels are enabled, and generate the adaptation simulation feature: "2-channel 4K@30 - 2 channels: Adaptability level A, dual-channel synchronous transmission deviation ≤1ms"; Resource consumption response curve feature: "Number of channels 2 → Cache utilization rate 22%, logic unit utilization rate 28%, continuous transmission for 2 hours, resource usage fluctuation ≤±3%", forming the basic information. The following is an example of adaptation simulation and feature generation for a 4-channel 2K@60 scenario. The channel activation adjustment information is "Enable 4 AXI bus channels, each with a bandwidth of 0.375GB / s". Path matching simulation: Simulate enabling all 4 paths and test whether the bandwidth of each path remains at 0.375GB / s. The results show that the maximum bandwidth deviation of the four paths is 2%, and the adaptability meets the standard. Resource usage correlation analysis: Record the cache utilization rate (30%) and logical unit utilization rate (35%) when the four paths are enabled, and generate the adaptation simulation characteristics: "4 paths 2K@60 - 4 paths: adaptability level B (resource utilization is close to the threshold), no packet loss in parallel transmission of the four paths"; Resource consumption response curve characteristics: "Number of paths 4 → cache utilization rate 30%, logical unit utilization rate 35%, after 1.5 hours of transmission, there is no significant increase in resource utilization", forming the basic information.

[0063] The resource status information of the FPGA chip, including cache resource occupancy and logic unit utilization, is transformed into constraints and resource boundaries are defined. This generates cache resource safe occupancy threshold characteristics and logic unit usage constraint parameters, forming resource constraint information. For the real-time status of the core resources (cache and logic units) within the FPGA chip, these are transformed into executable constraints, clarifying resource usage boundaries and generating two types of constraint parameters. The total cache capacity of the FPGA chip is 128MB, and the real-time cache resource occupancy rate is 30% (with 4-channel 2K@60 transmission). Constraint transformation: With the goal of "avoiding data loss due to cache overflow", the cache resource safe occupancy threshold is set as total cache capacity × 80% (to avoid insufficient reservation), i.e., 128MB × 80% = 102.4MB, corresponding to cache occupancy rate = 102.4MB ÷ 128MB × 100% = 80%; further delineate the boundaries: when the cache occupancy rate is ≥75%, trigger an early warning, and when it is ≥80%, force a reduction in the transmission rate of non-critical paths (such as path 4 in a 4-path system), generating the cache resource safe occupancy threshold feature: "Cache safe occupancy rate ≤80% (102.4MB), early warning threshold 75% (96MB)", forming cache constraint information.

[0064] The FPGA chip has a total of 1 million logic units, with a real-time logic unit utilization rate of 35% (4-channel 2K@60 transmission). Constraint conversion: With the goal of "ensuring normal operation of logic units and avoiding timing errors," the logic unit utilization constraint parameter is set as follows: Total number of logic units × 85% (15% redundancy reserved for burst processing), i.e., 1 million × 85% = 850,000 logic units. The corresponding logic unit utilization rate is = 850,000 ÷ 1 million × 100% = 85%. Boundary delineation: When the utilization rate is ≥80%, new paths are restricted from being enabled; when it is ≥85%, one backup path is disabled. The resulting logic unit utilization constraint parameter is: "Logic unit safe utilization rate ≤ 85% (850,000), restricted activation threshold 80% (800,000)", forming the logic unit constraint information. Combining cache and logical unit constraints, for a 1-channel 4K@60 scenario (cache usage 15%, logical unit utilization 20%), the core constraints are defined as "cache usage ≤ 80%, logical unit utilization ≤ 85%"; for a 2-channel 4K@30 scenario (cache 22%, utilization 28%), the additional constraints are "cache increment ≤ 10% / channel, logical unit increment ≤ 8% / channel during dual-channel transmission".

[0065] The simulated interaction between channel activation and resource usage is used to optimize parameters and evaluate resource efficiency by combining the objective function of video stream transmission stability. This generates the optimal channel number range characteristics and objective function matching parameters for different video stream specifications, forming channel number optimization information. An example of parameter optimization and evaluation for a 1-channel 4K@60 scenario is shown below, simulating two scenarios with 1 and 2 channels activated (the original requirement was 1). When the number of channels = 1: the transmission packet loss rate is 0.05%, and the latency is 1.2ms, meeting the objective function requirements. At this time, the buffer usage is 15%, the logic unit utilization rate is 20%, and the resource efficiency (transmission stability ÷ resource usage) = 0.95 ÷ 0.35 ≈ 2.71. When the number of channels = 2: the transmission packet loss rate is 0.03%, and the latency is 1.0ms (stability improved), but the buffer usage is 20%, the logic unit utilization rate is 25%, and the resource efficiency = 0.97 ÷ 0.45 ≈ 2.16 (efficiency decreased). After parameter optimization, the optimal range for the number of pathways is determined to be "1-1" (the efficiency is highest when there is only 1 pathway). The objective function matching degree parameter is generated as "matching degree 98% (packet loss rate and latency meet the standards, and resource efficiency is optimal)", thus forming the pathway number optimization information.

[0066] The following is an example of parameter optimization and evaluation for a 2-channel 4K@30 scenario, simulating two scenarios with 2 and 3 channels (the original requirement was 2). With 2 channels: packet loss rate 0.08%, latency 1.5ms, cache 22%, utilization 28%, resource efficiency = 0.92 ÷ 0.5 ≈ 1.84; With 3 channels: packet loss rate 0.06%, latency 1.3ms, cache 25%, utilization 32%, resource efficiency = 0.94 ÷ 0.57 ≈ 1.65 (efficiency decrease). The optimal channel number range is "2-2", and the objective function matching parameter is "matching degree 95% (stability meets the standard, no resource waste)," forming optimization information. The following is an example of parameter optimization and evaluation for a 4-channel 2K@60 scenario, simulating two scenarios with 4 and 3 channels (the original requirement was 4). When the number of paths is 4: packet loss rate 0.1%, latency 1.8ms, buffer 30%, utilization 35%, resource efficiency = 0.9 ÷ 0.65 ≈ 1.38; when the number of paths is 3: one 2K@60 path needs to be converted to 2K30, packet loss rate 0.07%, latency 1.6ms, but the transmission specifications do not meet the requirements (the user needs 4 2K@60 paths). The optimal number of paths is in the range of "4-4", and the objective function matching parameter is "matching degree 90% (stability meets the standard, resource consumption is close to the threshold, dynamic monitoring is required)", forming optimization information.

[0067] The system integrates basic information on path adaptation, resource constraints, and path quantity optimization to generate control operation information on the matching of bus path quantity with video stream specifications, as well as an FPGA internal resource compatibility analysis report. An example of the integration results for a single 4K@60 scenario is shown below. The integrated information includes: basic adaptation information (1 path adapted, 15% cache, 20% utilization), resource constraints (cache ≤ 80%, utilization ≤ 85%), and optimization information (1 optimal path, 98% matching degree). The system generates control operation information on the matching of bus path quantity with video stream specifications: "Enable PL-side AXI bus path 1; configure path 1 bandwidth to 1.5GB / s; monitor cache occupancy (warning threshold 75%) and logic unit utilization (warning threshold 80%) in real time; if cache occupancy ≥ 75%, trigger the PS side to reduce the decoding frame rate to 58fps." The FPGA internal resource compatibility analysis report is generated as follows: "Compatibility conclusion: The 1-channel 4K@60 transmission is highly compatible with FPGA resources, with a cache usage of 15% (below the safety threshold of 80%) and a logic unit utilization of 20% (below the safety threshold of 85%), indicating sufficient resource redundancy; Risk warning: None; Optimization suggestion: Channel 2 can be reserved as a backup to avoid transmission interruption due to failure of Channel 1."

[0068] The integration results for a 2-channel 4K@30 scenario are shown below. Integration information includes: basic adaptation information (2 channels adapted, cache 22%, utilization 28%), resource constraints (cache ≤80%, utilization ≤85%), and optimization information (2 optimal channels, matching degree 95%). Control operation information generated: "Enable PL-side channels 1 and 2; configure bandwidth for each channel at 0.75GB / s; monitor cache occupancy (warning 75%) and utilization (warning 80%); if the bandwidth deviation between the two channels is >2%, fine-tune the channel encoding bitrate (±0.5Mbps)." Adaptability report: "Adaptability conclusion: 2-channel 4K@30 transmission adaptability is good, resource occupancy is within a safe range, and the dual-channel synchronous transmission deviation is ≤1ms; Risk warning: Long-term transmission (>4 hours) requires attention to cache fragmentation growth; Optimization suggestion: Perform cache fragmentation cleanup regularly (every 2 hours) to maintain transmission stability."

[0069] The integration results for a 4-channel 2K@60 scenario are shown below. Integration information includes: basic adaptation information (4 channels adapted, 30% cache, 35% utilization), resource constraints (cache ≤ 80%, utilization ≤ 85%), and optimization information (4 optimal channels, 90% matching degree). The generated control operation information is: "Enable PL-side channels 1-4; configure bandwidth for each channel at 0.375GB / s; monitor cache occupancy (warning 75%) and utilization (warning 80%) in real time; if cache occupancy ≥ 70% or utilization ≥ 80%, shut down channel 4 (mark it as standby) and temporarily merge its data into channel 3 (bandwidth increased to 0.75GB / s)." Adaptability Report: "Adaptability Conclusion: 4-channel 2K@60 transmission is basically compatible, but resource usage is close to the warning threshold (30% cache, 35% utilization), requiring dynamic adjustment; Risk Warning: High load (such as full load of 4 channels) may trigger channel shutdown, affecting data integrity; Optimization Suggestion: Upgrade the FPGA cache to 256MB (currently 128MB) to improve resource redundancy, or limit the duration of simultaneous transmission of 4 channels to ≤3 hours."

[0070] S106, based on the preset video transmission mode operation requirements and real-time bandwidth feedback, transforms control operation information into actual video stream transmission actions, extracts and classifies transmission mode requirements, bandwidth feedback, control operation information and FPGA chip attributes, and generates transmission mode adaptation parameters, bandwidth calibration rules, resource occupancy thresholds, and video stream and AXI bus linkage mapping information.

[0071] In one implementation, the specification adaptation requirements in the operation requirements of the preset video transmission mode and the bandwidth fluctuation data in the real-time bandwidth feedback are quantitatively analyzed and processed to generate a transmission mode-bandwidth correlation quantification factor. For the specification adaptation requirements (such as resolution and frame rate) of the preset video transmission mode and the fluctuation data of the real-time bandwidth feedback, the correlation between the two is established through quantitative calculation, generating a quantification factor (value 0-1, where 1 is a complete fit and 0 is a severe mismatch) that can be used to evaluate the compatibility between the transmission mode and the bandwidth. The quantitative analysis for a single 4K@60 scene is as follows: the preset video transmission mode requires the following specifications: "resolution 3840×2160, frame rate 60fps, single-channel bandwidth 1.5GB / s"; the real-time bandwidth feedback data is [1.49GB / s, 1.51GB / s, 1.48GB / s, 1.52GB / s, 1.49GB / s], the calculated average bandwidth is 1.5GB / s, and the bandwidth fluctuation is approximately 2.67% (1.52-1.48) / 1.5×100%). Quantitative analysis: Specification fit = (actual resolution / target resolution) × (actual frame rate / target frame rate) = (3840 × 2160 / 3840 × 2160) × (60 / 60) = 1; Bandwidth fluctuation fit = 1 - bandwidth fluctuation amplitude / 10% (preset fluctuation threshold) = 1 - 2.67% / 10% = 0.733; Transmission mode - bandwidth correlation quantification factor = (specification fit + bandwidth fluctuation fit) / 2 = (1 + 0.733) / 2 ≈ 0.866 (high fit).

[0072] The quantitative analysis for a 2-channel 4K@30 scene is as follows. The preset specification adaptation requirements are "resolution of 3840×2160 per channel, frame rate of 30fps, and bandwidth of 0.75GB / s per channel". The real-time bandwidth feedback data (two channels) are [0.74GB / s, 0.76GB / s, 0.75GB / s] and [0.73GB / s, 0.77GB / s, 0.75GB / s], respectively. The average bandwidth of each channel is calculated to be 0.75GB / s. The maximum bandwidth deviation between the two channels is approximately (0.77-0.73) / 0.75×100%≈5.33%. Quantitative Analysis: Specification Adaptability = (3840×2160 / 3840×2160)×(30 / 30) = 1; Bandwidth Fluctuation Adaptability = 1 - (Maximum Deviation of Two Paths / 5% (Preset Deviation Threshold)) = 1 - 5.33% / 5%≈-0.066 (take 0); Transmission Mode-Bandwidth Correlation Quantization Factor = (1+0) / 2 = 0.5 (Medium Adaptability, Deviation Needs Optimization). The quantitative analysis for the 4-channel 2K@60 scenario is as follows: The preset specification adaptation requirements are "1920x1080 resolution per channel, 60fps frame rate, and 0.375GB / s bandwidth per channel"; Real-time bandwidth feedback data (four channels) shows an average bandwidth of 0.375GB / s, and the maximum bandwidth deviation of the four channels = (0.38-0.37) / 0.375×100%≈2.67%. Quantitative analysis: Specification fit = (1920x1080 / 1920x1080) × (60 / 60) = 1; Bandwidth fluctuation fit = 1 - 2.67% / 5% = 0.466; Transmission mode-bandwidth correlation quantification factor = (1 + 0.466) / 2 ≈ 0.733 (high fit).

[0073] The accuracy of path activation in the bus path quantity and video stream specification matching control operation information, and the resource carrying capacity limit information in the FPGA chip attributes are quantitatively analyzed to generate a path control-resource adaptation quantization factor. For the accuracy of bus path activation (whether the path is activated as required) and the FPGA chip resource carrying capacity limit (cache, maximum capacity of logic units), the adaptability of path control and resources is evaluated through quantitative calculation, generating a quantization factor (value 0-1, 1 for complete adaptation, 0 for resource over-limit). The quantitative analysis for a 1-channel 4K@60 scenario is as follows: the bus path quantity and video stream specification matching control operation information requires "activating 1 path," and 1 path is actually activated (meeting the requirement), so the path activation accuracy = 1; the FPGA chip attribute resource carrying capacity limit information is "total cache capacity 128MB, total number of logic units 1 million," and the actual cache usage is 15% (19.2MB), and the logic unit utilization rate is 20% (200,000 units). Quantitative analysis: Resource usage adaptability = (1 - actual cache usage rate / cache security threshold) × (1 - actual logic unit utilization rate / logic unit security threshold) = (1 - 15% / 80%) × (1 - 20% / 85%) ≈ (0.8125) × (0.7647) ≈ 0.621; Path control - resource adaptation quantification factor = (path activation accuracy + resource usage adaptability) / 2 = (1 + 0.621) / 2 ≈ 0.810 (high adaptability).

[0074] The quantitative analysis for the 2-channel 4K@30 scenario is as follows: the control operation information requires "enabled 2 channels," and channels 1 and 2 are actually enabled (meeting the requirement), with a channel enable precision of 1; actual cache usage is 22% (28.16MB), and logical unit utilization is 28% (280,000 units). Quantitative analysis: resource usage adaptability = (1-22% / 80%) × (1-28% / 85%) ≈ (0.725) × (0.6706) ≈ 0.486; channel control-resource adaptability quantification factor = (1+0.486) / 2 ≈ 0.743 (high adaptability). The quantitative analysis for the 4-channel 2K@60 scenario is as follows: the control operation information requires "enabled 4 channels," and channels 1-4 are actually enabled (meeting the requirement), with a channel enable precision of 1; actual cache usage is 30% (38.4MB), and logical unit utilization is 35% (350,000 units). Quantitative analysis: Resource occupancy fit = (1-30% / 80%)×(1-35% / 85%)≈(0.625)×(0.5882)≈0.367; Path control-resource fit quantitative factor = (1+0.367) / 2≈0.683 (medium fit).

[0075] Based on the transmission mode-bandwidth correlation quantification factor and the path control-resource adaptation quantification factor, combined with the hierarchical architecture of the single-chip AXI bus transmission dual-dimensional evaluation model, this paper integrates the execution compliance rate of actual transmission actions that balance multi-specification video transmission and bandwidth stability, as well as the collaborative efficiency of the comprehensive transmission strategy that combines on-demand activation of fusion paths with resource-saving design, to generate transmission action-resource collaborative correlation quantification features. Using the single-chip AXI bus transmission dual-dimensional evaluation model (dimension 1: transmission stability, dimension 2: resource optimization) as a framework, the transmission mode-bandwidth correlation quantification factor and the path control-resource adaptation quantification factor are integrated into the model. The paper then calculates the fusion of the execution compliance rate of actual transmission actions (e.g., whether transmission is performed according to specifications) and the collaborative efficiency of the comprehensive strategy (e.g., the collaboration between path activation and resource saving) to generate quantification features (values ​​from 0 to 1, with 1 representing optimal collaboration).

[0076] For the fusion processing of a single-channel 4K@60 scenario, the hierarchical architecture of the dual-dimensional evaluation model for single-chip AXI bus transmission is "transmission stability weight 60%, resource optimization weight 40%"; the transmission mode-bandwidth correlation quantification factor is 0.866 (corresponding to transmission stability), and the path control-resource adaptation quantification factor is 0.810 (corresponding to resource optimization); the actual transmission action execution compliance rate = (actual number of transmitted frames / target number of transmitted frames) × (number of error-free packets / total number of transmitted frames) = 1 × 0.998 ≈ 0.998; the comprehensive transmission strategy coordination efficiency = 1 - (redundant resource occupation / total resources) = 1 - ((80% × 128MB - 19.2MB) + (85% × 1 million - 200,000)) / (128MB + 1 million) ≈ 0.92. Fusion Processing: Transmission Action - Resource Collaboration Correlation Quantification Feature = (Transmission Mode - Bandwidth Correlation Quantification Factor × Transmission Stability Weight + Path Control - Resource Adaptation Quantification Factor × Resource Optimization Weight) × (Execution Compliance Rate × Collaboration Efficiency) = (0.866 × 0.6 + 0.810 × 0.4) × (0.998 × 0.92) ≈ (0.5196 + 0.324) × 0.918 ≈ 0.8436 × 0.918 ≈ 0.775 (High Collaboration).

[0077] For the fusion processing of a 2-channel 4K@30 scene, the model weights are the same as above; the transmission mode-bandwidth correlation quantization factor is 0.5, and the path control-resource adaptation quantization factor is 0.743; the execution compliance rate is 0.995 (a small amount of frame offset); the coordination efficiency is 0.88 (basically balanced resource allocation between the two channels). Fusion processing: Quantization feature = (0.5×0.6+0.743×0.4)×(0.995×0.88)≈(0.3+0.2972)×0.8756≈0.5972×0.8756≈0.523 (moderate coordination). For the fusion processing of a 4-channel 2K@60 scene, the model weights are the same as above; the transmission mode-bandwidth correlation quantization factor is 0.733, and the path control-resource adaptation quantization factor is 0.683; the execution compliance rate is 0.99 (no packet loss); the coordination efficiency is 0.85 (resource occupancy of the four channels is close to the threshold). Fusion processing: Quantization feature = (0.733×0.6+0.683×0.4)×(0.99×0.85)≈(0.4398+0.2732)×0.8415≈0.713×0.8415≈0.599 (moderate to high synergy).

[0078] Based on a dual-dimensional evaluation model for single-chip AXI bus transmission, the quantitative characteristics of transmission action-resource collaboration are analyzed and processed. Transmission mode requirements, bandwidth feedback, control operation information, and FPGA chip attributes are extracted and classified to generate transmission mode adaptation parameters including transmission specification adaptation coefficients and bandwidth fluctuation calibration values. For the parameter extraction in a single-channel 4K@60 scenario, the model analysis quantitative feature is 0.775, and the core influencing factor is determined to be "slightly excessive bandwidth fluctuation." Extracted classification information includes: transmission mode requirements (1 channel 4K@60, 3840×2160, 60fps), bandwidth feedback (average 1.5GB / s, fluctuation 2.67%), control operation information (1 channel enabled), and FPGA attributes (128MB cache, 1 million logic units). Generate transmission mode adaptation parameters: Transmission specification adaptation coefficient = (actual resolution / target resolution) × (actual frame rate / target frame rate) × transmission mode - bandwidth correlation quantization factor = 1 × 1 × 0.866 ≈ 0.866; Bandwidth fluctuation calibration value = target bandwidth × (1 - bandwidth fluctuation amplitude / 10%) = 1.5GB / s × 0.733 ≈ 1.099GB / s (dynamically adjust bandwidth threshold).

[0079] For the parameter extraction of the 2-channel 4K@30 scene, the model analysis quantization feature is 0.523, and the core influencing factor is determined to be "excessive bandwidth deviation between the two channels". Extracted classification information includes: transmission mode requirements (2-channel 4K@30, 3840×2160, 30fps), bandwidth feedback (average 0.75GB / s per channel, deviation 5.33%), control operation information (enabling 2 channels), and FPGA attributes (128MB cache, 1 million logic units). Transmission mode adaptation parameters are generated: transmission specification adaptation coefficient = 1×1×0.5 = 0.5; bandwidth fluctuation calibration value = 0.75GB / s×(1-5.33% / 5%) = 0.75GB / s×(-0.066) (set to 0) → corrected to 0.72GB / s (reducing the single-channel bandwidth threshold). For the parameter extraction of the 4-channel 2K@60 scene, the model analysis quantization feature is 0.599, and the core influencing factor is determined to be "resource usage approaching the threshold". Extracting classification information: transmission mode requirements (4 channels 2K@60, 1920x1080, 60fps), bandwidth feedback (average 0.375GB / s per channel, deviation 2.67%), control operation information (4 channels enabled), FPGA attributes (128MB cache, 1 million logic units). Generating transmission mode adaptation parameters: transmission specification adaptation coefficient = 1×1×0.733≈0.733; bandwidth fluctuation calibration value = 0.375GB / s×(1-2.67% / 5%)≈0.375GB / s×0.466≈0.175GB / s (early warning of resource usage).

[0080] like Figure 2As shown, a configurable multi-specification video stream transmission device based on an FPGA chip AXI bus includes: a construction module 201, used to receive user video transmission specification instructions and pre-stored FPGA system basic configuration information, and generate transmission mode startup and AXI bus configuration basic setting information; a processing module 202, used to, based on the transmission mode startup instructions and AXI bus configuration settings, start the encoding and decoding function of the FPGA chip PS end and trigger the PL end bus path to be enabled, generating video source information and raw data of AXI bus real-time transmission bandwidth; receive pre-stored video stream standardization conversion algorithms and bandwidth data processing rules, process the video source information and raw data of AXI bus real-time transmission bandwidth, and generate RGB image size and... The system compares the target bandwidth of the bus with the baseline information. Based on the bandwidth dynamic random allocation control rules, it processes the size of the RGB image with the baseline information to generate bandwidth allocation error signals and path activation adjustment information. It processes the path activation adjustment information with the internal resource status information of the FPGA chip to generate control operation information for matching the number of bus paths with the video stream specifications. Based on the preset video transmission mode operation requirements and real-time bandwidth feedback, it transforms the control operation information into actual video stream transmission actions. It extracts and classifies the transmission mode requirements, bandwidth feedback, control operation information, and FPGA chip attributes to generate transmission mode adaptation parameters, bandwidth calibration rules, resource occupancy thresholds, and video stream and AXI bus linkage mapping information.

[0081] A computing device includes a memory for storing computer program instructions and a processor for executing the computer program instructions, wherein when the computer program instructions are executed by the processor, the device is triggered to execute any configurable multi-specification video streaming method based on an FPGA chip AXI bus.

[0082] The methods and / or embodiments in this application can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowchart. When the computer program is executed by a processing unit, it performs the functions defined in the methods of this application.

[0083] It should be noted that the computer-readable medium described in this application may be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0084] It will be apparent to those skilled in the art that this application is not limited to the details of the exemplary embodiments described above, and that this application can be implemented in other specific forms without departing from the spirit or essential characteristics of this application. Therefore, the embodiments should be regarded as exemplary and non-limiting in all respects, and the scope of this application is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be embraced within this application.

Claims

1. A configurable multi-specification video stream transmission method based on an FPGA chip AXI bus, characterized in that, The application relates to a video transmission mode adaptive control method based on FPGA, which comprises the following steps: receiving user video transmission specification instructions and pre-stored FPGA system basic configuration information, generating transmission mode starting and AXI bus configuration basic setting information, wherein the pre-stored system basic configuration information comprises AXI bus bandwidth allocation parameters corresponding to multiple transmission specifications, interactive basic parameters of a PL end and a PS end of an FPGA chip, signal access rules and coding and decoding parameters of a video source; based on transmission mode starting instructions and AXI bus configuration settings, starting the coding and decoding function of the PS end of the FPGA chip and triggering the PL end bus channel activation, generating video source information and AXI bus real-time transmission bandwidth original data; receiving pre-stored video stream standardization conversion algorithms and bandwidth data processing rules, processing the video source information and the AXI bus real-time transmission bandwidth original data, and generating RGB image size and bus target bandwidth comparison benchmark information; based on bandwidth dynamic random allocation control rules, processing the RGB image size and the bus target bandwidth comparison benchmark information, generating bandwidth allocation error signals and channel activation adjustment information; processing the channel activation adjustment information and the FPGA chip internal resource state information, generating bus channel quantity and video stream specification matching control operation information; based on pre-set video transmission mode operation requirements and real-time bandwidth feedback, converting the control operation information into actual video stream transmission actions, extracting and classifying transmission mode requirements, bandwidth feedback, control operation information and FPGA chip attributes, and generating transmission mode adaptive parameters, bandwidth calibration rules, resource occupation threshold values and video stream and AXI bus linkage mapping information.

2. The configurable multi-specification video streaming method based on the AXI bus of the FPGA chip according to claim 1, characterized in that, based on transmission mode starting instructions and AXI bus configuration settings, starting the coding and decoding function of the PS end of the FPGA chip and triggering the PL end bus channel activation, generating video source information and AXI bus real-time transmission bandwidth original data, comprising: grouping and classifying the coding and decoding parameters of the PS end of the FPGA chip according to pre-set coding and decoding starting rules, generating coding and decoding modes and associated processing parameter information corresponding to each rule; based on video stream transmission requirements, arranging and designing the activation content of the PL end AXI bus channel, obtaining channel activation standards, channel data types and transmission range information, and generating bus channel activation design information; combining video stream transmission mode operation planning and bandwidth monitoring requirements, setting corresponding bandwidth verification nodes for the bus channel activation design information of each coding and decoding rule; processing the PS end coding and decoding grouping result, the PL end bus channel activation design information and the bandwidth verification nodes, and generating video source information and AXI bus real-time transmission bandwidth original data containing coding and decoding rule grouping information, bus channel activation scheme and bandwidth verification standards.

3. The configurable multi-specification video streaming method based on the AXI bus of the FPGA chip according to claim 1, characterized in that, receiving pre-stored video stream standardization conversion algorithms and bandwidth data processing rules, processing the video source information and the AXI bus real-time transmission bandwidth original data, and generating RGB image size and bus target bandwidth comparison benchmark information, comprising: grouping and classifying the pre-stored video stream standardization conversion algorithms according to pre-set video source-format mapping rules, generating video source types and associated format conversion model information corresponding to each rule; The calculation content of the bandwidth data processing rule is arranged and designed based on the data standardization requirement, the calculation standard, the data type and the derivation range information are obtained, and the bandwidth data processing design information is generated; The corresponding bandwidth calibration nodes are set for the bandwidth data processing design information of each rule according to the video stream transmission quality requirement and the bandwidth stability requirement; The video stream standardization conversion algorithm grouping result, the bandwidth data processing design information and the bandwidth calibration node are processed to generate the RGB image size and bus target bandwidth ratio comparison benchmark information containing the algorithm grouping information, the data processing scheme and the calibration standard.

4. The configurable multi-specification video streaming method based on the AXI bus of the FPGA chip according to claim 1, characterized in that, The RGB image size and bus target bandwidth ratio comparison benchmark information are processed based on the bandwidth dynamic random allocation control rule to generate the bandwidth allocation error signal and the channel enabling adjustment information, including: The RGB image size and bus target bandwidth ratio comparison benchmark information are obtained based on the bandwidth dynamic random allocation control rule, and the RGB image format compliance, the single-channel bandwidth allocation accuracy and the total bandwidth occupation stability characteristics are extracted; The single-channel bandwidth allocation accuracy characteristic is verified, the bandwidth deviation of several channels is checked, and the bandwidth allocation precision factor is generated; The total bandwidth occupation stability characteristic is checked, whether the total bandwidth is maintained at 1.5 GB and whether there is a data disorder risk caused by exceeding the bandwidth during multi-channel transmission is confirmed, and the total bandwidth stability coefficient is generated; The bandwidth allocation precision factor and the total bandwidth stability coefficient are processed based on the preset bandwidth control rule, the image format repair mechanism is used to correct the RGB format deviation, the dynamic bandwidth fine-tuning technology is used to calibrate the single-channel allocation error, and the super-bandwidth early warning mechanism is used to avoid data transmission abnormity, and the bandwidth control preprocessing result is generated; The bandwidth allocation error signal reflecting the format deviation, the bandwidth allocation error and the channel adaptation problem, and the channel enabling adjustment information adjusting the number of channel enabling and optimizing the bandwidth allocation proportion are generated by integrating the bandwidth control preprocessing result.

5. The configurable multi-specification video streaming method based on the AXI bus of the FPGA chip according to claim 1, characterized in that, The bus channel number and video stream specification matching control operation information are generated by processing the channel enabling adjustment information and the FPGA chip internal resource state information, including: The channel enabling number requirement and bandwidth adaptation requirement in the channel enabling adjustment information are simulated and analyzed to generate different video stream specification-channel number adaptation simulation characteristics and channel enabling resource consumption response curve characteristics, and form channel adaptation simulation basic information; The cache resource occupation rate and logic unit usage rate in the FPGA chip internal resource state information are transformed and the resource boundary is delimited to generate cache resource safe occupation threshold characteristics and logic unit usage constraint parameters, and form resource constraint information; The optimal channel number interval characteristics under different video stream specifications and the target function matching degree parameters are generated by parameter optimization and resource efficiency evaluation based on the simulated channel enabling and resource occupation interaction state and the video stream transmission stability target function, and the channel number optimization information is formed; The bus channel number and video stream specification matching control operation information and the FPGA internal resource adaptability analysis report are generated by integrating the channel adaptation simulation basic information, the resource constraint information and the channel number optimization information.

6. The configurable multi-specification video streaming method based on the AXI bus of the FPGA chip according to claim 5, characterized in that, Based on the preset video transmission mode operation requirement and real-time bandwidth feedback, the control operation information is converted into actual video stream transmission action, the transmission mode requirement, bandwidth feedback, control operation information and FPGA chip attribute are extracted and classified, the transmission mode adaptation parameter, bandwidth calibration rule, resource occupation threshold and video stream and AXI bus linkage mapping information are generated, including: The specification adaptation requirement in the preset video transmission mode operation requirement and the bandwidth fluctuation data in the real-time bandwidth feedback are quantitatively analyzed and processed to generate a transmission mode-bandwidth correlation quantization factor; The bus channel number and the channel enabling precision in the video stream specification matching control operation information and the resource bearing limit characteristic information in the FPGA chip attribute are quantitatively analyzed and processed to generate a channel control-resource adaptation quantization factor; Based on the transmission mode-bandwidth correlation quantization factor and the channel control-resource adaptation quantization factor, the hierarchical architecture of the single-chip AXI bus transmission double-dimension evaluation model is combined to fuse the execution compliance rate in the actual transmission action considering the multi-specification video transmission and bandwidth stability and the collaborative efficiency in the integrated transmission strategy of the fusion channel on-demand enabling and resource saving design, and a transmission action-resource collaborative correlation quantization feature is generated. The device includes:

7. An FPGA chip AXI bus-based configurable multi-specification video stream transmission device, characterized in that, A construction module configured to receive a user video transmission specification instruction and pre-stored FPGA system basic configuration information, and generate transmission mode start and AXI bus configuration basic setting information; A processing module configured to start the FPGA chip PS end coding and decoding function and trigger the PL end bus channel enabling based on the transmission mode start instruction and AXI bus configuration setting, generate video source information and AXI bus real-time transmission bandwidth original data, receive pre-stored video stream standardization conversion algorithm and bandwidth data processing rule, process the video source information and AXI bus real-time transmission bandwidth original data, generate RGB image size and bus target bandwidth comparison benchmark information, process the RGB image size and bus target bandwidth comparison benchmark information based on the bandwidth dynamic random allocation control rule, generate bandwidth allocation error signal and channel enabling adjustment information, process the channel enabling adjustment information and FPGA chip internal resource state information, and generate bus channel number and video stream specification matching control operation information; based on the preset video transmission mode operation requirement and real-time bandwidth feedback, the control operation information is converted into actual video stream transmission action, the transmission mode requirement, bandwidth feedback, control operation information and FPGA chip attribute are extracted and classified, the transmission mode adaptation parameter, bandwidth calibration rule, resource occupation threshold and video stream and AXI bus linkage mapping information are generated. Including:

8. An electronic device, comprising: A first processor; And a memory for storing executable instructions of the first processor; ​ The first processor is configured to execute the FPGA chip AXI bus based configurable multi-specification video stream transmission method according to any one of claims 1-6 by executing the executable instructions.

9. A computing device comprising a memory for storing computer program instructions and a processor for executing the computer program instructions, wherein, When the computer program instructions are executed by the processor, the device is triggered to execute the FPGA chip AXI bus based configurable multi-specification video stream transmission method according to any one of claims 1-6.

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