Video recording method and device, electronic equipment and storage medium

Abstract

The invention relates to a video recording method and device, electronic equipment and a storage medium. The video recording method comprises the steps that video recording is carried out in response to the electronic equipment, the current recording frame rate and current operation information of the electronic equipment are acquired, and the current operation information comprises the current processing device clock frequency of the electronic equipment; according to the current recording frame rate, the current operation information and a preset frequency adjustment model, target clock frequency is determined, training data of the frequency adjustment model comprises operation information of the electronic equipment when video recording is carried out at the preset recording frame rate, and the preset recording frame rate is within a preset frame rate range. And adjusting the clock frequency of a processing device of the electronic equipment to the target clock frequency, and continuously carrying out video recording. According to the method and the device, the power consumption is controlled within a certain range while the stability of the video recording frame rate is ensured in the recording process of the electronic equipment, and the endurance time is prolonged.

Description

Technical Field

[0001] This disclosure relates to the fields of frequency modulation and image processing in electronic devices, and more particularly to video recording methods, apparatus, electronic devices, and storage media. Background Technology

[0002] With the gradual upgrading of the imaging capabilities of electronic devices, current electronic devices support recording high-resolution videos. Users often use portable electronic devices for video recording in their daily lives and work.

[0003] However, electronic devices often experience frame drops when recording high-resolution videos (such as 4K videos), affecting the quality of the recorded video. Furthermore, video recording can lead to increased power consumption, causing the device to overheat and reducing battery life, thus impacting the user experience. Summary of the Invention

[0004] To overcome the problems existing in related technologies, this disclosure provides a video recording method, apparatus, electronic device, and storage medium.

[0005] According to a first aspect of the present disclosure, a video recording method is provided, comprising: in response to an electronic device performing video recording, acquiring a current recording frame rate and current operating information of the electronic device, the current operating information including a current processing device clock frequency of the electronic device; determining a target clock frequency based on the current recording frame rate, the current operating information, and a preset frequency adjustment model, wherein training data of the frequency adjustment model includes operating information of the electronic device when performing video recording at a preset recording frame rate, the preset recording frame rate being within a preset frame rate range; adjusting the clock frequency of the processing device of the electronic device to the target clock frequency, and continuously performing video recording.

[0006] In one embodiment, the training data for the frequency adjustment model is collected in the following manner: The electronic device is controlled to record video. During video recording, the recording frame rate and operational information of each video frame recorded by the electronic device are determined as a first dataset. The operational information includes the clock frequency of the processing device in the electronic device and the operating current of the electronic device. The recording frame rate and operational information contained in the first dataset are arranged in chronological order. The recording frame rates within the preset frame rate range in the first dataset, and the operational information corresponding to the recording frame rates within the preset frame rate range, are determined as a second dataset. The second dataset contains the recording frame rates within the preset frame rate range. The rate and operation information are arranged in chronological order; multiple data pairs are determined in the second dataset, each of the multiple data pairs including first time-series data and second time-series data that are adjacent in time, the first time-series data being the recording frame rate and operation information that are earlier in time, and the second time-series data being the recording frame rate and operation information that are later in time; for each of the multiple data pairs, multiple target data pairs are determined based on the operating current contained in the first time-series data, the operating current contained in the second time-series data, and a preset current threshold, and training data is determined based on the recording frame rate and operation information contained in each target data pair.

[0007] In one embodiment, determining multiple target data pairs for each of the plurality of data pairs based on the operating current contained in the data at a first time moment, the operating current contained in the data at a second time moment, and a preset current threshold in each data pair includes: for each of the plurality of data pairs, in response to the operating current contained in the data at a first time moment being greater than the current threshold and the operating current contained in the data at a second time moment being less than the current threshold, determining the corresponding data pair as a target data pair and obtaining the plurality of target data pairs.

[0008] In one embodiment, determining the training data based on the recording frame rate and running information contained in each target data pair includes: for each target data pair, determining the recording frame rate and running information contained in the first time-sharing data of the target data pair as input data, determining the clock frequency of the processing device contained in the second time-sharing data of the target data pair as feature data, and determining the input data and feature data as training data.

[0009] In one embodiment, the frequency adjustment model is trained as follows: input data from the training data is input into an initial model, the predicted data output by the initial model is obtained, and the output loss is calculated based on the predicted data and the feature data corresponding to the input data in the training data; the initial model is trained based on the training data until the output loss meets a preset requirement, the model training is determined to be complete, and the trained initial model is determined as the frequency adjustment model.

[0010] In one embodiment, the current operating information of the electronic device further includes: the current operating current and the current processor utilization rate of the electronic device; the step of determining the target clock frequency based on the current recording frame rate, the current operating information, and a preset frequency adjustment model includes: determining the target clock frequency based on the current recording frame rate, the current processing device clock frequency, the current operating current, the current processor utilization rate, and a preset frequency adjustment model.

[0011] In one embodiment, the processing device of the electronic device includes a Double Data Rate (DDR) memory and a Central Processing Unit (CPU), and the target clock frequency includes a target DDR clock frequency and a target CPU clock frequency; adjusting the clock frequency of the processing device of the electronic device to the target clock frequency includes: adjusting the clock frequency of the DDR memory of the electronic device to the target DDR clock frequency, and adjusting the clock frequency of the CPU of the electronic device to the target CPU clock frequency.

[0012] According to a second aspect of the present disclosure, a video recording apparatus is provided, comprising: an acquisition unit, configured to acquire, in response to an electronic device performing video recording, a current recording frame rate and current operating information of the electronic device, the current operating information including a current processing device clock frequency of the electronic device; a processing unit, configured to determine a target clock frequency based on the current recording frame rate, the current operating information, and a preset frequency adjustment model, wherein training data for the frequency adjustment model includes operating information of the electronic device when recording video at a preset recording frame rate, the preset recording frame rate being within a preset frame rate range; and an adjustment unit, configured to adjust the clock frequency of the processing device of the electronic device to the target clock frequency, and continuously perform video recording.

[0013] In one embodiment, the training data of the frequency adjustment model is collected by the processing unit in the following manner: The electronic device is controlled to record video; during video recording, the recording frame rate and operation information of each video frame recorded by the electronic device are determined as a first dataset. The operation information includes the clock frequency of the processing device in the electronic device and the operating current of the electronic device. The recording frame rate and operation information contained in the first dataset are arranged in chronological order. The recording frame rates within the preset frame rate range in the first dataset, and the operation information corresponding to the recording frame rates within the preset frame rate range, are determined as a second dataset. The second dataset contains... The recording frame rate and running information are arranged in chronological order; multiple data pairs are determined in the second dataset, each of the multiple data pairs including first time-series data and second time-series data that are adjacent in time, the first time-series data being the recording frame rate and running information that comes first in time, and the second time-series data being the recording frame rate and running information that comes later in time; for each of the multiple data pairs, multiple target data pairs are determined based on the operating current contained in the first time-series data, the operating current contained in the second time-series data, and a preset current threshold, and training data is determined based on the recording frame rate and running information contained in each target data pair.

[0014] In one embodiment, the processing unit determines multiple target data pairs for each of the plurality of data pairs in the following manner: based on the operating current contained in the data at a first time moment, the operating current contained in the data at a second time moment, and a preset current threshold, the processing unit determines the corresponding data pair as a target data pair and obtains the plurality of target data pairs.

[0015] In one embodiment, the processing unit determines the training data based on the recording frame rate and running information contained in each target data pair in the following manner: for each target data pair, the recording frame rate and running information contained in the first time moment data in the target data pair are determined as input data, the clock frequency of the processing device contained in the second time moment data in the target data pair is determined as feature data, and the input data and feature data are determined as training data.

[0016] In one embodiment, the frequency adjustment model is trained by the processing unit in the following manner: inputting the input data from the training data into the initial model, obtaining the predicted data output by the initial model, calculating the output loss based on the predicted data and the feature data corresponding to the input data in the training data; training the initial model based on the training data until the output loss meets the preset requirements, determining that the model training is complete, and determining the trained initial model as the frequency adjustment model.

[0017] In one embodiment, the current operating information of the electronic device further includes: the current operating current and the current processor utilization rate of the electronic device; the processing unit determines the target clock frequency according to the current recording frame rate, the current operating information and the preset frequency adjustment model in the following manner: the target clock frequency is determined according to the current recording frame rate, the current processing device clock frequency, the current operating current, the current processor utilization rate and the preset frequency adjustment model.

[0018] In one embodiment, the processing device of the electronic device includes a Double Data Rate (DDR) memory and a Central Processing Unit (CPU), and the target clock frequency includes a target DDR clock frequency and a target CPU clock frequency. The processing unit adjusts the clock frequency of the processing device of the electronic device to the target clock frequency in the following manner: adjusting the clock frequency of the DDR memory of the electronic device to the target DDR clock frequency, and adjusting the clock frequency of the CPU of the electronic device to the target CPU clock frequency.

[0019] According to a third aspect of the present disclosure, an electronic device is provided, comprising: a processor; a memory for storing processor-executable instructions; wherein the processor is configured to: execute the video recording method described in the first aspect or any embodiment of the first aspect.

[0020] According to a fourth aspect of the present disclosure, a storage medium is provided, the storage medium storing instructions that, when executed by a processor, enable the processor to perform the video recording method described in the first aspect or any embodiment of the first aspect.

[0021] The technical solutions provided by the embodiments of this disclosure can include the following beneficial effects: When an electronic device is recording video, the current recording frame rate and current operating information of the electronic device are acquired. Based on the current recording frame rate, current operating information, and a preset frequency adjustment model, a target clock frequency is determined. The training data for the frequency adjustment model consists of the recording frame rate and operating information of the electronic device when recording video at the preset recording frame rate. The clock frequency of the processing device of the electronic device is adjusted to the target clock frequency, and video recording is performed while the processing device of the electronic device is operating at the target clock frequency. Through this disclosure, a frequency adjustment model is trained based on training data collected at a specific recording frame rate. By using the frequency adjustment model to adjust the clock frequency of the processing device in the electronic device according to real-time collected data during video recording, the power consumption of the electronic device is controlled within a certain range while ensuring a stable video recording frame rate, thereby extending the battery life of the electronic device.

[0022] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0023] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0024] Figure 1 This is a flowchart illustrating a video recording method according to an exemplary embodiment.

[0025] Figure 2 This is a flowchart illustrating a method for collecting training data according to an exemplary embodiment.

[0026] Figure 3 This is a flowchart illustrating a method for determining multiple target data pairs according to an exemplary embodiment.

[0027] Figure 4 This is a flowchart illustrating a method for determining training data according to an exemplary embodiment.

[0028] Figure 5 This is a flowchart illustrating a method for training a frequency modulation model according to an exemplary embodiment.

[0029] Figure 6 This is a flowchart illustrating a method for determining a target clock frequency according to an exemplary embodiment.

[0030] Figure 7 This is a flowchart illustrating a method for adjusting the clock frequency of a processing device in an electronic device to a target clock frequency, according to an exemplary embodiment.

[0031] Figure 8 This is a flowchart illustrating a clock frequency adjustment method according to an exemplary embodiment of the present disclosure.

[0032] Figure 9 This is a block diagram illustrating a video recording apparatus according to an exemplary embodiment.

[0033] Figure 10 This is a block diagram illustrating an apparatus for video recording according to an exemplary embodiment.

[0034] Figure 11 This is a block diagram illustrating an apparatus for video recording according to an exemplary embodiment. Detailed Implementation

[0035] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure.

[0036] The operating frequency adjustment method provided in this disclosure is applied to scenarios where the operating frequency of an electronic device is adjusted in real time based on the current state information of the electronic device when the electronic device is working.

[0037] With the gradual upgrading of the imaging capabilities of portable electronic devices, mobile phones and other portable electronic devices now support recording high-resolution videos. Users often use portable electronic devices for video recording in their daily lives and work. However, when electronic devices use their camera modules to record video, they are limited by the device's own performance and this affects the device's power consumption. When recording high-resolution videos (such as 4K videos), electronic devices often experience frame drops, causing stuttering due to frame rate fluctuations. Furthermore, the power consumption of electronic devices increases during video recording, leading to higher device temperatures and reduced battery life, thus impacting the user experience.

[0038] In related technologies, there are techniques for adjusting the processor frequencies of application processing chips and image signal processing chips based on the recording scene of an electronic device. Different processor frequencies are set for different recording scenes (such as Super Night Scene mode, Extreme Night mode, portrait mode, and general mode) to optimize the video recording process. However, even under the same recording scene, the device parameters of the electronic device fluctuate continuously throughout the recording process. These fluctuations affect the device's frame rate, leading to frame rate fluctuations and resulting in stuttering in the recorded video, impacting the user experience. Furthermore, the main purpose of this technology is to optimize recording effects under different recording scenes by adjusting the processor frequency, without considering the impact of video recording on device power consumption. During video recording, device power consumption increases, leading to increased device temperature and reduced battery life.

[0039] In view of this, this disclosure proposes a video recording method. When an electronic device is recording video, the current recording frame rate and current operating information of the electronic device are acquired. Based on the current recording frame rate, current operating information, and a preset frequency adjustment model, a target clock frequency is determined. The training data for the frequency adjustment model consists of the recording frame rate and operating information of the electronic device when recording video at the preset frame rate. The clock frequency of the processing device of the electronic device is adjusted to the target clock frequency, and video recording is performed while the processing device of the electronic device is operating at the target clock frequency. Through this disclosure, a frequency adjustment model is trained based on training data collected at a specific recording frame rate. This model adjusts the clock frequency of the processing device in the electronic device according to real-time data collected during video recording, ensuring a stable video recording frame rate while controlling the power consumption of the electronic device within a certain range, thereby extending the battery life of the electronic device.

[0040] Figure 1 This is a flowchart illustrating a video recording method according to an exemplary embodiment. Figure 1 As shown, the method includes steps S101 to S103.

[0041] In step S101, in response to the electronic device recording video, the current recording frame rate and current operating information of the electronic device are obtained, including the current processing device clock frequency of the electronic device.

[0042] In step S102, the target clock frequency is determined based on the current recording frame rate, current operating information, and a preset frequency adjustment model. The training data of the frequency adjustment model includes the operating information of the electronic device when recording video at a preset recording frame rate, and the preset recording frame rate is within the preset frame rate range.

[0043] In step S103, the clock frequency of the processing device of the electronic device is adjusted to the target clock frequency, and video recording continues.

[0044] In this embodiment, a pre-trained frequency adjustment model is used to adjust the clock frequency of the processing device in the electronic device during video recording. The current recording frame rate and current operating information, collected in real-time during video recording, serve as the model input. The current operating information includes the current clock frequency of the processing device, which characterizes the current performance release and power consumption of the electronic device. The training data for the frequency adjustment model in this disclosure consists of the recording frame rate and operating information of the electronic device when recording video at a preset frame rate (within a preset frame rate range). This data characterizes the correspondence between the video recording frame rate and the clock frequency of the processing device. The model output (target clock frequency) is generated after model inference based on the model input (current recording frame rate and current operating information), ensuring that the recording frame rate of the electronic device remains within the preset frame rate range. Therefore, after obtaining the target clock frequency, this disclosure adjusts the clock frequency of the processing device in the electronic device to the target clock frequency. Video recording is performed while the processing device operates at the target clock frequency, and the above process is continuously executed during video recording, ensuring that the recording frame rate of the electronic device remains within the preset frame rate range. This allows for the recording of videos with a stable frame rate and no stuttering throughout.

[0045] It is understandable that electronic devices can use different recording modes when recording video, such as high-definition recording mode: recording video at 1080P (1920*1080) resolution and 60 frames per second (60FPS), and 4K recording mode: recording video at 4K (4096*2160) resolution and 30 frames per second (60FPS). This disclosure pre-trains different frequency adjustment models for different recording modes. After video recording begins, the electronic device can select the corresponding frequency adjustment model according to the recording mode being used. In this disclosure, the training data required for training the frequency adjustment models for different recording modes is collected within the corresponding recording mode. For example, for the frequency adjustment model in the aforementioned high-definition recording mode, the training data is collected during recording in high-definition mode, and the preset recording frame rate in this case is 60 frames per second or close to 60 frames per second. Similarly, for the frequency adjustment model of the 4K recording mode described above, the training data for the model is collected during the recording process in 4K recording mode, and the preset recording frame rate in this case is 30 frames per second or close to 30 frames per second. It can be further understood that the recording modes supported by the electronic device in this disclosure include, but are not limited to, the recording models listed above, and the preset frequency adjustment models also include, but are not limited to, the frequency adjustment models listed above.

[0046] This disclosure provides a frequency adjustment model trained based on training data collected at a specific recording frame rate. By using the frequency adjustment model, the clock frequency of the processing device in the electronic device is adjusted according to the real-time data collected during the video recording process. This ensures a stable video recording frame rate while controlling the power consumption of the electronic device within a certain range, thereby extending the battery life of the electronic device.

[0047] In this embodiment, the frequency adjustment model predicts a target clock frequency for adjusting the processing device clock frequency based on the current recording frame rate and current operating information corresponding to the current video frame acquired in real time. That is, the target clock frequency is used to adjust the processing device clock frequency when the electronic device acquires the next video frame. Based on this, a single set of data in the training data of this disclosure includes two temporally adjacent frames. The following embodiments of this disclosure illustrate the method for acquiring training data.

[0048] Figure 2 This is a flowchart illustrating a method for collecting training data according to an exemplary embodiment. Figure 2 As shown, the method includes steps S201 to S204.

[0049] In step S201, the electronic device is controlled to record video. During the video recording process, the recording frame rate and operation information of each video frame recorded by the electronic device are determined as the first dataset. The operation information includes the clock frequency of the processing device in the electronic device and the operating current of the electronic device. The recording frame rate and operation information contained in the first dataset are arranged in chronological order.

[0050] In step S202, the recording frame rates within the preset frame rate range in the first dataset and the running information corresponding to the recording frame rates within the preset frame rate range are determined as the second dataset, and the recording frame rates and running information contained in the second dataset are arranged in chronological order.

[0051] In step S203, multiple data pairs are determined in the second dataset. Each data pair includes first time data and second time data that are sequentially adjacent. The first time data is the recording frame rate and running information that are in the earlier time sequence, and the second time data is the recording frame rate and running information that are in the later time sequence.

[0052] In step S204, for each of the multiple data pairs, multiple target data pairs are determined based on the operating current contained in the data at the first time moment, the operating current contained in the data at the second time moment, and a preset current threshold in each data pair. Training data is then determined based on the recording frame rate and running information contained in each target data pair.

[0053] In this embodiment, the frequency adjustment model predicts a target clock frequency based on the current recording frame rate and current operating information. This target clock frequency is then used to adjust the clock frequency of the processing device in the electronic device, ensuring that the recording frame rate of the next video frame captured when the processing device operates at the target clock frequency is within a preset frame rate range. Therefore, to ensure that the recording frame rate when the processing device operates at the target clock frequency is within the preset frame rate range, the video frames corresponding to the training data used for model training in this disclosure should be within the preset frame rate range (e.g., for a 30FPS recording mode, the preset frame rate range can be set to 29.9FPS-30.1FPS). In other words, the data (first dataset) obtained from video recording by the electronic device is filtered using the preset frame rate range, retaining the recording frame rates and corresponding operating information within the preset frame rate range to obtain the second dataset.

[0054] Furthermore, given that the recording frame rates and corresponding operational information outside the preset frame rate range in the second dataset obtained after filtering have been removed, the data in the second dataset will contain temporally adjacent data pairs and temporally non-adjacent data pairs. For example, the first dataset includes temporally consecutive frame 1, frame 2, frame 3, frame 4, and frame 5, while the filtered second dataset includes frame 1, frame 3, and frame 4. Frame 3 and frame 4 are temporally adjacent data pairs, while frame 1 and frame 3 are temporally non-adjacent data pairs. Based on this, this disclosure further filters the second dataset containing recording frame rates within the preset frame rate range and corresponding operational information to obtain multiple temporally adjacent data pairs. It is understandable that when an electronic device is recording video with its camera module activated, the device's power consumption (device operating current) may increase. Based on this, after the frequency adjustment model obtains the target clock frequency, in order to avoid increased power consumption when the electronic device records video at the target clock frequency, this disclosure further filters multiple determined data pairs based on a preset current threshold to obtain multiple target data pairs for obtaining training data. Then, training data is determined based on the target data pairs. The current threshold is a critical current that divides the power consumption level of the electronic device. If the operating current of the electronic device is greater than the current threshold, it indicates that the power consumption of the electronic device is too high; if the operating current of the electronic device is less than the current threshold, it indicates that the electronic device is at a normal power consumption level.

[0055] In an exemplary embodiment of this disclosure, for a frequency adjustment model applied to a recording mode with a recording frame rate of 30 FPS, the preset frame rate range is set to (29.9 FPS-30.1 FPS), and a certain pair of data collected is shown in Table 1 below:

[0056] Table 1:

[0057]

[0058] Here, t0 represents the previous frame, and t1 represents the next frame. The operating information of the electronic device includes the processor clock frequency CPU_CLOCK (GHz), processor utilization CPU_USAGE (%), memory clock frequency DDR_CLOCK (GHz), and device operating current CURRENT (A). The data at the first moment is the operating information (processor clock frequency, processor utilization, memory clock frequency, and device operating current) and recording frame rate corresponding to t0, and the data at the second moment is the operating information and recording frame rate corresponding to t1.

[0059] It is understood that this disclosure uses a frequency adjustment model to obtain the target clock frequency, one purpose of which is to enable video recording with lower power consumption (operating current) when the processing device of the electronic device is operating at the target clock frequency. Based on this, when selecting target data pairs for obtaining training data from multiple data pairs, this disclosure selects target data pairs based on the principle that the operating current corresponding to the second data pair with a later timing sequence is less than a current threshold. The following embodiments of this disclosure illustrate the method for determining multiple target data pairs.

[0060] Figure 3 This is a flowchart illustrating a method for determining multiple target data pairs according to an exemplary embodiment. Figure 3 As shown, the method includes steps S301 to S302.

[0061] In step S301, multiple data pairs are determined in the second dataset. Each data pair includes first time data and second time data that are sequentially adjacent. The first time data is the recording frame rate and running information that are in the earlier time sequence, and the second time data is the recording frame rate and running information that are in the later time sequence.

[0062] In step S302, for each of the multiple data pairs, in response to the fact that the operating current contained in the data at the first moment of the data pair is greater than the current threshold and the operating current contained in the data at the second moment of the data pair is less than the current threshold, the corresponding data pair is determined as the target data pair, and multiple target data pairs are obtained.

[0063] In this embodiment of the disclosure, when selecting a target data pair for acquiring training data from multiple data pairs, the selection principle is as follows: the operating current of the data at the first moment in the data pair is greater than the current threshold, and the operating current of the data at the second moment in the data pair is less than the current threshold. Specifically, for the target data pair, the data at the second moment in the data pair corresponds to the target clock data predicted during the actual use of the model. By selecting the target data pair for acquiring model training data in the above manner, the target clock frequency predicted by the finally trained frequency adjustment model can maintain power consumption. Even after obtaining the target clock frequency using the frequency adjustment model, video recording can be performed with an operating current less than a preset current threshold when the processing device of the electronic device is operating at the target clock frequency. It is understood that the operating current of the electronic device and the clock frequency of the processing device are positively correlated; that is, generally, the higher the clock frequency of the processing device, the greater the operating current of the electronic device, and the greater the power consumption of the electronic device. Based on this, by applying the target clock frequency predicted by the frequency adjustment model in this disclosure for video recording, the electronic device can maintain a normal power consumption level during video recording. That is, when the electronic device is currently recording video at a normal power consumption level, by adjusting the target clock frequency predicted by the model for video recording, the electronic device can maintain a normal power consumption level; that is, when the electronic device is currently recording video at a high power consumption level, by adjusting the target clock frequency predicted by the model for video recording, the power consumption level of the electronic device can be adjusted to a low power consumption level.

[0064] In an exemplary embodiment of this disclosure, if the preset current threshold is 1.1A, then the target data pair is selected from the above multiple data pairs in the following manner: For the multiple data pairs, the data pairs whose current at time t0 (time sequence first) (first time data) does not meet the requirement (I>1.1A) and whose current at time t1 (time sequence later) (second time data) meets the requirement (I<1.1A) are selected as the target data pairs.

[0065] In this embodiment of the disclosure, the final training data obtained includes input data for the initial model input and feature data for calculating the model loss by combining the initial model output. The following embodiments of the disclosure illustrate the method for determining the training data.

[0066] Figure 4 This is a flowchart illustrating a method for determining training data according to an exemplary embodiment. Figure 4 As shown, the method includes steps S401 to S402.

[0067] In step S401, for each of the multiple data pairs, multiple target data pairs are determined based on the operating current contained in the data at the first time moment, the operating current contained in the data at the second time moment, and a preset current threshold in each data pair.

[0068] In step S402, for each target data pair, the recording frame rate and running information contained in the first time moment data of the target data pair are determined as input data, the clock frequency of the processing device contained in the second time moment data of the target data pair is determined as feature data, and the input data and feature data are determined as training data.

[0069] In this embodiment, the input to the frequency adjustment model is the current operating information (including the clock frequency of the processing device, the current of the electronic device, etc.) and the current recording frame rate, which characterize the operating state and recording status of the electronic device. The output of the frequency adjustment model is the target clock frequency used to adjust the clock frequency of the processing device. Further, in the target data pair obtained in this disclosure, the first time-sequence data contained in the target data pair corresponds to the model input. Therefore, the first time-sequence data contained in the target data pair is used as the input data in the training data, that is, the recording frame rate and operating information contained in the first time-sequence data of the target data pair are used as the input data in the training data. The second time-sequence data contained in the target data pair corresponds to the model output (target clock frequency). Therefore, adjustable parameters are selected from the first time-sequence data contained in the target data pair as feature data in the training data, that is, the clock frequency of the processing device contained in the second time-sequence data of the target data pair is used as the feature data in the training data.

[0070] In an exemplary embodiment of this disclosure, for a frequency adjustment model applied to a recording mode with a recording frame rate of 30 FPS, a preset frame rate range of (29.9 FPS-30.1 FPS) is set, and the processing device of the electronic device includes double data rate memory (DDR) and a central processing unit (CPU). The final set of training data, including input data and feature data, is shown in Table 1 below:

[0071] Table 2:

[0072]

[0073] The input data in the training data consists of the recording frame rate (FPS, frames per second), the first processor clock frequency (CPU_CLOCK, GHz), the processor utilization (CPU_USAGE, %), and the device operating current (CURRENT, A) in the timing sequence. The feature data in the training data consists of the second processor clock frequency (label_CPU_CLOCK, GHz) and the second memory clock frequency (label_DDR_CLOCK, GHz) in the timing sequence.

[0074] In this embodiment of the disclosure, after acquiring training data, an initial model is trained based on the input data and feature data contained in the training data until a frequency modulation model for frequency tuning is obtained. The following embodiments of this disclosure illustrate the method for training the frequency modulation model.

[0075] Figure 5 This is a flowchart illustrating a method for training a frequency modulation model according to an exemplary embodiment. Figure 5 As shown, the method includes steps S501 to S502.

[0076] In step S501, the input data from the training data is input into the initial model to obtain the predicted data output by the initial model. Based on the predicted data and the feature data in the training data corresponding to the input data, the output loss is calculated.

[0077] In step S502, an initial model is trained based on the training data until the output loss meets the preset requirements. The training of the model is then completed, and the trained initial model is determined as the frequency adjustment model.

[0078] In this embodiment of the disclosure, after acquiring training data, the input data from the training data is input into an initial model to obtain the predicted data output by the initial model. An output loss is calculated based on the feature data corresponding to the input data in the predicted data and training data using a preset loss function (such as cross-entropy loss). The initial model is trained based on the training data until the output loss meets preset requirements, at which point the model training is considered complete, and the trained initial model is designated as the frequency adjustment model.

[0079] In an exemplary embodiment of this disclosure, given the limited performance of the electronic device, the model training is completed on another device (such as a PC). Since the file format stored on the device differs from that on the other device, this disclosure, after training the frequency regulation model on the other device, performs a step-by-step file format conversion on the model file of the frequency regulation model, storing the converted model file and the environment variables required to run the model on the electronic device. In one example, this disclosure sets the trained clock frequency regulation model on the electronic device as follows: The trained clock frequency regulation model is saved as an intermediate file format (such as a .pt file). Using a preset software development kit (such as the Snapdragon Neural Processing Engine SDK), the clock frequency regulation model saved as an intermediate file format is converted into a target format file (such as a .dlc file). Then, the clock frequency regulation model converted to the target format file and the environment variables required to run the clock frequency regulation model are transferred to the electronic device, thus enabling the processor of the electronic device to run the neural network model (clock frequency regulation model).

[0080] The current operating information used as input to the frequency adjustment model in the embodiments of this disclosure may include, in addition to the current processing device clock frequency, other device parameters reflecting the current device state of the electronic device. The following embodiments of this disclosure describe a method for determining a target clock frequency.

[0081] Figure 6 This is a flowchart illustrating a method for determining a target clock frequency according to an exemplary embodiment. Figure 6 As shown, the method includes steps S601 to S602.

[0082] In step S601, in response to the electronic device recording video, the current recording frame rate and current operating information of the electronic device are obtained. The current operating information includes the current processing device clock frequency, current operating current and current processor utilization of the electronic device.

[0083] In step S602, the target clock frequency is determined based on the current recording frame rate, the current processing device clock frequency, the current operating current, the current processor utilization rate, and the preset frequency adjustment model.

[0084] In this embodiment, the electronic device can collect real-time operating information including not only the current processing device clock frequency, but also the processor utilization rate and device operating current. More current operating information allows for a more accurate reflection of the electronic device's current status. Therefore, when obtaining the target clock frequency through the frequency adjustment model, this disclosure uses the current recording frame rate, the current processing device clock frequency, the current operating current, and the current processor utilization rate as model inputs. This enables the frequency adjustment model to accurately determine the current device status based on the model inputs. Thus, after obtaining the target clock frequency output by the frequency adjustment model, video recording can be performed with an operating current less than a preset current threshold while the electronic device's processing device operates at the target clock frequency, and the video recording frame rate is maintained within a preset frame rate range during the recording process.

[0085] It is understood that the processing devices in electronic devices that affect device performance and power consumption are mainly Double Data Rate (DDR) memory and the target CPU. Based on this, the target clock frequency obtained through the frequency adjustment model in this disclosure includes the clock frequency used for the DDR memory and the clock frequency used for the target CPU, respectively. The following embodiments of this disclosure illustrate a method for adjusting the clock frequency of the processing devices in an electronic device to the target clock frequency.

[0086] Figure 7 This is a flowchart illustrating a method for adjusting the clock frequency of a processing device in an electronic device to a target clock frequency, according to an exemplary embodiment. Figure 7 As shown, the method includes steps S701 to S702.

[0087] In step S701, the target clock frequency is determined based on the current recording frame rate, current running information, and preset frequency adjustment model. The target clock frequency includes the target double data rate memory (DDR) clock frequency and the target central processing unit (CPU) clock frequency.

[0088] In step S702, the clock frequency of the double data rate memory (DDR) of the electronic device is adjusted to the target double data rate memory (DDR) clock frequency, and the clock frequency of the central processing unit (CPU) of the electronic device is adjusted to the target central processing unit (CPU) clock frequency.

[0089] In this embodiment of the disclosure, the processing device of the electronic device includes a Double Data Rate (DDR) memory and a Central Processing Unit (CPU). The target clock frequency includes a target DDR clock frequency and a target CPU clock frequency. When adjusting the clock frequency of the processing device, the clock frequency of the DDR memory is adjusted to the target DDR clock frequency, and the clock frequency of the CPU is adjusted to the CPU clock frequency.

[0090] This disclosure provides a frequency adjustment model trained based on training data collected at a specific recording frame rate. This model is used to adjust the clock frequency of the double-rate memory (DDR) and the clock frequency of the central processing unit (CPU) in an electronic device during video recording based on real-time data collected. This ensures a stable video recording frame rate while keeping the power consumption of the electronic device within a certain range, thus extending the battery life of the electronic device.

[0091] In an exemplary embodiment of this disclosure, the clock frequency adjustment model used to perform frequency adjustment in the above-described video recording method is a one-dimensional convolutional neural network, which can be regarded as a "dynamic performance-power consumption-optimal clock frequency prediction model". In one example, the clock frequency adjustment model in this disclosure is a self-attention residual neural network (Attention-ResNet). The self-attention residual neural network is a residual deep neural network (ResNet) with added self-attention layers. The self-attention layer is one of the core mechanisms of large models such as large language model meta AI (LLAMA) and generative pre-trained transformers (GPT). The input of the self-attention residual neural network is a one-dimensional data sequence (current recording frame rate and current running information). In a self-attention residual neural network, a one-dimensional data sequence passes through several residual blocks and a self-attention layer. Finally, the self-attention residual neural network outputs the optimal frequency (the target double-rate memory (DDR) clock frequency and the central processing unit (CPU) clock frequency). The self-attention layer added to the self-attention residual neural network is used to associate the data positions in the sequence to calculate the attention to a single set of data, establish the dependency relationship between the input single set of data sequence and the global data, and increase the prediction accuracy.

[0092] In an exemplary embodiment of this disclosure, such as Figure 8The flowchart of the clock frequency adjustment method shows that during the recording process of an electronic device, the clock frequency of the processor and the clock frequency of the memory in the electronic device are adjusted according to the acquired device information as follows: In response to the electronic device entering a photo / video recording scene, the current device operating information is acquired, namely, the current memory frequency (Double Data Rate Memory (DDR) clock frequency), processor frequency (CPU clock frequency), CPU utilization, current recording frame rate, and current operating current of the electronic device. A frequency adjustment point (Hook) for frequency adjustment is registered in the electronic device. The current device operating information is input into a preset one-dimensional convolutional neural network (clock frequency adjustment model), and the target DDR clock frequency and target CPU clock frequency output by the one-dimensional convolutional neural network are obtained. After acquiring the target DDR clock frequency and target CPU clock frequency, the current DDR clock frequency of the electronic device is adjusted to the target DDR clock frequency using a preset frequency adjustment method according to the registered frequency adjustment point (Hook), and the current CPU clock frequency of the electronic device is adjusted to the target CPU clock frequency, thereby completing the frequency adjustment. The preset frequency modulation method can be Dynamic Voltage and Frequency Scaling (DVFS) or Dynamic Clock and Voltage Scaling (DCVS).

[0093] In this embodiment, when an electronic device is recording video, the current recording frame rate and current operating information of the electronic device are acquired. Based on the current recording frame rate, current operating information, and a preset frequency adjustment model, a target clock frequency is determined. The training data for the frequency adjustment model consists of the recording frame rate and operating information of the electronic device when recording video at the preset frame rate. The clock frequency of the processing device of the electronic device is adjusted to the target clock frequency, and video recording is performed while the processing device of the electronic device is operating at the target clock frequency. Through this disclosure, a frequency adjustment model is trained based on training data collected at a specific recording frame rate. This model adjusts the clock frequency of the processing device in the electronic device according to real-time data collected during video recording, ensuring a stable video recording frame rate while controlling the power consumption of the electronic device within a certain range, thereby extending the battery life of the electronic device.

[0094] Based on the same concept, this disclosure also provides a video recording device 100.

[0095] It is understood that the video recording apparatus 100 provided in this disclosure includes hardware structures and / or software modules corresponding to each function in order to achieve the above-mentioned functions. In conjunction with the units and algorithm steps of the various examples disclosed in this disclosure, this disclosure can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the technical solutions of this disclosure.

[0096] Figure 9 This is a block diagram illustrating a video recording apparatus 100 according to an exemplary embodiment. (Refer to...) Figure 9 The device includes an acquisition unit 101, a processing unit 102, and an adjustment unit 103.

[0097] The acquisition unit 101 is used to acquire the current recording frame rate and current operating information of the electronic device in response to the electronic device recording video. The current operating information includes the current processing device clock frequency of the electronic device.

[0098] The processing unit 102 is used to determine the target clock frequency based on the current recording frame rate, current operating information and a preset frequency adjustment model. The training data of the frequency adjustment model includes the operating information of the electronic device when recording video at a preset recording frame rate, and the preset recording frame rate is within the preset frame rate range.

[0099] The adjustment unit 103 is used to adjust the clock frequency of the processing device of the electronic device to the target clock frequency and continue video recording.

[0100] In one embodiment, the training data for the frequency adjustment model is collected by the processing unit 102 in the following manner: The electronic device is controlled to record video. During video recording, the recording frame rate and operation information for each video frame recorded by the electronic device are determined as a first dataset. The operation information includes the clock frequency of the processing device in the electronic device and the operating current of the electronic device. The recording frame rate and operation information contained in the first dataset are arranged in chronological order. The recording frame rates within a preset frame rate range in the first dataset, and the corresponding operation information, are determined as a second dataset. The recording frame rates and operation information contained in the second dataset are arranged in chronological order. Multiple data pairs are determined in the second dataset. Each data pair includes first-time data and second-time data that are sequentially adjacent. The first-time data consists of the recording frame rate and operation information that occur earlier in the time sequence, and the second-time data consists of the recording frame rate and operation information that occur later in the time sequence. For each of the multiple data pairs, multiple target data pairs are determined based on the operating current contained in the data at the first time step, the operating current contained in the data at the second time step, and the preset current threshold. Training data is then determined based on the recording frame rate and running information contained in each target data pair.

[0101] In one embodiment, the processing unit 102 determines multiple target data pairs for each of the multiple data pairs in the following manner: based on the operating current contained in the data at a first time moment, the operating current contained in the data at a second time moment, and a preset current threshold, the processing unit 102 determines the corresponding data pair as a target data pair and obtains multiple target data pairs.

[0102] In one embodiment, the processing unit 102 determines the training data based on the recording frame rate and running information contained in each target data pair in the following manner: for each target data pair, the recording frame rate and running information contained in the first time moment data in the target data pair are determined as input data, the clock frequency of the processing device contained in the second time moment data in the target data pair is determined as feature data, and the input data and feature data are determined as training data.

[0103] In one embodiment, the frequency adjustment model is trained by the processing unit 102 in the following manner: inputting the input data from the training data into the initial model, obtaining the predicted data output by the initial model, and calculating the output loss based on the predicted data and the feature data corresponding to the input data in the training data. The initial model is trained based on the training data until the output loss meets the preset requirements, at which point the model training is considered complete, and the trained initial model is determined as the frequency adjustment model.

[0104] In one embodiment, the current operating information of the electronic device further includes: the current operating current of the electronic device and the current processor utilization rate. The processing unit 102 determines the target clock frequency based on the current recording frame rate, the current operating information, and a preset frequency adjustment model in the following manner: the target clock frequency is determined based on the current recording frame rate, the current processing device clock frequency, the current operating current, the current processor utilization rate, and the preset frequency adjustment model.

[0105] In one embodiment, the processing device of the electronic device includes a Double Data Rate (DDR) memory and a Central Processing Unit (CPU), and the target clock frequency includes a target DDR clock frequency and a target CPU clock frequency. The adjustment unit 103 adjusts the clock frequency of the processing device of the electronic device to the target clock frequency in the following manner: adjusting the clock frequency of the DDR memory to the target DDR clock frequency, and adjusting the clock frequency of the CPU to the target CPU clock frequency.

[0106] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0107] Figure 10 This is a block diagram illustrating an apparatus 200 for video recording according to an exemplary embodiment. The apparatus 200 can be provided as a terminal. For example, the apparatus 200 can be a mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.

[0108] Reference Figure 10 The device 200 may include one or more of the following components: processing component 202, memory 204, power component 206, multimedia component 208, audio component 210, input / output (I / O) interface 212, sensor component 214, and communication component 216.

[0109] Processing component 202 typically controls the overall operation of device 200, such as operations associated with display, telephone calls, data communication, camera operation, and recording. Processing component 202 may include one or more processors 220 to execute instructions to perform all or part of the steps of the methods described above. Furthermore, processing component 202 may include one or more modules to facilitate interaction between processing component 202 and other components. For example, processing component 202 may include a multimedia module to facilitate interaction between multimedia component 208 and processing component 202.

[0110] Memory 204 is configured to store various types of data to support the operation of device 200. Examples of such data include instructions for any application or method operating on device 200, contact data, phonebook data, messages, pictures, videos, etc. Memory 204 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0111] The power supply component 206 provides power to the various components of the device 200. The power supply component 206 may include a power management system, one or more power sources, and other components associated with generating, managing, and distributing power to the device 200.

[0112] Multimedia component 208 includes a screen that provides an output interface between the device 200 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of the touch or swipe action but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 208 includes a front-facing camera and / or a rear-facing camera. When the device 200 is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0113] Audio component 210 is configured to output and / or input audio signals. For example, audio component 210 includes a microphone (MIC) configured to receive external audio signals when device 200 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 204 or transmitted via communication component 216. In some embodiments, audio component 210 also includes a speaker for outputting audio signals.

[0114] I / O interface 212 provides an interface between processing component 202 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0115] Sensor assembly 214 includes one or more sensors for providing status assessments of various aspects of device 200. For example, sensor assembly 214 may detect the on / off state of device 200, the relative positioning of components such as the display and keypad of device 200, changes in the position of device 200 or a component of device 200, the presence or absence of user contact with device 200, the orientation or acceleration / deceleration of device 200, and temperature changes of device 200. Sensor assembly 214 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 214 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 214 may also include an accelerometer, a gyroscope, a magnetometer, a pressure sensor, or a temperature sensor.

[0116] Communication component 216 is configured to facilitate wired or wireless communication between device 200 and other devices. Device 200 can access wireless networks based on communication standards, such as WiFi, 2G, or 3G, or combinations thereof. In one exemplary embodiment, communication component 216 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 216 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0117] In an exemplary embodiment, the apparatus 200 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the methods described above.

[0118] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 204 including instructions, which can be executed by a processor 220 of the device 200 to perform the above-described method. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0119] Figure 11 This is a block diagram illustrating an apparatus 300 for video recording according to an exemplary embodiment. For example, apparatus 300 may be provided as a server. (Refer to...) Figure 11The apparatus 300 includes a processing component 322, which further includes one or more processors, and memory resources represented by memory 332 for storing instructions, such as application programs, that can be executed by the processing component 322. The application programs stored in memory 332 may include one or more modules, each corresponding to a set of instructions. Furthermore, the processing component 322 is configured to execute instructions to perform the aforementioned XX method.

[0120] Device 300 may also include a power supply component 326 configured to perform power management of device 300, a wired or wireless network interface 350 configured to connect device 300 to a network, and an input / output (I / O) interface 358. Device 300 may operate on an operating system stored in memory 332, such as Windows Server™, MacOSX™, Unix™, Linux™, FreeBSD™, or similar.

[0121] It is understood that in this disclosure, "multiple" refers to two or more, and other quantifiers are similar. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. The singular forms "a," "the," and "the" are also intended to include the plural forms unless the context clearly indicates otherwise.

[0122] It is further understood that the terms "first," "second," etc., are used to describe various types of information, but this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another, and do not indicate a specific order or degree of importance. In fact, the expressions "first," "second," etc., are completely interchangeable. For example, without departing from the scope of this disclosure, first information can also be referred to as second information, and similarly, second information can also be referred to as first information.

[0123] It is further understood that the terms “center,” “longitudinal,” “lateral,” “front,” “rear,” “up,” “down,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inner,” and “outer,” etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this embodiment and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation.

[0124] It can be further understood that, unless otherwise specified, "connection" includes both direct connections where no other components exist between the two parties and indirect connections where other components exist between them.

[0125] It is further understood that although operations are described in a specific order in the accompanying drawings in the embodiments of this disclosure, this should not be construed as requiring these operations to be performed in the specific order or serial order shown, or requiring all of the shown operations to be performed to obtain the desired result. In certain environments, multitasking and parallel processing may be advantageous.

[0126] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein.

[0127] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. A video recording method characterized by, The method comprises: in response to the electronic device recording a video, obtaining a current recording frame rate of the electronic device and current running information of the electronic device, the current running information comprising a current processor clock frequency of the electronic device; determining a target clock frequency according to the current recording frame rate, the current running information, and a preset frequency adjustment model, the training data of the frequency adjustment model comprising running information of the electronic device when recording a video at a preset recording frame rate, the preset recording frame rate being within a preset frame rate range; adjusting the clock frequency of the processor of the electronic device to the target clock frequency, and continuously recording the video.

2. The method of claim 1, wherein, The training data of the frequency adjustment model is collected in the following manner: controlling the electronic device to record a video, and determining, as a first data set, the recording frame rate and running information of the electronic device when recording each frame of video during the recording of the video, the running information comprising the clock frequency of the processor of the electronic device and the working current of the electronic device, the recording frame rate and running information included in the first data set being arranged in time sequence; determining, as a second data set, the recording frame rate within the preset frame rate range in the first data set, and the running information corresponding to the recording frame rate within the preset frame rate range, the recording frame rate and running information included in the second data set being arranged in time sequence; determining a plurality of data pairs in the second data set, each data pair in the plurality of data pairs comprising first time data and second time data adjacent in time sequence, the first time data being the recording frame rate and running information in time sequence in front, and the second time data being the recording frame rate and running information in time sequence behind; for each data pair in the plurality of data pairs, determining a plurality of target data pairs in the plurality of data pairs according to the working current included in the first time data, the working current included in the second time data, and a preset current threshold, and determining training data according to the recording frame rate and running information included in each target data pair.

3. The method of claim 2, wherein, The method for determining a plurality of target data pairs in the plurality of data pairs according to the working current included in the first time data, the working current included in the second time data, and a preset current threshold for each data pair in the plurality of data pairs comprises: for each data pair in the plurality of data pairs, in response to the working current included in the first time data being greater than the current threshold and the working current included in the second time data being less than the current threshold, determining the corresponding data pair as a target data pair, and obtaining the plurality of target data pairs.

4. The method of claim 2, wherein, The method for determining training data according to the recording frame rate and running information included in each target data pair comprises: for each target data pair, determining the recording frame rate and running information included in the first time data in the target data pair as input data, determining the clock frequency of the processor included in the second time data in the target data pair as feature data, and determining the input data and the feature data as training data.

5. The method of claim 4, wherein, The frequency adjustment model is trained in the following manner: inputting the input data in the training data into an initial model, obtaining predicted data output by the initial model, and calculating an output loss according to the predicted data and feature data corresponding to the input data in the training data; training the initial model according to the training data until the output loss meets a preset requirement, determining that the model training is completed, and determining the initial model after the training as the frequency adjustment model.

6. The method of claim 1, wherein, The current running information of the electronic device further includes a current working current and a current processor usage rate of the electronic device. The method further includes: The method further includes:

7. The method of claim 1, wherein, The processor device of the electronic device includes a double data rate memory (DDR) and a central processing unit (CPU), and the target clock frequency includes a target double data rate memory (DDR) clock frequency and a target central processing unit (CPU) clock frequency. The method further includes: The method further includes:

8. A video recording apparatus, characterized by comprising: The method further includes: The method further includes: The method further includes: The method further includes:

9. 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information at a time point in the front in time sequence, and the second time point data being recording frame rate and running information at a time point in the rear in time sequence; for each data pair in the plurality of data pairs, determine a plurality of target data pairs in the plurality of data pairs according to working current contained in the first time point data, working current contained in the second time point data, and a preset current threshold, and determine training data according to recording frame rate and running information contained in each target data pair.

10. The apparatus of claim 9, wherein, The processing unit determines a plurality of target data pairs in the plurality of data pairs according to working current contained in the first time point data, working current contained in the second time point data, and a preset current threshold for each data pair in the plurality of data pairs in the following manner: for each data pair in the plurality of data pairs, in response to working current contained in the first time point data being greater than the current threshold and working current contained in the second time point data being less than the current threshold, the corresponding data pair is determined as a target data pair, and the plurality of target data pairs is obtained.

11. The apparatus of claim 9, wherein, The processing unit determines training data according to recording frame rate and running information contained in each target data pair in the following manner: for each target data pair, recording frame rate and running information contained in the first time point data in the target data pair are determined as input data, clock frequency of the processor contained in the second time point data in the target data pair is determined as feature data, and the input data and the feature data are determined as the training data.

12. The apparatus of claim 11, wherein, The frequency adjustment model is trained by the processing unit in the following manner: input input data in the training data into an initial model, obtain prediction data output by the initial model, and calculate output loss according to the prediction data and feature data corresponding to the input data in the training data; train the initial model according to the training data until the output loss meets a preset requirement, determine that the model training is completed, and determine the initial model after the training is completed as the frequency adjustment model.

13. The apparatus of claim 8, wherein, The current running information of the electronic device further comprises current working current and current processor usage rate of the electronic device; The processing unit determines the target clock frequency according to the current recording frame rate, the current running information, and a preset frequency adjustment model in the following manner: determine the target clock frequency according to the current recording frame rate, the current processor clock frequency, the current working current, the current processor usage rate, and a preset frequency adjustment model.

14. The apparatus of claim 8, wherein, The processor of the electronic device comprises a double data rate memory (DDR) and a central processing unit (CPU), and the target clock frequency comprises a target double data rate memory (DDR) clock frequency and a target central processing unit (CPU) clock frequency; The adjustment unit adjusts the clock frequency of the processor of the electronic device to the target clock frequency in the following manner: adjusting a clock frequency of a double data rate memory (DDR) of the electronic device to the target double data rate memory (DDR) clock frequency and adjusting a clock frequency of a central processing unit (CPU) of the electronic device to the target central processing unit (CPU) clock frequency.

15. An electronic device, comprising: comprising: a processor: a memory for storing processor-executable instructions; wherein the processor is configured to perform the video recording method of any one of claims 1 to 7.

16. A storage medium, characterized by The storage medium has instructions stored therein, and when the instructions in the storage medium are executed by a processor, the processor can perform the video recording method of any one of claims 1 to 7.

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