Digital microphone circuit, circuit control method and device and electronic equipment

Abstract

The invention discloses a digital microphone circuit, a circuit control method and device and electronic equipment. A digital microphone is provided with a first digital signal transmission interface; a first processor and a second processor; a second digital signal transmission interface of the first processor is connected with the first digital signal transmission interface through a corresponding electronic element; a second digital signal transmission interface of the second processor is connected with the first digital signal transmission interface; when the electronic equipment is in the first mode, the first processor is powered down, the second digital signal of the first processor is pulled down, and the electronic element corresponding to the first processor is used for preventing the second digital signal of the first digital signal transmission interface and the second digital signal of the second processor from being pulled down. Therefore, the first digital signal transmission interface can be prevented from being pulled down, and the situation that the second digital signal transmission interface of the second processor connected with the first digital signal transmission interface is pulled down and cannot work normally can also be avoided.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of wearable devices, and more particularly, to a digital microphone circuit, a circuit control method, a device and an electronic device. BACKGROUND

[0002] A microphone is a commonly used peripheral of an electronic device (such as a smart phone or a smart wearable device), and the electronic device can use the microphone for voice input, complete recording and calling and other related functions. The microphone can be analog or digital, and the analog or digital microphone can be selected flexibly according to different product definitions and requirements.

[0003] When the electronic device has multiple processors and the electronic device uses a digital microphone, the multiple processors transmit digital signals to the digital microphone. However, in the case that a certain processor is turned off, the digital microphone will be disabled. SUMMARY

[0004] The present application provides a digital microphone circuit, a circuit control method, a device and an electronic device to improve the above-mentioned defects.

[0005] In a first aspect, the present application provides a digital microphone circuit applied to an electronic device, the circuit comprising: a digital microphone having a first digital signal transmission interface; a first processor and a second processor, each of the processors having a second digital signal transmission interface; the second digital signal transmission interface of the first processor being connected to the first digital signal transmission interface through the corresponding electronic element of the first processor; the second digital signal transmission interface of the second processor being connected to the first digital signal transmission interface; in a first mode of the electronic device, the first processor is powered off to pull down the second digital signal of the first processor, and the corresponding electronic element of the first processor is used to avoid the first digital signal transmission interface and the second digital signal of the second processor being pulled down; the second processor is used to communicate with the digital microphone in the first mode.

[0006] In a second aspect, the present application further provides a circuit control method applied to the above-mentioned digital microphone circuit, the method comprising: if the working mode of the electronic device is a first mode, powering off the first processor to pull down the second digital signal of the first processor, and the corresponding electronic element of the first processor is used to avoid the first digital signal transmission interface and the second digital signal of the second processor being pulled down; acquiring the digital signal transmitted by the digital microphone through the second processor.

[0007] In a third aspect, the application further provides a circuit control device applied to a digital microphone circuit, the device comprising: a processing unit and a transmission unit. The processing unit is configured to: if the working mode of the electronic device is a first mode, power off the first processor so that the second digital signal of the first processor is pulled low, and the electronic element corresponding to the first processor is configured to avoid the first digital signal transmission interface and the second digital signal of the second processor being pulled low; and the transmission unit is configured to acquire the digital signal transmitted by the digital microphone through the second processor.

[0008] In a fourth aspect, the application further provides an electronic device comprising the digital microphone circuit.

[0009] The digital microphone circuit, the circuit control method and device, and the electronic device provided by the application have the following advantages. The digital microphone has a first digital signal transmission interface; a first processor and a second processor, each of which has a second digital signal transmission interface; the second digital signal transmission interface of the first processor is connected to the first digital signal transmission interface through the electronic element corresponding to the first processor; the second digital signal transmission interface of the second processor is connected to the first digital signal transmission interface; when the electronic device is in a first mode, the first processor is powered off so that the second digital signal of the first processor is pulled low, and the electronic element corresponding to the first processor is configured to avoid the first digital signal transmission interface and the second digital signal of the second processor being pulled low; and the second processor is configured to communicate with the digital microphone in the first mode. Therefore, in the case where the second digital signal transmission interface of the first processor is pulled low, the electronic element of the first processor can avoid the first digital signal transmission interface being pulled low, which not only avoids the digital microphone from being unable to work normally due to the first digital signal transmission interface of the digital microphone being pulled low, but also avoids the second digital signal transmission interface of the second processor connected to the first digital signal transmission interface from being pulled low and being unable to work normally.

[0010] Other features and advantages of the application will be set forth in the following description, and in part will become apparent to those skilled in the art from the following description, or can be learned by practice of the application. The objects and other advantages of the application will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings. BRIEF DESCRIPTION OF DRAWINGS

[0011] In order to more clearly illustrate the technical solutions in the embodiments of the application, the following will briefly introduce the drawings needed in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the application, and for those skilled in the art, other drawings can also be obtained from these drawings without creative effort.

[0012] Figure 1 A structural schematic diagram of a digital microphone circuit is shown according to an embodiment of the present application;

[0013] Figure 2 A structural schematic diagram of a digital microphone circuit is shown according to an embodiment of the present application;

[0014] Figure 3 A structural schematic diagram of a digital microphone circuit is shown according to another embodiment of the present application;

[0015] Figure 4 A structural schematic diagram of a digital microphone circuit is shown according to still another embodiment of the present application;

[0016] Figure 5 A structural schematic diagram of a digital microphone circuit is shown according to still another embodiment of the present application;

[0017] Figure 6 A method flow chart of a circuit control method is shown according to an embodiment of the present application;

[0018] Figure 7 A method flow chart of a circuit control method is shown according to another embodiment of the present application;

[0019] Figure 8 A module block diagram of a circuit control device is shown according to an embodiment of the present application;

[0020] Figure 9 A storage unit for storing or carrying program codes for implementing the method according to the embodiments of the present application is shown according to an embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to make the persons skilled in the art better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely in the following with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. The components of the embodiments of the present application described and shown in the accompanying drawings can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0022] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this application, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0023] A microphone is a common peripheral for electronic devices (such as smartphones or smart wearable devices). Electronic devices can use microphones for voice input, recording, and call functions. Microphones are divided into analog microphones and digital microphones; depending on the product definition and requirements, either analog or digital microphones can be flexibly selected.

[0024] To balance performance and power consumption, smart wearable devices incorporate a hybrid design concept of large and small cores in their circuit design. This involves using large cores to run the operating system to improve system performance, and small cores to run a real-time operating system (RTOS) to conserve system resources. By switching between large and small cores according to different scenarios, a balance can be struck between system performance and power consumption / battery life.

[0025] In some embodiments, smart wearable devices have one or more of three operating modes: 1. High performance (e.g., both large and small cores run or hibernate together; the large and small cores do not hibernate with service switching, and the screen is controlled by the large core); 2. Hybrid mode (e.g., the large and small cores automatically switch to hibernation with service switching, and the screen is controlled by either the large or small core); 3. Long battery life mode (e.g., the large core is off, the small core runs, and the screen is controlled by the small core). For some peripherals (such as microphones), since users will use them in all three modes, they need to connect to both the large and small cores.

[0026] However, the inventors discovered during their research that while analog microphones allow both the large and small cores to be connected simultaneously without affecting functionality due to DC-blocking capacitors in the analog microphone interface, digital microphones, which use digital signal interfaces, would cause digital signal conflicts if connected like analog microphones. This is because digital microphones output digital signals, such as pulse density modulation (PDM) or pulse trains, typically transmitted via serial data lines. Directly connecting multiple digital signals to different capacitors via ordinary capacitors could lead to signal conflicts, as multiple capacitors might simultaneously attempt to read or drive the same data lines, resulting in data contention or collisions. Furthermore, while capacitors block DC components in analog signals, they can cause distortion or unstable transmission in digital signals. Digital signals require stable and clear timing and levels, and capacitors may not be able to effectively transmit the high-frequency signals that demand these specifications.

[0027] Additionally, each Pulse Density Modulation (PDM) interface connects to the PDM interface of the digital microphone to acquire the digital signal transmitted by the microphone. However, when the electronic device system is in long-battery-life mode, the large core is powered off, and its PDM interface is pulled low, causing the microphone function to fail. This is because, in long-battery-life intelligent mode, after the large core is powered down, its PDM interface is pulled low. If the large core's PDM interface is connected to the small core's and the DMIC's PDM interfaces, it will pull the small core's and DMIC's PDM interfaces low together, causing the DMIC clock and output transmission to fail, ultimately resulting in functional failure.

[0028] Therefore, to overcome the above-mentioned deficiencies, embodiments of this application provide a digital microphone circuit, which is applied to an electronic device. That is, the electronic device includes the digital microphone circuit mentioned in the various embodiments of this application, such as... Figure 1 As shown, the digital microphone circuit includes: a digital microphone 110, a first processor 301 and a second processor 302. The second digital signal transmission interface 121 of the first processor 301 is connected to the first digital signal transmission interface 111 through its corresponding electronic component 130.

[0029] The digital microphone 110 has a first digital signal transmission interface 111, which is used to transmit digital signals (e.g., audio signals) acquired by the digital microphone 110 to a processor 120 that requests to acquire the digital signals. The first digital signal transmission interface 111 is a PDM interface, a digital audio signal interface commonly used for transmitting sound data, especially in digital microphones. PDM technology represents signal strength by converting audio signals into the density of pulse sequences.

[0030] It should be noted that the digital microphone circuit includes at least two processors, namely a first processor and a second processor, to enable switching between different processors to use the digital microphone 110, or for multiple processors to share the digital microphone 110. Alternatively, one processor can be selected from among the multiple processors to use the digital microphone 100. The function of using the digital microphone is to acquire the digital audio signal it captures. As one implementation, the data processing capabilities and power consumption capabilities of the multiple processors may not be entirely the same, wherein data processing capability and power consumption capability are positively correlated. For example, the multiple processors may include a large-core processor and a small-core processor. For example, the large-core processor and the small-core processor may be packaged in a single chip, or they may be packaged as two separate chips. For example, both the large-core processor and the small-core processor may have their own system, such as an operating system.

[0031] "Big core" and "small core" are used to describe the processing (CPU) in a multi-core processor architecture, especially in heterogeneous computing architectures. The "big" and "small" in "big core" and "small core" mainly refer to the differences in processing power, performance, and power consumption.

[0032] For example, "high-performance cores" typically refer to processors characterized by relatively high performance, high power consumption, and high complexity. High performance means that high-performance cores have higher clock speeds, larger caches, more complex execution units, and higher processing power, enabling them to handle complex computational tasks and high-load applications. High power consumption means that high-performance processors typically consume more power due to their high-performance design. High complexity means that high-performance processors often employ more complex architectures, such as superscalar architectures and deep pipelines, to achieve higher performance. Furthermore, electronic devices can use high-performance processors to perform tasks requiring high computational power, such as high-load computing, graphics processing, and video encoding / decoding.

[0033] For example, compared to large cores, high-efficiency cores typically feature relatively low power consumption, low performance, and low complexity. For example, low power consumption means that high-efficiency cores are designed with power efficiency in mind, resulting in lower power consumption and better energy utilization, making them suitable for power-constrained environments. For example, low performance means that while the processing power of high-efficiency cores is lower than that of large cores, it is still sufficient for handling light-load tasks and routine operations. For example, low complexity means that high-efficiency cores employ a simpler design, typically with fewer execution units and caches, aiming to provide better power efficiency. Electronic devices using high-efficiency cores often handle light-load tasks, such as background tasks, lightweight applications, some sensor control, or routine operations, which can help extend battery life or reduce system power consumption.

[0034] In the embodiments of this application, the first processor 301 is a big-core processor and the second processor 302 is a little-core processor. It can be understood that the first processor and the second processor are a naming method used to distinguish different processors, but the number of big-core processors and little-core processors is not specifically limited.

[0035] In one implementation, both the first processor 301 and the second processor 302 have a second digital signal transmission interface 121. To ensure that each processor can transmit data with the digital microphone when it needs to acquire the digital audio signal, the second digital signal transmission interface 121 of each processor needs to be connected to the first digital signal transmission interface 111 of the digital microphone 110. In other words, it is equivalent to all the processors' second digital signal transmission interfaces 121 using the first digital signal transmission interface of the digital microphone as a common connection port.

[0036] It should be noted that, similar to the first digital signal transmission interface described above, the second digital signal transmission interface is also used to transmit the digital audio signals from the digital microphone. For example, both the first and second processors have GPIO interfaces. GPIO is a set of programmable pins on a processor or microcontroller that can be used as inputs or outputs. Through GPIO, the processor can receive or send digital signals, control external devices, or read data from other devices or chips. In other words, the processor's GPIO pins can be configured to perform different functions, such as input, output, and clock signals.

[0037] Digital microphones typically use standard digital communication protocols such as I2S (Inter-IC Sound) or PDM (Pulse Density Modulation), which have dedicated data and clock interfaces. Therefore, configuring the GPIO interface for this digital communication protocol allows the processor's GPIO interface to be configured as a PDM interface.

[0038] For example, for safety and stability reasons, the processor will set pull-down resistors on the GPIO interface to ensure that the GPIO pins remain at a logic low level (i.e., pulled low) when the processor is powered off. Therefore, when the processor is powered off, its corresponding second digital signal transmission interface will be pulled low.

[0039] It should be noted that, in order to adapt to the different usage needs of electronic devices, different electronic devices have different working modes depending on the different processors within the electronic device and the scenarios in which digital microphones are used.

[0040] In one implementation, the electronic device has a first mode in which the first processor is powered off, and a second processor is used to communicate with the digital microphone. Exemplarily, this first mode can be the aforementioned long-battery-life mode, in which the electronic device prioritizes battery life and minimizes power consumption. Therefore, the first processor is turned off, and the second processor is turned on (e.g., in a running state or a hibernation state). It is understood that the electronic device can run the basic architecture of the operating system on the second processor, maintaining the operation of the electronic device's basic functions, while the first processor is used to handle more complex tasks. Therefore, in the first mode, the first processor can be turned off to reduce the power consumption of the electronic device. Alternatively, the first processor could be a small core, and the second processor a large core, with the electronic device running the basic architecture of the operating system on the large core processor. This application does not limit the specific implementation of this method.

[0041] Therefore, it is understandable that in the case of an electronic device that includes multiple processors, the processor that is turned off in the first mode can be used as the first processor, and the other processors can be used as the second processor.

[0042] Based on this, in this embodiment of the application, in order to prevent the second digital signal transmission interface of the first processor from being pulled low, which in turn causes the second digital signal transmission interface of other processors (such as the second processor) to also be pulled low, an electronic component is provided for the first processor. The second digital signal transmission interface 121 of the first processor 301 is connected to the first digital signal transmission interface 111 through the corresponding electronic component 130.

[0043] like Figure 1As shown, an electronic component 130 connects the first digital signal transmission interface 111 of the digital microphone 110 and the second digital signal transmission interface 121 of the first processor 301. The function of the electronic component is to prevent the first digital signal transmission interface 111 from being pulled down due to the pulled-down second digital signal transmission interface 121 when the second digital signal transmission interface 121 of the processor corresponding to the electronic component is pulled down, thereby preventing the second digital signal transmission interfaces 121 of other processors from being pulled down as well.

[0044] In one implementation, if the second digital signal transmission interface of the first processor is pulled low, the corresponding electronic components of the first processor can prevent the first digital signal transmission interface from being pulled low. Specifically, the electronic components can disconnect the second digital signal transmission interface from the first digital signal transmission interface, thus preventing the first digital signal transmission interface from being pulled low when the second digital signal transmission interface is pulled low. Alternatively, the electronic components can raise the resistance value of the second digital signal transmission interface, so that when the second digital signal transmission interface is pulled low, the first digital transmission interface is effectively grounded through a resistor with a certain resistance value. The voltage level of the first digital transmission interface depends on the voltage of this resistor, rather than being directly grounded. In subsequent embodiments, the specific implementation methods of the electronic components will be described in detail.

[0045] Therefore, since the electronic components have the function of providing additional resistance or providing a circuit break when their corresponding second digital signal transmission interface is pulled low, this not only prevents the digital microphone from malfunctioning because its first digital signal transmission interface is pulled low, but also prevents other processors connected to the first digital signal transmission interface from malfunctioning because their second digital signal transmission interfaces are pulled low.

[0046] In one implementation, the PDM interface includes a clock interface and a data interface. The clock interface provides a clock signal for synchronizing data transmission. The PDM interface uses the clock signal to determine the data sampling frequency and the time interval for synchronizing data bits. The clock signal ensures that data transmission and reception are synchronized. The data interface is used to transmit PDM-modulated data. PDM data represents the intensity of the audio signal in the form of density modulation. The data interface transmits these modulated signals to a processor or decoder for further decoding and processing. In other words, both the first digital signal transmission interface of the digital microphone and the second digital signal transmission interfaces of each processor include clock and data interfaces. Therefore, components are needed between the clock interface of the digital microphone and the clock interfaces of each processor, as well as between the digital interface of the digital microphone and the digital interfaces of each processor, to prevent the digital interface and clock interface of the digital microphone from being pulled low.

[0047] like Figure 2 As shown, assuming the electronic components include a first element 131 and a second element 132, the first digital signal transmission interface includes a first clock interface CLOCK1 and a first data interface DATA1, and the second digital signal transmission interfaces of the first processor 301 and the second processor 302 both include a second clock interface CLOCK2 and a second data interface DATA2. The first clock interface CLOCK1 is connected to the second clock interface CLOCK2 of the first processor through the first element 131, and the first data interface DATA1 is connected to the second data interface DATA2 of the first processor through the second element 131. When the second digital signal transmission interface of the first processor 301 is pulled low, the first element 131 is used to prevent both the first clock interface and the second clock interface of the second processor from being pulled low, and the second element 132 is used to prevent both the first data interface and the second data interface of the second processor from being pulled low.

[0048] For example, since the second clock interface CLOCK2 and the second data interface DATA2 of each processor are configured by the processor's GPIO interface, when the first processor is powered off, the GPIO interfaces of the first processor are all pulled low, which causes the second clock interface CLOCK2 and the second data interface DATA2 to also be pulled low. Since the first clock interface CLOCK1 of the digital microphone needs to be synchronized with the processor's second clock interface CLOCK2, if the first clock interface CLOCK1 and the second clock interface CLOCK2 are directly connected without any protection measures, the first clock interface CLOCK1 will be pulled low due to the second clock interface CLOCK2 being pulled low because its corresponding GPIO is pulled low. Therefore, by connecting a first element between the first clock interface CLOCK1 and the second clock interface CLOCK2, the first element can prevent the first clock interface CLOCK1 from being pulled low due to the second clock interface CLOCK2. The same applies to the first data interface.

[0049] It is understandable that when the electronic device is in the first mode, the first processor will be powered off. Therefore, in some embodiments, it is necessary to set a first element and a second element corresponding to the first processor to prevent the clock interface and data interface of the digital microphone from being pulled low. However, since the second processor will not be pulled low, it is not necessary to set a first element and a second element corresponding to the second processor.

[0050] Then, in some embodiments, such as Figure 3 As shown, the second processor 302 can also be provided with corresponding first element 131 and second element 132, so that the second clock interface of the first processor and the second clock interface of the second processor both have corresponding first elements, which can keep the electrical characteristics of the second clock interface of the first processor and the second clock interface of the second processor consistent. For example, the first element has the same resistance value. Keeping the first processor and the second processor both have first elements is to ensure the voltage consistency of their second clock interfaces.

[0051] Similarly, both the second data interface of the first processor and the second data interface of the second processor have corresponding second components, which can also ensure the voltage consistency of their second data interfaces. For example, the first components and electrical parameters of both can be set to be the same, as can the second components of both can be set to be the same.

[0052] For example, in the following embodiments, it is assumed that both the first processor and the second processor correspond to the first element and the second element.

[0053] In one implementation, both the first and second components are resistive components; that is, both the first and second components are resistors, and their resistances can be the same or different, without limitation. When the second digital signal transmission interface of the first processor is pulled low, the first component is used to pull up the resistance value of the second clock interface of the first processor, and the second component is used to pull up the resistance value of the second data interface of the first processor. In other words, after the first processor is powered off and the second clock interface is pulled low, the resistance between the first and second clock interfaces prevents the first clock interface from being directly connected to the ground terminal, but instead connects it to the ground point through a resistor, thus preventing it from being pulled low. Similarly, the first data interface is also prevented from being pulled low due to the effect of the resistor.

[0054] In addition, since the internal input impedance of a digital microphone is very high, when both the first and second components are resistors, their resistance values ​​do not need to be very large. Usually, around 1k ohms is sufficient to meet the requirements, so it will not affect the transmission and signal quality of the circuit. With the GPIO setting logic of the system's big and small cores, both big and small cores can call the digital microphone function normally.

[0055] For example, such as Figure 4 As shown, the first component corresponding to the first processor 301 is the first resistor R1 and the corresponding second component is the second resistor R2; the first component corresponding to the second processor 302 is the third resistor R3 and the corresponding second component is the fourth resistor R4, as shown. Figure 4 As shown, the CLOCK1 of the digital microphone 110 is connected to the CLOCK2 of the first processor 301 through the first resistor R1. For ease of understanding, the end of the first resistor R1 closer to the digital microphone 110 is named the first end, and the end farther away from the digital microphone 110 is named the second end. Similarly, the first end and second end of the second resistor R2, the third resistor R3, and the fourth resistor R4 can also be defined.

[0056] In other words, the CLOCK1 of the digital microphone 110 is connected to the first terminal of the first resistor R1, and the second terminal of the second resistor R1 is connected to the CLOCK2 of the first processor 301. The connections of the first and second terminals of the second resistor R2, the third resistor R3, and the fourth resistor R4 can be referred to the aforementioned description of the first resistor R1, and will not be repeated here. It should be noted that the various electronic components are connected in parallel, not in series. Figure 4 As shown, the first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 are connected in parallel.

[0057] For example, targeting Figure 4Assuming that both the first processor and the second processor can communicate with the digital microphone, that is, both can acquire the digital signal collected by the digital microphone, and then the electronic device enters the first mode and shuts down the first processor, then the COLCK2 and DATA2 of the first processor are pulled low, while the second processor normally receives the digital signal collected by the digital microphone, then the COLCK2 and DATA2 of the second processor are not pulled low.

[0058] Although COLCK2 and DATA2 of the first processor are pulled low, the first resistor R1 raises the resistance value of COLCK2, preventing it from pulling COLCK1 of the digital microphone low. Similarly, the second resistor R2 raises the resistance value of DATA2, preventing it from pulling DATA1 of the digital microphone low. Since neither COLCK1 nor DATA1 of the digital microphone is pulled low, COLCK2 and DATA2 of the second processor will also not be pulled low.

[0059] As one implementation, besides using two resistors as described above, a diode and a resistor can also be used. It is understood that when the processor acquires data from the digital microphone, the digital microphone sends the acquired digital signal to the processor based on a clock signal. Therefore, the first clock interface of the digital microphone needs to acquire the clock signal sent by the processor's second clock interface. Then, the digital microphone uses the processor's clock signal to send the acquired digital signal (e.g., an audio signal) through the digital microphone's first data interface to the processor's second data interface. In other words, the clock signal is transmitted from the processor to the digital microphone, and the digital signal is transmitted from the digital microphone to the processor.

[0060] For the reasons mentioned above, the first component can be set as a diode and the second component as a resistor. That is, the second clock interface of the first processor corresponds to a diode and the second data interface of the first processor corresponds to a resistor. Of course, if the second processor also has the first and second components, then the second clock interface of the second processor corresponds to a diode and the second data interface of the second processor corresponds to a resistor.

[0061] Therefore, the anode of the diode is connected to its corresponding second clock interface, and the cathode of the diode is connected to the first clock interface. If the electronic device is in the first mode, when the second clock interface of the first processor is pulled low, the diode is used to disconnect the second clock interface of the first processor from the first clock interface; when the second data interface of the first processor is pulled low, the second element is used to pull up the resistance value of the second data interface of the first processor. In other words, the diode is used to disconnect the second clock interface of the first processor from the first clock interface when the second clock interface of the first processor is pulled low; and the second element is used to pull up the resistance value of the second data interface of the first processor when the second data interface of the first processor is pulled low.

[0062] It should be noted that the implementation of the second component being a resistor can be referred to the aforementioned embodiment, and will not be repeated here. If the first component is a diode, then when the second clock interface of the first processor is not pulled low, the data flow from the second clock interface of the first processor to the first clock interface of the digital microphone is unobstructed. That is, the second clock interface of the first processor can transmit the clock signal to the first clock interface of the digital microphone through the diode. For example, assuming the clock signal is a pulse sequence of "1010", from a timing logic perspective, this clock signal is "pulse present", "no pulse", "pulse present", "no pulse". When it is logic 1, it is equivalent to a high level. When the second clock interface is high, the diode connected to it conducts, and thus the first clock interface of the digital microphone is also high. Therefore, the clock logic "1" can be synchronized to the digital microphone. When there is no pulse, the first clock interface and the second clock interface are also synchronized because there is no pulse signal in the timing sequence. It can be seen that under normal use, the diode will not affect the transmission of the clock signal. However, when the second clock interface is pulled low, since the anode of the diode is grounded, the diode is in a cutoff state, and the first clock interface and the second clock interface are disconnected by the diode in the cutoff state.

[0063] For example, such as Figure 5 As shown, the first component corresponding to the first processor 301 is the first diode D1 and the corresponding second component is the fifth resistor R5. The first component corresponding to the second processor 302 is the second diode D2 and the corresponding second component is the sixth resistor R6. For ease of understanding, the end of the fifth resistor R5 that is closer to the digital microphone 110 is named the first end and the end that is farther away from the digital microphone 110 is named the second end. Similarly, the end of the sixth resistor R6 that is closer to the digital microphone 110 is named the first end and the end that is farther away from the digital microphone 110 is named the second end.

[0064] The second clock interface CLOCK2 of the first processor 301 is connected to the anode of the first diode D1, and the cathode of the first diode D1 is connected to the first clock interface CLOCK1 of the digital microphone 110. The second data interface DATA2 of the first processor 301 is connected to the second terminal of the fifth resistor R5, and the first terminal of the fifth resistor R5 is connected to the first data interface DATA1 of the digital microphone 110. The second clock interface CLOCK2 of the second processor 302 is connected to the anode of the second diode D2, and the cathode of the second diode D2 is connected to the first clock interface CLOCK1 of the digital microphone 110. The second data interface DATA2 of the second processor 302 is connected to the second terminal of the sixth resistor R6, and the first terminal of the sixth resistor R6 is connected to the first data interface DATA1 of the digital microphone 110.

[0065] against Figure 5 Assuming that both the first processor and the second processor can communicate with the digital microphone, that is, both can acquire the digital signal collected by the digital microphone, and then the first processor is turned off, the GPIO of the first processor is pulled low, which causes COLCK2 and DATA2 of the first processor to be pulled low. However, the second processor receives the digital signal collected by the digital microphone normally, so COLCK2 and DATA2 of the second processor will not be pulled low.

[0066] Because the first processor's COLCK2 is pulled low, the first diode D1 connected to COLCK2 is turned off due to its anode being grounded. This disconnects the connection between the first processor's COLCK2 and the digital microphone 110's COLCK1. Therefore, even if the first processor's COLCK2 is pulled low, it will not cause the digital microphone 110's COLCK1 to be pulled low, allowing the digital microphone 110's COLCK1 to receive the clock signal from the second processor's COLCK2 normally. Furthermore, when the first processor's DATA2 is pulled low, the fifth resistor R6 pulls the resistance value of the first processor's DATA2 high, preventing the first processor's DATA2 from pulling the digital microphone's DATA1 low.

[0067] It should be noted that each processor receives digital signals transmitted from the digital microphone. The electronic components connected to the processor do not affect the received digital signals. Specifically, when the electronic component is a diode, such as the aforementioned first component being a diode, the diode has a low internal resistance when conducting, typically ranging from tens to hundreds of ohms, which avoids signal attenuation and distortion caused by excessive resistance. As one implementation, the diode can be a Schottky diode. The internal resistance of a Schottky diode when conducting is typically lower than that of a common silicon diode, further reducing interference to the transmitted signal. In addition, since the forward voltage drop of a Schottky diode is typically between 0.15V and 0.45V, which is lower than that of a common silicon diode (0.6V to 0.7V), it can reduce system leakage current and system power consumption. This is because, compared to a resistor, which has leakage current due to current flowing through its terminals, a diode is equivalent to an open circuit during reverse transmission, with virtually no leakage current.

[0068] Furthermore, when the electronic component is a resistor—for example, when both the first and second components mentioned above are resistors, or when the second component is a resistor—the relatively small resistance value can prevent signal attenuation and distortion caused by excessively large resistance values. For instance, digital microphones have a very high internal input impedance, so their external resistors do not need to be very large. This is because the internal input impedance of a digital microphone can reach several thousand ohms to several megaohms; some common digital microphones may have an input impedance between 1MΩ and 10MΩ. Therefore, the resistance value of the external resistor can be 0.1 to 0.01 times the internal impedance of the digital microphone. It is understandable that the high internal input impedance of a digital microphone means that its current demand from the signal source is very small. This high impedance characteristic makes the impact of the external resistor on signal transmission and quality minimal, as the high impedance input does not significantly affect the signal strength or produce a large voltage drop. Therefore, even with a small external resistor value, there will be no significant attenuation or distortion in signal transmission.

[0069] Please see Figure 6 , Figure 6 A circuit control method is illustrated, which is applied to the aforementioned digital microphone circuit. Exemplarily, the execution entity of this method can be the system of an electronic device, such as a system management module. A system management module (SMM) is a component used to coordinate and manage various functional units within an electronic device, specifically responsible for tasks such as power management, clock management, system status monitoring, and resource allocation. Specifically, the method includes steps S501 to S502.

[0070] S501: If the electronic device is in the first mode, the first processor is powered off so that the second digital signal of the first processor is pulled low. The electronic components corresponding to the first processor are used to prevent both the first digital signal transmission interface and the second digital signal of the second processor from being pulled low.

[0071] S502: The digital signal transmitted by the digital microphone is acquired by the second processor.

[0072] As mentioned earlier, electronic devices have different operating modes. These modes can include the first mode described above, as well as modes other than the first mode, such as the second and third modes. The first mode can be a long battery life mode, the second mode can be the high-performance mode described above, and the third mode can be the hybrid mode described above. Electronic devices can include one or more of these three modes. For example, in high-performance mode, all processors of the electronic device (e.g., large cores and small cores) remain running, and the two systems do not switch to hibernation separately depending on the task. That is, all processors of the device are active, providing maximum computing power and response speed. However, in some embodiments, they can hibernate together, such as hibernating after the screen is turned off. For example, in hybrid mode, the processors of the electronic device (e.g., large cores and small cores) automatically switch to hibernation states according to specific business needs (e.g., large cores enter hibernation while small cores run, or both large and small cores hibernate, or both large and small cores run). This mode seeks a balance between performance and battery life, and the system dynamically adjusts the processor state according to the needs of the current task. For example, in long battery life mode, the large cores of the electronic device are turned off, and only the small cores run. This mode optimizes battery life and is suitable for tasks that do not require high-performance processing for extended periods.

[0073] For example, assuming the first processor is a large-core processor and the second processor is a small-core processor, if the electronic device is operating in the first mode, the first processor is powered off so that the second digital signal of the first processor is pulled low. The electronic components corresponding to the first processor are used to prevent both the first digital signal transmission interface and the second digital signal of the second processor from being pulled low, so that the electronic device can normally obtain the digital signal transmitted by the digital microphone through the second processor.

[0074] If the electronic device's operating mode is not the first mode, but rather a second or third mode, such as a high-performance model or hybrid mode, and the first and second processors are not turned off, a designated processor is determined from the first and second processors, and the digital signal transmitted by the digital microphone is obtained through the designated processor; the second digital signal transmission interface of the processor other than the designated processor is set to a high-impedance state. It can be seen that in non-first modes, the first and second processors are not actively turned off, and the electronic device sets the second digital signal transmission interface of the processor that does not use the digital microphone to a high-impedance state. A high-impedance state is a specific state in electronic circuits where the resistance of the interface or pin is extremely high, making it almost non-conductive. That is, a high-impedance state can be equivalent to floating or an open circuit. Setting the second digital signal transmission interface of the processor that does not use the digital microphone to a high-impedance state prevents that processor from affecting the communication between the designated processor and the digital microphone.

[0075] It should be noted that in some embodiments, the operation of "setting the second digital signal transmission interface of a processor other than the designated processor to a high impedance state" is not necessarily performed when "the digital signal transmitted by the digital microphone is obtained through the designated processor". Rather, the operation of setting the second digital signal transmission interface of a processor other than the designated processor to a high impedance state can be performed after the designated processor is determined.

[0076] As one implementation method, determining the designated processor from the first processor and the second processor can be done by identifying the processor currently requesting access to the digital microphone as the designated processor. For example, this could involve detecting an acquired permission request for the digital microphone, determining whether the request was sent to the first processor or the second processor, and thus determining the designated processor.

[0077] As another implementation, determining the designated processor from the first processor and the second processor can be achieved by determining a currently running interface that has the function of calling the digital microphone; and determining the processor corresponding to the designated interface from the first processor and the second processor as the designated processor. For example, when it is detected that the interface currently running on the electronic device belongs to a designated interface, the processor used to run the designated interface is determined as the processor corresponding to the designated interface, i.e., the designated processor is determined. Here, the designated interface refers to an interface that has the function of calling the digital microphone. For example, it could be determined based on the historical operation data of the designated interface within a preset time period that the user calls the digital microphone function within the designated interface, or it could be that the designated interface has a digital microphone call control.

[0078] Let's illustrate the difference between the two methods of determining the designated processor with an example. Suppose that a designated interface of a designated application on an electronic device has a digital microphone call control, which allows a user to input voice within the designated interface by triggering it. In one implementation, when the electronic device is running the designated interface, the processor corresponding to that interface can be designated as the designated processor, and the operation of setting the second digital signal transmission interface of processors other than the designated processor to a high-impedance state can be performed. This allows the electronic device to detect the possibility of the user using the digital microphone and preemptively set the second digital signal transmission interface of processors other than the designated processor to a high-impedance state. In another implementation, when the electronic device is running the designated interface, it can detect whether the digital microphone call control has been triggered. If it has been triggered, the processor corresponding to the designated interface is determined as the designated processor, and the operation of setting the second digital signal transmission interface of processors other than the designated processor to a high-impedance state is performed. That is, when the processor currently calling the digital microphone is determined, the second digital signal transmission interfaces of other processors are set to a high-impedance state.

[0079] For example, for different operating modes, it is assumed that the at least two processors include a large-core processor and a small-core processor. Implementation methods for the circuit control method can be found in [reference needed]. Figure 7 .

[0080] First, the system prepares to call the DMIC function. This includes hardware initialization, i.e., configuring the DMIC hardware interface, including GPIO settings, data line connections, etc.; register configuration; clock settings; power management; data stream configuration; and interrupt and error handling. Then, the system detects the operating mode of the electronic device. For example, the system determines whether the electronic device is in high-performance or hybrid mode. If not, it can be determined that the electronic device is in long-battery-life mode, setting the large-core processor to a power-down state. This pulls the GPIO of the large-core processor low, causing its PDM interface to also be pulled low. However, due to the presence of electronic components, the PDM interface of the digital microphone will not be pulled low, nor will the PDM interface of the small-core processor connected to the digital microphone be pulled low.

[0081] Specifically, targeting Figure 4 The illustrated scheme assumes that one of the first and second processors is a large core and the other a small core. The large core's CLOCK2 and DATA2 are both connected to the digital microphone via resistors. Therefore, due to the series resistors in the circuit, the system's DMIC and the small core's PDM interface will not be pulled low. Thus, the DMIC and the small core's PDM interface can maintain normal communication. In other words, the digital microphone (DMIC) can normally enable the DMIC recording function through the PDM interface with the small core processor. However, regarding... Figure 5 In the scheme shown, the large core is in a power-down state, and the GPIO corresponding to its PDM interface is in a low-impedance pull-down state. However, due to the presence of the series Schottky diode and resistor in the circuit, the PDM interfaces of the DMIC and the small core will not be pulled low. Therefore, the PDM interfaces of the DMIC and the small core can maintain normal communication.

[0082] In high-performance or hybrid mode, the system further detects whether the DMIC is being called by a large core or a small core. If the DMIC is being called by a large core, the GPIO corresponding to the PDM of the small core is set to a high-impedance state; otherwise, the GPIO corresponding to the PDM of the large core is set to a high-impedance state. After the setting is completed, the DMIC communicates with the large core or the small core through the PDM interface.

[0083] In other words, the system determines whether the DMIC is being called by the large core. If it is, the GPIO corresponding to the PDM interface of the small core is set to a high-impedance state to prevent interference with the system's PDM interface function, i.e., to prevent other processors from accessing the DMIC's PDM interface. Then, the DMIC communicates with the large core through the PDM interface, and the large core enables the DMIC recording function normally. If the DMIC is not being called by the large core, it can be determined that it is being called by the small core. The GPIO corresponding to the PDM interface of the large core is set to a high-impedance state to prevent interference with the system's PDM interface function. The DMIC communicates with the small core through the PDM interface, and the small core enables the DMIC recording function normally.

[0084] Therefore, by improving the circuit design and combining it with the corresponding software switching logic, the embodiments of this application can enable the DMIC function to still be used normally in three modes: high performance, hybrid, and long battery life. Compared with traditional design schemes, the difficulty of circuit design and software design is greatly reduced. Figure 4 The proposed solution is lower in cost and has a simpler circuit. Figure 5 The proposed solution can reduce system leakage and power consumption.

[0085] Please see Figure 8 The diagram shows a structural block diagram of a circuit control device 700 provided in an embodiment of this application. The device may include a processing unit 701 and a transmission unit 702.

[0086] The processing unit 701 is configured to power down the first processor if the electronic device is in the first mode, so that the second digital signal of the first processor is pulled low. The electronic components corresponding to the first processor are configured to prevent both the first digital signal transmission interface and the second digital signal of the second processor from being pulled low.

[0087] In some embodiments, the processing unit 701 is configured to, if the operating mode of the electronic device is not the first mode, determine a designated processor from the first processor and the second processor when the first processor and the second processor are not turned off; acquire the digital signal transmitted by the digital microphone through the designated processor; and set the second digital signal transmission interface of the processor other than the designated processor to a high impedance state.

[0088] In some cases, the processing unit 701 is used to determine, from the first processor and the second processor, the processor currently requesting to invoke the digital microphone as the designated processor.

[0089] In some embodiments, the processing unit 701 is configured to determine a currently running specified interface that has the function of calling the digital microphone; and to determine the processor corresponding to the specified interface as the specified processor from the first processor and the second processor.

[0090] In some embodiments, the transmission unit 702 is configured to acquire the digital signal transmitted by the digital microphone via the second processor.

[0091] In some embodiments, the processing unit 701 is used to determine the operating mode of the electronic device; if the operating mode is a long battery life mode, the large core processor is determined as the target processor among the at least two processors; if the operating mode is a high performance mode or a hybrid mode, the processor currently calling the digital microphone is determined as the target processor among the at least two processors.

[0092] In some embodiments, the transmission unit 702 is used to pull the general-purpose input / output interface of the target processor low.

[0093] In some embodiments, the transmission unit 702 is used to acquire data collected by the digital microphone through the small core processor in the at least two processors.

[0094] In some embodiments, the transmission unit 702 is used to set the general-purpose input / output interface of the processor other than the target processor among the at least two processors to a high-impedance state; and to acquire the data collected by the digital microphone through the target processor.

[0095] Those skilled in the art will readily understand that, for the sake of convenience and brevity, the specific working processes of the described devices and modules can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. Unless otherwise specified, the embodiments, implementation methods, and technical features in this application can be substituted for or combined with each other.

[0096] In the several embodiments provided in this application, the coupling between modules can be electrical, mechanical, or other forms of coupling.

[0097] Furthermore, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0098] Please refer to Figure 8This diagram illustrates a structural block diagram of a computer-readable medium provided in an embodiment of this application. The computer-readable medium 800 stores program code that can be called by a processor to execute the methods described in the above method embodiments.

[0099] The computer-readable medium 800 may be an electronic storage device such as flash memory, EEPROM (Electrically Erasable Programmable Read-Only Memory), EPROM, hard disk, or ROM. Optionally, the computer-readable medium 800 includes a non-transitory computer-readable storage medium. The computer-readable medium 800 has storage space for program code 810 that performs any of the method steps described above. This program code can be read from or written to one or more computer program products. The program code 810 may be compressed, for example, in a suitable form.

[0100] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A digital microphone circuit, characterized by, The application is applied to an electronic device, and the circuit comprises: a digital microphone having a first digital signal transmission interface; a first processor and a second processor, each of which has a second digital signal transmission interface; the second digital signal transmission interface of the first processor is connected with the first digital signal transmission interface through its corresponding electronic element; the second digital signal transmission interface of the second processor is connected with the first digital signal transmission interface; in a first mode of the electronic device, the first processor is powered off, so that the second digital signal of the first processor is pulled low, and the corresponding electronic element of the first processor is used to avoid the first digital signal transmission interface and the second digital signal of the second processor being pulled low; the second processor is used to communicate with the digital microphone in the first mode.

2. The circuit of claim 1, wherein, the electronic element comprises a first element and a second element, the first digital signal transmission interface comprises a first clock interface and a first data interface, and each of the second digital signal transmission interfaces comprises a second clock interface and a second data interface; the second clock interface of the first processor is connected with the first clock interface through its corresponding first element; the second data interface of the first processor is connected with the first data interface through its corresponding second element; in the case that the first processor is powered off so that the second clock interface and the second data interface of the first processor are both pulled low, the first element is used to avoid the first clock interface and the second clock interface of the second processor being pulled low, and the second element is used to avoid the first data interface and the second data interface of the second processor being pulled low.

3. The circuit of claim 2, wherein, the first processor and the second processor both correspond to the electronic element; the second clock interface of the second processor is connected with the first clock interface through its corresponding first element; the second data interface of the second processor is connected with the first data interface through its corresponding second element.

4. The circuit of claim 2 or 3, characterized in that, the first element and the second element both belong to resistance elements; the first element is used to pull up the resistance value of its corresponding second clock interface in the case that the second clock interface is pulled low; the second element is used to pull up the resistance value of its corresponding second data interface in the case that the second data interface is pulled low.

5. The circuit of claim 2, wherein, the first clock interface is used to receive the clock signal output by the second clock interface, the first element is a diode, the anode of the diode is connected with the second clock interface, and the cathode of the diode is connected with the first clock interface; the second element is a resistor; the diode is used to disconnect its corresponding second clock interface from the first clock interface in the case that the second clock interface is pulled low; the second element is used to pull up the resistance value of its corresponding second data interface in the case that the second data interface is pulled low.

6. The circuit of claim 5, wherein, the diode is a Schottky diode.

7. The circuit of claim 1, wherein, At least one general input output interface of the first processor and the second processor is configured as an interface having a function of communicating with the digital microphone as a second digital signal transmission interface corresponding to the processor.

8. The circuit of claim 1, wherein, The first processor is a big core processor, and the second processor is a small core processor.

9. A circuit control method characterized by, The method is applied to the digital microphone circuit according to any one of claims 1-8, and the method comprises: If the working mode of the electronic device is the first mode, the first processor is powered off, so that the second digital signal of the first processor is pulled low, and the electronic element corresponding to the first processor is used to avoid the first digital signal transmission interface and the second digital signal of the second processor being pulled low. The second processor is used to acquire the digital signal transmitted by the digital microphone.

10. The method of claim 9, wherein, The method further comprises: If the working mode of the electronic device is not the first mode, in the case that the first processor and the second processor are not closed, a specified processor is determined from the first processor and the second processor. The specified processor is used to acquire the digital signal transmitted by the digital microphone. The second digital signal transmission interface of the processor other than the specified processor is set to a high impedance state.

11. The method of claim 10, wherein, The specified processor is determined from the first processor and the second processor, and the method comprises: A processor currently requesting to call the digital microphone is determined as the specified processor from the first processor and the second processor.

12. The method of claim 10, wherein, The specified processor is determined from the first processor and the second processor, and the method comprises: A specified interface currently running and having a function of calling the digital microphone is determined. The processor corresponding to the specified interface is determined as the specified processor from the first processor and the second processor.

13. A circuit control device, characterized by comprising: The apparatus is applied to the digital microphone circuit according to any one of claims 1-8, and the apparatus comprises: A processing unit is configured to, if the working mode of the electronic device is the first mode, power off the first processor, so that the second digital signal of the first processor is pulled low, and the electronic element corresponding to the first processor is used to avoid the first digital signal transmission interface and the second digital signal of the second processor being pulled low. A transmission unit is configured to acquire the digital signal transmitted by the digital microphone through the second processor.

14. An electronic device, comprising: The digital microphone circuit according to any one of claims 1-8. The digital microphone circuit according to any one of claims 1-8.

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