Semiconductor transistor device including trench structure

Abstract

The semiconductor transistor device includes a gate trench structure extending in a vertical direction from a wide bandgap semiconductor body first surface into the wide bandgap semiconductor body, the gate trench structure including a gate trench dielectric and a gate trench electrode. The semiconductor transistor device includes a first conductivity type body region adjoining a first sidewall of the gate trench structure. The first lateral direction is perpendicular to the second lateral direction. The semiconductor transistor device includes a first conductivity type auxiliary structure adjoining a bottom side of the gate trench structure and a second conductivity type drift structure adjoining a bottom side of the body region. The drift structure includes a drift layer arranged in a vertical direction between the bottom side of the auxiliary structure and the second surface of the wide bandgap semiconductor body. In a first location in a second lateral direction, a first sub-region of the drift structure extends from a bottom side of the body region to the drift layer. At a second location in a second lateral direction, the drift structure second sub-region extends from the bottom side of the body region to the top side of the auxiliary structure lateral sub-region.

Description

Technical Field

[0001] This disclosure relates to a semiconductor device, and more particularly to a semiconductor transistor device including a trench structure. Background Technology

[0002] The technological development of next-generation semiconductor devices (such as semiconductor transistors) aims to improve electronic device characteristics and reduce costs by shrinking device geometry. While cost reduction is possible through shrinking device geometry, various trade-offs and challenges must be met when increasing device functionality per unit area. For example, area-specific on-state resistance R... on Design optimization requires a trade-off between xA and reliability requirements influenced by factors such as short-circuit withstand time.

[0003] Therefore, an improved semiconductor transistor device is needed. Summary of the Invention

[0004] Examples of this disclosure relate to a semiconductor transistor device. The semiconductor transistor device includes a gate trench structure extending vertically from a first surface of a wide-bandgap semiconductor body into the wide-bandgap semiconductor body. The gate trench structure includes a gate trench dielectric and a gate trench electrode. The semiconductor transistor device further includes a body region of a first conductivity type adjacent to a first sidewall of the gate trench structure. A second sidewall of the gate trench structure is opposite to the first sidewall along a first lateral direction. The first lateral direction is perpendicular to a second lateral direction. The semiconductor transistor device further includes an auxiliary structure of the first conductivity type adjacent to a bottom side of the gate trench structure. The semiconductor transistor device includes a drift structure of a second conductivity type adjacent to a bottom side of the body region. The drift structure includes a drift layer disposed vertically between the bottom side of the auxiliary structure and a second surface of the wide-bandgap semiconductor body. At a first location along the second lateral direction, a first sub-region of the drift structure extends from the bottom side of the body region to the drift layer. At a second location along the second lateral direction, a second sub-region of the drift structure extends from the bottom side of the body region to the top side of the lateral sub-region of the auxiliary structure.

[0005] Another example of this disclosure relates to a method of manufacturing a semiconductor transistor device. The method includes forming a gate trench structure extending vertically from a first surface of a wide-bandgap semiconductor body into the wide-bandgap semiconductor body. The gate trench structure includes a gate trench dielectric and a gate trench electrode. The method further includes forming a body region of a first conductivity type adjacent to a first sidewall of the gate trench structure. A second sidewall of the gate trench structure is opposite to the first sidewall along a first lateral direction. The first lateral direction is perpendicular to a second lateral direction. The method further includes forming an auxiliary structure of a first conductivity type adjacent to a bottom side of the gate trench structure. The method further includes forming a drift structure of a second conductivity type adjacent to the bottom side of the body region. The drift structure includes a drift layer disposed vertically between the bottom side of the auxiliary structure and a second surface of the wide-bandgap semiconductor body. At a first location along the second lateral direction, a first sub-region of the drift structure extends from the bottom side of the body region to the drift layer. At a second location along the second lateral direction, a second sub-region of the drift structure extends from the bottom side of the body region to the top side of the lateral sub-region of the auxiliary structure.

[0006] Those skilled in the art will recognize the additional features and advantages upon reading the following detailed description and reviewing the accompanying drawings. Attached Figure Description

[0007] The accompanying drawings are included to provide a further understanding of the embodiments, and are incorporated in and constitute a part of this specification. The drawings illustrate examples of semiconductor transistor devices and, together with the description, serve to explain the principles of the examples. Further examples are described in the following detailed description and claims.

[0008] Figure 1 This is an exemplary process illustration for manufacturing a semiconductor transistor device including auxiliary structures.

[0009] Figures 2A to 2C These are schematic cross-sectional and top views used to illustrate the process features of forming auxiliary structures.

[0010] Figures 3A to 3E These are schematic top and cross-sectional views used to illustrate configuration examples of semiconductor transistor devices.

[0011] Figures 4A to 4C These are schematic top and cross-sectional views used to illustrate additional configuration examples of semiconductor transistor devices. Detailed Implementation

[0012] In the following detailed description, reference is made to the accompanying drawings, which form part of the detailed description and illustrate specific examples of semiconductor transistor devices by way of illustration. It should be understood that other examples may be utilized and structural or logical changes may be made without departing from the scope of this disclosure. For example, a feature illustrated or described for one example may be used in combination with other examples to produce yet another example. It is intended that this disclosure include such modifications and variations. The examples are described using specific language, which should not be construed as limiting the scope of the appended claims. The drawings are not to scale and are for illustrative purposes only. Unless otherwise stated, corresponding elements are designated by the same reference numerals in different drawings.

[0013] The terms “having,” “comprising,” “including,” “including,” and the like are open-ended and indicate the presence of the stated structure, element, or feature, but do not exclude the presence of additional elements or features. The articles “a,” “an,” and “the” are intended to include both plural and singular forms unless the context clearly indicates otherwise.

[0014] The term "electrical connection" describes a permanent low-resistance connection between electrically connected elements, such as a direct contact between elements of interest or a low-resistance connection via a metal and / or heavily doped semiconductor material. The term "electrical coupling" includes one or more intermediate elements adapted for signal and / or power transmission that can be connected between electrically coupled elements; for example, elements controllable to temporarily provide a low-resistance connection in a first state and temporarily provide high-resistance electrical decoupling in a second state. An ohmic contact is a non-rectified junction.

[0015] The range given for physical dimensions includes boundary values. For example, the range of parameter y from a to b is read as a≤y≤b. The same applies to ranges with a single boundary value, such as "at most" and "at least".

[0016] The terms “on” and “above” should not be interpreted as meaning only “directly on” and “directly above”. Rather, if an element is positioned “on” or “above” another element (e.g., one layer is “on” or “above” another layer or on a substrate), then additional components (e.g., additional layers) may be positioned between the two elements (e.g., if one layer is on or “above” a substrate, then additional layers may be positioned between said layer and said substrate).

[0017] Examples of this disclosure relate to a semiconductor transistor device. The semiconductor transistor device includes a gate trench structure extending vertically from a first surface of a wide-bandgap semiconductor body into the wide-bandgap semiconductor body. The gate trench structure includes a gate trench dielectric and a gate trench electrode. The semiconductor transistor device further includes a body region of a first conductivity type adjacent to a first sidewall of the gate trench structure. A second sidewall of the gate trench structure is opposite to the first sidewall along a first lateral direction. The first lateral direction is perpendicular to a second lateral direction. The semiconductor transistor device further includes an auxiliary structure of the first conductivity type adjacent to a bottom side of the gate trench structure. The semiconductor transistor device includes a drift structure of a second conductivity type adjacent to the bottom side of the body region. The drift structure includes a drift layer disposed vertically between the bottom side of the auxiliary structure and a second surface of the wide-bandgap semiconductor body. At a first location along the second lateral direction, a first sub-region of the drift structure extends from the bottom side of the body region to the drift layer. At a second location along the second lateral direction, a second sub-region of the drift structure extends from the bottom side of the body region to the top side of the lateral sub-region of the auxiliary structure.

[0018] Semiconductor transistor devices can be insulated-gate field-effect transistors (IGFETs), such as metal-oxide-semiconductor field-effect transistors (MOSFETs), or they can be insulated-gate bipolar transistors (IGBTs). For example, a semiconductor transistor device can be part of an integrated circuit, or it can define a discrete semiconductor device or semiconductor module. For example, a semiconductor transistor device can be a vertical-channel semiconductor transistor device. In a vertical-channel semiconductor transistor device, load current flows between a first load electrode (e.g., a source electrode or emitter electrode) above a first surface of a wide-bandgap semiconductor body and a second load electrode (e.g., a drain electrode or collector electrode) above a second surface opposite the first surface in a vertical direction. In a vertical-channel semiconductor transistor device, the load current can flow in a vertical direction perpendicular to the first surface and / or the second surface. For example, semiconductor transistor devices can be used in applications related to power transmission and distribution, automotive and transportation, renewable energy, consumer electronics, and other industrial applications.

[0019] For example, the first surface can be the front or top surface of the wide-bandgap semiconductor body, and the second surface can be the back or rear surface of the wide-bandgap semiconductor body. For example, the wide-bandgap semiconductor body can be attached to a lead frame via, for example, the second surface. For example, bonding pads can be arranged above the first surface of the wide-bandgap semiconductor body, and bonding wires can be bonded to the bonding pads.

[0020] Semiconductor transistor devices can be configured to conduct currents greater than 1A, 10A, or even 100A. For example, a semiconductor transistor device can be designed as a transistor cell array with multiple transistor cells having the same layout. The transistor cell array can be a one-dimensional or two-dimensional regular arrangement of multiple transistor cells. For example, multiple transistor cells in a transistor cell array can be electrically connected in parallel. For example, the source or emitter regions of multiple transistor cells in a semiconductor transistor cell array can be electrically connected together. Similarly, the drain or collector regions of multiple transistor cells in a semiconductor transistor cell array can be electrically connected together. For example, the gate regions of multiple transistor cells in a semiconductor transistor cell array can be electrically connected together. For example, the transistor cells of a transistor cell array, or a portion thereof (e.g., the gate region), can be designed in strip, polygonal, circular, or elliptical shapes.

[0021] For example, the number of transistor cells in a transistor cell array can depend on the maximum load current. For example, the number of transistor cells in a transistor cell array can be greater than 100, or greater than 1000, or even greater than 10000. The semiconductor transistor device can be further configured to block voltages greater than 60V, 100V, 400V, 650V, 1.2kV, 1.7kV, 3.3kV, 4.5kV, 5.5kV, 6kV, 6.5kV, or 10kV between load electrodes (e.g., between the drain and source of a MOSFET or between the collector and emitter of an IGBT). For example, the blocking voltage can correspond to the voltage level specified in the datasheet of the semiconductor transistor device. The blocking voltage of the semiconductor transistor device can be adjusted by the impurity concentration and / or vertical extension of the drift region in the semiconductor body. The doping concentration of the drift region can gradually or progressively increase or decrease with increasing distance to the first surface, at least in its vertically extended portion. According to other examples, the impurity concentration in the drift region can be approximately uniform. When a semiconductor transistor device is operated in voltage blocking mode, the space charge region can extend vertically through the drift region, either partially or completely, depending on the blocking voltage applied to the semiconductor transistor device.

[0022] Semiconductor devices can be based on a wide-bandgap semiconductor host from a crystalline wide-bandgap semiconductor material having a bandgap greater than that of silicon, i.e., greater than 1.12 eV. As an example, the wide-bandgap semiconductor material can have a hexagonal lattice and can be silicon carbide (SiC). For example, the semiconductor material can be 2H-SiC (2H polytype SiC), 6H-SiC, or 15R-SiC. According to one example, the semiconductor material is 4H polytype (4H-SiC) silicon carbide. The semiconductor host can include or consist of a semiconductor substrate, wherein the semiconductor substrate does not have one or more semiconductor layers thereon, such as epitaxial growth layers. For example, one of the semiconductor layers can be a doped semiconductor layer of a current diffusion layer. As an alternative to the SiC semiconductor host, gallium arsenide (GaAs) or gallium nitride (GaN) can be used as the material for the wide-bandgap semiconductor host, for example.

[0023] For example, the gate trench dielectric can be formed by or may include an oxidation process, such as a thermal oxidation process and / or an oxide deposition process. Other dielectric materials can be used besides oxides or as alternatives to oxides. For example, high-k materials can be used. For example, the gate trench dielectric can include a high-k dielectric layer comprising at least one of Al₂O₃, ZrO₂, HfO₂, AlN, aluminosilicate AlSiOₓ, silicon La or Si-doped HfO₂, TiO₂, Y₂O₃ or Si₃N₄. For example, the gate trench dielectric can include at least a first dielectric sublayer and a second dielectric sublayer. The first dielectric sublayer adjacent to the channel region can have a dielectric constant smaller than that of the high-k dielectric sublayer, for example, equal to or greater than the dielectric constant of SiO₂. For example, the first dielectric layer can include at least one of, for example, SiO₂, AlN or Si₃N₄. The gate trench electrode may include one or more conductive materials, such as metals, metal alloys (e.g., Cu, Au, AlCu, Ag, or alloys thereof), metal compounds (e.g., TiN), or highly doped semiconductor materials (such as highly doped polysilicon). For example, the one or more conductive materials may form a layer stack. For example, the gate trench electrode may be electrically connected to a gate pad via a gate interconnect structure such as a gate channel. The gate pad / interconnect structure and, for example, a first load electrode pad, such as the source pad of a semiconductor transistor device, may be part of a wiring region above a wide-bandgap semiconductor body.

[0024] Semiconductor transistor devices including lateral sub-regions with auxiliary structures can allow area-specific on-state resistance R by providing a 2D JFET structure (e.g., at least below the bottom side of the gate trench structure). onA trade-off between improvements in xA and short-circuit withstand time. The 2D JFET structure is based on lateral sub-regions of an auxiliary structure and a portion of the bottom side of an adjacent gate trench structure of the auxiliary structure, wherein the portion links adjacent lateral sub-regions to each other. Because the 2D JFET structure is positioned below the gate trench structure, it can be combined with a wide variety of known cell layouts to achieve area-specific on-state resistance R. on A trade-off between improved xA and short-circuit withstand time. Compared to the 1D JFET structure, the 2D JFET structure also allows for improved shielding of the gate trench dielectric.

[0025] For example, in a cross-sectional plane defined by the vertical direction and the first lateral direction, and taken at a second location along the second lateral direction, the second sub-region of the drift structure is bordered by a pn junction extending from the first location at the gate trench structure to the second location at the gate trench structure. For example, the first location at the gate trench structure may be located at the first sidewall of the gate trench structure. The second location at the gate trench structure may be located at the bottom side of the gate trench structure. In a cross-sectional plane defined by the vertical direction and the first lateral direction, and taken at a second location along the second lateral direction, the second sub-region of the drift structure is completely surrounded by portions of the pn junction and the gate trench dielectric.

[0026] For example, at the second location along the second lateral direction, the vertical range of the lateral sub-region of the auxiliary structure can be more than twice as large as the vertical range of the second sub-region of the drift structure.

[0027] For example, at the second location along the second lateral direction and at the vertical reference level in the center of the second sub-region of the drift structure, the doping concentration of the second conductivity type can be more than an order of magnitude larger than the vertical reference level in the first sub-region of the drift structure at the first location along the second lateral direction, for example, between one and two orders of magnitude.

[0028] For example, in a cross-sectional plane defined by a first lateral direction and a second lateral direction and taken at a vertical reference level in the center of the lateral sub-region of the auxiliary structure, the first sub-region of the drift structure can be delimited by a pn junction extending around the first sub-region of the drift structure. For this pn junction, the doping concentration of the first conductivity type of the lateral sub-region can be more than an order of magnitude larger than the doping concentration of the first sub-region. For example, the area of ​​the first conductivity type of the lateral sub-region can be more than twice the enclosed area of ​​the first sub-region.

[0029] For example, the auxiliary structure abuts the first sidewall of the gate trench structure from the bottom side of the gate trench structure to the first surface. For example, the auxiliary structure may be electrically connected to the first load electrode, such as the source electrode or the emitter electrode, via the first surface of the wide-bandgap semiconductor body.

[0030] For example, the lateral sub-regions of the auxiliary structure can interconnect portions of the gate structures of adjacent transistor cells. For example, the lateral sub-regions of the auxiliary structure can extend along a first lateral direction.

[0031] For example, the body region may extend along a first lateral direction and may be adjacent to the second sidewall of the second gate trench structure. For example, at least some of the gate trench structures may have a double-sided channel region by having the source region adjacent to the opposite sidewall and the body region adjacent to the opposite sidewall of the corresponding gate trench.

[0032] For example, the semiconductor transistor device may further include a third trench structure. An auxiliary structure may abut the sidewalls of the third trench structure from the bottom side of the third trench structure to the first surface. For example, the auxiliary structure at the third trench structure may provide an electrical connection from the lateral sub-region to a first load electrode above the first surface.

[0033] The details regarding the structural, functional, or technical benefits of the features described above for wide-bandgap semiconductor devices, such as semiconductor transistor devices, also apply to the exemplary methods further described below. Processing a wide-bandgap semiconductor body may include one or more optional additional features corresponding to one or more aspects mentioned in conjunction with the proposed concepts or in one or more examples described above or below.

[0034] Some of the examples above and below may refer to silicon carbide substrates. Alternatively, wide-bandgap semiconductor substrates, such as wide-bandgap wafers, may be processed, for example, comprising wide-bandgap semiconductor materials different from silicon carbide. Wide-bandgap semiconductor wafers may have a bandgap greater than that of silicon (1.12 eV). For example, a wide-bandgap semiconductor wafer may be a silicon carbide (SiC) wafer or a gallium arsenide (GaAs) wafer.

[0035] Figure 1 The process diagram refers to the process characteristics of forming a semiconductor transistor device.

[0036] Process feature S100 includes forming a gate trench structure extending along a vertical direction from a first surface of a wide-bandgap semiconductor body into the wide-bandgap semiconductor body, the gate trench structure including a gate trench dielectric and a gate trench electrode.

[0037] Process feature S110 includes a body region of a first conductivity type forming a first sidewall of an adjacent gate trench structure. A second sidewall of the gate trench structure is opposite to the first sidewall along a first lateral direction. The first lateral direction is perpendicular to the second lateral direction.

[0038] Process feature S120 includes an auxiliary structure of a first conductivity type forming the bottom side of the adjacent gate trench structure.

[0039] Process feature S130 includes forming a drift structure of a second conductivity type adjacent to the bottom side of the host region. The drift structure includes a drift layer disposed vertically between the bottom side of the auxiliary structure and the second surface of the wide-bandgap semiconductor host. At a first location along a second lateral direction, a first sub-region of the drift structure extends from the bottom side of the host region to the drift layer. At a second location along the second lateral direction, a second sub-region of the drift structure extends from the bottom side of the host region to the top side of the lateral sub-region of the auxiliary structure.

[0040] It should be understood that the disclosure of multiple actions, processes, operations, steps, or functions disclosed in this specification or claims is not to be construed as being in a particular order, unless otherwise expressly or implicitly stated, for example for technical reasons, such as by expressions like "after which". Therefore, the disclosure of multiple actions or functions will not limit them to a particular order, unless such actions or functions are not interchangeable for technical reasons. Furthermore, in some examples, a single action, function, process, operation, or step may accordingly include or be decomposed into multiple sub-actions, sub-functions, sub-processes, sub-operations, or sub-steps. Unless expressly excluded, such sub-actions may be included and are part of the disclosure of that single action. For example, in the exemplary method described above, the gate trench structure may be formed after forming the body region and / or source region and / or auxiliary region or portions thereof. For example, lateral sub-regions of the auxiliary structure may be formed before etching the trench of the gate structure, and additional portions of the auxiliary structure may be formed, for example, after etching the trench and before forming the gate trench dielectric by an ion implantation process through the sidewalls of the trench.

[0041] Figure 2A and Figure 2B The schematic cross-sectional view illustrates an exemplary process feature for forming the lateral sub-regions of the auxiliary region.

[0042] refer to Figure 2A The formation of the lateral subregion 1081 includes, for example, introducing a dopant D1 of a first conductivity type into the wide bandgap semiconductor substrate 1041 (e.g., a SiC substrate) of the wide bandgap semiconductor body 104 through an ion implantation process I2.

[0043] After that, and refer to Figure 2B The semiconductor layer 1042 is formed on the wide bandgap semiconductor substrate 1041 through at least one epitaxial layer deposition process. For example, a body region and a trench structure can be formed in the semiconductor layer 1042.

[0044] like Figure 2CAs illustrated in the schematic top view, the lateral sub-regions 1081 can be arranged as parallel strips extending along a first lateral direction x1 and spaced apart from each other along a second lateral direction x2. The parallel strips are interconnected by interconnecting links 1082. The lateral sub-regions 1081 and the interconnecting links 1082 define a grid shape.

[0045] The lateral subregion 1081 and interconnect link 1082 can be defined by at least one ion implantation process using an ion implantation mask. Another ion implantation mask can be used to perform one or more additional ion implantation processes to introduce a dopant of a second conductivity type into those regions of the wide-bandgap semiconductor substrate 1041 laterally surrounded by the lateral subregion 1081 and interconnect link 1082. This allows adjustment of the doping concentration distribution of the first subregion 1101 of the drift structure 110 and provides a 2D JFET, since the channel current must pass through those regions of the wide-bandgap semiconductor substrate 1041 laterally surrounded by the lateral subregion 1081 and interconnect link 1082.

[0046] For example, the first subregion forming the drift structure may include multiple first ion implantation processes with different ion implantation energies. This, for example, can allow for adjustment of the vertical doping concentration distribution of the first subregion of the drift structure.

[0047] Therefore, the channel current directed toward the drain or collector electrode at the second surface of the wide-bandgap semiconductor substrate can be guided with respect to its area-specific on-state resistance R. on xA's contribution is used for optimization.

[0048] For example, the second sub-region forming the drift structure may include a second ion implantation process having a larger ion implantation dose than any of the first ion implantation processes. The second ion implantation process can introduce a dopant of a second conductivity type from the top side of the semiconductor layer 1042. Figure 2B In the semiconductor layer 1042. After performing the second ion implantation process, the thickness of the semiconductor layer 1042 can be further increased by at least one more epitaxial layer deposition process. For example, dopants for the host and / or source regions can be introduced into the semiconductor layer after performing at least one more epitaxial layer deposition process.

[0049] For example, forming the auxiliary structure may include at least one upstream ion implantation process performed before etching the trench of the gate trench structure, and further includes at least one downstream ion implantation process performed after etching the trench of the gate trench structure. For example, the at least one upstream ion implantation process performed before etching the trench of the gate trench structure may include reference to... Figure 2AThe process described. The at least one downstream ion implantation process may include an ion implantation process through the sidewalls of the trench in the gate trench structure prior to the formation of the gate trench dielectric and the gate trench electrode.

[0050] exist Figures 3A to 3E The schematic top and cross-sectional views illustrate an example configuration of the semiconductor transistor device 100. The semiconductor transistor device 100 is illustrated as a MOSFET.

[0051] refer to Figure 3A A schematic top view shows a semiconductor transistor device 100 including a gate trench structure 102. The gate trench structure 102 includes a gate trench dielectric 1021 and a gate trench electrode 1022, and extends along a second lateral direction x2. A source region 105 of a second conductivity type is adjacent to a first sidewall 1026 of the gate trench structure 102. An auxiliary structure 108 of a first conductivity type is adjacent to a second sidewall 1027 of the gate trench structure 102.

[0052] Figure 3B The schematic cross-sectional view is along Figure 3A The location was obtained at the first position p11 in the second lateral direction x2.

[0053] The gate trench structure 102 extends along the vertical direction y from the first surface 1051 of the wide bandgap semiconductor body 104 into the wide bandgap semiconductor body 104.

[0054] A body region 106 of a first conductivity type is adjacent to and constrained by a first sidewall 1026 of a gate trench structure 102. Along a first lateral direction x1, the body region 106 is disposed between and constrained by the first sidewall 1026 of the gate trench structure 102 and an auxiliary structure 108. The body region 106 is electrically coupled to a first load electrode L1 above a first surface 1051 of a wide-bandgap semiconductor body 104 via the auxiliary structure 108. Furthermore, a source region 105 is electrically coupled to the first load electrode L1 above the first surface 1051 of the wide-bandgap semiconductor body 104. Along a vertical direction y, the body region 106 is disposed between and constrained by the source region 105 and the first sub-region 1101 of a drift structure 110 of a second conductivity type. The first sub-region 1101 is transformed into a drift layer 1105, which is electrically coupled to the second load electrode L2, such as the drain electrode or the collector electrode, via the second surface 1052 of the wide bandgap semiconductor body 104.

[0055] Figure 3C The schematic cross-sectional view is along Figure 3A It was obtained at the second positioning p12 in the second lateral direction x2.

[0056] At the second positioning p12, the second sub-region 1102 of the drift structure 110 extends from the bottom side 1061 of the main body region 106 to the top side of the lateral sub-region 1081 of the auxiliary structure 108. The channel current entering the second sub-region 1102 of the drift structure 110 is conducted to the drift layer 1105 via the first sub-region 1101 of the drift structure 110.

[0057] Figure 3C The diagram shows the surrounding area. Figure 3C The amplification section of the bottom side 1028 of the gate trench structure 102.

[0058] refer to Figure 3D In the direction defined by the vertical direction y and the first horizontal direction x1 and along Figure 3A In the cross-sectional plane obtained at the second positioning p12 in the second lateral direction x2, the second sub-region 1102 of the drift structure 110 is defined by the pn junction 112 extending from the first positioning p21 at the gate trench structure 102 to the second positioning p22 at the gate trench structure 102. Therefore, in the cross-sectional plane defined by the vertical direction y and the first lateral direction x1 and along the Figure 3A In the cross-sectional plane obtained at the second positioning p12 in the second lateral direction x2, the second sub-region 1102 of the drift structure 110 is completely surrounded by a portion of the pn junction 112 and the gate trench dielectric 1021.

[0059] At the vertical reference level yref1 in the center of the second sub-region 1102 of the drift structure 110, the doping concentration of the second conductivity type can be higher than that along the vertical reference level yref1. Figure 3A The first positioning p11 in the second lateral direction x2 is located at the vertical reference level yref1 in the first sub-region 1101 of the drift structure 110 (see example). Figure 3B (More than an order of magnitude)

[0060] Figure 3E The schematic view refers to the vertical reference level yref2 defined by the first lateral direction x1 and the second lateral direction x2 and located at the center of the lateral sub-region 1081 of the auxiliary structure 108 (see, for example...). Figure 3D The cross-sectional plane obtained.

[0061] The first sub-region 1101 of the drift structure 110 is delimited by a pn junction 1122 extending around the first sub-region 1101 of the drift structure 110. For example, the first sub-region 1101 may be completely surrounded by a lateral sub-region 1081 and an interconnect link 1082, as shown in the reference. Figures 2A to 2C As described.

[0062] exist Figures 4A to 4CFurther configuration examples of the semiconductor transistor device 100 are illustrated in the schematic top and cross-sectional views. The semiconductor transistor device 100 is illustrated as a MOSFET.

[0063] refer to Figure 4A A schematic top view shows a semiconductor transistor device 100 including a gate trench structure 102. The gate trench structure 102 includes a gate trench dielectric 1021 and a gate trench electrode 1022, and extends along a second lateral direction x2. A source region 105 of a second conductivity type is adjacent to a first sidewall 1026 and a second sidewall 1027 of the adjacent gate trench structure 102 in a first portion A1 of the semiconductor transistor device 100. An auxiliary structure 108 of a first conductivity type extends upward in a second portion A2 of the semiconductor transistor device 100 to a first surface 1051 of a wide-bandgap semiconductor body 104.

[0064] Figure 4B The schematic cross-sectional view is along Figure 4A The location was obtained at the first position p11 in the second lateral direction x2.

[0065] In the second part A2, each of the main region 106 and the source region 105 is laterally arranged between the gate trench structure 102 and the auxiliary structure 108.

[0066] In the first part A1 and the second part A2, the source region 105 can be interrupted along the second lateral direction x2 by a contact portion of the first conductivity type, so as to allow the body region 106 to be on the first surface 1051 ( Figure 4B (Not shown in the figure) The upper part is electrically connected to the first load electrode L1.

[0067] Interconnect links 1082 of the auxiliary structure 108 are adjacent to the bottom side 1028 of the gate trench structure 102. Along the vertical direction y, the body region 106 is arranged between the source region 105 and the first sub-region 1101 of the second conductivity type drift structure 110 and is constrained by the source region 105 and the first sub-region 1101 of the second conductivity type drift structure 1100. The first sub-region 1101 transforms into a drift layer 1105, which is electrically coupled to a second load electrode L2, such as a drain or collector electrode, via a second surface 1052 of the wide bandgap semiconductor body 104.

[0068] Figure 4C The schematic cross-sectional view is along Figure 4A It was obtained at the second positioning p12 in the second lateral direction x2.

[0069] Along Figure 4AAt the second positioning p12 in the second lateral direction x2, the second sub-region 1102 of the drift structure 110 extends from the bottom side 1061 of the main body region 106 to the top side of the lateral sub-region 1081 of the auxiliary structure 108. The channel current entering the second sub-region 1102 of the drift structure 110 is conducted to the drift layer 1105 via the first sub-region 1101 of the drift structure 110. The lateral sub-regions 1081 in the first portion A1 and the second portion A2 are electrically coupled to the first load electrode L1 via the auxiliary structure 108 extending to the first surface 1051 in the second portion A2 of the semiconductor transistor device 100.

[0070] The aspects and features mentioned and described together with the previously described examples and one or more of the figures may also be combined with one or more other examples in order to replace similar features of the other examples or to additionally introduce the features into the other examples.

[0071] Although specific embodiments have been illustrated and described herein, those skilled in the art will appreciate that various alternatives and / or equivalent implementations can be used instead of the illustrated and described embodiments without departing from the scope of the invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that the invention be limited only by the claims and their equivalents.

Claims

1. A semiconductor transistor device (100), comprising: a gate trench structure (102) extending along a vertical direction (y) from a first surface (1051) of a wide bandgap semiconductor body (104) into the wide bandgap semiconductor body (104), the gate trench structure (102) comprising a gate trench dielectric (1021) and a gate trench electrode (1022); a body region (106) of a first conductivity type adjoining a first sidewall (1026) of the gate trench structure (102), wherein a second sidewall (1027) of the gate trench structure (102) opposes the first sidewall (1026) along a first lateral direction (xl), the first lateral direction (xl) being perpendicular to a second lateral direction (x2); a helper structure (108) of the first conductivity type adjoining a bottom side (1028) of the gate trench structure (102); a drift structure (110) of a second conductivity type adjoining a bottom side (1061) of the body region (106), the drift structure (110) comprising a drift layer (1105) arranged along the vertical direction (y) between a bottom side (1081) of the helper structure (108) and a second surface (1052) of the wide bandgap semiconductor body (104); wherein at a first location (pll) along the second lateral direction (x2), a first sub-region (1101) of the drift structure (110) extends from the bottom side (1061) of the body region (106) to the drift layer (1105), and at a second location (p12) along the second lateral direction (x2), a second sub-region (1102) of the drift structure (110) extends from the bottom side (1061) of the body region (106) to a top side of a lateral sub-region (1081) of the helper structure (108).

2. The semiconductor transistor device (100) according to the preceding claim, wherein in a cross-sectional plane defined by the vertical direction (y) and the first lateral direction (xl) and taken at the second location (p12) along the second lateral direction (x2), the second sub-region (1102) of the drift structure (110) is delimited by a pn-junction (112) extending from a first location (p21) at the gate trench structure (102) to a second location (p22) at the gate trench structure (102).

3. The semiconductor transistor device (100) according to the preceding claim, wherein the first location (p21) at the gate trench structure (102) is located at the first sidewall (1026) of the gate trench structure (102), and the second location (p22) at the gate trench structure (102) is located at the bottom side (1028) of the gate trench structure (102).

4. The semiconductor transistor device (100) according to any one of the preceding claims, wherein at the second location (p12) along the second lateral direction (x2), a vertical extent of the lateral sub-region (1081) of the helper structure (108) is more than 2 times greater than a vertical extent of the second sub-region (1102) of the drift structure (110).

5. The semiconductor transistor device (100) according to any of the preceding claims, wherein the doping concentration of the second conductivity type is larger by between one and two orders of magnitude at a vertical reference level (yrefi) at a second positioning (p12) along the second lateral direction (x2) and in the center of the second sub-region (1102) of the drift structure (110) than at the vertical reference level (yrefi) in the first sub-region (1101) of the drift structure (110) at a first positioning (p11) along the second lateral direction (x2).

6. The semiconductor transistor device (100) according to any of the preceding claims, wherein in a cross-sectional plane taken at a vertical reference level (yref2) in the center of a lateral sub-region (1081) of the auxiliary structure (108) and defined by the first lateral direction (xi) and the second lateral direction (x2), the first sub-region (1101) of the drift structure (110) is delimited by a pn-junction (1122) extending around the first sub-region (1101) of the drift structure (110).

7. The semiconductor transistor device (100) according to the preceding claim, wherein the auxiliary structure (108) adjoins the first side wall (1026) of the gate trench structure (102) from the bottom side (1028) of the gate trench structure (102) to the first surface (1051).

8. The semiconductor transistor device (100) according to any of the preceding claims, wherein the lateral sub-region (1081) of the auxiliary structure (108) interconnects portions of the auxiliary structure belonging to gate structures of adjacent transistor cells.

9. The semiconductor transistor device (100) according to claim 1, wherein the body region (106) extends along the first lateral direction (xi) and adjoins a second side wall of a second gate trench structure.

10. The semiconductor transistor device (100) according to claim 1 or 9, further comprising a third trench structure, wherein the auxiliary structure (108) adjoins a side wall of the third trench structure from a bottom side of the third trench structure to the first surface (1051).

11. A method of manufacturing a semiconductor transistor device (100), the method comprising: forming a gate trench structure (102) extending along a vertical direction (y) from a first surface (1051) of a wide bandgap semiconductor body (104) into the wide bandgap semiconductor body (104), the gate trench structure (102) comprising a gate trench dielectric (1021) and a gate trench electrode (1022); forming a body region (106) of a first conductivity type adjoining a first side wall (1026) of the gate trench structure (102), wherein a second side wall (1027) of the gate trench structure (102) opposes the first side wall (1026) along a first lateral direction (xi), the first lateral direction (xi) being perpendicular to a second lateral direction (x2); forming an auxiliary structure (108) of the first conductivity type adjoining a bottom side (1028) of the gate trench structure (102); forming a drift structure (110) of the second conductivity type adjoining a bottom side (1061) of the body region (106), the drift structure (110) comprising a drift layer (1105) arranged along a vertical direction (y) between a bottom side (1081) of the auxiliary structure (108) and a second surface (1052) of the wide bandgap semiconductor body (104); wherein at a first position (p11) along the second lateral direction (x2), a first sub-region (1101) of the drift structure (110) extends from the bottom side (1061) of the body region (106) to the drift layer (1105), and at a second position (p12) along the second lateral direction (x2), a second sub-region (1102) of the drift structure (110) extends from the bottom side (1061) of the body region (106) to a top side of the lateral sub-region (1081) of the auxiliary structure (108).

12. The method according to the preceding claim, wherein forming the lateral sub-region (1081) comprises introducing a dopant (D1) of the first conductivity type into the wide bandgap semiconductor substrate (1041) of the wide bandgap semiconductor body (104); and after this forming the semiconductor layer (1042) on the wide bandgap semiconductor substrate (1041) by at least one epitaxial layer deposition process.

13. The method according to any one of the two preceding claims, wherein forming the first sub-region (1101) of the drift structure (110) comprises a plurality of first ion implantation processes with different ion implantation energies.

14. The method according to the preceding claim, wherein forming the second sub-region (1102) of the drift structure (110) comprises a second ion implantation process with a larger ion implantation dose than any one of the plurality of first ion implantation processes.

15. The method according to any one of the three preceding claims, wherein forming the auxiliary structure (108) comprises at least one upstream ion implantation process carried out before etching the trenches of the gate trench structure (102), and further comprises at least one downstream ion implantation process carried out after etching the trenches of the gate trench structure (102).

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