Vehicle multi-chip parallel bridge arm, half bridge and power module
By symmetrically arranging bridge arms and half-bridges of multiple chips in parallel on the substrate, and utilizing the power topology design of copper clips and the substrate, the symmetry problem of traditional copper clip interconnection methods is solved, achieving high symmetry and current sharing among multiple chips, and improving the energy density of the module.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-03
- Publication Date
- 2026-03-10
AI Technical Summary
Existing copper clip-based chip interconnection methods lack symmetry in chip parallel topology, resulting in the need for complex inductor matching design and making it difficult to achieve multi-chip parallel connection. In particular, space constraints and theoretical offsets make it difficult to use when connecting 8 chips in parallel.
Two sets of chips are arranged symmetrically on the substrate in one dimension, and each set of chips is symmetrical in two dimensions along the cross axis. By utilizing the power topology design of the copper clip and the substrate, combined with the optimization of the drive circuit, overall one-dimensional symmetry and local two-dimensional symmetry are achieved, reducing thermal coupling and improving current sharing.
It achieves high symmetry and current sharing among multiple chips, reduces thermal coupling, improves dynamic current sharing characteristics and module energy density, and is suitable for bridge arms, half-bridges and power modules with multiple chips in parallel.
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Figure CN121646375A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of semiconductor technology, and in particular to a vehicle multi-chip parallel bridge arm, half-bridge and power module. BACKGROUND
[0002] The vehicle silicon carbide power module is rapidly iterating towards high power density and high performance, where high power density requires as many silicon carbide Mosfet chips as possible to be connected in parallel in a limited topology space to improve the outflow capacity, and high performance not only requires the module to have low inductance and high dynamic current sharing, but also requires the thermal coupling between chips to be as small as possible to reduce the junction temperature difference between chips.
[0003] Among them, low inductance is the primary design principle of the power module. In the low inductance design method, three-dimensional packaging methods such as double-sided cooling packaging or flexible circuit board will not only introduce additional material costs, but also require complex processes such as double-sided sintering and large-area welding, which are difficult to process and have high process costs. Therefore, the chip interconnection method based on copper clips is widely used due to its low cost and flexible layout advantages. For example, the application number CN202411108612.2 proposes a multi-chip parallel silicon carbide power module based on copper clip clamping, which realizes the optimization of dynamic current sharing characteristics and inductance while considering thermal coupling.
[0004] However, the existing chip interconnection method based on copper clips has the following problems: (1) The chip parallel topology is widely designed based on traditional planar topology, mainly using copper clips as an alternative to wire bonding, and the advantages of flexible layout of copper clips are not fully utilized; (2) Due to the lack of symmetry in traditional multi-chip parallel topology, complex inductance matching design is required for the copper clip structure corresponding to the source branch of each chip to achieve dynamic current sharing between parallel chips; (3) The design of power modules with symmetric topology is only applicable to 3-4 chip parallel, and when 8 chip parallel is used, it is difficult to use due to space limitations or theoretical deviations. SUMMARY
[0005] Therefore, it is necessary to provide a vehicle multi-chip parallel bridge arm, half-bridge and power module to solve the problems of the existing chip interconnection method based on copper clips: (1) The chip parallel topology is widely designed based on traditional planar topology, mainly using copper clips as an alternative to wire bonding, and the advantages of flexible layout of copper clips are not fully utilized; (2) Due to the lack of symmetry in traditional multi-chip parallel topology, complex inductance matching design is required for the copper clip structure corresponding to the source branch of each chip to achieve dynamic current sharing between parallel chips; (3) The power module design with symmetrical topology is only for 3-4 chips in parallel. When using 8 chips in parallel, it will be difficult to use due to space limitations or theoretical offset.
[0006] In a first aspect, embodiments of the present invention provide a multi-chip parallel bridge arm for automotive applications, comprising a substrate, two sets of chips, two copper clips, and a drive circuit; the two sets of chips are symmetrically arranged one-dimensionally on the substrate along a central axis, and the two sets of chips are electrically connected to each other via the substrate; each set of chips comprises four chips, and the four chips are symmetrically arranged two-dimensionally on the substrate along a cross axis; the two copper clips correspond to the two sets of chips respectively, and each copper clip is electrically connected to the substrate and the corresponding four chips; the drive circuit is disposed on the substrate and electrically connected to the two sets of chips.
[0007] Furthermore, the bridge arm is an upper bridge arm, and both copper clips are upper bridge copper clips. Each upper bridge copper clip includes an upper bridge copper clip body spaced apart from the substrate. The upper bridge copper clip body is elongated and has upper bridge copper clip output terminals at both ends. Both upper bridge copper clip output terminals are connected to the substrate. Upper bridge copper clip source terminal junctions are formed on both sides of each of the two upper bridge copper clip output terminals. The four upper bridge copper clip source terminal junctions are electrically connected to the corresponding four chips.
[0008] Furthermore, the bridge arm is a lower bridge arm, and both copper clips are lower bridge copper clips. Each lower bridge copper clip includes a lower bridge copper clip body spaced apart from the substrate and two suspensions. The lower bridge copper clip body is elongated, with a negative output terminal connected to the substrate at one end, and its other ends connected to one end of each of the two suspensions. The other ends of the two suspensions extend toward the negative output terminal, and each of the two suspensions has two lower bridge copper clip source terminal junctions at both ends. The four lower bridge copper clip source terminal junctions are electrically connected to the corresponding four chips.
[0009] Furthermore, the drive circuit includes an upper bridge arm drive circuit and a lower bridge arm drive circuit. The upper bridge arm drive circuit is electrically connected to the eight chips on the upper bridge arm, and the lower bridge arm drive circuit is electrically connected to the eight chips on the lower bridge arm.
[0010] Furthermore, both the upper bridge arm drive circuit and the lower bridge arm drive circuit include a gate drive terminal, a Kelvin source drive terminal, a gate topology, a gate bonding line, a Kelvin source bonding line, and a Kelvin source topology. The gate drive terminal is electrically connected to the gate topology. The gate topology is connected to the gates of multiple chips via multiple gate bonding lines. The Kelvin sources of multiple chips are connected to the Kelvin source drive terminal after being sequentially connected via Kelvin source bonding lines and Kelvin source topology.
[0011] Further, four chips in one group are one-to-one corresponding to four chips in another group, and a gate bonding wire is connected to the gate of each chip, and two gate bonding wires connected to the two corresponding chips are overlapped and form an overlapping point; When the bridge arm is an upper bridge arm, the two adjacent overlapping points are arranged away from each other; when the bridge arm is a lower bridge arm, the two adjacent overlapping points are arranged close to each other.
[0012] In a second aspect, the embodiments of the present application also provide a multi-chip parallel half-bridge for vehicles, comprising the multi-chip parallel bridge arm for vehicles as described above, the number of the bridge arm is two, the two bridge arms are an upper bridge arm and a lower bridge arm respectively, the center axes of the upper bridge arm and the lower bridge arm are arranged in line and the two are fixedly connected, the upper bridge arm is provided with a power supply end, and the copper clip of the upper bridge arm has a bridge copper clip lower bridge merging end electrically connected to the substrate of the lower bridge arm.
[0013] Further, the half-bridge further comprises a plastic package shell, the plastic package shell wraps the upper bridge arm and the lower bridge arm, and the opposite sides of the substrate of the upper bridge arm and the substrate of the lower bridge arm extend to the outside of the plastic package shell, and the top of the plastic package shell is provided with a welding hole position opposite to the power supply end.
[0014] In a third aspect, the embodiments of the present application also provide a multi-chip parallel power module for vehicles, comprising the multi-chip parallel half-bridge for vehicles as described above, and further comprising a heat dissipation bottom plate, the number of the half-bridge is multiple, and the multiple half-bridges are installed on the heat dissipation bottom plate.
[0015] Compared with the prior art, the two groups of chips of the bridge arm are arranged one-dimensionally along a center axis, and the four chips in each group of chips are arranged two-dimensionally along a cross axis, which can increase the current sharing between the chips; specifically, the advantages of flexible layout of the copper clip are fully utilized, and the power topology design of the copper clip and the substrate not only realizes one-dimensional symmetry between the two groups of chips as a whole, but also realizes two-dimensional symmetry between the four chips in each group of chips locally, thereby increasing the current sharing of the chips; by optimizing the chip spacing, the thermal coupling between the chips is reduced, and the unification of current sharing and heat sharing is realized. BRIEF DESCRIPTION OF DRAWINGS
[0016] Figure 1 The structure schematic diagram of the multi-chip parallel bridge arm for vehicles provided by the embodiments of the present application; Figure 2 The structure schematic diagram of the multi-chip parallel bridge arm for vehicles provided by the embodiments of the present application; Figure 1 The arrangement schematic diagram of the eight chips in the middle; Figure 3 The structure schematic diagram of the one-piece upper bridge copper clip; Figure 1 The structure schematic diagram of the one-piece upper bridge copper clip; Figure 4 The structure schematic diagram of the one-piece upper bridge copper clip;Figure 3 A schematic diagram showing the flow direction of the forward-conducting current in the upper bridge copper clip of the chip; Figure 5 for Figure 1 A schematic diagram of the split-type upper bridge copper clamp; Figure 6 for Figure 1 Schematic diagram of the structure of the copper clamp in the middle and lower bridge; Figure 7 for Figure 6 A schematic diagram showing the flow direction of the forward-conducting current in the lower bridge copper clip of the chip; Figure 8 for Figure 1 Schematic diagram of the drive circuit in the middle; Figure 9 for Figure 8 Schematic diagram of the drive circuit in the middle; Figure 10 for Figure 9 A schematic diagram of the current flow direction in the drive circuit of the upper and middle bridge arms; Figure 11 for Figure 8 A schematic diagram of the drive circuit with a drive resistor in another embodiment; Figure 12 This is a schematic diagram of the structure of a multi-chip parallel half-bridge for automotive applications provided in an embodiment of the present invention; Figure 13 for Figure 12 Schematic diagram of the internal encapsulated housing; Figure 14 for Figure 12 Schematic diagram of the structure of the external plastic-encapsulated housing; Figure 15 for Figure 12 A schematic diagram of the structure of the negative extreme part of the split type; Figure 16 This is a schematic diagram of the structure of a multi-chip parallel power module for vehicles provided in an embodiment of the present invention. Detailed Implementation
[0017] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.
[0018] The bridge arm, half-bridge, and power module in this embodiment of the invention are applicable to the parallel connection of multiple silicon carbide MOSFET chips. The structure and working principle of the bridge arm, half-bridge, and power module are described and explained in detail below.
[0019] In the first aspect, such as Figures 1-2As shown, this embodiment of the invention provides a multi-chip parallel bridge arm for automotive applications, including a substrate 100, two sets of chips 200, two copper clips 300, and a drive circuit 400. The two sets of chips 200 are symmetrically arranged one-dimensionally on the substrate 100 along a central axis L1, and the two sets of chips 200 are electrically connected to each other via the substrate 100. Each set of chips 200 includes four chips 200, which are symmetrically arranged two-dimensionally on the substrate 100 along a cross axis L2. The two copper clips 300 correspond to the two sets of chips 200 respectively, and each copper clip 300 is electrically connected to the substrate 100 and the corresponding four chips 200. The drive circuit 400 is disposed on the substrate 100 and electrically connected to the two sets of chips 200.
[0020] In implementation, the two sets of chips 200 in the bridge arm are arranged symmetrically in one dimension along a central axis L1, and the four chips 200 in each set are symmetrically arranged in two dimensions along a cross axis L2, which can increase the current sharing among the chips 200. Specifically, the flexible layout of the copper clip 300 is fully utilized. Combined with the power topology design of the copper clip 300 and the substrate 100, not only is one-dimensional symmetry between the two sets of chips 200 achieved as a whole, but also two-dimensional symmetry among the four chips 200 in each set is achieved locally, increasing the current sharing among the chips 200. By optimizing the spacing between the chips 200, the thermal coupling between the chips 200 is reduced, and the unity of current sharing and heat sharing is achieved.
[0021] In this embodiment, the substrate 100 has a sandwich structure with copper layers on the top and bottom and an insulating ceramic layer in the middle. The upper copper layer is etched to form power and drive circuitry. The substrate has AC terminals 110 and a negative terminal 120. It is understood that the substrate 100 is a conventional structure that will be apparent to those skilled in the art, and will not be elaborated upon further here.
[0022] In this embodiment, the chip 200 is mounted on the substrate 100. Specifically, two sets of chips 200 are arranged symmetrically in one dimension on the substrate 100 along a central axis L1, and the two sets of chips 200 are electrically connected through the substrate 100. Each set of chips 200 includes four chips 200, which are arranged symmetrically in two dimensions on the substrate 100 along a cross axis L2. The drain of the chip 200 can be connected to the circuitry of the substrate 100.
[0023] Traditional eight-chip 200 parallel topology solutions are limited by planar circuit topology, with current flowing in through two loops on either side. This only achieves one-dimensional symmetry between the two loops, and the local interconnection imbalance of the chips 200 within each loop leads to a decrease in heat dissipation capacity when the topological area of the substrate 100 decreases. This necessitates increasing the spacing between the chips 200 to reduce thermal coupling, which can cause dynamic current mismatch between the parallel chips 200 and potentially lead to loop oscillation. In contrast, the eight-chip 200 layout in this application allows the eight chips 200 to be arranged not only one-dimensionally symmetrically along a central axis L1 but also two-dimensionally symmetrically along a cross axis L2, significantly improving the symmetry of the parallel multi-chip 200 arrangement.
[0024] In this embodiment, the copper clip 300 is used to connect the chips 200 of the corresponding group so that the four chips 200 in the corresponding group can be connected in parallel. The two copper clips 300 correspond to the two groups of chips 200 respectively, and each copper clip 300 is electrically connected to the substrate 100 and the corresponding four chips 200.
[0025] In one embodiment, the bridge arm further includes copper bonding wires 210, which interconnect the two symmetrical sets of chips 200 through copper bonding wires bonded to the copper cladding layer of the substrate 100, and can be used to balance the potential between the two sets of chips 200.
[0026] It is understandable that by designing the structure of the copper clip 300, the current is introduced into the center symmetry point of the equivalent magnetic field within each loop using the copper clip 300, thereby achieving two-dimensional equivalent symmetry of the magnetic field distribution of the four local chips 200, which greatly improves the current sharing of multi-core parallel connection.
[0027] Based on their different functions, the above-mentioned bridge arms can be divided into upper bridge arms and lower bridge arms, which will be described and explained below.
[0028] like Figure 3 As shown, in one embodiment, the bridge arm is an upper bridge arm, and both copper clips 300 are upper bridge copper clips 310. The upper bridge copper clip 310 includes an upper bridge copper clip body 311 spaced apart from the substrate 100. The upper bridge copper clip body 311 is elongated, and upper bridge copper clip output terminals 312 are formed at both ends. Both upper bridge copper clip output terminals 312 are connected to the substrate 100. Upper bridge copper clip source terminal input terminals 313 are formed on both sides of the two upper bridge copper clip output terminals 312. The four upper bridge copper clip source terminal input terminals 313 are electrically connected to the corresponding four chips 200 respectively. Understandably, the structural design of the upper bridge copper clip 310 is key to achieving the symmetrical layout of the upper bridge arm. The source terminal 313 of the four equal-shaped upper bridge copper clips is respectively soldered to the source pads of the four chips 200 in the corresponding group, guiding the current of the four branches to the output terminal 312 of the upper bridge copper clip. The output terminal 312 of the upper bridge copper clip is sintered on the copper layer on the substrate 100 and guides the current to the AC output terminal of the half bridge.
[0029] It is understandable that the upper bridge copper clip 310 can be adopted as follows: Figure 3 The integrated structure shown is manufactured by methods such as stamping. Meanwhile, the upper bridge copper clip 310 can also be manufactured using methods such as... Figure 5 The split structure shown in the figure uses bonding wire instead of copper clip body 311 on the upper bridge.
[0030] like Figure 4 As shown, the specific current flow direction is as follows: Figure 4 As shown, the current from the four chips 200 flows to the four upper bridge copper clip source terminals 313 respectively. The four upper bridge copper clip source terminals 313 all connect the current to the corresponding upper bridge copper clip output terminals 312 through arched cantilever arms, and transfer the current to the substrate 100. The current flows on the substrate 100 in a direction parallel to the central axis L1 (as shown by the arrow in the dotted line part of the figure), and finally flows into the AC output terminal 110 of the substrate 100.
[0031] Meanwhile, the current on the upper bridge copper clip body 311 always flows in the same direction as the current on the substrate below it. This configuration achieves two goals: First, it increases current carrying capacity. Since both the upper bridge copper clip and the substrate below are relatively narrow, excessive current can occur when the flow is reversed. Connecting them in parallel improves current carrying capacity. Second, it effectively enhances dynamic current sharing. The connection of the upper bridge copper clip body 311 further reduces the potential difference between the output terminals 312 of the two upper bridge copper clips, thereby improving the current sharing of the four corresponding chips 200. The bonding wires serve a similar purpose. Furthermore, the current in the upper bridge copper clip body 311 and the positive terminal 500 will generate a negative coupling relationship, further reducing the difference in source potential between the upper and lower rows of chips, which helps with current sharing. However, the effect of this measure is limited, so a separate bonding wire solution is also acceptable.
[0032] like Figure 6 As shown, in another embodiment, the bridge arm is a lower bridge arm, and both copper clips 300 are lower bridge copper clips 320. The lower bridge copper clip 320 includes a lower bridge copper clip body 321 spaced apart from the substrate 100 and two suspensions 323. The lower bridge copper clip body 320 is elongated. One end of the lower bridge copper clip body 320 forms a negative output terminal 322 connected to the substrate 100, and the two sides of its other end are respectively connected to one end of the two suspensions 323. The other ends of the two suspensions 323 extend toward the negative output terminal 322. Two lower bridge copper clip source terminal 324 are formed at both ends of the two suspensions 323. The four lower bridge copper clip source terminal 324 are electrically connected to the four corresponding chips 200 respectively.
[0033] Understandably, the length and width of the lower bridge copper clip body 321 and the two suspensions 323 can be adaptively adjusted according to design requirements. At the same time, the positions of the two suspensions 323 relative to the lower bridge copper clip body 321 can also be adjusted to fully balance the self-inductance of the four chip 200 power circuits formed by the lower bridge arm and the difference in mutual inductance with other power circuits, thereby improving the current sharing of the four chips.
[0034] like Figure 7 As shown, current flows from the AC terminal and through the upper bridge copper clip into the lower bridge arm (not shown). The two chips channel current to the suspension 323 via the corresponding two lower bridge copper clip source terminals 324, and the current from the other two lower bridge copper clip source terminals 324 merges and flows through the lower bridge copper clip body 321. It can be understood that by adjusting the two suspension 323 input points, the self-inductance of the corresponding circuit can be adjusted by offsetting the mutual inductance with the lower bridge copper clip body 321, and the mutual inductance with other power components, especially the positive input terminal 500, can be adjusted, thereby achieving overall magnetic field coupling balance.
[0035] The current from the upper bridge arm flows into the lower bridge arm via the upper bridge copper clip lower bridge inlet 314. A current-guiding groove is formed on the copper-clad portion of the substrate 100 corresponding to the lower bridge arm, which can guide the current to the symmetrical region of the drain center of the four locally parallel chips 200, thereby ensuring the symmetry of the parallel drain branches corresponding to the four chips 200. The structural design of the lower bridge copper clip 320 is also key to achieving the symmetrical layout of the lower bridge. The four equally shaped lower bridge copper clip source inlets 324 are respectively soldered to the source pads of the four chips 200 in the corresponding group, guiding the current of the four branches to the negative output terminal 322 of the lower bridge copper clip.
[0036] In one embodiment, each of the two copper clamps 300 is provided with a plurality of semi-circular unloading grooves and / or rounded rectangular unloading grooves and / or cross-shaped unloading grooves to alleviate stress and strain caused by the processing and power cycle process.
[0037] like Figure 8 As shown, in one embodiment, a drive circuit 400 is further included. The drive circuit 400 is disposed on the substrate 100 and is electrically connected to two sets of chips 200. In this embodiment, the drive circuit 400 includes an upper bridge arm drive circuit 410 and a lower bridge arm drive circuit 420. The upper bridge arm drive circuit 410 is electrically connected to eight chips 200 on the upper bridge arm, and the lower bridge arm drive circuit 420 is electrically connected to eight chips 200 on the lower bridge arm.
[0038] like Figure 9As shown, both the upper bridge arm drive circuit 410 and the lower bridge arm drive circuit 420 include a gate drive terminal 411, a Kelvin source drive terminal 413, a gate topology 412, a gate bonding line 417, a Kelvin source bonding line 414, and a Kelvin source topology 415. The gate drive terminal 411 is electrically connected to the gate topology 412. The gate topology 412 is connected to the gates 20a of multiple chips 200 via multiple gate bonding lines 417. The Kelvin sources 20b of multiple chips 200 are connected to the Kelvin source drive terminal 413 after being connected sequentially via the Kelvin source bonding line 414 and the Kelvin source topology 415.
[0039] Taking the upper bridge arm as an example, the circuit routing and layout will now be explained in detail, such as... Figure 10 As shown, among the four chips on the same side (for ease of explanation, the chips are numbered below along the circuit flow direction, i.e., chip 1, chip 2, chip 3, and chip 4), one of the Kelvin sources 20b of chip 1 is connected to the Kelvin source 20b of chip 1 in another group of chips via Kelvin source bonding line 414. The other Kelvin source 20b of chip 1 is connected to one of the Kelvin sources 20b of chip 2 via Kelvin source bonding line 414. Another Kelvin source 20b is connected to one of the Kelvin sources 20b of the third chip via Kelvin source bonding line 414, Kelvin source topology 415, and Kelvin source bonding line 414. The other Kelvin source 20b of the third chip is connected to one of the Kelvin sources 20b of the fourth chip via Kelvin source bonding line 414. The other Kelvin source 20b of the fourth chip is connected to the Kelvin source driver terminal 413 via Kelvin source bonding line 414. Simultaneously, the gates 20a of the multiple chips 200 are all connected to the gate driver terminal 411 via gate topology 412.
[0040] It is understandable that there are two Kelvin source drive terminals 413, which are disposed opposite to each other on both sides of the gate drive terminal 411 and correspond to the two sets of chips respectively.
[0041] With the above configuration, the gate line and Kelvin source line of each chip 200 are arranged in an anti-interleaved manner, so that the path through which the drive current of each chip 200 flows is roughly the same, avoiding excessive differences in drive circuit impedance, which helps to reduce the current oscillation of the chip at the switching moment.
[0042] In one embodiment, four chips in one group correspond one-to-one with four chips in another group. Each chip has a gate bonding line 417 connected to its gate. The two gate bonding lines 417 connected to two corresponding chips overlap to form an overlap point. When the bridge arm is the upper bridge arm, two adjacent overlap points are set far apart from each other; when the bridge arm is the lower bridge arm, two adjacent overlap points are set close to each other.
[0043] The specific discussion is as follows: Dynamic current sharing can be achieved when the voltages (Vgs) across the gate and source terminals of the parallel SiC MOSFET chips are the same at switching times. To achieve this, the following conditions must be met: the sum of the voltage drops of the power source and gate lines of the parallel chips must be the same, and the voltage drops of both lines must include self-inductance and mutual inductance voltage drops generated by coupling with other power lines, i.e., power source self-inductance voltage drop, mutual inductance voltage drop of the source line, gate self-inductance voltage drop, and mutual inductance voltage drop of the gate line. Utilizing symmetry is an effective way to achieve the above conditions, but a completely symmetrical layout is difficult to have commercial value. This patent will utilize the complex mutual inductance coupling relationship existing within the module, and through the joint design of copper clips and drive topology, minimize the difference in Vgs between parallel chips, thereby enabling the module to have good dynamic current sharing characteristics.
[0044] First, regarding the upper bridge arm, the upper bridge copper clip 310 has dual bus end faces, and the gate bonding lines 417 of the parallel chips 200 on the same side are spaced as far apart as possible on the substrate 100. Through parameter calculations, this patent shows that when the proposed dual bus upper bridge copper clip 310 design is adopted, the source potential difference of the parallel chips 200 is minimized. Furthermore, the upper bridge copper clip 311 also utilizes mutual inductance coupling to further reduce the source potential difference of the parallel chips. The design of the far-away gate bonding lines 417 is to further compensate for the potential difference between the sources of the parallel chips 200. Second, regarding the lower bridge arm, due to structural influences, the bias trend of the mutual inductance voltage drop in the source circuit coupling of the power topology in the parallel chips 200 is opposite to that of the upper bridge. Reverse compensation is needed for the mutual inductance voltage drop on the gate of the power topology. When the landing points of the adjacent gate bonding lines 417 on the substrate 100 are as close as possible, the maximum compensation value can be obtained, thereby promoting dynamic current sharing between chips.
[0045] Optionally, the Kelvin source bonding wire 414 is bonded to the symmetrical Kelvin source pads 20b on both sides near the gate drive terminal 411. If the SiC chip 200 has good consistency, this bonding wire can achieve potential balance of the Kelvin source lines on both sides, which is beneficial for dynamic current sharing. However, if the chip 200 has large differences, it is not recommended to use this bonding wire to avoid generating a large current on the bonding wire due to the voltage difference of the power circuits on both sides. In addition, power modules usually need to bring out the upper bridge arm drain terminal for short-circuit protection. This patent application uses a topology design with copper overlay near the AC output side to bring out the drain voltage to the upper bridge drain terminal 416.
[0046] like Figure 11 As shown, in another embodiment, the gate topology 412 consists of a plurality of drive resistors 418, and the gate drive terminal 411 is connected to the gates 20a of a plurality of chips 200 via the plurality of drive resistors 418. The drive resistors 418 play a key role in suppressing the turn-off oscillations of the parallel chips 200 and can optimize dynamic current sharing.
[0047] The function of the drive resistor is described as follows: Each chip 200 has a corresponding drive resistor 418. During the turn-off process of chip 200, a portion of the current in the power circuit is coupled to the drive circuit through the chip's excitation capacitor. When the parasitic parameters of the drive circuits between parallel chips are mismatched, the drive voltage of some chips will be raised or even mistakenly turned on, ultimately causing oscillation. The drive resistor corresponding to each chip can effectively absorb the above-mentioned coupling current, thereby effectively suppressing the potential risk of turn-off oscillation. Furthermore, the drive resistor can absorb the gate-source voltage drop caused by the asymmetry in the layout of parallel chips, optimizing the dynamic current sharing characteristics among parallel chips.
[0048] In one embodiment, thermocouples and their temperature signal terminals are designed at the corners of the half-bridge.
[0049] In the second aspect, such as Figure 12 As shown, this embodiment of the invention also provides a half-bridge for parallel connection of automotive multi-chips 200, including the above-mentioned parallel connection of automotive multi-chips 200 bridge arms. The number of bridge arms is two, namely an upper bridge arm and a lower bridge arm. The central axis L1 of the upper bridge arm and the lower bridge arm are collinear and fixedly connected. A power supply terminal is provided on the upper bridge arm. The copper clip 300 of the upper bridge arm has a lower bridge inlet terminal that is electrically connected to the substrate 100 of the lower bridge arm.
[0050] This half-bridge design ensures high symmetry among multiple chips and fully considers the impact of thermal coupling between chips 200. Firstly, a large spacing is designed in the vertical direction to weaken thermal coupling at the vertical level; secondly, a uniform spacing and appropriate edge distance are designed in the horizontal direction to achieve uniform thermal coupling laterally. One of the core aspects of this patent application is the full utilization of the copper-clad substrate layout space created to reduce thermal coupling of chips 200, combined with the structural design of the copper clip 300 to facilitate the inflow and outflow of power current.
[0051] To facilitate power supply to the half-bridge, in one embodiment, the half-bridge further includes a positive terminal 500 and four solder pads 600. The four solder pads 600 are arranged sequentially on the substrate 100 of the upper bridge arm along a direction perpendicular to the central axis L1. Each solder pad 600 is positioned between two adjacent chips 200. The positive terminal 500 has four connection points 510 that are respectively connected to the four solder pads 600. Current flows in from the solder pads 600, splits into four branches flowing to the drains of the four adjacent parallel chips 200, and then flows into the upper bridge copper clip 310. The upper bridge copper clip 310 collects the current from the four chips 200 and then delivers the current to the lower bridge arm.
[0052] like Figure 13 As shown, in one embodiment, the half-bridge further includes a molding compound housing 700, which encapsulates the upper and lower bridge arms. The opposite sides of the substrate 100 of the upper and lower bridge arms extend to the outside of the molding compound housing 700. The top of the molding compound housing 700 has solder holes 710 facing the power supply terminals. Except for the positive and negative terminals and the AC output terminals, the entire half-bridge is sealed with epoxy resin injection molding, providing mechanical support, insulation, and sealing isolation, while exposing the laser-welded portion of the positive terminal 500.
[0053] The plastic encapsulation housing 700 can be adjusted according to the position of the terminals on the substrate 100, such as... Figure 14 As shown, for example, the negative terminal and AC output terminal are externally soldered like the positive terminal, and solder countersunk holes flow out at the corresponding positions.
[0054] In one embodiment, such as Figure 15 As shown, a split negative terminal 130 is used, that is, there are two negative terminals 130. Each terminal is symmetrical with the corresponding chip topology along the center line L1, which will further avoid the current difference of parallel chips caused by AC skin effect and improve current sharing.
[0055] In the third aspect, such as Figure 16 As shown, this embodiment of the invention also provides a power module for parallel connection of 200 automotive multi-chips, including the above-mentioned parallel connection of 200 automotive multi-chips half-bridges, and a heat sink base plate 800. The number of half-bridges is multiple, and the multiple half-bridges are mounted on the heat sink base plate.
[0056] Multiple half-bridges are located on one side of the heat dissipation base plate 800, and multiple pin fins are arranged in an array on the other side of the heat dissipation base plate 800 to improve heat dissipation efficiency.
[0057] Compared with existing technologies: 1) The half-bridge topology proposed in this patent application not only has a stacked effect between the positive and negative terminals, but also the mutual inductance cancellation relationship can be formed by the local circuits of the positive terminal 500, copper clip 300, and copper-plated substrate 100, so that the overall low inductance can be achieved. 2) The branches composed of 8 parallel chips 200 in the upper and lower bridge arms present a high degree of symmetry, which can achieve good dynamic and static current sharing. 3) The larger spacing between chips 200 can reduce thermal coupling between chips 200, thereby improving the heat dissipation of parallel chips 200 and upper and lower bridge chips 200; 4) In the driving circuit 400 proposed in this patent, the gate branch and the Kelvin source branch have an interleaved layout, which can reduce the impedance difference between the parallel chips 200 and help suppress current ringing during switching. 5) The half-bridge topology proposed in this patent application is compact and can accommodate eight 5x5mm SiC chips 200 in parallel within the copper-clad space of the substrate 100 of approximately 42mm x 62mm. Furthermore, due to the effective suppression of thermal coupling, the outflow capability of the module can be improved to a certain extent, and it has high energy density characteristics.
[0058] The above are merely preferred embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.
Claims
1. A multi-chip parallel bridge arm for a vehicle, characterized by, include: substrate; Two sets of chips are arranged symmetrically in one dimension on the substrate along a central axis, and the two sets of chips are electrically connected through the substrate. Each set of chips includes four chips, which are arranged symmetrically in two dimensions on the substrate along a cross axis. Two copper clips, each corresponding to one of the two sets of chips, and each copper clip is electrically connected to the substrate and the corresponding four chips; A drive circuit is disposed on the substrate and electrically connected to the two sets of chips.
2. The multi-chip parallel bridge leg for an electric vehicle of claim 1, wherein, The bridge arm is an upper bridge arm, and both copper clips are upper bridge copper clips. Each upper bridge copper clip includes an upper bridge copper clip body spaced apart from the substrate. The upper bridge copper clip body is elongated and has upper bridge copper clip output terminals at both ends. Both upper bridge copper clip output terminals are connected to the substrate. Upper bridge copper clip source terminal is formed on both sides of each of the two upper bridge copper clip output terminals. The four upper bridge copper clip source terminal are electrically connected to the corresponding four chips.
3. The multi-chip parallel bridge leg for an electric vehicle of claim 1, wherein, The bridge arm is a lower bridge arm, and both copper clips are lower bridge copper clips. Each lower bridge copper clip includes a lower bridge copper clip body spaced apart from the substrate and two suspensions. The lower bridge copper clip body is elongated, with a negative output terminal connected to the substrate at one end, and the other two ends connected to one end of each of the two suspensions. The other ends of the two suspensions extend toward the negative output terminal, and each of the two suspensions has two lower bridge copper clip source terminal formed at both ends. The four lower bridge copper clip source terminal are electrically connected to the corresponding four chips.
4. The multi-chip parallel bridge leg for an electric vehicle of claim 1, wherein, The drive circuit includes an upper bridge arm drive circuit and a lower bridge arm drive circuit. The upper bridge arm drive circuit is electrically connected to the eight chips on the upper bridge arm, and the lower bridge arm drive circuit is electrically connected to the eight chips on the lower bridge arm.
5. The multi-chip parallel bridge leg for an electric vehicle of claim 4, wherein, Both the upper bridge arm drive circuit and the lower bridge arm drive circuit include a gate drive terminal, a Kelvin source drive terminal, a gate topology, a gate bonding line, a Kelvin source bonding line, and a Kelvin source topology. The gate drive terminal is electrically connected to the gate topology. The gate topology is connected to the gates of multiple chips via multiple gate bonding lines. The Kelvin sources of multiple chips are connected to the Kelvin source drive terminal after being connected sequentially via Kelvin source bonding lines and Kelvin source topology.
6. The multi-chip parallel half bridge for an electric vehicle of claim 5, wherein, Four chips in one group correspond one-to-one with four chips in another group. Each chip has a gate bonding wire connected to its gate. The two gate bonding wires connected to the corresponding two chips overlap to form an overlap point. When the bridge arm is the upper bridge arm, the two adjacent overlapping points are set far apart from each other; when the bridge arm is the lower bridge arm, the two adjacent overlapping points are set close to each other.
7. A multi-chip parallel half-bridge for use in an electric vehicle, characterized in that The vehicle multi-chip parallel bridge arm as claimed in any one of claims 1-6, wherein the number of the bridge arms is two, the two bridge arms are respectively an upper bridge arm and a lower bridge arm, the center axes of the upper bridge arm and the lower bridge arm are arranged in line and the two bridge arms are fixedly connected, the upper bridge arm is provided with a power supply end, and the copper clip of the upper bridge arm has a bridge copper clip lower bridge merging end electrically connected with the substrate of the lower bridge arm.
8. The multi-chip parallel half bridge for an electric vehicle of claim 7, wherein, The half-bridge further comprises a plastic package shell, the plastic package shell wraps the upper bridge arm and the lower bridge arm, and the opposite sides of the substrate of the upper bridge arm and the substrate of the lower bridge arm extend to the outside of the plastic package shell, and the top of the plastic package shell is provided with a welding hole position opposite to the power supply end.
9. A multi-chip parallel power module for an electric vehicle, characterized by comprising: The vehicle multi-chip parallel half-bridge as claimed in any one of claims 7-8, further comprising a heat dissipation bottom plate, and the number of the half-bridges is multiple, and the multiple half-bridges are mounted on the heat dissipation bottom plate.
Citation Information
Patent Citations
Multi-chip parallel silicon carbide power module based on copper clips
CN119008602A