A semiconductor chip test information automatic analysis system and method
By constructing an automatic analysis system for semiconductor chip test information, the problem of insufficient multi-dimensional discrimination information was solved, and the accuracy of dynamic influence network modeling and anomaly analysis was improved, thereby enhancing the anomaly analysis capability of semiconductor chip testing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- 弘润半导体(苏州)有限公司
- Filing Date
- 2026-02-03
- Publication Date
- 2026-05-15
AI Technical Summary
Existing semiconductor chip testing technologies lack multi-dimensional information, ignore wafer spatial distribution, timing dependence and consistency, and fail to construct a dynamic influence network between test parameters, resulting in insufficient accuracy of anomaly analysis models.
By establishing a real-time streaming connection channel with multi-source testing equipment, instant purification and context labeling are performed to generate a standardized test data set. Parameter baseline values are calculated and multi-dimensional discriminative features are extracted. A parameter influence network model is constructed, and anomaly propagation simulation algorithms are applied to analyze dynamic interaction relationships. Anomaly analysis reports are generated, and structured conclusions and visualizations are presented through an intelligent diagnostic mechanism.
It achieves comprehensive representation of multi-dimensional discriminative information, enhances the expressive power of test feature vectors, breaks through the limitations of isolated parameter threshold triggering, and improves the accuracy of anomaly analysis and the efficiency of root cause localization.
Smart Images

Figure CN121659174B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of information analysis technology, and in particular to an automatic analysis system and method for semiconductor chip test information. Background Technology
[0002] Semiconductor chip testing technology, along with the continuous evolution of integrated circuit process nodes, has gradually developed from early single-function verification to a multi-dimensional comprehensive evaluation system covering DC parameters, AC characteristics, RF performance, and complex function vectors. With the widespread application of advanced processes and three-dimensional heterogeneous integration, chip test data has experienced explosive growth, with data sources encompassing various heterogeneous platforms such as automated test equipment and wafer-level probe stations. Traditional test information analysis mainly relies on static threshold rules and human experience judgment, using fixed upper and lower limits for single test parameters to screen for anomalies, supplemented by statistical process control charts to monitor process drift.
[0003] However, there are still areas for improvement in existing test information methods. First, feature extraction is limited to single-parameter statistics, ignoring multi-dimensional discrimination information such as wafer spatial distribution, temporal dependence, and consistency, resulting in insufficient expressive power of test feature vectors. Second, existing anomaly analysis models are generally based on isolated parameter threshold triggers, failing to construct a dynamic influence network between test parameters, let alone achieve energy decay quantification of influence paths and topological sorting of core root causes through anomaly propagation simulation. Summary of the Invention
[0004] In view of the aforementioned existing problems, the present invention is proposed.
[0005] Therefore, this invention provides an automatic analysis method for semiconductor chip test information to solve the problem of failing to construct a dynamic influence network between test parameters.
[0006] To solve the above-mentioned technical problems, the present invention provides the following technical solution:
[0007] In a first aspect, the present invention provides an automatic analysis method for semiconductor chip test information, comprising,
[0008] Establish a real-time streaming connection channel with multi-source testing equipment to acquire chip test data streams. Use an adaptive cleaning algorithm to perform real-time purification and context labeling on the chip test data streams to generate a standardized test data set.
[0009] The baseline values of parameters are calculated based on the standardized test data set, and multi-dimensional discriminative features are extracted based on the baseline values of parameters to generate test feature vectors.
[0010] The test feature vectors are injected into the parameter influence network model. The dynamic interaction relationship between the test parameters is analyzed by the anomaly propagation simulation algorithm. Based on the dynamic interaction relationship, root cause sorting and influence path tracing are performed to generate an anomaly analysis report.
[0011] The anomaly analysis report triggers the intelligent diagnostic mechanism, which generates structured conclusions by matching historical case data, and simultaneously activates the visualization function to interactively present the structured conclusions.
[0012] As a preferred embodiment of the automatic analysis method for semiconductor chip test information described in this invention, the method includes: establishing a real-time streaming connection channel with multi-source test equipment to acquire chip test data streams; and performing real-time purification and context labeling processing on the chip test data streams using an adaptive cleaning algorithm to generate a standardized test data set. Specifically:
[0013] Establish multiple data interfaces with automated test equipment, wafer-level test equipment and manufacturing execution equipment, configure real-time streaming protocols, acquire chip test data streams, and perform format parsing to extract timestamps, test parameters and device identifiers;
[0014] Contextual tag metadata is generated by associating the manufacturing background information of the chip with the device identifier;
[0015] The dynamic thresholds of test parameters are calculated based on the chip test data stream. After removing data points that exceed the dynamic thresholds, the remaining data points are normalized and integrated with context tag metadata to generate a standardized test data set.
[0016] As a preferred embodiment of the automatic analysis method for semiconductor chip test information described in this invention, the step of calculating parameter benchmark values based on a standardized test data set and extracting multi-dimensional discriminative features based on the parameter benchmark values to generate a test feature vector specifically includes:
[0017] Extract the test parameter sequence of the current test batch from the standardized test dataset, calculate the mean and standard deviation of each test parameter using a sliding window, generate dynamic parameter benchmark values, calculate the deviation from the test parameters, and obtain the deviation feature vector;
[0018] Extract wafer coordinate information from a standardized test dataset, calculate the spatial distribution characteristics of parameters based on the wafer coordinate system, and generate a spatial feature vector;
[0019] Perform consistency analysis on multiple test records of the same chip, calculate the variance between test parameter values, and generate a consistency feature vector;
[0020] Perform time series analysis on the test parameter sequence to extract the changing trend of the test parameters over time and generate a time series feature vector;
[0021] The deviation feature vector, spatial feature vector, consistency feature vector, and temporal feature vector are concatenated in terms of dimensions and mapped to a unified feature space through a feature dimensionality reduction algorithm to generate a test feature vector.
[0022] As a preferred embodiment of the automatic analysis method for semiconductor chip test information described in this invention, the step of injecting test feature vectors into a parameter influence network model and analyzing the dynamic interaction relationship between test parameters through anomaly propagation simulation algorithm specifically includes:
[0023] Construct a parameter influence network model based on a graph structure, with test parameters as nodes and statistical correlations and causal relationships between test parameters as edges, and initialize edge weights;
[0024] The test feature vector is input as a parameter to influence the network model, update the nodes, recalculate the edge weights based on the nodes, and generate a dynamic interaction graph.
[0025] Perform anomaly detection on the dynamic interaction graph, calculate the deviation of the feature value of each node from the historical good product data, and identify abnormal nodes whose deviation exceeds the preset deviation threshold.
[0026] For abnormal nodes, an abnormal propagation simulation algorithm is applied to simulate the diffusion path of abnormal signals along the graph boundary, calculate the attenuation coefficient of abnormal signals between each node, extract the main propagation path of abnormal signals, and generate an abnormal propagation path sequence.
[0027] Cluster analysis is performed on the nodes in the abnormal propagation path sequence to identify the core abnormal region and generate intermediate analysis results.
[0028] As a preferred embodiment of the automatic analysis method for semiconductor chip test information described in this invention, the step of generating an anomaly analysis report based on the dynamic interaction relationship for root cause sorting and impact path tracing specifically includes:
[0029] Based on the intermediate analysis results, extract the test parameter names corresponding to the abnormal nodes in the core abnormal region, calculate the correlation between the test parameter names and the parameters of historical abnormal cases, and generate a candidate list of abnormal parameters.
[0030] Based on the dynamic interaction graph, the in-degree and out-degree of each abnormal node are extracted, the causal influence weights on other nodes are calculated, and the candidate list of abnormal parameters is sorted to generate a root cause parameter priority sequence.
[0031] By using abnormal propagation path sequences, the propagation direction and impact range of abnormal signals are traced, and an impact path map is generated;
[0032] The anomaly analysis report is generated by integrating the candidate list of abnormal parameters, the priority sequence of root cause parameters, and the impact path map.
[0033] As a preferred embodiment of the automatic analysis method for semiconductor chip test information described in this invention, the step of invoking an intelligent diagnostic mechanism based on the anomaly analysis report and generating structured conclusions through matching with a historical case database specifically includes:
[0034] Extract a list of abnormal parameters and a priority sequence of root cause parameters from the anomaly analysis report, and build a historical case library;
[0035] The parameters in the abnormal parameter list are vectorized to generate abnormal feature vectors. These vectors are then matched with the feature vectors of cases in the historical case library based on similarity. The historical cases with the highest similarity are selected, and the corresponding root cause labels and processing suggestions are extracted.
[0036] An anomaly level assessment is generated based on the root cause parameter priority sequence and the extracted root cause labels.
[0037] The abnormality level assessment, root cause labeling, and treatment recommendations are compiled into a structured diagnostic conclusion.
[0038] As a preferred embodiment of the automatic analysis method for semiconductor chip test information described in this invention, the synchronous activation of the visualization function to interactively present the structured conclusions refers to converting the structured diagnostic conclusions and anomaly analysis reports into a three-dimensional network topology diagram, a color-coded heatmap, and a dynamic bar chart.
[0039] As a preferred embodiment of the automatic analysis method for semiconductor chip test information described in this invention, the calculation is based on the parameter spatial distribution characteristics of the wafer coordinate system, specifically as follows:
[0040] The wafer coordinate information of each chip is extracted from the standardized test data set, a two-dimensional distribution map is generated, and the grid is divided to calculate the statistical characteristics of the test parameters of each grid.
[0041] Based on statistical characteristics, a parameter spatial distribution feature matrix is constructed, and spatial autocorrelation analysis is applied to calculate the parameter correlation between adjacent grids. After generating spatial correlation coefficients, abnormal distribution regions in the wafer coordinate system are extracted to obtain abnormal distribution feature vectors.
[0042] The abnormal distribution feature vector and the deviation feature vector are fused to generate a spatial feature vector.
[0043] As a preferred embodiment of the automatic analysis method for semiconductor chip test information described in this invention, the deviation between the feature value of each node and the historical good product data refers to calculating the Euclidean distance between the test feature vector in the dynamic interaction relationship graph and the baseline feature distribution in the historical good product data.
[0044] Secondly, the present invention provides an automatic analysis system for semiconductor chip test information, including a data acquisition module, which establishes a real-time streaming connection channel with multi-source test equipment, acquires chip test data streams, and performs real-time purification and context labeling processing on the chip test data streams through an adaptive cleaning algorithm to generate a standardized test data set.
[0045] The extraction module calculates the parameter baseline value based on the standardized test data set, and performs multi-dimensional discriminative feature extraction based on the parameter baseline value to generate a test feature vector;
[0046] The analysis module injects the test feature vectors into the parameter influence network model, analyzes the dynamic interaction relationship between test parameters through anomaly propagation simulation algorithm, and performs root cause sorting and influence path tracing based on the dynamic interaction relationship to generate anomaly analysis report.
[0047] The matching module invokes the intelligent diagnostic mechanism based on the anomaly analysis report, generates structured conclusions through matching with the historical case library, and simultaneously activates the visualization function to interactively present the structured conclusions.
[0048] The beneficial effects of this invention are as follows: By extracting wafer coordinate information from a standardized test dataset and combining it with mesh partitioning and spatial autocorrelation analysis to generate spatial feature vectors, performing consistency analysis on multiple test records of the same chip to generate consistency feature vectors, and performing time-series analysis on test parameter sequences to generate time-series feature vectors, a comprehensive representation of multi-dimensional discriminative information is achieved, overcoming the shortcomings of existing methods that are limited to single-parameter statistics and improving the expressive power of test feature vectors. In addition, by constructing a parameter influence network model and applying anomaly propagation simulation algorithm to generate anomaly propagation path sequences, dynamic interaction modeling between parameters, quantification of influence path energy decay, and topological sorting of core root causes are achieved, breaking through the limitation of isolated parameter threshold triggering in existing models and improving the accuracy of anomaly analysis. Attached Figure Description
[0049] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0050] Figure 1 A flowchart for an automated method for analyzing semiconductor chip test information.
[0051] Figure 2 This is a flowchart for data collection and standardized processing.
[0052] Figure 3 This is a flowchart for feature extraction and anomaly analysis.
[0053] Figure 4 A flowchart for intelligent diagnosis and visualization. Detailed Implementation
[0054] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0055] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.
[0056] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.
[0057] Reference Figures 1-4 This is one embodiment of the present invention, which provides an automatic analysis method for semiconductor chip test information, including the following steps:
[0058] S1: Establish a real-time streaming connection channel with multi-source testing equipment, acquire chip test data stream, and perform real-time purification and context labeling processing on the chip test data stream through an adaptive cleaning algorithm to generate a standardized test data set;
[0059] S1.1: Automated test equipment, wafer-level test equipment, and manufacturing execution equipment are connected through multiple data interfaces. After configuring a real-time streaming protocol, chip test data streams are continuously transmitted. Upon arrival, the chip test data stream is immediately parsed. The parsing process decomposes the chip test data stream into independent records. Each record contains a timestamp, test parameters, and a device identifier. The timestamp records the time when the test occurred. The test parameters include DC parameters, AC parameters, RF performance, and functional test vectors. The device identifier uniquely corresponds to the device that generated the chip test data stream.
[0060] After the equipment identifier is extracted, the manufacturing background information is retrieved from the database based on the equipment identifier and associated with it. The manufacturing background information includes the wafer number, the number of lithography layers, the process chamber identifier, and the test environment temperature. The association result forms context tag metadata, which is appended to the timestamp and test parameters of each record.
[0061] For the test parameters in the chip test data stream, the sliding window statistical method is used to calculate the mean and standard deviation in the test data stream of the most recent batch of good chips. The dynamic threshold is set according to the three sigma rule in statistics. The upper limit is determined to be the mean plus three times the standard deviation, and the lower limit of the dynamic threshold is the difference between the mean and three times the standard deviation. The test parameter values are compared with the upper and lower limits of the dynamic threshold. Test parameters that exceed the upper limit or fall below the lower limit of the dynamic threshold are marked as invalid and removed. The remaining test parameters are retained and enter into subsequent processing.
[0062] The min-max normalization method is used to map the retained test parameter values to the range of 0 to 1. The normalized test parameter values are then combined with timestamps, device identifiers, and context marker metadata to form a standardized test data set.
[0063] S2: Calculate the parameter baseline value based on the standardized test data set, and perform multi-dimensional discriminative feature extraction based on the parameter baseline value to generate a test feature vector;
[0064] Records of the current test batch are filtered from the standardized test dataset by batch identifier. Test parameters are extracted one by one to form a test parameter sequence. A sliding window is moved along the test parameter sequence, with the window size set to the most recent 100 records. The mean and standard deviation of the test parameter values within the window are calculated, and the dynamic parameter benchmark value is taken as the mean of the current window. Each test parameter value is subtracted from the corresponding dynamic parameter benchmark value to obtain a deviation sequence. All deviation sequences are summarized to form a deviation feature vector.
[0065] Wafer coordinate information for each chip is extracted from the context-labeled metadata of the standardized test dataset, and a two-dimensional distribution map is generated according to the (x,y) coordinates. The two-dimensional distribution map is divided into 1mm×1mm grid cells, and the mean, variance, and maximum deviation of the test parameter values within each grid cell are calculated to form statistical features. The statistical features are arranged in grid cell order to form a parameter spatial distribution feature matrix. The parameter spatial distribution feature matrix is input into spatial autocorrelation analysis, and the Moran's-I method is used to calculate the local autocorrelation index cell by cell, with the following formula:
[0066] ;
[0067] in, Represents grid cells The local autocorrelation index, Represents grid cells The mean of the test parameters, This represents the average of the mean values of all grid cell test parameters. Represents eight adjacent grid cells The mean of the test parameters, Indicates the adjacency weight, if the grid cell and If adjacent, the value is 1; otherwise, it is 0. This represents the variance of the mean values of all grid cell test parameters.
[0068] The local autocorrelation index measures the similarity between the current grid cell test parameter value and the test parameter values of the eight neighboring grid cells. The local autocorrelation index ranges from -1 to 1, and the closer the value is to 1, the stronger the positive correlation. The local autocorrelation indices of all grid cells are collected to form a spatial correlation coefficient vector.
[0069] Grid cells with spatial correlation coefficients below the correlation threshold are marked as abnormal distribution regions. The correlation threshold is set based on Moran's-I neutral value, with a value of 0, indicating that the test parameter value is not correlated with or is negatively correlated with the test parameter value of adjacent grid cells. Grid cells with spatial correlation coefficients above 0 are retained as normal distribution regions, while grid cells with spatial correlation coefficients below 0 are marked as abnormal distribution regions. The statistical features of abnormal distribution regions are extracted into abnormal distribution feature vectors. The abnormal distribution feature vectors are added element-wise to the deviation feature vectors and fused to obtain the spatial feature vector.
[0070] By matching multiple test records of the same chip with device identifier and wafer coordinate information, the test parameter values of the matching records are extracted, the variance between the test parameter values is calculated, and the results are summarized into a consistency index. All consistency indices form a consistency feature vector.
[0071] The test parameter sequence is sorted by timestamp, and the change in adjacent test parameter values is obtained through difference operation. The slope and fluctuation amplitude of the change sequence are calculated and summarized into a trend descriptor. All trend descriptors constitute a time series feature vector.
[0072] The deviation eigenvector, spatial eigenvector, consistency eigenvector, and temporal eigenvector are directly concatenated in terms of dimension to form a high-dimensional joint vector. This high-dimensional joint vector is then input into a principal component analysis algorithm to calculate the covariance matrix and perform eigenvalue decomposition, with the eigenvalues arranged in descending order. The cumulative explained variance is accumulated item by item starting from the largest eigenvalue until it reaches 95%. If the cumulative explained variance is below 95%, key features will be lost; if it is above 95%, the dimensionality reduction benefit is limited. The top m corresponding eigenvectors are selected as principal components. The high-dimensional joint vector is multiplied by the selected principal components to obtain the projected low-dimensional test eigenvector.
[0073] Preferably, this invention dynamically calculates the baseline parameter values and extracts deviation features through a sliding window, achieving adaptive baseline updates and avoiding misjudgments of process fluctuations by fixed thresholds, thus improving anomaly detection sensitivity. It generates spatial feature vectors through wafer coordinate gridding and spatial autocorrelation analysis to capture distributional anomalies within the wafer, overcoming the deficiency of single-parameter statistics in ignoring spatial coupling. It extracts repeated measurement fluctuation and trend features through consistency and time-series analysis, quantifying test stability and dynamic evolution, thus compensating for the lack of time-series dependence in traditional methods. Finally, it fuses multi-dimensional features and reduces dimensionality through principal component analysis to generate test feature vectors, retaining key discrimination information while reducing complexity, injecting highly expressive input into subsequent parameter influence networks, and significantly improving the accuracy and efficiency of anomaly propagation simulation and root cause ranking.
[0074] S3: Inject the test feature vector into the parameter influence network model, analyze the dynamic interaction relationship between test parameters through the anomaly propagation simulation algorithm, and perform root cause sorting and influence path tracing based on the dynamic interaction relationship to generate an anomaly analysis report;
[0075] S3.1: A graph-based parameter influence network model is constructed, using test parameters as nodes and statistical correlations and causal relationships between them as edges. Statistical correlation is calculated using the Pearson correlation coefficient. Edges are established for test parameter pairs with an absolute Pearson correlation coefficient greater than 0.7. 0.7 is chosen because it is a commonly used threshold for strong correlation in statistics, indicating a significant linear relationship between test parameters. Values below 0.7 indicate no edge is established for test parameter pairs, representing a weak correlation or no correlation, thus avoiding noise interference with the network structure. Causal relationships are determined using the Granger causality test on historical good product data. Edges are established for test parameter pairs with a Granger causality test p-value less than the causality threshold. The causality threshold, 0.05, is set according to the standard significance level in statistics, representing the probability threshold for rejecting the null hypothesis (no causal relationship). Values above the causality threshold indicate that the null hypothesis cannot be rejected, and no edge is established for the test parameter pairs, indicating insufficient evidence to support a causal relationship, thus avoiding the introduction of spurious associations.
[0076] After calculating the Pearson correlation coefficient and Granger causality test separately, weighting coefficients were set to 0.6 and 0.4, respectively. This weighting was chosen to emphasize the immediate reflection of statistical correlation (i.e., the Pearson correlation coefficient) on current data while also considering the long-term stability of causal relationships (Granger causality test). 0.6 assigns a higher weight to the Pearson correlation coefficient to capture real-time correlation strength, while 0.4 assigns a weight to the Granger causality test to retain historical causal evidence, avoiding the dominance of a single indicator, thus obtaining the initial values for the side weights. These initial side weight values were normalized to between 0 and 1 and used as parameters to influence the side weights of the network model.
[0077] S3.2: The test feature vector is input into the parameters to influence the network model. The test feature vector is filled into the corresponding test parameter nodes in the order of nodes. After the nodes are updated, the edge weights are recalculated, the Pearson correlation coefficient is re-determined based on the current test feature vector, the Granger causality test significance score remains unchanged, and the edge weights are updated to the weighted sum of the new Pearson correlation coefficient and the original Granger causality test significance score. The updated nodes and edges form a dynamic interaction graph.
[0078] Each node in the dynamic interaction graph corresponds to a test feature vector. At the same time, the set of good product test feature vectors with the same test parameter in the historical good product data constitutes a benchmark feature distribution. The Euclidean distance between the test feature vector of each node and the test feature vector of each good product in the benchmark feature distribution is calculated, and the minimum Euclidean distance is taken as the deviation. The preset deviation threshold is set to the 95th percentile value of the Euclidean distance in the benchmark feature distribution. Nodes with a deviation exceeding the preset deviation threshold are identified as abnormal nodes. To further explain, the deviation threshold is set based on historical statistical data, and nodes below the deviation threshold are considered normal nodes.
[0079] After identifying the anomalous nodes, an anomalous signal with a strength of 1 is injected into them using an anomaly propagation simulation algorithm (the strength of 1 is the standardized initial value of the anomalous signal). The anomalous signal propagates along the edges of the dynamic interaction graph, and the propagation probability of each edge is determined according to its weight, as shown in the formula:
[0080] ;
[0081] in, Indicates from abnormal nodes To the node The probability of propagation, Indicates abnormal nodes To the node edge weights, Indicates from abnormal nodes To all adjacent nodes The sum of the outgoing edge weights.
[0082] Abnormal signals attenuate during propagation. The attenuation coefficient is equal to the result of subtracting the propagation probability from 1. The propagation trajectories where the abnormal signal strength exceeds the abnormality threshold are extracted and used as the main propagation paths. These main paths are then concatenated to form an abnormal propagation path sequence. To further clarify, the abnormality threshold is set based on the statistical distribution of energy attenuation in the abnormal propagation simulation algorithm, and is set to 0.1. A threshold higher than 0.1 would be too stringent, potentially missing some secondary but still important propagation paths and narrowing the scope of the anomaly's influence. Conversely, a threshold lower than 0.1 would include too many weak paths, increasing noise interference and reducing the accuracy of the core abnormal region.
[0083] The nodes in the anomaly propagation path sequence are extracted, and the node positions are represented by the coordinates of the test feature vector in a unified feature space. The DBSCAN clustering algorithm receives the extracted node coordinates and sets the neighborhood radius to 0.5 based on the normalized scale of the test feature vector in the unified feature space. A neighborhood larger than 0.5 would result in an excessively large neighborhood, easily clustering irrelevant nodes and distorting the core anomaly region; a neighborhood smaller than 0.5 would result in an excessively small neighborhood, making it difficult for nodes to form clusters and fragmenting the core anomaly region. Simultaneously, based on the continuity of the anomaly propagation path sequence... The minimum number of samples for core points is set to 3. This is based on the connectivity of the anomaly propagation path sequence. A value greater than 3 would be too strict, making it difficult for short-path nodes to cluster and causing the core anomaly region to be missed. A value less than 3 would make it easy for noisy nodes to form pseudo-clusters, reducing the purity of the core anomaly region. The DBSCAN clustering algorithm expands the neighborhood from any node. When the number of nodes in the neighborhood reaches the minimum number of samples for the core point, it is marked as a core point. Core points are connected to form clusters. After all clusters are generated, the cluster with the most nodes is selected as the core anomaly region. The information of the core anomaly region, other clusters, and unclustered anomaly nodes is integrated into the intermediate analysis results.
[0084] S3.3: The core abnormal area in the intermediate analysis results contains abnormal node identifiers. The abnormal node identifiers correspond to the test parameter names in the dynamic interaction relationship diagram. The test parameter names are directly extracted to form the initial abnormal parameter set.
[0085] Each case record in the pre-built historical anomaly case library contains the name and frequency of the confirmed anomaly test parameter. A Pearson correlation coefficient is calculated between each test parameter name in the initial anomaly parameter set and all test parameter names in the historical anomaly case library. Test parameter names with Pearson correlation coefficients greater than a test threshold are retained. These retained test parameter names are then sorted in descending order of correlation coefficient to generate a candidate list of anomaly parameters. The test threshold is set based on a statistically moderate correlation threshold of 0.6. If the Pearson correlation coefficient is greater than 0.6, it is considered a potential root cause; if it is less than 0.6, the test parameter name is excluded to avoid weakly correlated parameters interfering with root cause identification.
[0086] To further explain, the construction of the historical anomaly case database involves: processing historical test batch data batch by batch, identifying anomaly nodes in each batch through anomaly detection steps. The test parameter names corresponding to the identified anomaly nodes are extracted, and these test parameter names are marked as confirmed anomalies within that batch. The names of confirmed anomalies from all historical test batches are collected, and the frequency of occurrence of identical test parameter names is calculated. Test parameter names and frequencies are paired to form individual case records. All case records are deduplicated by test parameter name, and their frequencies are accumulated, ultimately storing them in the historical anomaly case database.
[0087] Based on the test parameter names corresponding to the abnormal nodes in the dynamic interaction graph, the in-degree of an abnormal node is the number of edges pointing to the current abnormal node, and the out-degree is the number of edges emanating from the current abnormal node. The total degree is obtained by adding the in-degree and out-degree. The normalized degree is then calculated based on the total degree and used as the causal influence weight. The formula is as follows:
[0088] ;
[0089] in, Indicates abnormal nodes The normalized degree, Indicates pointing to an abnormal node in-degree, Indicates pointing to an abnormal node The degree of exit, Represents a node in-degree, Represents a node The degree of departure.
[0090] Each test parameter name in the abnormal parameter candidate list corresponds to a causal influence weight. The test parameter names are sorted in descending order of causal influence weight to generate a root cause parameter priority sequence.
[0091] S3.4: In the abnormal propagation path sequence record, the propagation order of the abnormal signal from the starting abnormal node to the ending node is recorded. In the propagation order, each test parameter name is marked with an arrow pointing to the next test parameter name. The arrow indicates the propagation direction. The propagation direction expands outward layer by layer from the starting abnormal node. All arrows are connected to form a tree structure. The tree structure is input into a visualization tool. The nodes display the test parameter names, and the arrows display the propagation direction and level, generating an influence path map.
[0092] The candidate list of abnormal parameters, the priority sequence of root cause parameters, and the impact path map are aligned by the test parameter name. Entries with the same test parameter name are merged. The merged results are stored in a table. Each row contains the test parameter name, candidate ranking, causal impact weight, propagation level, and impact range. The table as a whole constitutes the anomaly analysis report.
[0093] Preferably, this invention constructs a parameter influence network model with test parameters as nodes and statistical correlation and causal relationship weighted edges, and dynamically updates the edge weights to achieve real-time graph structure representation of the coupling relationship between parameters, overcoming the shortcomings of traditional isolated threshold analysis that ignores interactions; it quantifies energy decay paths and clusters core abnormal regions by combining Euclidean distance anomaly detection with anomaly propagation simulation algorithms, realizing the analysis of the fault propagation mechanism from point to link, and improving the ability to capture latent transmission anomalies; it achieves complete traceability of evidence chains and priority quantification by integrating the correlation of historical cases and graph topology causal weights to sort root causes and generate influence path maps, breaking through the limitations of human experience dependence; and finally, it integrates into a structured anomaly analysis report, providing high-confidence input for intelligent diagnosis and visual decision-making, significantly improving the efficiency of root cause localization and the accuracy of process feedback.
[0094] S4: Based on the anomaly analysis report, the intelligent diagnostic mechanism is invoked to generate structured conclusions by matching with the historical case library, and the visualization function is activated simultaneously to interactively present the structured conclusions.
[0095] S4.1: Process historical test batch data batch by batch. Identify abnormal nodes in each batch through the abnormality detection step, extract the test parameter names corresponding to the identified abnormal nodes, and mark the test parameter names as confirmed abnormalities in the current batch; collect the test parameter names of confirmed abnormalities in all historical test batches, and count the number of times the same test parameter name appears as the occurrence frequency; pair the test parameter name, root cause label, and handling suggestion to form a single case record, deduplicate all case records by test parameter name, accumulate the occurrence frequency, and finally store them as a historical case library.
[0096] The list of abnormal parameters and the priority sequence of root cause parameters are directly extracted from the anomaly analysis report. Each test parameter name in the list of abnormal parameters corresponds to a test parameter sequence in the standardized test dataset. The test parameter sequences are arranged in chronological order, and the average of all values in the sequence is calculated as the mean. The average of the squared differences between each value in the sequence and the mean is calculated as the standard deviation. The average of the absolute values of the differences between each value in the sequence and the dynamic parameter benchmark value is calculated as the deviation magnitude. The mean, standard deviation, and deviation magnitude are combined into a three-dimensional vector to form an anomaly feature vector.
[0097] Calculate the cosine similarity between the abnormal feature vector and each record in the historical case database, and select the historical cases with the highest cosine similarity to extract root cause labels and processing suggestions. Match the test parameter names in the root cause parameter priority sequence with the extracted root cause labels. The test parameter names that match successfully are marked as high-priority root causes, and an anomaly level assessment is generated. The anomaly level assessment is divided into three levels: high, medium, and low. A high level is defined as having more than 2 high-priority root causes, a medium level is defined as having 1 to 2 high-priority root causes, and a low level is defined as having 0 high-priority root causes.
[0098] The anomaly level assessment, root cause labeling, and treatment recommendations are aligned by test parameter names and organized into a table to form a structured conclusion.
[0099] S4.2: The test parameter names in the influence path graph are used as nodes, the propagation direction is used as directed edges, and the node coordinates are arranged into a three-dimensional space using a force-directed layout algorithm. In the three-dimensional space, each node displays the test parameter name, and the edges display the propagation level, forming a three-dimensional network topology graph.
[0100] The test parameter names in the root cause parameter priority sequence are mapped to a heatmap grid. The higher the priority, the darker the color. The color coding changes from blue to red. The heatmap shows the priority distribution of all test parameter names, forming a color-coded heatmap.
[0101] Anomaly level assessment is grouped by test parameter name, with the highest bar height for high-level test parameter names, followed by medium-level and the lowest-level. The bar chart height is dynamically updated according to the batch selected by the user, forming a dynamic bar chart.
[0102] A 3D network topology map, a color-coded heatmap, and a dynamic bar chart are displayed side-by-side on the interactive interface. Users can click on nodes to switch between the corresponding test parameter names and processing suggestions. The interface supports rotating the 3D network topology map and filtering test parameter names to complete the test information analysis task.
[0103] This embodiment also provides an automatic analysis system for semiconductor chip test information, including:
[0104] The acquisition module establishes a real-time streaming connection channel with multi-source testing equipment to acquire chip test data streams. It then performs real-time purification and context labeling on the chip test data streams using an adaptive cleaning algorithm to generate a standardized test data set.
[0105] The extraction module calculates the parameter baseline value based on the standardized test data set, and performs multi-dimensional discriminative feature extraction based on the parameter baseline value to generate a test feature vector;
[0106] The analysis module injects the test feature vectors into the parameter influence network model, analyzes the dynamic interaction relationship between test parameters through anomaly propagation simulation algorithm, and performs root cause sorting and influence path tracing based on the dynamic interaction relationship to generate anomaly analysis report.
[0107] The matching module invokes the intelligent diagnostic mechanism based on the anomaly analysis report, generates structured conclusions through matching with the historical case library, and simultaneously activates the visualization function to interactively present the structured conclusions.
[0108] This embodiment also provides a computer device applicable to the automatic analysis method of semiconductor chip test information, including: a memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions to implement the automatic analysis method of semiconductor chip test information as proposed in the above embodiment.
[0109] The computer device can be a terminal, comprising a processor, memory, communication interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, carrier networks, NFC (Near Field Communication), or other technologies. The display screen can be an LCD screen or an e-ink screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad on the computer device's casing, or an external keyboard, touchpad, or mouse.
[0110] This embodiment also provides a storage medium storing a computer program, which, when executed by a processor, implements the method for automatically analyzing semiconductor chip test information as proposed in the above embodiments. The storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.
[0111] In summary, this invention achieves comprehensive characterization of multi-dimensional discriminative information by extracting wafer coordinate information from a standardized test dataset and generating spatial feature vectors through mesh generation and spatial autocorrelation analysis, generating consistency feature vectors by performing consistency analysis on multiple test records of the same chip, and generating time-series feature vectors by performing time-series analysis on test parameter sequences. This overcomes the limitations of existing methods that are limited to single-parameter statistics and improves the expressive power of test feature vectors. Furthermore, by constructing a parameter influence network model and applying anomaly propagation simulation algorithms to generate anomaly propagation path sequences, this invention achieves dynamic interaction modeling between parameters, quantification of influence path energy decay, and topological sorting of core root causes. This breaks through the limitation of isolated parameter threshold triggering in existing models and improves the accuracy of anomaly analysis.
[0112] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.
Claims
1. An automatic analysis method for semiconductor chip test information, characterized in that: include, Establish a real-time streaming connection channel with multi-source testing equipment to acquire chip test data streams. Use an adaptive cleaning algorithm to perform real-time purification and context labeling on the chip test data streams to generate a standardized test data set. Based on the standardized test dataset, baseline parameter values are calculated, and multi-dimensional discriminative feature extraction is performed using these baseline values to generate a test feature vector. Specifically: Extract the test parameter sequence of the current test batch from the standardized test dataset, calculate the mean and standard deviation of each test parameter using a sliding window, generate dynamic parameter benchmark values, calculate the deviation from the test parameters, and obtain the deviation feature vector; Extract wafer coordinate information from a standardized test dataset, calculate the spatial distribution characteristics of parameters based on the wafer coordinate system, and generate a spatial feature vector; Perform consistency analysis on multiple test records of the same chip, calculate the variance between test parameter values, and generate a consistency feature vector; Perform time series analysis on the test parameter sequence to extract the changing trend of the test parameters over time and generate a time series feature vector; The deviation feature vector, spatial feature vector, consistency feature vector and temporal feature vector are concatenated in dimension, and then mapped to a unified feature space through a feature dimensionality reduction algorithm to generate test feature vectors. The test feature vectors are injected into the parameter influence network model. The dynamic interaction relationship between the test parameters is analyzed by the anomaly propagation simulation algorithm. Based on the dynamic interaction relationship, root cause sorting and influence path tracing are performed to generate an anomaly analysis report. The process of injecting test feature vectors into the parameter influence network model and analyzing the dynamic interaction relationships between test parameters using anomaly propagation simulation algorithms is as follows: Construct a parameter influence network model based on a graph structure, with test parameters as nodes and statistical correlations and causal relationships between test parameters as edges, and initialize edge weights; The test feature vector is input as a parameter to influence the network model, update the nodes, recalculate the edge weights based on the nodes, and generate a dynamic interaction graph. Perform anomaly detection on the dynamic interaction graph, calculate the deviation of the feature value of each node from the historical good product data, and identify abnormal nodes whose deviation exceeds the preset deviation threshold. For abnormal nodes, an abnormal propagation simulation algorithm is applied to simulate the diffusion path of abnormal signals along the graph boundary, calculate the attenuation coefficient of abnormal signals between each node, extract the main propagation path of abnormal signals, and generate an abnormal propagation path sequence. Cluster analysis is performed on the nodes in the abnormal propagation path sequence to identify the core abnormal region and generate intermediate analysis results. The process of performing root cause ranking and impact path tracing based on the dynamic interaction relationship to generate an anomaly analysis report is as follows: Based on the intermediate analysis results, the test parameter names corresponding to the abnormal nodes in the core abnormal region are extracted, the correlation between the test parameter names and the parameters of historical abnormal cases is calculated, and a candidate list of abnormal parameters is generated. Based on the dynamic interaction graph, the in-degree and out-degree of each abnormal node are extracted, the causal influence weights on other nodes are calculated, and the candidate list of abnormal parameters is sorted to generate a root cause parameter priority sequence. By using abnormal propagation path sequences, the propagation direction and impact range of abnormal signals are traced, and an impact path map is generated; The abnormal parameter candidate list, root cause parameter priority sequence and impact path map are integrated to generate an anomaly analysis report; The anomaly analysis report triggers the intelligent diagnostic mechanism, which generates structured conclusions by matching historical case data, and simultaneously activates the visualization function to interactively present the structured conclusions.
2. The method for automatic analysis of semiconductor chip test information as described in claim 1, characterized in that: Establish a real-time streaming connection channel with multi-source testing equipment to acquire chip test data streams. Perform real-time purification and context labeling on the chip test data streams using an adaptive cleaning algorithm to generate a standardized test data set. Specifically: Establish multiple data interfaces with automated test equipment, wafer-level test equipment, and manufacturing execution equipment; configure real-time streaming protocols; acquire chip test data streams; and perform format parsing to extract timestamps, test parameters, and device identifiers. Contextual tag metadata is generated by associating the manufacturing background information of the chip with the device identifier; The dynamic threshold of the test parameters is calculated based on the chip test data stream. After removing data points that exceed the dynamic threshold, the remaining data points are normalized and integrated with context tag metadata to generate a standardized test data set.
3. The method for automatic analysis of semiconductor chip test information as described in claim 2, characterized in that: The step of invoking the intelligent diagnostic mechanism based on the anomaly analysis report and generating structured conclusions through matching with the historical case database is as follows: Extract a list of abnormal parameters and a priority sequence of root cause parameters from the anomaly analysis report, and build a historical case library; Perform feature vectorization on the parameters in the abnormal parameter list, generate abnormal feature vectors, and match them with the case feature vectors in the historical case library. Filter the historical cases with the highest similarity, and extract the corresponding root cause labels and processing suggestions. An anomaly level assessment is generated based on the root cause parameter priority sequence and the extracted root cause labels. The abnormality level assessment, root cause labeling, and treatment recommendations are compiled into a structured diagnostic conclusion.
4. The method for automatic analysis of semiconductor chip test information as described in claim 3, characterized in that: The synchronous activation visualization function interactively presents the structured conclusions by converting the structured diagnostic conclusions and anomaly analysis reports into three-dimensional network topology diagrams, color-coded heatmaps, and dynamic bar charts.
5. The method for automatic analysis of semiconductor chip test information as described in claim 4, characterized in that: The calculation is based on the parameter spatial distribution characteristics of the wafer coordinate system, specifically: The wafer coordinate information of each chip is extracted from the standardized test data set, a two-dimensional distribution map is generated, and the grid is divided to calculate the statistical characteristics of the test parameters of each grid. Based on statistical characteristics, a parameter spatial distribution feature matrix is constructed, and spatial autocorrelation analysis is applied to calculate the parameter correlation between adjacent grids. After generating spatial correlation coefficients, abnormal distribution regions in the wafer coordinate system are extracted to obtain abnormal distribution feature vectors. The abnormal distribution feature vector and the deviation feature vector are fused to generate a spatial feature vector.
6. The method for automatic analysis of semiconductor chip test information as described in claim 5, characterized in that: The deviation between the feature value of each node and the historical good product data refers to calculating the Euclidean distance between the test feature vector in the dynamic interaction graph and the baseline feature distribution in the historical good product data.
7. An automatic analysis system for semiconductor chip test information, based on the automatic analysis method for semiconductor chip test information according to any one of claims 1 to 6, characterized in that: include, The acquisition module establishes a real-time streaming connection channel with multi-source testing equipment to acquire chip test data streams. It then performs real-time purification and context labeling on the chip test data streams using an adaptive cleaning algorithm to generate a standardized test data set. The extraction module calculates the parameter baseline value based on the standardized test data set, and performs multi-dimensional discriminative feature extraction based on the parameter baseline value to generate a test feature vector; The analysis module injects the test feature vectors into the parameter influence network model, analyzes the dynamic interaction relationship between test parameters through anomaly propagation simulation algorithm, and performs root cause sorting and influence path tracing based on the dynamic interaction relationship to generate anomaly analysis report. The matching module invokes the intelligent diagnostic mechanism based on the anomaly analysis report, generates structured conclusions through matching with the historical case library, and simultaneously activates the visualization function to interactively present the structured conclusions.