Interlayer alignment detection method and system for three-dimensional chip stacking structure and medium

By combining point cloud registration with confocal microscopy and OCT technology with a deep learning model, the problems of detection accuracy and thermal deformation prediction between layers of a three-dimensional chip stacked structure are solved. This achieves high-precision alignment measurement and real-time thermal stress prediction, and has the capabilities of high-resolution imaging and short-circuit risk warning.

CN121660966APending Publication Date: 2026-03-13HANGZHOU HUICUI INTELLIGENT TECH CO LTD
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Patent Information

Application Number
CN202511471181.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-10-15
Publication Date
2026-03-13

AI Technical Summary

Technical Problem

Existing methods for detecting interlayer structures in 3D chip stacks suffer from insufficient detection accuracy, delayed deformation modeling, and complex system integration. In particular, in 3D integrated circuits, it is difficult to achieve high-precision alignment measurement and thermal deformation prediction.

Method used

A method for interlayer alignment detection of 3D chip stacked structures combining confocal microscopy and coherence tomography (OCT) is developed. Through point cloud registration and deep learning models, high-precision alignment measurement and thermal deformation prediction are achieved. This includes the acquisition of confocal edge maps and OCT depth data, point cloud construction and removal, point cloud registration, and the application of deep learning models to output corrected stress fields and risk assessments.

Benefits of technology

It achieves high-resolution 3D imaging capabilities, low-latency point cloud registration algorithms, synchronous control logic, and deep learning thermal stress prediction. It has significant advantages in high precision, real-time performance, and industrial application. It can detect TSV morphology and thermal stress distribution in real time and provide short-circuit risk warning.

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Abstract

The invention discloses an alignment detection method and system for three-dimensional chip stacking structure layers and a medium, and the method comprises the steps: obtaining input data which comprises a confocal edge graph and OCT depth data; performing point cloud construction and elimination based on the input data to obtain a to-be-registered point cloud; performing point cloud registration based on the to-be-registered point cloud and a reference point cloud to obtain a registered point cloud; inputting the registered point cloud into a deep learning model for prediction to obtain a corrected stress field; and performing displacement difference risk assessment based on the corrected stress field to output a risk thermodynamic diagram and an alarm log. According to the invention, through combination of multi-mode optical detection, an efficient algorithm and deep learning, the problems of alignment precision and thermal deformation prediction in 3D-IC manufacturing are solved, and the method has the significant advantages of high precision, real-time performance and industrialization.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and more specifically, to a method, system, and medium for alignment detection between layers in a three-dimensional chip stacking structure. Background Technology

[0002] As Moore's Law approaches its physical limits, three-dimensional integrated circuit (3D-IC) technology has been widely studied and rapidly developed, becoming an important means to improve chip integration and computing performance. Its core lies in using through-silicon vias (TSVs) to achieve vertical interconnection of chips, thereby constructing a vertically stacked structure.

[0003] Compared to traditional 2D layouts, 3D ICs offer shorter interconnect distances, higher bandwidth, and lower power consumption. However, due to the multiple bonding and alignment processes involved in 3D chip manufacturing, micron-level misalignments between each layer can lead to TSV misalignment connections, resulting in packaging defects such as open circuits and short circuits. The main causes of this interlayer misalignment include: TSV manufacturing errors (diameter deviation, sidewall unevenness); interlayer bonding process errors (misalignment, rotation); wafer deformation caused by thermal stress; and surface micro-defects and thickness unevenness.

[0004] Existing detection methods, such as white light interferometry, laser confocal microscopy, and X-ray computed tomography (CT), each have their limitations: white light interferometry cannot penetrate deep stacked materials; laser confocal microscopy, while highly accurate, struggles to provide effective depth information; and X-ray imaging equipment is expensive and has limited resolution. Meanwhile, traditional thermal stress modeling largely relies on finite element simulation, which suffers from long computation times and the inability to provide real-time feedback.

[0005] Currently, the main challenges and pain points in the technology are as follows: insufficient detection accuracy: existing optical methods cannot simultaneously obtain high-precision position and depth information of TSV; lag in deformation modeling: lack of fast algorithms that can map real-time measurement data to thermal stress deformation; complex system integration: confocal and OCT systems are difficult to synchronize; and uncontrollable short-circuit risk: due to the inability to evaluate interlayer offset in real time, detection failure occurs after encapsulation, leading to a decrease in yield. Summary of the Invention

[0006] The purpose of this invention is to provide a method, system, and medium for alignment detection between layers in a three-dimensional chip stacked structure. Specifically, it is a system and method for alignment detection between layers in a three-dimensional chip stacked structure that combines confocal microscopy and optical coherence tomography (OCT). It is particularly suitable for three-dimensional integrated circuits (3D-ICs) using through silicon vias (TSVs) interconnects to achieve high-precision alignment measurement and thermal deformation prediction. It falls within the category of high-end manufacturing technology that intersects advanced packaging and optical inspection technologies.

[0007] The first aspect of this invention provides a method for alignment detection between layers in a three-dimensional chip stacked structure, comprising the following steps:

[0008] Acquire input data, which includes a confocal edge map and OCT depth data;

[0009] Based on the input data, point cloud construction and elimination are performed to obtain the point cloud to be registered;

[0010] Point cloud registration is performed based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud;

[0011] The corrected stress field is obtained by inputting the registered point cloud into a deep learning model for prediction.

[0012] Based on the modified stress field, a risk assessment of displacement difference is performed to output a risk heatmap and alarm log.

[0013] In this solution, obtaining the confocal edge map specifically includes:

[0014] Acquire a laser reflection signal, wherein the laser reflection signal includes a PMT analog voltage signal;

[0015] The laser reflection signal is digitally sampled to obtain the digital signal of the galvanometer position;

[0016] The confocal edge map is obtained by mapping the digital signal of the galvanometer position onto the image matrix and then denoising it.

[0017] In this solution, obtaining OCT depth data specifically includes:

[0018] Interference spectra were obtained based on high-speed linear CMOS arrays.

[0019] The interference spectrum is calibrated to obtain the calibration spectrum;

[0020] Fourier transform and peak extraction are performed based on the calibration spectrum to obtain the set of depth coordinates of the through silicon via as the OCT depth data.

[0021] In this solution, the step of constructing and removing point clouds based on the input data to obtain the point cloud to be registered specifically includes:

[0022] Based on the confocal edge map and the OCT depth data, timestamps are matched;

[0023] Assign corresponding depth data to each edge point of the confocal edge map to generate 3D points;

[0024] After statistical analysis of all 3D points and removal of outliers, the noise is removed to obtain the point cloud to be registered. Each point in the point cloud to be registered includes coordinates and reflection intensity values.

[0025] In this solution, the step of performing point cloud registration based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud specifically includes:

[0026] Calculate the feature descriptor for each point in the point cloud to be registered and perform initial pose estimation;

[0027] A transformation matrix is ​​calculated by randomly sampling several pairs of matching points to evaluate the inlier rate, and iterative optimization is performed based on a preset algorithm to minimize the objective function;

[0028] When convergence is determined based on the root mean square error of registration, the registered point cloud is output as the registered point cloud.

[0029] In this scheme, the corrected stress field is obtained by predicting the registered point cloud input into a deep learning model, specifically including:

[0030] The registration point cloud, material properties, and temperature field are obtained as model inputs;

[0031] The deep learning model architecture includes an encoder-decoder structure, wherein the encoder employs three 3D convolutional layers and pooling layers, and the decoder includes upsampling and skip connections, as well as boundary condition constraints.

[0032] The initial displacement field is obtained based on the model output, and the corrected stress field is obtained after correction.

[0033] A second aspect of the present invention also provides an alignment detection system for interlayers of a three-dimensional chip stack structure, comprising a memory and a processor, wherein the memory includes a method program for alignment detection between layers of a three-dimensional chip stack structure, and the method program for alignment detection between layers of a three-dimensional chip stack structure, when executed by the processor, performs the following steps:

[0034] Acquire input data, which includes a confocal edge map and OCT depth data;

[0035] Based on the input data, point cloud construction and elimination are performed to obtain the point cloud to be registered;

[0036] Point cloud registration is performed based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud;

[0037] The corrected stress field is obtained by inputting the registered point cloud into a deep learning model for prediction.

[0038] Based on the modified stress field, a risk assessment of displacement difference is performed to output a risk heatmap and alarm log.

[0039] In this solution, obtaining the confocal edge map specifically includes:

[0040] Acquire a laser reflection signal, wherein the laser reflection signal includes a PMT analog voltage signal;

[0041] The laser reflection signal is digitally sampled to obtain the digital signal of the galvanometer position;

[0042] The confocal edge map is obtained by mapping the digital signal of the galvanometer position onto the image matrix and then denoising it.

[0043] In this solution, obtaining OCT depth data specifically includes:

[0044] Interference spectra were obtained based on high-speed linear CMOS arrays.

[0045] The interference spectrum is calibrated to obtain the calibration spectrum;

[0046] Fourier transform and peak extraction are performed based on the calibration spectrum to obtain the set of depth coordinates of the through silicon via as the OCT depth data.

[0047] In this solution, the step of constructing and removing point clouds based on the input data to obtain the point cloud to be registered specifically includes:

[0048] Based on the confocal edge map and the OCT depth data, timestamps are matched;

[0049] Assign corresponding depth data to each edge point of the confocal edge map to generate 3D points;

[0050] After statistical analysis of all 3D points and removal of outliers, the noise is removed to obtain the point cloud to be registered. Each point in the point cloud to be registered includes coordinates and reflection intensity values.

[0051] In this solution, the step of performing point cloud registration based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud specifically includes:

[0052] Calculate the feature descriptor for each point in the point cloud to be registered and perform initial pose estimation;

[0053] A transformation matrix is ​​calculated by randomly sampling several pairs of matching points to evaluate the inlier rate, and iterative optimization is performed based on a preset algorithm to minimize the objective function;

[0054] When convergence is determined based on the root mean square error of registration, the registered point cloud is output as the registered point cloud.

[0055] In this scheme, the corrected stress field is obtained by predicting the registered point cloud input into a deep learning model, specifically including:

[0056] The registration point cloud, material properties, and temperature field are obtained as model inputs;

[0057] The deep learning model architecture includes an encoder-decoder structure, wherein the encoder employs three 3D convolutional layers and pooling layers, and the decoder includes upsampling and skip connections, as well as boundary condition constraints.

[0058] The initial displacement field is obtained based on the model output, and the corrected stress field is obtained after correction.

[0059] A third aspect of the present invention provides a computer-readable storage medium comprising a machine program for an alignment detection method between layers of a three-dimensional chip stack structure, wherein when executed by a processor, the alignment detection method program for an alignment detection method between layers of a three-dimensional chip stack structure implements the steps of the alignment detection method for an alignment detection method for a three-dimensional chip stack structure as described in any of the preceding claims.

[0060] This invention discloses a method, system, and medium for alignment detection between layers in a three-dimensional chip stacking structure. By combining multimodal optical detection, efficient algorithms, and deep learning, it solves the challenges of alignment accuracy and thermal deformation prediction in 3D-IC manufacturing. It has significant advantages in high precision, real-time performance, and industrial applicability. The specific beneficial effects are as follows:

[0061] 1. High-resolution 3D imaging capability: Combining confocal microscopy and coherence tomography (OCT), TSV morphology reconstruction is achieved within the range of lateral resolution Δx≈0.3μm and axial resolution Δz≈1μm;

[0062] 2. Low-latency point cloud registration algorithm: Employs an efficient ICP (Iterative Closest Point) and FPFH (FastPoint Feature Histograms) feature fusion algorithm, adaptable to various wafer materials and stacked structures;

[0063] 3. Synchronization control logic: A self-developed FPGA hardware control module is used to achieve synchronization between the laser, scanning lens, and OCT acquisition system;

[0064] 4. Deep learning thermal stress prediction model: Based on the improved U-Net and Physically-informed Neural Network (PINN), it can output thermal stress distribution maps in real time;

[0065] 5. Short circuit risk warning mechanism: The system automatically determines whether the TSV overlap interval exceeds the safety threshold and issues a risk warning. Attached Figure Description

[0066] Figure 1 A flowchart of an alignment detection method for interlayer structures in a three-dimensional chip stacking structure according to the present invention is shown.

[0067] Figure 2 The diagram shows a deep learning prediction network structure for an alignment detection method between layers of a three-dimensional chip stacking structure according to the present invention.

[0068] Figure 3 The thermal stress distribution diagram and TSV offset overlap diagram of the alignment detection method between layers of a three-dimensional chip stacking structure according to the present invention are shown.

[0069] Figure 4 A block diagram of an alignment detection system for interlayer structures in a three-dimensional chip stacking structure is shown. Detailed Implementation

[0070] To better understand the above-mentioned objectives, features, and advantages of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.

[0071] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and therefore the scope of protection of the invention is not limited to the specific embodiments disclosed below.

[0072] This invention proposes a comprehensive detection method integrating hardware synchronization, 3D point cloud registration, and deep learning prediction. Specifically, it proposes an alignment detection method for interlayer structures in three-dimensional chip stacking structures. The core components include: a confocal microscopy + OCT (Optical Coherence Tomography) joint scanning structure, a hardware synchronization control circuit, a 3D point cloud registration algorithm, and a deep learning thermal stress prediction model. By fusing multi-source heterogeneous data, it achieves high-precision measurement and stress modeling of TSV (Through-Silicon Via) interlayer misalignment.

[0073] Figure 1A flowchart of an alignment detection method for interlayer structures in a three-dimensional chip stack is shown.

[0074] like Figure 1 As shown, this application discloses an alignment detection method for interlayer structures in a three-dimensional chip stack, comprising the following steps:

[0075] S102, Obtain input data, the input data including confocal edge map and OCT depth data;

[0076] S104, Based on the input data, point cloud construction and elimination are performed to obtain the point cloud to be registered;

[0077] S106, perform point cloud registration based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud;

[0078] S108, Based on the registered point cloud, the corrected stress field is obtained by inputting it into a deep learning model for prediction.

[0079] S110, perform a displacement difference risk assessment based on the modified stress field to output a risk heat map and alarm log.

[0080] It should be noted that, in this embodiment, when the method is executed, it is specifically applied to the corresponding alignment detection device for the three-dimensional chip stacking structure layers. The device includes an optical imaging subsystem and a control module. The optical imaging subsystem corresponds to a confocal microscopy module and an OCT module. The control module is based on FPGA control logic to realize the synchronization of scanning galvanometer and acquisition, including a 3D point cloud registration module, a deep learning thermal stress prediction module, and a risk assessment module.

[0081] Further, in this embodiment, specifically, input data is acquired, including a confocal edge map and OCT depth data, which are obtained by the optical imaging subsystem. The confocal edge map is obtained by the confocal microscopy module, specifically used to acquire surface structure and fine edge contours. The OCT depth data is obtained by the OCT module, specifically based on low coherence interferometry, constructing a through-hole depth model. The specific process will be described in detail in subsequent embodiments. Then, point cloud construction and culling are performed based on the input data to obtain a point cloud to be registered. Point cloud registration is performed based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud. Accordingly, this is performed by the 3D point cloud registration module. The original point cloud is generated by fusing confocal and OCT data. First, coarse registration is performed using RANSAC (Random Sample Consensus), and then fine registration is completed using ICP (Iterative Closest Point). The specific process will also be described in detail in subsequent specifications.

[0082] Furthermore, in this embodiment, a deep learning thermal stress prediction module is used to perform a process of predicting and obtaining a corrected stress field based on the registered point cloud input into a deep learning model. The network sampling deep learning model requires iterative optimization; the specific process will be described in detail in the subsequent specification. After obtaining the corrected stress field, a displacement difference risk assessment is performed based on the corrected stress field to output a risk heatmap and alarm log. The short-circuit risk is calculated by the intersection of the deformation field and the thermal stress field. The specific process includes deformation mapping, spacing calculation, and risk determination. Locally and remotely, the corresponding displacement value is extracted for each through-silicon via (TSV) coordinate. Risk determination is performed based on the actual spacing, identifying areas with excessive overlap (TSV spacing below the safe value). If d TSV <d min An alarm will be triggered, and the risk level (red, yellow, or green) will be reported.

[0083] According to an embodiment of the present invention, obtaining a confocal edge map specifically includes:

[0084] Acquire a laser reflection signal, wherein the laser reflection signal includes a PMT analog voltage signal;

[0085] The laser reflection signal is digitally sampled to obtain the digital signal of the galvanometer position;

[0086] The confocal edge map is obtained by mapping the digital signal of the galvanometer position onto the image matrix and then denoising it.

[0087] It should be noted that, in this embodiment, the laser wavelength is selected as λ = 635nm, an adjustable focal length objective lens is used, the numerical aperture NA = 0.95, and after the laser is focused, the XY direction scanning is controlled by a dual-axis scanning mirror. That is, the laser reflection signal is first acquired, and the laser reflection signal includes the PMT analog voltage signal. Specifically, only the reflection signal at the focal point is collected through pinhole filtering. The laser reflection signal is digitally sampled to obtain the digital signal of the galvanometer position, and the confocal edge map is obtained after mapping the digital signal of the galvanometer position onto the image matrix and then denoising is performed. The resolution reaches 0.2μm and the image frame rate is 10fps.

[0088] According to an embodiment of the present invention, acquiring OCT depth data specifically includes:

[0089] Interference spectra were obtained based on high-speed linear CMOS arrays.

[0090] The interference spectrum is calibrated to obtain the calibration spectrum;

[0091] Fourier transform and peak extraction are performed based on the calibration spectrum to obtain the set of depth coordinates of the through silicon via as the OCT depth data.

[0092] It should be noted that, in this embodiment, the coherence tomography module uses a low-coherence broadband light source (center wavelength 850nm, bandwidth 100nm). The interference structure adopts a Mach-Zehnder interferometer structure, and the receiver uses a high-speed linear CMOS array with an amplitude demodulator. The interference spectrum is obtained based on the high-speed linear CMOS array, and the interference spectrum is calibrated to obtain a calibration spectrum. Then, Fourier transform and peak extraction are performed based on the calibration spectrum to obtain the depth coordinate set of the through-silicon vias as the OCT depth data. The imaging depth range is 200μm, and the depth resolution Δz = 1.2μm.

[0093] According to an embodiment of the present invention, the step of constructing and removing point clouds based on the input data to obtain the point cloud to be registered specifically includes:

[0094] Based on the confocal edge map and the OCT depth data, timestamps are matched;

[0095] Assign corresponding depth data to each edge point of the confocal edge map to generate 3D points;

[0096] After statistical analysis of all 3D points and removal of outliers, the noise is removed to obtain the point cloud to be registered. Each point in the point cloud to be registered includes coordinates and reflection intensity values.

[0097] It should be noted that, in this embodiment, the control board in the control module of the present invention is designed based on Xilinx Artix-7 FPGA. Specifically, state machine logic is used to coordinate the laser modulator, electric displacement platform, and image acquisition unit. The synchronization error is less than 30ns and the sampling frequency reaches 1MHz. Therefore, the timestamp is first matched based on the confocal edge map and the OCT depth data. Specifically, the spatial position of the confocal and OCT data is matched according to the FPGA synchronization timestamp. The confocal data is used for TSV aperture edge recognition, and the OCT data is used for TSV depth topography reconstruction. After the two are combined, a filtering-enhancement-edge detection sequence is used to achieve accurate modeling.

[0098] Furthermore, in this embodiment, each edge point of the confocal edge map is assigned corresponding depth data to generate 3D points. Then, the neighborhood density is statistically analyzed to remove isolated points. After statistical analysis of all 3D points and removal of outliers, noise is removed to obtain the point cloud to be registered. Accordingly, each point in the obtained point cloud to be registered includes coordinates and reflection intensity values.

[0099] According to an embodiment of the present invention, the step of performing point cloud registration based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud specifically includes:

[0100] Calculate the feature descriptor for each point in the point cloud to be registered and perform initial pose estimation;

[0101] A transformation matrix is ​​calculated by randomly sampling several pairs of matching points to evaluate the inlier rate, and iterative optimization is performed based on a preset algorithm to minimize the objective function;

[0102] When convergence is determined based on the root mean square error of registration, the registered point cloud is output as the registered point cloud.

[0103] It should be noted that, in this embodiment, as Figure 2 The diagram shown illustrates the structure of a deep learning prediction network, which includes the following steps:

[0104] Point cloud acquisition: generating local point sets for each chip layer. Each point contains coordinates and a reflection intensity value;

[0105] Point cloud registration: Preprocessing: denoising, uniform sampling (VoxelGrid filtering, voxel size 0.1μm); Coarse registration: using FPFH descriptor matching and applying RANSAC for initial pose estimation, specifically calculating the feature descriptor of each point in the point cloud to be registered and performing initial pose estimation; Fine registration: minimizing the objective function based on the ICP algorithm, wherein several pairs of randomly sampled matching points are used to calculate the transformation matrix to evaluate the inlier rate, and iterative optimization is performed based on a preset algorithm to minimize the objective function, wherein the objective function is as follows:

[0106]

[0107] Where R is the rotation matrix, t is the translation vector, and p i For the source point cloud, q i For the corresponding points in the point cloud to be registered, the evaluation metrics of the objective function include RMSE (root mean square error of registration), the center offset Δx and Δy after registration, and the TSV axial overlap error Δz. TSV Specifically, in this embodiment, when convergence is determined based on the root mean square error of the registration, the registered point cloud is output as the registered point cloud.

[0108] According to an embodiment of the present invention, the corrected stress field is obtained by predicting the registered point cloud input into a deep learning model, specifically including:

[0109] The registration point cloud, material properties, and temperature field are obtained as model inputs;

[0110] The deep learning model architecture includes an encoder-decoder structure, wherein the encoder employs three 3D convolutional layers and pooling layers, and the decoder includes upsampling and skip connections, as well as boundary condition constraints.

[0111] The initial displacement field is obtained based on the model output, and the corrected stress field is obtained after correction.

[0112] It should be noted that, in this embodiment, the deep learning model architecture includes an encoder-decoder structure, wherein the encoder adopts three layers of 3D convolutional layers and pooling layers, and the decoder includes upsampling and skip connections, as well as boundary condition constraints. PINN (Physics-Informed Neural Network) is used to constrain the prediction results to meet the boundary conditions.

[0113] Furthermore, in this embodiment, the registration point cloud, material properties, and temperature field are obtained as model input X. input = [P,M,T], where P is the registration point cloud, M is the material property (e.g., coefficient of thermal expansion, Young's modulus), T is the temperature field, and the output of the deep learning model is the displacement field u(x,y,z), specifically corresponding to the thermal deformation of the chip. Regions with excessive overlap (TSV spacing below the safe value) are identified. The corresponding feedback risk levels (red, yellow, and green) are identified, and a thermal stress distribution map is exported for process optimization. For example, Figure 3 As shown, the diagram is an overlay of the thermal stress distribution map and the TSV offset map.

[0114] It is worth mentioning that during the testing and verification, a 3D chip sample was produced using a 4-layer stacked chip manufactured with a 65nm process, with each layer containing 256 TSVs. The sample size was 10×10mm. 2 Thermal shock test: temperature cycle T = [25℃→125℃→25℃], 30 cycles.

[0115] It should be noted that the test results are shown in Table 1. The results show that the present invention is significantly superior to existing methods in terms of comprehensive detection capabilities, especially in terms of registration accuracy and depth information fusion capabilities.

[0116] Table 1. Test Results Display Table

[0117]

[0118] Figure 4 A block diagram of an alignment detection system for interlayer structures in a three-dimensional chip stacking structure is shown.

[0119] like Figure 4 As shown, this invention discloses an alignment detection system for interlayers of a three-dimensional chip stack structure, including a memory and a processor. The memory includes a program for an alignment detection method for interlayers of a three-dimensional chip stack structure. When the processor executes the alignment detection method program for interlayers of a three-dimensional chip stack structure, it performs the following steps:

[0120] Acquire input data, which includes a confocal edge map and OCT depth data;

[0121] Based on the input data, point cloud construction and elimination are performed to obtain the point cloud to be registered;

[0122] Point cloud registration is performed based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud;

[0123] The corrected stress field is obtained by inputting the registered point cloud into a deep learning model for prediction.

[0124] Based on the modified stress field, a risk assessment of displacement difference is performed to output a risk heatmap and alarm log.

[0125] It should be noted that, in this embodiment, when the method is executed, it is specifically applied to the corresponding alignment detection device for the three-dimensional chip stacking structure layers. The device includes an optical imaging subsystem and a control module. The optical imaging subsystem corresponds to a confocal microscopy module and an OCT module. The control module is based on FPGA control logic to realize the synchronization of scanning galvanometer and acquisition, including a 3D point cloud registration module, a deep learning thermal stress prediction module, and a risk assessment module.

[0126] Further, in this embodiment, specifically, input data is acquired, including a confocal edge map and OCT depth data, which are obtained by the optical imaging subsystem. The confocal edge map is obtained by the confocal microscopy module, specifically used to acquire surface structure and fine edge contours. The OCT depth data is obtained by the OCT module, specifically based on low coherence interferometry, constructing a through-hole depth model. The specific process will be described in detail in subsequent embodiments. Then, point cloud construction and culling are performed based on the input data to obtain a point cloud to be registered. Point cloud registration is performed based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud. Accordingly, this is performed by the 3D point cloud registration module. The original point cloud is generated by fusing confocal and OCT data. First, coarse registration is performed using RANSAC (Random Sample Consensus), and then fine registration is completed using ICP (Iterative Closest Point). The specific process will also be described in detail in subsequent specifications.

[0127] Furthermore, in this embodiment, a deep learning thermal stress prediction module is used to perform a process of predicting and obtaining a corrected stress field based on the registered point cloud input into a deep learning model. The network sampling deep learning model requires iterative optimization; the specific process will be described in detail in the subsequent specification. After obtaining the corrected stress field, a displacement difference risk assessment is performed based on the corrected stress field to output a risk heatmap and alarm log. The short-circuit risk is calculated by the intersection of the deformation field and the thermal stress field. The specific process includes deformation mapping, spacing calculation, and risk determination. Locally and remotely, the corresponding displacement value is extracted for each through-silicon via (TSV) coordinate. Risk determination is performed based on the actual spacing, identifying areas with excessive overlap (TSV spacing below the safe value). If d TSV <d min An alarm will be triggered, and the risk level (red, yellow, or green) will be reported.

[0128] According to an embodiment of the present invention, obtaining a confocal edge map specifically includes:

[0129] Acquire a laser reflection signal, wherein the laser reflection signal includes a PMT analog voltage signal;

[0130] The laser reflection signal is digitally sampled to obtain the digital signal of the galvanometer position;

[0131] The confocal edge map is obtained by mapping the digital signal of the galvanometer position onto the image matrix and then denoising it.

[0132] It should be noted that, in this embodiment, the laser wavelength is selected as λ = 635nm, an adjustable focal length objective lens is used, the numerical aperture NA = 0.95, and after the laser is focused, the XY direction scanning is controlled by a dual-axis scanning mirror. That is, the laser reflection signal is first acquired, and the laser reflection signal includes the PMT analog voltage signal. Specifically, only the reflection signal at the focal point is collected through pinhole filtering. The laser reflection signal is digitally sampled to obtain the digital signal of the galvanometer position, and the confocal edge map is obtained after mapping the digital signal of the galvanometer position onto the image matrix and then denoising is performed. The resolution reaches 0.2μm and the image frame rate is 10fps.

[0133] According to an embodiment of the present invention, acquiring OCT depth data specifically includes:

[0134] Interference spectra were obtained based on high-speed linear CMOS arrays.

[0135] The interference spectrum is calibrated to obtain the calibration spectrum;

[0136] Fourier transform and peak extraction are performed based on the calibration spectrum to obtain the set of depth coordinates of the through silicon via as the OCT depth data.

[0137] It should be noted that, in this embodiment, the coherence tomography module uses a low-coherence broadband light source (center wavelength 850nm, bandwidth 100nm). The interference structure adopts a Mach-Zehnder interferometer structure, and the receiver uses a high-speed linear CMOS array with an amplitude demodulator. The interference spectrum is obtained based on the high-speed linear CMOS array, and the interference spectrum is calibrated to obtain a calibration spectrum. Then, Fourier transform and peak extraction are performed based on the calibration spectrum to obtain the depth coordinate set of the through-silicon vias as the OCT depth data. The imaging depth range is 200μm, and the depth resolution Δz = 1.2μm.

[0138] According to an embodiment of the present invention, the step of constructing and removing point clouds based on the input data to obtain the point cloud to be registered specifically includes:

[0139] Based on the confocal edge map and the OCT depth data, timestamps are matched;

[0140] Assign corresponding depth data to each edge point of the confocal edge map to generate 3D points;

[0141] After statistical analysis of all 3D points and removal of outliers, the noise is removed to obtain the point cloud to be registered. Each point in the point cloud to be registered includes coordinates and reflection intensity values.

[0142] It should be noted that, in this embodiment, the control board in the control module of the present invention is designed based on Xilinx Artix-7 FPGA. Specifically, state machine logic is used to coordinate the laser modulator, electric displacement platform, and image acquisition unit. The synchronization error is less than 30ns and the sampling frequency reaches 1MHz. Therefore, the timestamp is first matched based on the confocal edge map and the OCT depth data. Specifically, the spatial position of the confocal and OCT data is matched according to the FPGA synchronization timestamp. The confocal data is used for TSV aperture edge recognition, and the OCT data is used for TSV depth topography reconstruction. After the two are combined, a filtering-enhancement-edge detection sequence is used to achieve accurate modeling.

[0143] Furthermore, in this embodiment, each edge point of the confocal edge map is assigned corresponding depth data to generate 3D points. Then, the neighborhood density is statistically analyzed to remove isolated points. After statistical analysis of all 3D points and removal of outliers, noise is removed to obtain the point cloud to be registered. Accordingly, each point in the obtained point cloud to be registered includes coordinates and reflection intensity values.

[0144] According to an embodiment of the present invention, the step of performing point cloud registration based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud specifically includes:

[0145] Calculate the feature descriptor for each point in the point cloud to be registered and perform initial pose estimation;

[0146] A transformation matrix is ​​calculated by randomly sampling several pairs of matching points to evaluate the inlier rate, and iterative optimization is performed based on a preset algorithm to minimize the objective function;

[0147] When convergence is determined based on the root mean square error of registration, the registered point cloud is output as the registered point cloud.

[0148] It should be noted that, in this embodiment, as Figure 2 The diagram shown illustrates the structure of a deep learning prediction network, which includes the following steps:

[0149] Point cloud acquisition: generating local point sets for each chip layer. Each point contains coordinates and a reflection intensity value;

[0150] Point cloud registration: Preprocessing: denoising, uniform sampling (VoxelGrid filtering, voxel size 0.1μm); Coarse registration: using FPFH descriptor matching and applying RANSAC for initial pose estimation, specifically calculating the feature descriptor of each point in the point cloud to be registered and performing initial pose estimation; Fine registration: minimizing the objective function based on the ICP algorithm, wherein several pairs of randomly sampled matching points are used to calculate the transformation matrix to evaluate the inlier rate, and iterative optimization is performed based on a preset algorithm to minimize the objective function, wherein the objective function is as follows:

[0151]

[0152] Where R is the rotation matrix, t is the translation vector, and p i For the source point cloud, q i For the corresponding points in the point cloud to be registered, the evaluation metrics of the objective function include RMSE (root mean square error of registration), the center offset Δx and Δy after registration, and the TSV axial overlap error Δz. TSV Specifically, in this embodiment, when convergence is determined based on the root mean square error of the registration, the registered point cloud is output as the registered point cloud.

[0153] According to an embodiment of the present invention, the corrected stress field is obtained by predicting the registered point cloud input into a deep learning model, specifically including:

[0154] The registration point cloud, material properties, and temperature field are obtained as model inputs;

[0155] The deep learning model architecture includes an encoder-decoder structure, wherein the encoder employs three 3D convolutional layers and pooling layers, and the decoder includes upsampling and skip connections, as well as boundary condition constraints.

[0156] The initial displacement field is obtained based on the model output, and the corrected stress field is obtained after correction.

[0157] It should be noted that, in this embodiment, the deep learning model architecture includes an encoder-decoder structure, wherein the encoder adopts three layers of 3D convolutional layers and pooling layers, and the decoder includes upsampling and skip connections, as well as boundary condition constraints. PINN (Physics-Informed Neural Network) is used to constrain the prediction results to meet the boundary conditions.

[0158] Furthermore, in this embodiment, the registration point cloud, material properties, and temperature field are obtained as model input X. input = [P,M,T], where P is the registration point cloud, M is the material property (e.g., coefficient of thermal expansion, Young's modulus), T is the temperature field, and the output of the deep learning model is the displacement field u(x,y,z), specifically corresponding to the thermal deformation of the chip. Regions with excessive overlap (TSV spacing below the safe value) are identified. The corresponding feedback risk levels (red, yellow, and green) are identified, and a thermal stress distribution map is exported for process optimization. For example, Figure 3 As shown, the diagram is an overlay of the thermal stress distribution map and the TSV offset map.

[0159] It is worth mentioning that during the testing and verification, a 3D chip sample was produced using a 4-layer stacked chip manufactured with a 65nm process, with each layer containing 256 TSVs. The sample size was 10×10mm. 2 Thermal shock test: temperature cycle T = [25℃→125℃→25℃], 30 cycles.

[0160] It should be noted that the test results are shown in Table 1. The results show that the present invention is significantly superior to existing methods in terms of comprehensive detection capabilities, especially in terms of registration accuracy and depth information fusion capabilities.

[0161] A third aspect of the present invention provides a computer-readable storage medium including a method program for alignment detection between layers of a three-dimensional chip stack structure. When executed by a processor, the method program implements the steps of the alignment detection method for layers of a three-dimensional chip stack structure as described in any of the preceding claims.

[0162] This invention discloses an alignment detection method, system, and medium for interlayer alignment of three-dimensional chip stacking structures. It can detect the depth, aperture, and boundary morphology of TSV vias in real time; quantify the relative positional deviation between multiple chips; and predict stress concentration areas by fusing thermal imaging, material thermal expansion coefficient, and structural deformation information, and provide feedback for the alignment control system to achieve dynamic compensation. Through the combination of multimodal optical detection, efficient algorithms, and deep learning, it solves the problems of alignment accuracy and thermal deformation prediction in 3D-IC manufacturing, and has significant advantages in high precision, real-time performance, and industrialization.

[0163] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0164] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0165] In addition, in the various embodiments of the present invention, each functional unit can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0166] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0167] Alternatively, if the integrated units of this invention are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this invention, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, RAM, magnetic disks, or optical disks.

Claims

1. A method for alignment detection between layers in a three-dimensional chip stacked structure, characterized in that, Includes the following steps: Acquire input data, which includes a confocal edge map and OCT depth data; Based on the input data, point cloud construction and elimination are performed to obtain the point cloud to be registered; Point cloud registration is performed based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud; The corrected stress field is obtained by inputting the registered point cloud into a deep learning model for prediction. Based on the modified stress field, a risk assessment of displacement difference is performed to output a risk heatmap and alarm log.

2. The alignment detection method for interlayer structures in a three-dimensional chip stack according to claim 1, characterized in that, Obtaining the confocal edge map specifically includes: Acquire a laser reflection signal, wherein the laser reflection signal includes a PMT analog voltage signal; The laser reflection signal is digitally sampled to obtain the digital signal of the galvanometer position; The confocal edge map is obtained by mapping the digital signal of the galvanometer position onto the image matrix and then denoising it.

3. The alignment detection method for interlayer structures in a three-dimensional chip stack according to claim 2, characterized in that, Obtaining OCT depth data specifically includes: Interference spectra were obtained based on high-speed linear CMOS arrays. The interference spectrum is calibrated to obtain the calibration spectrum; Fourier transform and peak extraction are performed based on the calibration spectrum to obtain the set of depth coordinates of the through silicon via as the OCT depth data.

4. The alignment detection method for interlayer structures of a three-dimensional chip stack according to claim 3, characterized in that, The process of constructing and removing points based on the input data to obtain the point cloud to be registered specifically includes: Based on the confocal edge map and the OCT depth data, timestamps are matched; Assign corresponding depth data to each edge point of the confocal edge map to generate 3D points; After statistical analysis of all 3D points and removal of outliers, the noise is removed to obtain the point cloud to be registered. Each point in the point cloud to be registered includes coordinates and reflection intensity values.

5. The alignment detection method for interlayer structures in a three-dimensional chip stack according to claim 4, characterized in that, The step of performing point cloud registration based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud specifically includes: Calculate the feature descriptor for each point in the point cloud to be registered and perform initial pose estimation; A transformation matrix is ​​calculated by randomly sampling several pairs of matching points to evaluate the inlier rate, and iterative optimization is performed based on a preset algorithm to minimize the objective function; When convergence is determined based on the root mean square error of registration, the registered point cloud is output as the registered point cloud.

6. The alignment detection method for interlayer structures in a three-dimensional chip stack according to claim 5, characterized in that, The corrected stress field is obtained by inputting the registered point cloud into a deep learning model for prediction, specifically including: The registration point cloud, material properties, and temperature field are obtained as model inputs; The deep learning model architecture includes an encoder-decoder structure, wherein the encoder employs three 3D convolutional layers and pooling layers, and the decoder includes upsampling and skip connections, as well as boundary condition constraints. The initial displacement field is obtained based on the model output, and the corrected stress field is obtained after correction.

7. A system for alignment detection between layers in a three-dimensional chip stacking structure, characterized in that, The system includes a memory and a processor. The memory includes a program for an alignment detection method between layers of a three-dimensional chip stack structure. When executed by the processor, the alignment detection method program for the three-dimensional chip stack structure layers performs the following steps: Acquire input data, which includes a confocal edge map and OCT depth data; Based on the input data, point cloud construction and elimination are performed to obtain the point cloud to be registered; Point cloud registration is performed based on the point cloud to be registered and the reference point cloud to obtain a registered point cloud; The corrected stress field is obtained by inputting the registered point cloud into a deep learning model for prediction. Based on the modified stress field, a risk assessment of displacement difference is performed to output a risk heatmap and alarm log.

8. The alignment detection system for interlayer structures of a three-dimensional chip stack according to claim 7, characterized in that, Obtaining the confocal edge map specifically includes: Acquire a laser reflection signal, wherein the laser reflection signal includes a PMT analog voltage signal; The laser reflection signal is digitally sampled to obtain the digital signal of the galvanometer position; The confocal edge map is obtained by mapping the digital signal of the galvanometer position onto the image matrix and then denoising it.

9. The alignment detection system for interlayer structures of a three-dimensional chip stack according to claim 8, characterized in that, Obtaining OCT depth data specifically includes: Interference spectra were obtained based on high-speed linear CMOS arrays. The interference spectrum is calibrated to obtain the calibration spectrum; Fourier transform and peak extraction are performed based on the calibration spectrum to obtain the set of depth coordinates of the through silicon via as the OCT depth data.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a method program for alignment detection between layers of a three-dimensional chip stack structure. When the method program for alignment detection between layers of a three-dimensional chip stack structure is executed by a processor, it implements the steps of the method for alignment detection between layers of a three-dimensional chip stack structure as described in any one of claims 1 to 6.