Wafer box detection method

Abstract

The invention relates to a wafer box detection method, which is applied to the field of wafer processing and comprises the following steps: acquiring a plurality of pieces of image information of a wafer box to be detected through image acquisition equipment; fusing and splicing a plurality of pieces of image information to obtain a clear wafer box image of the to-be-detected wafer box; extracting contour information of all wafers in the clear image of the wafer box, and judging whether the wafer box to be detected meets a preset wafer box detection standard or not according to the contour information of the wafers; if the to-be-detected wafer box meets the preset wafer box detection standard, judging that the to-be-detected wafer box is not abnormal; and otherwise, judging that the wafer box to be detected is abnormal and determining the abnormal type. The wafer attitude defect detection method has the technical effects that the wafer attitude defect detection rate and detection efficiency are improved, and the large-scale production requirement is met.

Description

Technical Field

[0001] This application relates to the field of wafer processing technology, and in particular to a wafer cassette inspection method. Background Technology

[0002] A wafer cassette is a carrier specifically designed for placing, transporting, and storing semiconductor wafers; the interior of a wafer cassette features symmetrical trenches or support structures and can accommodate 12 wafers. inch, 8 inch, 6 Wafers come in various sizes, including inch. After leaving the factory, the wafers are packaged and transported in specialized wafer boxes. During manufacturing, the orientation of the wafers within the boxes is checked to prevent abnormal orientation and thus avoid damage during transport.

[0003] Traditionally, wafer orientation inspection within a wafer cassette involves manual checks, which are inefficient, reliant on operator experience, and prone to missed or incorrect assessments. Therefore, machine vision-based methods are now commonly used to inspect wafer orientation within the cassette. This involves acquiring a panoramic image and using it to detect wafer orientation. However, wide-angle panoramic images captured by cameras often exhibit edge distortion, resulting in unclear image edges and hindering accurate wafer orientation detection and assessment, ultimately leading to low defect detection rates. Summary of the Invention

[0004] To address the issue of edge distortion in panoramic images captured by wide-angle cameras, which leads to unclear image edges and difficulty in accurately detecting and judging the wafer's orientation, resulting in a low defect detection rate, this application provides a wafer cell inspection method, employing the following technical solution: The method includes: The image acquisition device acquires several image information of the wafer cell under test; Several image information are fused and stitched together to obtain a clear image of the wafer cassette under test; Extract the outline information of all wafers in the clear image of the wafer cassette, and determine whether the wafer cassette under test meets the preset wafer cassette inspection standard based on the outline information of the wafers; If the wafer cell under test meets the preset wafer cell inspection standard, then the wafer cell under test is determined to be without abnormality. Otherwise, the wafer cell under test is determined to be abnormal and the type of abnormality is identified.

[0005] In one specific implementation scheme, the acquisition of several image information of the wafer cassette under test via the image acquisition device includes: The image acquisition device is controlled to move in a preset direction and step, and acquires several first original images of the wafer cell under test at different angles. The process of fusing and stitching together several image information to obtain a clear image of the wafer cassette under test includes: The SIFT feature point matching algorithm is used to calculate the feature points of the first overlapping region between two adjacent first original images; A coordinate transformation matrix is ​​calculated based on the feature points of the first overlapping region to perform image alignment processing on adjacent first original images and generate several first aligned images. A weighted fusion algorithm is used to process the overlapping boundaries between adjacent first aligned images to remove the overlapping boundaries; All first aligned images with overlapping boundaries removed are image-fused to generate a clear image of the wafer cassette.

[0006] In one specific implementation, the step of calculating the feature points of the first overlapping region between two adjacent first original images using the SIFT feature point matching algorithm includes: Detect areas in the first original image where the wafer and corresponding slot are occluded, and set them as occluded areas; An image inpainting algorithm is used to inpaint the occluded areas in several first original images, and several inpainted and optimized images are generated. The SIFT feature point matching algorithm is used to calculate the feature points of the first overlapping region between two adjacent repaired and optimized images.

[0007] In one specific implementation scheme, the acquisition of several image information of the wafer cassette under test via the image acquisition device includes: The image acquisition device is controlled to move in a preset direction and acquire video data of the wafer cell under test; The process of fusing and stitching together several image information to obtain a clear image of the wafer cassette under test includes: Based on a preset image sharpness evaluation index, an adaptive frame extraction algorithm is used to dynamically adjust the frame extraction interval and extract several frames of the second original image from the video data. The SIFT feature point matching algorithm is used to calculate the feature points of the second overlapping region between two adjacent second original images; The coordinate transformation matrix is ​​calculated based on the feature points of the second overlapping region to perform image alignment processing on adjacent second original images and generate several second aligned images; A weighted fusion algorithm is used to process the overlapping boundaries between adjacent second-aligned images to remove the overlapping boundaries; All second-aligned images with overlapping boundaries removed are image-fused to generate a clear image of the wafer cassette.

[0008] In one specific implementation scheme, the step of dynamically adjusting the frame extraction interval using an adaptive frame extraction algorithm based on a preset image sharpness evaluation index, and extracting several frames of the second original image from the video data includes: Starting from the first frame of the video data, the image sharpness value of the current frame is calculated according to a preset image sharpness evaluation index; Determine whether the image sharpness value is less than a preset sharpness threshold; If the image sharpness value is less than the preset sharpness threshold, the frame skipping interval is set to 1. If the image sharpness value is not less than the preset sharpness threshold, then the frame skipping interval is set to 2.

[0009] In one specific implementation scheme, the acquisition of several image information of the wafer cassette under test via the image acquisition device includes: A panoramic image of the wafer cassette under test and a first partial image and a second partial image of both sides of the wafer cassette under test are acquired using an image acquisition device. The first partial image includes at least the left edge image of the wafer cassette under test, and the second partial image includes at least the right edge image of the wafer cassette under test. The process of fusing and stitching together several image information to obtain a clear image of the wafer cassette under test includes: An image pyramid fusion algorithm is used to unify the resolution of the panoramic image, the first local image, and the second local image, and generate a panoramic optimized image, a first optimized local image, and a second optimized local image, respectively. The panoramic optimized image, the first optimized local image, and the second optimized local image are fused together to generate the clear image of the wafer cell.

[0010] In one specific implementation, the step of fusing the panoramic optimized image, the first optimized local image, and the second optimized local image to generate the clear image of the wafer cassette includes: The panoramic optimized image, the first optimized local image, and the second optimized local image are mapped to a preset reference coordinate system, and corresponding panoramic reference images, first reference local images, and second reference local images are generated respectively. Calculate the pixels in the third overlapping region of the panoramic reference image, the first reference local image, and the second reference local image, and set the portion excluding the pixels in the third overlapping region as the non-overlapping region portion; The pixels in the third overlapping region are weighted and fused according to a preset weight to generate a fused region pixel; The pixels in the fusion region and the non-overlapping region are fused together to generate a clear image of the wafer cell.

[0011] In one specific implementation scheme, determining whether the wafer cassette to be tested meets the preset wafer cassette inspection criteria based on the wafer's contour information includes: Extract the contour information of all slots from the clear image of the wafer cassette; The least squares method is used to fit and generate the wafer edge line and the corresponding slot edge line based on the contour information of all wafers and the contour information of all slots. Calculate the actual included angle between the edge lines of the wafer edge line and the slot edge line; Compare the actual included angle of the edge line with the standard included angle; If the actual included angle of the edge line is not greater than the standard included angle, then the wafer cell under test is determined to be without abnormality. If the actual included angle of the edge line is greater than the standard included angle, then the wafer cell under test is determined to have an anomaly and the anomaly type is determined to be a misalignment anomaly.

[0012] In one specific implementation scheme, determining that the wafer cell under test is free of abnormalities includes: Calculate the outline area value of each wafer and compare the outline area value of each wafer with a preset outline area threshold. If the area value of the wafer outline is not greater than the outline area threshold, then the wafer cell under test is determined to be normal. If the area value of the wafer outline is greater than the outline area threshold, it is determined that the wafer cell under test has an anomaly and the anomaly type is determined to be a stacking anomaly.

[0013] In one specific implementation scheme, determining that the wafer cell under test is free of abnormalities includes: Based on the wafer profile information, a first straight line tangent to the bend point of the wafer profile and a second straight line passing through the two endpoints of the wafer profile are fitted and generated, wherein the first straight line is parallel to the second straight line. Calculate the actual distance between the first straight line and the second straight line; The actual distance value is compared with a preset distance deviation threshold; If the actual distance value is not greater than the distance deviation threshold, then the wafer cell under test is determined to be normal. If the actual distance value is greater than the distance deviation threshold, the wafer cell under test is determined to have an anomaly and the anomaly type is determined to be a bending anomaly.

[0014] In summary, this application has the following beneficial technical effects: By acquiring clear images of the wafer cassette, it's possible to determine if the cassette itself has defects, specifically whether the wafers inside are in an abnormal orientation. This enables a fully automated defect detection method, avoiding missed or false positives caused by manual inspection of wafer cassette defects. This improves the defect detection rate and minimizes secondary damage to wafers during manufacturing and transportation, thus meeting the demands of large-scale production. Furthermore, different methods of acquiring wafer cassette images can be applied to various application scenarios and production environments, addressing issues such as stacking, occlusion, and distortion. This enhances the clarity of the acquired wafer cassette images, improving the accuracy of defect identification based on wafer orientation within the cassette. Attached Figure Description

[0015] Figure 1 This is a schematic diagram used to illustrate a wafer cassette; Figure 2 This is a flowchart of the wafer cell inspection method in the embodiments of this application; Figure 3 This is a schematic diagram used to illustrate the current process of acquiring images of a wafer cassette. Figure 4 This is a schematic diagram of the image acquisition device moving to acquire wafer cell image information in an embodiment of this application; Figure 5 This is a schematic diagram of the pillars inside the wafer cassette obscuring the wafer in an embodiment of this application; Figure 6 This is a schematic diagram illustrating how the three cameras acquire images of the wafer cassette in an embodiment of this application; Figure 7 This is a schematic diagram of wafer misalignment anomalies within the wafer cassette in an embodiment of this application; Figure 8 This is a schematic diagram of an abnormal wafer stacking within a wafer cassette in an embodiment of this application; Figure 9 This is a schematic diagram of abnormal wafer bending inside the wafer cassette in an embodiment of this application; Figure 10 This is a schematic diagram of the wafer cassette clip template in an embodiment of this application. Detailed Implementation

[0016] The following combination Figures 1-10 This application will be described in further detail.

[0017] This application discloses a wafer cassette inspection method. This method can acquire clear images of the wafer cassette and visually detect wafer orientation defects and anomalies within the cassette based on these images, thereby improving the detection rate of wafer orientation defects and preventing secondary damage to the wafers during transportation, which could affect wafer performance.

[0018] A wafer cassette is a carrier specifically designed for placing, transporting, and storing semiconductor wafers; the interior of a wafer cassette features symmetrical trenches or support structures and can accommodate 12 wafers. inch, 8 inch, 6 Wafers come in various sizes, including inch. After leaving the factory, wafers are packaged and transported in specialized wafer cassettes. During manufacturing, the orientation of the wafers within the cassettes is checked to prevent abnormal orientation and thus avoid damage during transport. (Refer to...) Figure 1 This is a schematic diagram of a wafer box, which includes several slots for placing wafers. Generally, one slot corresponds to one wafer.

[0019] Traditionally, wafer orientation inspection within a wafer cassette involves manual inspection, which is inefficient, reliant on operator experience, and prone to missed or incorrect assessments. Therefore, machine vision-based methods are commonly used to inspect wafer orientation within the cassette by acquiring a panoramic image and then performing orientation detection based on this image. However, wide-angle panoramic images captured by cameras often exhibit edge distortion, resulting in unclear image edges and hindering accurate wafer orientation detection and assessment, leading to a low defect detection rate. To improve the clarity of wafer cassette images and thus increase the detection rate of wafer orientation defects within the cassette, this application provides a wafer cassette inspection method.

[0020] Reference Figure 2 The method includes the following steps: S10: Acquire several image information of the wafer cell under test through an image acquisition device.

[0021] Specifically, several image information of the wafer cell under test is acquired through a preset image acquisition device. The preset image acquisition device can be a camera, camcorder, or other device with functions such as taking photos and videos. In this embodiment, a camcorder is used as an example. The several image information of the wafer cell under test can be several images of the wafer cell under test, or it can be complete video data information of the wafer cell under test. Frame images are then extracted from the video data for processing.

[0022] S20, several image information are fused and stitched together to obtain a clear image of the wafer cell to be tested.

[0023] Specifically, after acquiring several image pieces, the images are fused and stitched together to obtain a clear image of the wafer cassette under test. Traditionally, wafer cassette images are acquired by taking a panoramic view of the wafer cassette from its center, as described above. Figure 3This method of imaging can cause distortion in the edge areas of the wafer cassette image, making it impossible to accurately identify the wafer's outline and thus determine defects in the wafer cassette. Therefore, by acquiring multiple image information of the wafer cassette using an image acquisition device, and then processing and fusing these multiple image information, a clear image of the wafer cassette can be obtained, thereby improving the detection rate of wafer cassette defects.

[0024] S30: Extract the outline information of all wafers in the clear image of the wafer cell, and determine whether the wafer cell under test meets the preset wafer cell inspection standard based on the outline information of the wafers.

[0025] Specifically, after obtaining a clear image of the wafer cassette, the outline information of all wafers in the clear image is extracted. Based on the outline information of the wafers, it can be determined whether there are defects in the placement of the wafers, thereby determining whether the wafer cassette loaded with the wafers meets the preset wafer cassette inspection standards.

[0026] S40. If the wafer cell under test meets the preset wafer cell inspection standard, the wafer cell under test is determined to be without abnormality.

[0027] Specifically, if the wafer cassette under test meets the preset wafer cassette testing standards, it can be determined that the wafer cassette under test is normal and can be transported or proceeded to the next step.

[0028] S50, otherwise, determine that the wafer cell under test has an anomaly and identify the anomaly type.

[0029] Specifically, if the wafer cassette under test does not meet the preset wafer cassette inspection standards, then the wafer cassette under test has abnormal defects. It is necessary to determine the specific type of defect by using the outline information of the wafer inside the wafer cassette, and remind the user to check and troubleshoot in time to avoid secondary damage to the wafer during transportation.

[0030] In this application, by acquiring a clear image of the wafer cassette, the presence of defects in the wafer cassette can be determined based on this image. Specifically, it can be determined whether the orientation of the wafers placed within the cassette is abnormal. This enables a fully automated defect detection method, avoiding missed or false defects caused by manual inspection of the wafer cassette. This improves the defect detection rate of the wafer cassette and minimizes secondary damage to wafers during manufacturing and transportation, thus meeting the needs of large-scale production. Furthermore, acquiring wafer cassette images through different methods can be applied to various application scenarios and production environments, addressing various anomalies such as stacking, occlusion, and distortion. This improves the clarity of the acquired wafer cassette images, contributing to the accuracy of defect identification of wafer orientation within the cassette based on clear images.

[0031] In one embodiment, acquiring several image information of the wafer cell under test via an image acquisition device can be specifically performed as follows: The image acquisition device is controlled to move according to a preset direction and step, and acquires several first raw images of the wafer cassette under test from different angles. Specifically, refer to... Figure 4 The image acquisition device is illustrated using a camera as an example. When the camera is acquiring an image, it is controlled to move in a preset direction and step. At the same time, when capturing images of the wafer cassette, the wide-angle angle of the camera is adjusted to reduce the camera's shooting range. Ultimately, several images of different segments of the wafer cassette can be acquired, and the acquired images of different segments of the wafer cassette are set as several first original images.

[0032] Subsequently, the method of fusing and stitching together several image information to obtain a clear image of the wafer cassette under test can be specifically performed as follows: First, the SIFT feature point matching algorithm is used to calculate the feature points of the first overlapping region between two adjacent first original images. Then, a coordinate transformation matrix is ​​calculated based on the feature points of the first overlapping region to align the adjacent first original images and generate several first aligned images. The SIFT feature point matching algorithm is an algorithm that finds corresponding local features between two images. After finding the feature points of the first overlapping region between two adjacent first original images, a coordinate transformation matrix is ​​calculated based on these feature points, allowing the two adjacent images to be aligned. This avoids defects such as ghosting in the final fused image due to misaligned image sizes or other misalignment factors, which could affect subsequent defect detection and judgment. Regarding image edge processing, users can also use image enhancement algorithms in practical applications to improve boundary contrast, expand the feature point detection range, and supplement edge details, thereby further improving image clarity.

[0033] After alignment, a weighted fusion algorithm is used to remove overlapping boundaries between adjacent first-aligned images. Finally, all first-aligned images with their overlapping boundaries removed are fused to generate a clear image of the wafer cell. By removing overlapping boundaries, the uniqueness and accuracy of the data are ensured. Removing overlapping boundaries before image fusion improves the quality of the fused image and enhances its clarity.

[0034] Furthermore, considering that the wafers inside the wafer cassette may be obscured by the external casing when capturing images of the wafer cassette, the method of using the SIFT feature point matching algorithm to calculate the feature points of the first overlapping region between two adjacent first original images can be specifically implemented as follows: First, regions where the wafer and corresponding slots are occluded in several first original images are detected and designated as occluded regions; (Refer to...) Figure 5The wafer housing contains pillars that can affect wafer orientation detection and judgment during image capture. Therefore, by detecting and processing the occluded portions, the influence of these pillars on wafer orientation detection is eliminated. After detecting the occluded areas, an image inpainting algorithm is used to inpaint the occluded areas in several first original images, generating several inpainted optimized images. Finally, the SIFT feature point matching algorithm is used to calculate the feature points of the first overlapping region between two adjacent inpainted optimized images.

[0035] In this application, by adjusting the shooting wide angle of the image acquisition device, images of multiple wafer cassette segments are acquired. Image alignment and fusion processing of the multiple wafer cassette segments are then performed to improve image clarity and thus enhance image quality. Furthermore, considering that the main body inside the wafer cassette may affect the detection of wafer orientation and defect determination, image restoration or image completion is performed to obtain a complete wafer image, thereby helping to improve the detection rate of wafer cassette defects.

[0036] In one embodiment, the method of acquiring several image information of the wafer cell under test through an image acquisition device can be specifically performed as follows: The image acquisition device is controlled to move in a preset direction and acquire video data of the wafer cell under test. (Refer to...) Figure 4 The image acquisition device is illustrated using a camera as an example, and in this embodiment, the camera has video recording capabilities. When actually acquiring image information, the camera is controlled to move continuously in a preset direction at a preset speed, which can be set by the user. The camera is controlled to move from one end of the wafer cassette to the other to acquire a complete video data segment. Image processing is then performed on this video data to obtain a clear image of the wafer cassette. It should be noted that in this embodiment, the camera's wide-angle lens can be a default setting, but users can adjust it according to their needs; no restrictions are imposed here.

[0037] Subsequently, fusing and stitching together several image information to obtain a clear image of the wafer cassette under test can be specifically performed as follows: First, based on a preset image sharpness evaluation index, an adaptive frame extraction algorithm is used to dynamically adjust the frame extraction interval, extracting several frames of second original images from the video data. Specifically, starting from the first frame of the video data, the image sharpness value of the current frame is calculated according to the preset image sharpness evaluation index; it is then determined whether the image sharpness value is less than a preset sharpness threshold; if the image sharpness value is less than the preset sharpness threshold, the frame extraction interval is set to 1; if the image sharpness value is not less than the preset sharpness threshold, the frame extraction interval is set to 2. By using the adaptive frame extraction algorithm to extract several frames of second original images from the original video data, the amount of image processing can be reduced while preserving as much detail as possible in the original images, thus ensuring the sharpness of the final fused image.

[0038] Next, the SIFT feature point matching algorithm is used to calculate the feature points of the second overlapping region between two adjacent second original images. A coordinate transformation matrix is ​​then calculated based on these feature points to align the adjacent second original images, generating several second aligned images. The SIFT feature point matching algorithm is an algorithm that finds corresponding local features between two images. After finding the feature points of the second overlapping region between two adjacent second original images, a coordinate transformation matrix is ​​calculated based on these feature points, allowing the two adjacent images to be aligned. This avoids defects such as ghosting in the final fused image due to misaligned image sizes or other misalignment factors, which could affect subsequent defect detection and judgment. Regarding image edge processing, users can also use image enhancement algorithms in practical applications to improve boundary contrast, expand the feature point detection range, and supplement edge details, thereby further improving image clarity.

[0039] After alignment, a weighted fusion algorithm is used to remove overlapping boundaries between adjacent second-aligned images. Finally, all second-aligned images with their overlapping boundaries removed are fused to generate a clear image of the wafer cell. By removing overlapping boundaries, the uniqueness and accuracy of the data are ensured. Removing overlapping boundaries before image fusion improves the quality of the fused image and enhances its clarity.

[0040] In addition, when processing raw video data, if a second raw image of a suitable clear frame is selected, the camera exposure parameters are automatically increased (e.g., exposure time 32ms, gain 3, etc.), the light source fill mode is turned on, the video is reshot, and adaptive frame extraction is performed. If there is inter-frame jitter, an image registration algorithm can be used to correct the inter-frame displacement, and the wafer position can be predicted based on Kalman filtering to reduce the impact of jitter.

[0041] In this application, the original video data is acquired for image fusion. When processing the original video data, the original processed image is obtained by using an adaptive frame extraction method. The adaptive frame extraction method can reduce the amount of data processing while ensuring image clarity and preserving image details as much as possible, thereby improving the image fusion quality and data processing efficiency.

[0042] In one embodiment, the method of acquiring several image information of the wafer cell under test through an image acquisition device can be specifically performed as follows: A panoramic image of the wafer cassette under test, along with first and second partial images of both sides of the wafer cassette, are acquired using an image acquisition device. The first partial image includes at least the left edge of the wafer cassette under test, and the second partial image includes at least the right edge of the wafer cassette under test. Specifically, refer to... Figure 6 In this embodiment of the application, the image acquisition device is described using a camera as an example. Three cameras are set up to acquire a panoramic image of the wafer cell, a first partial image including at least the left edge, and a second partial image including at least the right edge, for a total of three images.

[0043] Subsequently, fusing and stitching together several image information to obtain a clear image of the wafer cassette under test can be specifically performed as follows: First, an image pyramid fusion algorithm is used to unify the resolution of the panoramic image, the first local image, and the second local image, generating an optimized panoramic image, a first optimized local image, and a second optimized local image, respectively. These images are then mapped to a preset reference coordinate system, generating corresponding panoramic reference images, first reference local images, and second reference local images. The reference coordinate system can be a user-preset coordinate system (i.e., a coordinate system other than the coordinate systems of the three acquired images), or it can be one of the three image coordinate systems selected, with the coordinate systems of the other two images transformed to the selected image's coordinate system. By unifying the resolution and transforming the coordinate system, pixel correspondence and spatial alignment are ensured, preventing distortion, inconsistencies, or artifacts in the fusion result, thereby improving the accuracy and clarity of the fused image.

[0044] Next, the pixels in the third overlapping region of the panoramic reference image, the first reference local image, and the second reference local image are calculated, and the portion excluding the pixels in the third overlapping region is set as the non-overlapping region. The pixels in the third overlapping region are then weighted and fused according to a preset weight to generate the fused region pixels. Finally, the fused region pixels and the non-overlapping region portions are fused to generate a clear image of the wafer cell. By performing pixel-level fusion on the overlapping parts of the aligned images, the effective features of each image can be preserved. If edge distortion occurs during image fusion processing, Gaussian blurring can be applied to the edges of the left and right images before fusion to reduce the weight of the distorted areas, and then corrected using the edge features of the panoramic image. Furthermore, if the three acquired images have uneven illumination before image fusion processing, a homomorphic filtering algorithm can be used to separate the illumination and reflection components of the images, unifying the brightness distribution of the three images.

[0045] It should be noted that in this embodiment, three original images of the wafer cassette are acquired using panoramic and left / right cameras. However, in practical applications, a distributed camera deployment of five workstations can also be used. Cameras are deployed in five locations on the wafer cassette: upper left, upper right, lower left, lower right, and panoramic. Images are captured in sequence from panoramic to partial views to cover different positions of the wafer and enrich the details of the wafer cassette images. If camera distortion occurs during the shooting process, especially in the upper left, upper right, lower left, and lower right corners, a distortion correction model can be established using the Zhang Zhengyou calibration method to correct the images from easily distorted workstations such as the upper left and lower right in real time.

[0046] In this application, a panoramic image is combined with local images from the left and right edges to improve the clarity of the fused image. Separate imaging of the left and right edges focuses on details on both sides of the wafer cassette, avoiding the effects of edge distortion, while panoramic imaging ensures global coverage. The fusion of these three elements achieves a complementary effect of "local details + global view," improving image quality and thus increasing the recognition rate of complex defects in the wafer cassette. Compared to a single imaging method, the detection efficiency is improved by 40%, and the false negative rate is reduced by 50%.

[0047] In summary, three different methods can be used to acquire clear images of wafer cells. These different image acquisition methods are suitable for different application scenarios, can cope with different production environments, and can solve various anomalies such as stacking, occlusion, and distortion. By acquiring multiple images through multi-station image acquisition and performing multi-image fusion processing, image quality and clarity can be improved, defect identification accuracy can be increased, and false positive and false negative rates can be reduced. This can achieve a defect identification accuracy of ≥99%, a false negative rate of <0.5%, a false positive rate of <1%, and an accuracy of ±0.5mm.

[0048] In one embodiment, the method of determining whether a wafer cell meets a preset wafer cell inspection standard based on the wafer's contour information can be specifically implemented as follows: First, extract the outline information of all slots in the clear image of the wafer cassette. Generally, one slot corresponds to one wafer; however, it's possible that during wafer placement, the two sides of the wafer might be placed in different slots. (Refer to...) Figure 7 , Figure 7 The portion outlined in the middle indicates a misalignment anomaly on the wafer. Therefore, the presence of a misalignment anomaly is determined by comparing the correct position of the wafer with the correct position of the slot. Specifically, the contour information of the slot and the wafer is obtained. Then, the least squares method is used to fit and generate the wafer edge line and the corresponding slot edge line based on the contour information of all wafers and slots. The actual angle between the wafer edge line and the slot edge line is calculated. The actual angle is compared with a standard angle. If the actual angle is greater than the standard angle, the wafer cell under test is determined to have a defect, and the defect type is a misalignment anomaly. If the actual angle is not greater than the standard angle, the wafer cell under test is determined to be without anomalies. Under normal circumstances, the wafer edge line and the slot edge line should be approximately parallel, so the angle between them should be approximately 0. If the angle between the two edge lines is greater than a preset value, a misalignment anomaly can be determined. For example, assuming the preset value of the included angle is set to 0.5°, when the calculated included angle is greater than 0.5°, it can be determined that there is a defect in the wafer cell, and the defect type is misalignment anomaly.

[0049] In one embodiment, considering that the wafer may shift within the slot during the movement of the wafer cassette, if the slot is relatively large compared to the wafer, the wafer has a large movement space, and the angle between the wafer and the edge of the slot may be greater than a preset value, leading to a false defect judgment. Therefore, the method for determining that the wafer cassette under test has a defect and that the defect type is misalignment can be specifically executed as follows: After determining that the angle between the wafer edge and the slot edge is greater than a preset value, and initially identifying it as a misalignment anomaly, the wafer center point and the slot center point of each wafer are determined based on a clear image of the wafer cell. The actual center offset distance between each wafer center point and the corresponding slot center point in the direction parallel to the bottom edge of the slot is calculated. The actual center offset distance is compared with a center offset threshold. If the actual center offset distance is greater than the center offset threshold, the wafer cell under test is determined to have a defect and the defect type is misalignment anomaly. If the actual center offset distance is greater than the center offset threshold, the wafer cell under test is determined to have no anomaly.

[0050] The wafer may be offset within the slot, but its center should remain within a reasonable range of the slot center. If the offset between the wafer center and the slot center exceeds a preset offset, it can be further identified as a misalignment anomaly. For example, if the preset offset is set to 0.5mm, and the calculated offset between the wafer center and the slot center is greater than 0.5mm, it indicates a misalignment anomaly. Building upon the edge line angle judgment method, this center offset judgment method improves the detection rate and accuracy of misalignment anomalies, minimizing missed and false defects, saving time and increasing efficiency while enhancing defect detection accuracy.

[0051] In one embodiment, considering that wafer orientation within the wafer cassette may include not only misalignment anomalies but also stacking anomalies, the method for determining that the wafer cassette under test is free of anomalies after determining that there are no misalignment anomalies can be specifically executed as follows: First, the outline area value of each wafer is calculated and compared with a preset outline area threshold. Specifically, the outline area value of each wafer is calculated, and anomalies are determined based on the wafer outline area value. Wafers are typically placed one per slot in a wafer cassette. The outline area value of a single wafer is usually within a defined range with minimal error. If the outline area value of a particular wafer is excessively large, it may indicate that two or more wafers are stacked, meaning two or more wafers are placed in one slot. In this case, an alarm should be triggered to alert the user to the anomaly requiring handling. Next, the outline area value of each wafer is compared with a preset outline area threshold. The outline area threshold can be manually set, for example, 1.5 times the standard wafer area value. In actual use, the threshold can be set according to the actual size of the wafer; there are no restrictions here, only the 1.5 times standard wafer area value threshold setting method is used as an example for explanation. Then, the calculated contour area value of each wafer is compared with the preset contour area threshold to generate a comparison result.

[0052] If the area value of the wafer outline exceeds the outline area threshold, it indicates an anomaly in a slot within the wafer cell, suggesting a defect in the wafer cell itself. The defect is determined to be a stacking anomaly, requiring the user to promptly inspect and troubleshoot to prevent secondary wafer damage. (Refer to...) Figure 8In the image, the area of ​​the outline within the box is significantly larger than the area of ​​the rest of the outline, indicating a defect in the wafer cassette under test, specifically a stacking anomaly. Furthermore, when identifying stacking anomalies, users can incorporate grayscale analysis. The grayscale values ​​in stacked regions typically exhibit a stepped distribution, which can be used to assist in defect verification, thereby further improving the defect detection rate and minimizing false positives. If, after comparison, the area of ​​the wafer outline is not greater than the outline area threshold, it indicates that the wafer cassette under test is not abnormal and requires no special processing.

[0053] In this application, wafer stacking anomalies are detected by comparing wafer outline area values. When two or more wafers are placed in one slot, wear may occur between the wafers, thus affecting wafer performance. Therefore, by recognizing the wafer outline and calculating the area value in a clear image of the wafer cell, wafer stacking anomalies can be identified and detected, and the abnormal slots can be located. This can help avoid wafer stacking as much as possible, improve the detection rate of wafer cell defects, and replace traditional manual inspection, thereby improving efficiency.

[0054] In one embodiment, considering that in addition to misalignment and stacking anomalies, bending anomalies may also exist within the wafer cell, the method for determining that the wafer cell under test is free of anomalies after determining that there are no misalignment or stacking anomalies can be specifically executed as follows: First, based on the wafer's contour information, a first straight line tangent to the bend point of the wafer contour and a second straight line passing through the two endpoints of the wafer contour are fitted and generated. The first and second straight lines are parallel. Since the wafer is relatively thin, when the wafer is not bent, the two parallel lines should be parallel to the two faces of the wafer, and the distance between the two parallel lines is the wafer's thickness. However, when the wafer is bent, it will bulge, forming a curve when viewed from the side. Figure 9 A tangent straight line is drawn at the bending point of the wafer curve, and a parallel straight line is drawn through the two endpoints of the wafer profile, which is the second straight line. The degree of wafer bending can be calculated by making these two lines parallel. The actual distance between the first and second straight lines is calculated; this actual distance is compared to a distance deviation threshold. If the actual distance is greater than the distance deviation threshold, the wafer cell under test is determined to have a defect, and the defect type is bending anomaly; if the actual distance is greater than the distance deviation threshold, the wafer cell under test is determined to be without anomaly.

[0055] Under normal circumstances, the deviation between two parallel lines on a wafer is small and can be approximated as the wafer's thickness. However, when a wafer bends, it curves into a line, resulting in a larger deviation between the two parallel lines. If this deviation exceeds a preset value, the wafer under test is considered defective, specifically a bending anomaly. Furthermore, in practical applications, users can combine AI semantic segmentation models to more accurately identify pixel features in the wafer's bent areas, thereby improving detection accuracy.

[0056] In this application, wafer bending anomaly detection is achieved by processing the contour of the wafer bending curve. By detecting stacking, misalignment, and bending anomalies, most wafer orientation defects within the wafer cassette can be included. Each defect type is detected accordingly, thereby achieving fully automated wafer cassette inspection while improving the defect detection rate and accuracy of wafer orientation defects within the cassette, saving manpower and resources, and increasing the efficiency of wafer production.

[0057] In one embodiment, considering that in addition to misalignment, stacking, and bending anomalies, there may also be wafer leakage anomalies within the wafer cell, the method for determining that the wafer cell under test is free of anomalies after determining that there are no misalignment, stacking, or bending anomalies can be specifically executed as follows: First, the actual number of wafers contained in the clear image of the wafer cassette is calculated based on the outline information of all wafers. Then, the actual number of wafers is compared with the preset number of wafer labels. After wafers are loaded into the wafer cassette, the number of wafers is marked on the cassette, and this number should match the number of slots within the cassette. By using the wafer outline information in the clear image of the wafer cassette, the actual number of wafers in the cassette is calculated, and this actual number is compared with the number of wafer labels on the cassette to determine if there are any anomalies in the wafer count. Specifically, if the actual number of wafers does not match the number of wafer labels, the presence of a corresponding wafer outline at the preset slot coordinates within the wafer cassette is checked. If the wafer cassette is normal, each slot within the cassette will contain one wafer. Therefore, by determining if a corresponding wafer exists at the preset slot coordinates of the wafer cassette, it can be determined whether there are any missing wafers. If missing wafers are found, the specific slot location of the missing wafer can be determined. Therefore, by comparing and determining whether a wafer exists at the slot coordinates, if the preset slot coordinates in the wafer box do not have a corresponding wafer outline, the slot without a corresponding wafer outline is set as an abnormal slot.

[0058] Considering that a single image might not be clear enough, or the wafer outline information might not be clearly identified during image recognition, when a potential slot anomaly is detected, a new image of the wafer cassette to be inspected is acquired and designated as the inspection image. Then, it is checked whether a corresponding wafer outline exists for the abnormal slot in the inspection image. If no corresponding wafer outline exists for the abnormal slot, the wafer cassette is determined to have a defect, specifically a wafer leakage anomaly. If a corresponding wafer outline exists for the abnormal slot, the wafer cassette is determined to be without an anomaly.

[0059] In this application, considering that wafer cassettes may also have wafer missing issues in addition to stacking abnormalities, the actual number of wafers in the wafer cassette is compared with the number of wafer labels on the wafer cassette. Defect detection is performed based on whether there are wafers in the slots of the wafer cassette. This allows for the location of the specific missing wafer while detecting defects, enabling targeted treatment and avoiding the need for staff to spend time determining the location of defects again. This approach can be applied in mass production, saving manpower and time.

[0060] In one embodiment, considering that the wafer cassette itself may have inaccurate placement defects when placed in a fixed position, resulting in the wafer cassette not being placed properly and thus affecting the placement posture of the wafers inside the wafer cassette, the method of determining that the wafer cassette under test is normal after judging that there are no abnormalities in wafer stacking, wafer leakage, misalignment, and bending can be specifically executed as follows: First, the clip image of the wafer cassette to be tested is extracted from the clear image of the wafer cassette. The clip image is then compared with a preset clip template image, and the template similarity value between the two images is calculated. Specifically, existing template matching algorithms can be used for template comparison and similarity value calculation. Figure 10 The process involves comparing the snap-fit ​​image on the wafer cassette with the snap-fit ​​template image to determine if any snap-fit ​​anomalies exist. After calculating the similarity value, the template similarity value is compared with a preset similarity threshold. If the template similarity value is lower than the preset similarity threshold, the wafer cassette under test is determined to have a defect, and the defect type is snap-fit ​​anomaly. If the template similarity value is not lower than the preset similarity threshold, the wafer cassette under test is determined to be without anomalies. For example, assuming the similarity threshold is set to 85%, if the calculated similarity value is lower than 85%, a defect exists and the defect type is determined to be snap-fit ​​anomaly; if it is not lower than 85%, there is no anomaly.

[0061] In this application, by sequentially judging various wafer defect types and wafer cassette latch defects, the detection rate of wafer orientation and wafer cassette defects can be maximized. Simultaneously, it saves time and manpower, replacing manual visual inspection, reducing the inspection time per wafer cassette to minutes to meet the needs of large-scale production, and improving inspection efficiency by over 60%. Furthermore, inspection data is stored according to a standardized path, supports barcode traceability, and seamlessly integrates with the MES system for easy production process control. A visual UI interface supports image rotation, zooming, and video speed adjustment, and is equipped with detailed operation logs, lowering the barrier to entry for users.

[0062] Figure 2 This is a flowchart illustrating a wafer cell inspection method in one embodiment. It should be understood that, although... Figure 2 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows; unless explicitly stated otherwise, there is no strict order requirement for the execution of these steps, and they can be executed in other orders; and Figure 2 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0063] This specific embodiment is merely an explanation of the present invention and is not intended to limit the invention. After reading this specification, those skilled in the art can make modifications to this embodiment without contributing any inventive step, but such modifications are protected by patent law as long as they are within the scope of the claims of the present invention.

Claims

1. A wafer cell inspection method, characterized in that: The method includes: The image acquisition device acquires several image information of the wafer cell under test; Several image information are fused and stitched together to obtain a clear image of the wafer cassette under test; Extract the outline information of all wafers in the clear image of the wafer cassette, and determine whether the wafer cassette under test meets the preset wafer cassette inspection standard based on the outline information of the wafers; If the wafer cell under test meets the preset wafer cell inspection standard, then the wafer cell under test is determined to be without abnormality. Otherwise, the wafer cell under test is determined to be abnormal and the type of abnormality is identified.

2. The method according to claim 1, characterized in that: The acquisition of several image information of the wafer cell under test via the image acquisition device includes: The image acquisition device is controlled to move in a preset direction and step, and acquires several first original images of the wafer cell under test at different angles. The process of fusing and stitching together several image information to obtain a clear image of the wafer cassette under test includes: The SIFT feature point matching algorithm is used to calculate the feature points of the first overlapping region between two adjacent first original images; A coordinate transformation matrix is ​​calculated based on the feature points of the first overlapping region to perform image alignment processing on adjacent first original images and generate several first aligned images. A weighted fusion algorithm is used to process the overlapping boundaries between adjacent first aligned images to remove the overlapping boundaries; All first aligned images with overlapping boundaries removed are image-fused to generate a clear image of the wafer cassette.

3. The method according to claim 2, characterized in that: The step of calculating the feature points of the first overlapping region between two adjacent first original images using the SIFT feature point matching algorithm includes: Detect areas in the first original image where the wafer and corresponding slot are occluded, and set them as occluded areas; An image inpainting algorithm is used to inpaint the occluded areas in several first original images, and several inpainted and optimized images are generated. The SIFT feature point matching algorithm is used to calculate the feature points of the first overlapping region between two adjacent repaired and optimized images.

4. The method according to claim 1, characterized in that: The acquisition of several image information of the wafer cell under test via the image acquisition device includes: The image acquisition device is controlled to move in a preset direction and acquire video data of the wafer cell under test; The process of fusing and stitching together several image information to obtain a clear image of the wafer cassette under test includes: Based on a preset image sharpness evaluation index, an adaptive frame extraction algorithm is used to dynamically adjust the frame extraction interval and extract several frames of the second original image from the video data. The SIFT feature point matching algorithm is used to calculate the feature points of the second overlapping region between two adjacent second original images; The coordinate transformation matrix is ​​calculated based on the feature points of the second overlapping region to perform image alignment processing on adjacent second original images and generate several second aligned images; A weighted fusion algorithm is used to process the overlapping boundaries between adjacent second-aligned images to remove the overlapping boundaries; All second-aligned images with overlapping boundaries removed are image-fused to generate a clear image of the wafer cassette.

5. The method according to claim 4, characterized in that: The method of extracting several frames of the second original image from the video data based on the preset image sharpness evaluation index and using an adaptive frame extraction algorithm to dynamically adjust the frame extraction interval includes: Starting from the first frame of the video data, the image sharpness value of the current frame is calculated according to a preset image sharpness evaluation index; Determine whether the image sharpness value is less than a preset sharpness threshold; If the image sharpness value is less than the preset sharpness threshold, the frame skipping interval is set to 1. If the image sharpness value is not less than the preset sharpness threshold, then the frame skipping interval is set to 2.

6. The method according to claim 1, characterized in that: The acquisition of several image information of the wafer cell under test via the image acquisition device includes: A panoramic image of the wafer cassette under test and a first partial image and a second partial image of both sides of the wafer cassette under test are acquired using an image acquisition device. The first partial image includes at least the left edge image of the wafer cassette under test, and the second partial image includes at least the right edge image of the wafer cassette under test. The process of fusing and stitching together several image information to obtain a clear image of the wafer cassette under test includes: An image pyramid fusion algorithm is used to unify the resolution of the panoramic image, the first local image, and the second local image, and generate a panoramic optimized image, a first optimized local image, and a second optimized local image, respectively. The panoramic optimized image, the first optimized local image, and the second optimized local image are fused together to generate the clear image of the wafer cell.

7. The method according to claim 6, characterized in that: The step of fusing the panoramic optimized image, the first optimized local image, and the second optimized local image to generate the clear image of the wafer cell includes: The panoramic optimized image, the first optimized local image, and the second optimized local image are mapped to a preset reference coordinate system, and corresponding panoramic reference images, first reference local images, and second reference local images are generated respectively. Calculate the pixels in the third overlapping region of the panoramic reference image, the first reference local image, and the second reference local image, and set the portion excluding the pixels in the third overlapping region as the non-overlapping region portion; The pixels in the third overlapping region are weighted and fused according to a preset weight to generate a fused region pixel; The pixels in the fusion region and the non-overlapping region are fused together to generate a clear image of the wafer cell.

8. The method according to claim 1, characterized in that: The step of determining whether the wafer cell to be tested meets the preset wafer cell inspection standard based on the wafer contour information includes: Extract the contour information of all slots from the clear image of the wafer cassette; The least squares method is used to fit and generate the wafer edge line and the corresponding slot edge line based on the contour information of all wafers and the contour information of all slots. Calculate the actual included angle between the edge lines of the wafer edge line and the slot edge line; Compare the actual included angle of the edge line with the standard included angle; If the actual included angle of the edge line is not greater than the standard included angle, then the wafer cell under test is determined to be without abnormality. If the actual included angle of the edge line is greater than the standard included angle, then the wafer cell under test is determined to have an anomaly and the anomaly type is determined to be a misalignment anomaly.

9. The method according to claim 8, characterized in that: The determination that the wafer cell under test is free of abnormalities includes: Calculate the outline area value of each wafer and compare the outline area value of each wafer with a preset outline area threshold. If the area value of the wafer outline is not greater than the outline area threshold, then the wafer cell under test is determined to be normal. If the area value of the wafer outline is greater than the outline area threshold, it is determined that the wafer cell under test has an anomaly and the anomaly type is determined to be a stacking anomaly.

10. The method according to claim 9, characterized in that: The determination that the wafer cell under test is free of abnormalities includes: Based on the wafer profile information, a first straight line tangent to the bend point of the wafer profile and a second straight line passing through the two endpoints of the wafer profile are fitted and generated, wherein the first straight line is parallel to the second straight line. Calculate the actual distance between the first straight line and the second straight line; The actual distance value is compared with a preset distance deviation threshold; If the actual distance value is not greater than the distance deviation threshold, then the wafer cell under test is determined to be normal. If the actual distance value is greater than the distance deviation threshold, the wafer cell under test is determined to have an anomaly and the anomaly type is determined to be a bending anomaly.

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