A low phase noise ring oscillator for a distributed network
By using a distributed network of low-phase-noise ring oscillators and leveraging the coupling synchronization and noise averaging of multiple ring oscillator cores, the problems of high phase noise and process deviation in ring oscillators are solved, achieving low-noise and high-stability oscillation signal output.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NORTHWESTERN POLYTECHNICAL UNIV
- Filing Date
- 2026-02-05
- Publication Date
- 2026-04-24
AI Technical Summary
Existing ring oscillators suffer from high phase noise, especially flicker noise and thermal noise, which cause frequency jitter and make them unsuitable for use in high-performance communications and precision measurements. At the same time, existing technical solutions suffer from excessive power consumption and area overhead.
A low-phase-noise ring oscillator using a distributed network is constructed by three identical ring oscillator cores forming a distributed coupled network. Each ring oscillator core is interconnected through a coupling unit to achieve mutual synchronization and noise averaging, suppressing random phase noise and smoothing process deviations.
Without increasing power consumption and chip area, it significantly reduces phase noise, improves frequency stability and signal quality, and enhances the phase consistency of oscillation signals and the predictability of the system.
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Abstract
Description
Technical Field
[0001] This invention belongs to the field of integrated circuit technology, and specifically relates to a low phase noise ring oscillator for distributed networks. Background Technology
[0002] Ring oscillators, due to their fully integrated design, wide frequency modulation range, and compatibility with standard CMOS (Complementary Metal-Oxide-Semiconductor) processes, have become the core unit of on-chip clock generation systems. However, their inherent high phase noise characteristics severely limit their use in high-performance communications, precision measurements, and other applications. Phase noise essentially originates from various noises generated by active devices in the oscillation circuit, with flicker noise and thermal noise being particularly significant. These noises modulate the phase of the oscillation signal, causing frequency jitter and degrading signal quality.
[0003] To suppress phase noise, various technical solutions have been proposed in the industry, but all have significant limitations. For example, increasing the number of inverter stages in a ring oscillator can improve the linearity of the oscillation signal edges, thereby improving phase noise, but this comes at the cost of significantly reducing the oscillation frequency and increasing power consumption. Another mainstream solution is to use an LC oscillator, which utilizes a high-quality inductor-capacitor resonant cavity to achieve extremely low phase noise. However, on-chip inductors occupy a large chip area and have a narrow frequency modulation range, making it difficult to meet the integration and cost control requirements of modern on-chip systems.
[0004] Therefore, designing a novel ring oscillator topology that can systematically suppress phase noise without introducing passive components or significantly sacrificing power consumption and area has become a pressing technical challenge in this field. Summary of the Invention
[0005] To address the aforementioned problems in the prior art, this invention provides a low-phase-noise ring oscillator for distributed networks. The technical problem to be solved by this invention is achieved through the following technical solution:
[0006] This invention provides a low phase noise ring oscillator for a distributed network, the low phase noise ring oscillator comprising a first ring oscillator core, a second ring oscillator core, and a third ring oscillator core with identical structures;
[0007] The first ring oscillator core, the second ring oscillator core, and the third ring oscillator core are parallel and are all closed-loop structures composed of several inverters and several coupling units.
[0008] The first ring oscillator core, the second ring oscillator core, and the third ring oscillator core constitute a distributed coupling network; wherein, the first input terminal of each coupling unit in the first ring oscillator core is connected to the second input terminal of the corresponding coupling unit in the third ring oscillator core, the second input terminal is connected to the first input terminal of the corresponding coupling unit in the second ring oscillator core, and the second input terminal of the coupling unit in the second ring oscillator core is connected to the first input terminal of the corresponding coupling unit in the third ring oscillator core.
[0009] The beneficial effects of this invention are:
[0010] This invention proposes a distributed network low-phase-noise ring oscillator, which innovatively employs a multi-core distributed coupled network structure. Utilizing the mutual synchronization and noise averaging effects among multiple ring oscillator cores, it significantly improves phase noise performance without substantially increasing power consumption or chip area. Simultaneously, this multi-core distributed coupled network structure effectively smooths out performance mismatches in individual ring oscillator cores caused by manufacturing process variations, thereby improving the overall frequency stability of the ring oscillator. More specifically:
[0011] 1. The random phase noise generated by each ring oscillator core (mainly caused by thermal noise and flicker noise) is averaged in the coupling. Since the noise is inherently random and uncorrelated, while the oscillation signal is correlated, the random noise components cancel each other out through the coupling of multiple ring oscillator cores, while the oscillation signal is enhanced, thereby reducing the phase noise of the overall ring oscillator output signal.
[0012] 2. In integrated circuit manufacturing, unavoidable process variations can lead to parameter differences between different chips, and even between transistors of the same name at different locations on the same chip. This causes deviations in the oscillation frequency of individual ring oscillator cores, affecting the uniformity and predictability of system performance. This invention employs a distributed coupling network structure with three ring oscillator cores running in parallel. This distributed coupling network forces the three ring oscillator cores to synchronize to the same compromise common frequency, thereby smoothing out extreme frequency deviations caused by local process mismatches in individual ring oscillator cores. This results in higher stability of the ring oscillator across different chips and process angles.
[0013] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description
[0014] Figure 1 This is a schematic diagram of a low phase noise ring oscillator for a distributed network provided in an embodiment of the present invention;
[0015] Figure 2 This is a schematic diagram of the inverter structure in the low phase noise ring oscillator of the distributed network provided in the embodiment of the present invention;
[0016] Figure 3 This is a schematic diagram of the coupling unit in the low phase noise ring oscillator of the distributed network provided in the embodiment of the present invention;
[0017] Figure 4 This is a schematic diagram of the phase noise simulation results of a low-phase-noise ring oscillator in a distributed network provided in an embodiment of the present invention. Detailed Implementation
[0018] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.
[0019] Please see Figure 1 This invention provides a low phase noise ring oscillator for a distributed network, which includes a first ring oscillator core, a second ring oscillator core, and a third ring oscillator core with identical structures.
[0020] The first ring oscillator core, the second ring oscillator core, and the third ring oscillator core are parallel and are all closed-loop structures composed of several inverters and several coupling units.
[0021] The first ring oscillator core, the second ring oscillator core, and the third ring oscillator core constitute a distributed coupling network; wherein, the first input terminal of each coupling unit in the first ring oscillator core is connected to the second input terminal of the corresponding coupling unit in the third ring oscillator core, the second input terminal is connected to the first input terminal of the corresponding coupling unit in the second ring oscillator core, and the second input terminal of the coupling unit in the second ring oscillator core is connected to the first input terminal of the corresponding coupling unit in the third ring oscillator core.
[0022] like Figure 1 As shown, in this embodiment of the invention, the first ring oscillator core includes inverters INV1 to INV4 and coupling units U1 to U3; the second ring oscillator core includes inverters INV5 to INV8 and coupling units U4 to U6; and the third ring oscillator core includes inverters INV9 to INV12 and coupling units U7 to U9.
[0023] The input terminal of inverter INV1 serves as the input terminal IN1 of the first ring oscillator core. The input terminal of inverter INV1 is connected to the output terminal of inverter INV4. The output terminal of inverter INV1 is connected to the first input terminal of coupling unit U1 and the second input terminal of coupling unit U7 in the third ring oscillator core. The second input terminal of coupling unit U1 is connected to the first input terminal of coupling unit U4 in the second ring oscillator core. The output terminal of coupling unit U1 is connected to the input terminal of inverter INV2. The output terminal of inverter INV2 is connected to the first input terminal of coupling unit U2 and the second input terminal of coupling unit U8 in the third ring oscillator core. The input terminals are connected as follows: the second input terminal of coupling unit U2 is connected to the first input terminal of coupling unit U5 in the second ring oscillator core; the output terminal of coupling unit U2 is connected to the input terminal of inverter INV3; the output terminal of inverter INV3 is connected to the first input terminal of coupling unit U3 and the second input terminal of coupling unit U9 in the third ring oscillator core; the second input terminal of coupling unit U3 is connected to the first input terminal of coupling unit U6 in the second ring oscillator core; the output terminal of coupling unit U3 is connected to the input terminal of inverter INV4; and the output terminal of inverter INV4 serves as the output terminal OUT1 of the first ring oscillator core.
[0024] The input terminal of inverter INV5 serves as the input terminal IN2 of the second ring oscillator core. The input terminal of inverter INV5 is connected to the output terminal of inverter INV8. The output terminal of inverter INV5 is connected to the first input terminal of coupling unit U4. The second input terminal of coupling unit U4 is connected to the first input terminal of coupling unit U7 in the third ring oscillator core. The output terminal of coupling unit U4 is connected to the input terminal of inverter INV6. The output terminal of inverter INV6 is connected to the first input terminal of coupling unit U5. The second input terminal of coupling unit U5 is connected to the first input terminal of coupling unit U8 in the third ring oscillator core. The output terminal of coupling unit U5 is connected to the input terminal of inverter INV7. The output terminal of inverter INV7 is connected to the first input terminal of coupling unit U6. The second input terminal of coupling unit U6 is connected to the first input terminal of coupling unit U9 in the third ring oscillator core. The output terminal of coupling unit U6 is connected to the input terminal of inverter INV8. The output terminal of inverter INV8 serves as the output terminal OUT2 of the second ring oscillator core.
[0025] The input terminal of inverter INV9 serves as the input terminal IN3 of the third ring oscillator core. The input terminal of inverter INV9 is connected to the output terminal of inverter INV12. The output terminal of inverter INV9 is connected to the first input terminal of coupling unit U7. The output terminal of coupling unit U7 is connected to the input terminal of inverter INV10. The output terminal of inverter INV10 is connected to the first input terminal of coupling unit U8. The output terminal of coupling unit U8 is connected to the input terminal of inverter INV11. The output terminal of inverter INV11 is connected to the first input terminal of coupling unit U9. The output terminal of coupling unit U9 is connected to the input terminal of inverter INV12. The output terminal of inverter INV12 serves as the output terminal OUT3 of the third ring oscillator core.
[0026] In this embodiment of the invention, inverters INV1 to INV12 have the same structure; as... Figure 2 As shown, inverter INV1 includes transistors M1 and M2; the source of transistor M1 is connected to GND (ground), the gate of transistor M1 is connected to the gate of transistor M2, and the gate of transistor M1 also serves as the input terminal IN of inverter INV1; the drain of transistor M1 is connected to the drain of transistor M2, and the drain of transistor M1 also serves as the output terminal OUT of inverter INV1; the source of transistor M2 is connected to the power supply VDD. In this embodiment of the invention, transistor M1 is an NMOS transistor and transistor M2 is a PMOS transistor.
[0027] In this embodiment of the invention, coupling units U1 to U9 have the same structure; for example... Figure 3 As shown, the coupling unit U1 includes transistors M3 to M6; wherein, the source of transistor M3 is connected to the power supply VDD, the gate of transistor M3 is connected to the gate of transistor M6, and the gate of transistor M3 also serves as the first input terminal A of coupling unit U1; the drain of transistor M3 is connected to the source of transistor M4, the drain of transistor M4 is connected to the drain of transistor M5, and the drain of transistor M4 also serves as the output terminal OUT of coupling unit U1; the gate of transistor M4 is connected to the gate of transistor M5, and the gate of transistor M4 also serves as the second input terminal B of coupling unit U1; the source of transistor M5 is connected to the drain of transistor M6, and the source of transistor M6 is connected to GND. In this embodiment of the invention, transistors M3 and M4 are PMOS transistors, and transistors M5 and M6 are NMOS transistors.
[0028] The groundbreaking innovation of this invention lies in constructing a distributed coupling network based on multi-core mutual injection and locking. This is not a local modification of existing ring oscillators, but a system-level topological innovation. By employing parallel multi-core distributed coupling technology, random and uncorrelated phase noise energy is fundamentally suppressed, and the mismatch effect caused by process variations is effectively smoothed, thus achieving the goal of effectively suppressing ring oscillator phase noise. Figure 1 As shown, the ring oscillator comprises three identical ring oscillator cores: a first ring oscillator core, a second ring oscillator core, and a third ring oscillator core. Each ring oscillator core is a closed-loop structure consisting of four inverters (e.g., inverters INV1 to INV4 in the first ring oscillator core) and three coupling units (e.g., coupling units U1, U2, and U3 in the first ring oscillator core). These three ring oscillator cores do not operate independently but are tightly interconnected through a designed distributed coupling network. The entire distributed coupling network consists of nine coupling units, from coupling units U1 to U9. The output signal of each ring oscillator core is not only fed back to itself but also cross-injected into specific nodes of the other two ring oscillator cores through the coupling units, thereby mutually influencing each other to achieve low phase noise and high mismatch resistance.
[0029] When three ring oscillator cores operate freely, slight deviations in frequency and phase occur, resulting in significant phase noise. A distributed coupling network forces these three cores to synchronize. The oscillation phase of each core is pulled and averaged by the phases of the other two cores. This multi-point, distributed coupling effectively suppresses random phase fluctuations caused by thermal and flicker noise in a single inverter, significantly reducing phase noise energy. The distributed coupling network achieves frequency stability and phase noise performance far exceeding that of a single ring oscillator core.
[0030] As can be seen, the core of this invention lies in the distributed coupling network, which interconnects three ring oscillator cores across multiple nodes. Through this distributed coupling network, the three ring oscillator cores are forced to mutually inject lock-in and synchronize, thereby suppressing phase noise caused by inherent device noise. Simultaneously, this distributed coupling network effectively smooths out performance mismatches in individual ring oscillator cores caused by manufacturing process variations, thereby improving the overall frequency stability of the ring oscillator.
[0031] It should be noted that the number of coupling units in each ring oscillator core in this embodiment of the invention is not limited to 3, but can also be 6, 9, etc., which can be selected according to actual needs. The number of inverters in each ring oscillator core is not fixed, as long as the sum of the number of inverters and the number of coupling units is odd.
[0032] To verify the effectiveness of the low-phase-noise ring oscillator for distributed networks provided in this embodiment of the invention, the following experiments were conducted.
[0033] The simulation circuit was built using SMIC 55nm RF CMOS technology on a Red Hat system based on the Cadence IC617 simulation platform. The Spectre RF simulation tool was used to simulate the circuit, with a given power supply voltage of 1.2V and an operating temperature of 27℃.
[0034] Under the above operating conditions, using the Spectre RF simulation tool, this invention performs PSS+PNOISE simulation at the output of the ring oscillator. The simulation results are as follows. Figure 4 As shown, Figure 4 The horizontal axis represents the offset frequency in Hz, and the vertical axis represents the phase noise of the output signal in dBc / Hz. Figure 4 It can be seen that the phase noise of this invention at an offset frequency of 1MHz at a working frequency of 500MHz is -113.744dBc / Hz.
[0035] In summary, the distributed network low-phase-noise ring oscillator proposed in this invention presents a groundbreaking multi-core distributed coupled network structure. Utilizing the mutual synchronization and noise averaging effects among multiple ring oscillator cores, it significantly improves phase noise performance without significantly increasing power consumption or chip area. Simultaneously, this multi-core distributed coupled network structure effectively smooths out performance mismatches in individual ring oscillator cores caused by manufacturing process variations, thereby improving the overall frequency stability of the ring oscillator. More specifically:
[0036] 1. The random phase noise generated by each ring oscillator core (mainly caused by thermal noise and flicker noise) is averaged in the coupling. Since the noise is inherently random and uncorrelated, while the oscillation signal is correlated, the random noise components cancel each other out through the coupling of multiple ring oscillator cores, while the oscillation signal is enhanced, thereby reducing the phase noise of the overall ring oscillator output signal.
[0037] 2. In integrated circuit manufacturing, unavoidable process variations can lead to parameter differences between different chips, and even between transistors of the same name at different locations on the same chip. This causes deviations in the oscillation frequency of individual ring oscillator cores, affecting the uniformity and predictability of system performance. This invention employs a distributed coupling network structure with three ring oscillator cores running in parallel. This distributed coupling network forces the three ring oscillator cores to synchronize to the same compromise common frequency, thereby smoothing out extreme frequency deviations caused by local process mismatches in individual ring oscillator cores. This results in higher stability of the ring oscillator across different chips and process angles.
[0038] In the description of this invention, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.
[0039] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the specification and accompanying drawings, will understand and implement other variations of the disclosed embodiments in carrying out the claimed invention. In the specification, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. While certain measures are described in different embodiments, this does not mean that these measures cannot be combined to produce good results.
[0040] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.
Claims
1. A low-phase-noise ring oscillator for a distributed network, characterized in that, The low-phase-noise ring oscillator includes a first ring oscillator core, a second ring oscillator core, and a third ring oscillator core with identical structures; wherein... The first ring oscillator core, the second ring oscillator core, and the third ring oscillator core run in parallel and are all closed-loop structures composed of several inverters and several coupling units; the first ring oscillator core, the second ring oscillator core, and the third ring oscillator core form a distributed coupling network among themselves. The first ring oscillator core includes inverters INV1 to INV4 and coupling units U1 to U3; the second ring oscillator core includes inverters INV5 to INV8 and coupling units U4 to U6; the third ring oscillator core includes inverters INV9 to INV12 and coupling units U7 to U9; wherein... The input terminal of inverter INV1 serves as the input terminal of the first ring oscillator core. The input terminal of inverter INV1 is connected to the output terminal of inverter INV4. The output terminal of inverter INV1 is connected to the first input terminal of coupling unit U1 and the second input terminal of coupling unit U7 in the third ring oscillator core. The second input terminal of coupling unit U1 is connected to the first input terminal of coupling unit U4 in the second ring oscillator core. The output terminal of coupling unit U1 is connected to the input terminal of inverter INV2. The output terminal of inverter INV2 is connected to the first input terminal of coupling unit U2 and the first input terminal of coupling unit U8 in the third ring oscillator core. The two input terminals are connected. The second input terminal of the coupling unit U2 is connected to the first input terminal of the coupling unit U5 in the second ring oscillator core. The output terminal of the coupling unit U2 is connected to the input terminal of the inverter INV3. The output terminal of the inverter INV3 is connected to the first input terminal of the coupling unit U3 and the second input terminal of the coupling unit U9 in the third ring oscillator core. The second input terminal of the coupling unit U3 is connected to the first input terminal of the coupling unit U6 in the second ring oscillator core. The output terminal of the coupling unit U3 is connected to the input terminal of the inverter INV4. The output terminal of the inverter INV4 serves as the output terminal of the first ring oscillator core. The input terminal of inverter INV5 serves as the input terminal of the second ring oscillator core. The input terminal of inverter INV5 is connected to the output terminal of inverter INV8. The output terminal of inverter INV5 is connected to the first input terminal of coupling unit U4. The second input terminal of coupling unit U4 is connected to the first input terminal of coupling unit U7 in the third ring oscillator core. The output terminal of coupling unit U4 is connected to the input terminal of inverter INV6. The output terminal of inverter INV6 is connected to the first input terminal of coupling unit U5. The second input terminal of coupling unit U5 is connected to the first input terminal of coupling unit U8 in the third ring oscillator core. The output terminal of coupling unit U5 is connected to the input terminal of inverter INV7. The output terminal of inverter INV7 is connected to the first input terminal of coupling unit U6. The second input terminal of coupling unit U6 is connected to the first input terminal of coupling unit U9 in the third ring oscillator core. The output terminal of coupling unit U6 is connected to the input terminal of inverter INV8. The output terminal of inverter INV8 serves as the output terminal of the second ring oscillator core. The input terminal of inverter INV9 serves as the input terminal of the third ring oscillator core. The input terminal of inverter INV9 is connected to the output terminal of inverter INV12. The output terminal of inverter INV9 is connected to the first input terminal of coupling unit U7. The output terminal of coupling unit U7 is connected to the input terminal of inverter INV10. The output terminal of inverter INV10 is connected to the first input terminal of coupling unit U8. The output terminal of coupling unit U8 is connected to the input terminal of inverter INV11. The output terminal of inverter INV11 is connected to the first input terminal of coupling unit U9. The output terminal of coupling unit U9 is connected to the input terminal of inverter INV12. The output terminal of inverter INV12 serves as the output terminal of the third ring oscillator core.
2. The low phase noise ring oscillator for distributed networks according to claim 1, characterized in that, Inverters INV1 through INV12 have the same structure; inverter INV1 includes transistor M1 and transistor M2; among them, The source of transistor M1 is connected to GND, the gate of transistor M1 is connected to the gate of transistor M2, the gate of transistor M1 also serves as the input terminal of inverter INV1, the drain of transistor M1 is connected to the drain of transistor M2, the drain of transistor M1 also serves as the output terminal of inverter INV1, and the source of transistor M2 is connected to power supply VDD.
3. The low phase noise ring oscillator for a distributed network according to claim 2, characterized in that, Transistor M1 is an NMOS transistor, and transistor M2 is a PMOS transistor.
4. The low phase noise ring oscillator for a distributed network according to claim 1, characterized in that, Coupling units U1 through U9 have the same structure; coupling unit U1 includes transistors M3 through M6; wherein, The source of transistor M3 is connected to the power supply VDD. The gate of transistor M3 is connected to the gate of transistor M6. The gate of transistor M3 also serves as the first input terminal of coupling unit U1. The drain of transistor M3 is connected to the source of transistor M4. The drain of transistor M4 is connected to the drain of transistor M5. The drain of transistor M4 also serves as the output terminal of coupling unit U1. The gate of transistor M4 is connected to the gate of transistor M5. The gate of transistor M4 also serves as the second input terminal of coupling unit U1. The source of transistor M5 is connected to the drain of transistor M6. The source of transistor M6 is connected to GND.
5. The low phase noise ring oscillator for a distributed network according to claim 4, characterized in that, Transistors M3 and M4 are both PMOS transistors, while transistors M5 and M6 are both NMOS transistors.
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