Fully homomorphic encryption calculator for accelerating bootstrap, computing system and operating method thereof

By designing a hardware accelerator and utilizing the ciphertext structure learned from on-ring errors for bootstrapping operations, the inefficiency and poor flexibility of fully homomorphic encryption calculators in large-scale data processing are solved, achieving more efficient bootstrapping operations and support for larger homomorphic parameters.

CN121664384APending Publication Date: 2026-03-13INVENTEC PUDONG TECH CORPOARTION +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-11
Publication Date
2026-03-13

AI Technical Summary

Technical Problem

Existing fully homomorphic encryption calculators are inefficient, inflexible, and difficult to adjust parameters when processing large-scale data. Furthermore, their bootstrap operations consume a large amount of computing resources, limiting their widespread adoption in practical applications.

Method used

It adopts a hardware accelerator design, including memory, controller, task scheduler and multiple processing units. It decrypts the text into multiple tasks for parallel processing, and uses the ciphertext structure learned by loop error for bootstrapping operation, supporting parallel and independent operation of multiple tasks.

Benefits of technology

It significantly improves the instruction cycle of bootstrapping operations, enhances processing power, supports larger homomorphic parameters, strengthens the scalability and flexibility of the system, and reduces the computational resource requirements.

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Abstract

The invention relates to a fully homomorphic encryption calculator for bootstrapping. The fully homomorphic encryption calculator for bootstrapping comprises a memory, a controller, a task scheduler, a plurality of processing units and a bus, the memory is used for storing a ciphertext of which the structure is in the form of ring error learning (RLWE), and the memory is used for storing the ciphertext of which the structure is in the form of ring error learning (RLWE). The controller is configured to receive a first instruction to store a ciphertext into the memory and generate a second instruction for bootstrapping according to the ciphertext. The task scheduler is used for receiving a second instruction to generate a plurality of tasks and scheduling the tasks. The plurality of processing units are used for decomposing the ciphertext into a plurality of tasks and executing a plurality of operations according to a schedule to generate an intermediate result or a final result of which the structure is on-loop error learning. The bus is electrically connected with the memory, the controller, the task scheduler and the plurality of processing units. And the bus is used for transmitting the ciphertext, the second instruction and the final result.
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Description

Technical Field

[0001] This invention relates to fully homomorphic encryption (FHE), and more particularly to a fully homomorphic encryption calculator, computing system, and method of operation for accelerating bootstrapping. Background Technology

[0002] Fully homomorphic encryption is an encryption technique that allows computation to be performed without decrypting the data, thus protecting the privacy of sensitive data. This technology is significant in areas such as cloud computing and privacy protection because it enables users to securely upload data to the cloud for processing without exposing the data content. Compared to traditional encryption techniques, fully homomorphic encryption provides a higher level of security, ensuring that data remains protected throughout transmission and processing.

[0003] Fully homomorphic encryption faces performance challenges in practical applications. Its high computational complexity results in slow operation, as computations on encrypted data require extensive mathematical operations, such as polynomial evaluation or matrix operations, consuming significant computational resources. Furthermore, fully homomorphic encryption may require substantial memory when processing large-scale data and increases communication costs during data transmission. Although theoretically, fully homomorphic encryption offers strong privacy protection, these performance issues limit its widespread adoption in practice.

[0004] The third-generation fully homomorphic encryption scheme (FHEW / TFHE) is suitable for processing integer data. This scheme can achieve highly efficient fully homomorphic computation in a low-dimensional space, with accurate computation results. FHEW / TFHE can protect data at a relatively low cost and is flexible and efficient when handling different data volumes. FHEW / TFHE has small ciphertext and key sizes, making it particularly suitable for hardware accelerators with limited memory. However, the efficiency of FHEW / TFHE may decrease when processing large amounts of data. Currently, it supports a relatively small integer range, such as int8, making it unsuitable for applications requiring a larger data range.

[0005] Currently, hardware accelerators based on FHEW / TFHE face several challenges: First, the fixed or difficult-to-change settings of fully homomorphic encryption parameters (such as the dimension / modulus of the polynomial ring and the basis) result in poor flexibility, making it difficult to adjust parameters for different privacy protection applications. In addition, the acceleration strategies employed are limited in scalability, supporting only a low parameter limit, which cannot meet the needs of higher security levels or a wider range of applications. Summary of the Invention

[0006] In view of this, the present invention proposes a fully homomorphic encryption calculator, computing system and operation method for accelerating bootstrapping, which improves the performance of fully homomorphic encryption by using a hardware accelerator.

[0007] An accelerated bootstrapping fully homomorphic encryption calculator according to an embodiment of the present invention includes memory, a controller, a task scheduler, multiple processing units, and a bus. The memory stores ciphertext with a Learning With Errorsover Rings (RLWE) structure. The controller receives a first instruction to store the ciphertext in memory and generates a second instruction for bootstrapping based on the ciphertext. The task scheduler receives the second instruction to generate multiple tasks and schedules these tasks. The multiple processing units decompose the ciphertext into multiple tasks and perform multiple operations according to the schedule to produce intermediate or final results with a RLWE structure. The bus electrically connects the memory, the controller, the task scheduler, and the multiple processing units. The bus transmits the ciphertext, the second instruction, and the final result.

[0008] An accelerated bootstrapping fully homomorphic encryption computing system according to an embodiment of the present invention includes a host and an accelerated bootstrapping fully homomorphic encryption calculator. The host includes a storage device, a processor, and a communication device. The storage device is used to store ciphertext with a ring-based error learning structure. The processor generates a first instruction for transmitting the ciphertext. The communication device is electrically connected to the storage device and the processor, and is used to transmit the ciphertext to the fully homomorphic encryption calculator.

[0009] The accelerated bootstrapping fully homomorphic encrypted calculator communicates with a host computer and includes: memory, a controller, a task scheduler, multiple processing units, and a bus. The memory stores ciphertext. The controller receives a first instruction to store the ciphertext in memory and generates a second instruction for bootstrapping based on the ciphertext. The task scheduler receives the second instruction to generate multiple tasks and schedules these tasks. The multiple processing units decompose the ciphertext into multiple tasks and perform multiple operations according to the schedule to produce intermediate or final results with a structure of on-ring error learning, wherein the storage device is used to store the final result. The bus electrically connects the memory, controller, task scheduler, and multiple processing units. The bus is used to transmit the ciphertext, the second instruction, and the final result.

[0010] An operational method for an accelerated bootstrapping fully homomorphic encrypted computing system according to an embodiment of the present invention includes: a storage device storing ciphertext with a ring-on-ring error learning structure; a processor generating a first instruction for transmitting the ciphertext; a controller receiving the first instruction to store the ciphertext in memory; the controller generating a second instruction for bootstrapping based on the ciphertext; a task scheduler receiving the second instruction to generate multiple tasks and schedule these tasks; and multiple processing units decomposing the ciphertext into multiple tasks and performing multiple operations according to the schedule to generate intermediate or final results with a ring-on-ring error learning structure.

[0011] In summary, this invention proposes a hardware design based on the ciphertext structure of fully homomorphic encryption, using on-ring error learning as the computational unit. This design not only possesses excellent scalability but also offers high flexibility in setting homomorphic parameters. Recently, due to the widespread adoption of bootstrapping, existing fully homomorphic encryption calculators cannot support increasingly large homomorphic parameters. In this context, the accelerated bootstrapping fully homomorphic encryption calculator, computing system, and operating method proposed in this invention can significantly improve instruction cycle time.

[0012] The foregoing description of the disclosure and the following description of the embodiments are intended to demonstrate and explain the spirit and principles of the present invention, and to provide a further explanation of the scope of the patent application of the present invention. Attached Figure Description

[0013] Figure 1 This is a block architecture diagram of an accelerated bootstrapping fully homomorphic cryptographic computing system according to an embodiment of the present invention;

[0014] Figure 2 This is a data flow diagram of bootstrapping operation according to an embodiment of the present invention;

[0015] Figure 3 It is a data flow diagram based on the bootstrap computation of existing technology;

[0016] Figure 4 This is a flowchart illustrating the operation method of an accelerated bootstrapping fully homomorphic encrypted computing system according to an embodiment of the present invention; and

[0017] Figure 5 A comparison chart of execution time between a prior art fully homomorphic encryption calculator and a fully homomorphic encryption calculator according to an embodiment of the present invention;

[0018] Figure 6 This is a graph showing the relationship between the number of executions and the execution time for a fully homomorphic encryption calculator based on existing technology and a fully homomorphic encryption calculator according to an embodiment of the present invention.

[0019] Symbol Explanation

[0020] A: Host

[0021] A1: Storage device

[0022] A2: Processor

[0023] A3: Communication devices

[0024] B: Fully Homomorphic Encryption Calculator

[0025] B1: Memory

[0026] B2: Controller

[0027] B3: Task Scheduler

[0028] B4: Processing Unit

[0029] RLWE: Computing Module

[0030] S1-S6: Steps Detailed Implementation

[0031] The following detailed description of the features and advantages of the present invention in the embodiments is sufficient to enable anyone skilled in the art to understand the technical content of the present invention and implement it accordingly. Based on the disclosure, patent claims, and drawings in this specification, anyone skilled in the art can easily understand the related objectives and advantages of the present invention. The following embodiments are further detailed in illustrating the points of view of the present invention, but are not intended to limit the scope of the present invention in any way.

[0032] Fully homomorphic encryption operations increase noise in the ciphertext, and this noise accumulates with each operation. When the noise becomes too large, decryption may fail. In FHEW / TFHE, bootstrapping can eliminate noise in the ciphertext, but this process takes 100 to 1000 times longer than other operations. In practical applications, bootstrapping typically accounts for over 95% of the computation time. Therefore, this invention proposes a fully homomorphic encryption calculator, computing system, and its operating method, specifically designed to accelerate this bottleneck operation of bootstrapping.

[0033] Figure 1 This is a block architecture diagram of a fully homomorphic cryptographic computing system for accelerated bootstrapping, drawn according to an embodiment of the present invention. Figure 1 As shown, this computing system includes a host A that is communicatively connected to each other and a fully homomorphic encrypted calculator B.

[0034] Host A includes storage device A1, processor A2, and communication device A3. Host A is a user-owned machine, which can be a personal computer, server, or cloud platform.

[0035] Storage device A1 is used to store ciphertext with a learning with errors over rings (RLWE) structure and a bootstrapping key used to perform operations with the ciphertext during bootstrapping. Storage device A1 can be memory in a computer, a hard disk, or an external storage device connected to the computer, and the present invention is not limited thereto.

[0036] Processor A2 is used to generate a first instruction for transmitting the ciphertext. Processor A2 may be a central processing unit or a graphics processing unit. The first instruction includes the starting address and length of the ciphertext and the key in storage device A1.

[0037] In one embodiment, the storage device A1 further stores a key for decrypting ciphertext, and the processor A2 further generates a key based on the key and fully homomorphic encryption parameters (hereinafter referred to as homomorphic parameters).

[0038] Communication device A3 is electrically connected to storage device A1 and processor A2, and is used to transmit encrypted text to fully homomorphic encryption calculator B. In other words, host A establishes a communication connection with fully homomorphic encryption calculator B through communication device A3. Communication device A3 can be a Peripheral Component Interconnect Express (PCI-E) standard.

[0039] The fully homomorphic encryption calculator B includes memory B1, a controller B2, a task scheduler B3, multiple processing units B4, and a bus B5. In one embodiment, the fully homomorphic encryption calculator B can be implemented using a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or a system-on-a-chip (SOC).

[0040] Memory B1 is used to store the ciphertext and key for the error learning structure on the ring. In one embodiment, memory B1 can be implemented as: flash memory, random access memory, non-volatile memory, hard disk, optical storage device, magnetic storage device, or a combination of the above examples.

[0041] Controller B2 receives a first instruction to transfer the ciphertext and key from storage device A1 to memory B1 via communication device A3. Controller B2 further generates a second instruction for bootstrapping based on the ciphertext. In other words, controller B2 is responsible for transmitting data and instructions between the fully homomorphic encryption calculator B and host A, wherein the first instruction stores the key in memory B1, and the second instruction notifies the task scheduler B3 of the information required for bootstrapping. In one embodiment, the second instruction includes a start signal, the starting address and length of the ciphertext and key in memory B1, and multiple homomorphic parameters.

[0042] Task scheduler B3 receives a second instruction to generate multiple tasks and schedules these tasks. Scheduling refers to task scheduler B3 assigning these tasks to multiple idle candidate units among the multiple processing units B4 and monitoring the operational status of these candidate units. In one embodiment, task scheduler B3 supports simultaneous processing of multiple bootstrapping operations. Task scheduler B3 checks whether the controller B2 has received a new second instruction and the completion status of any ongoing second instructions.

[0043] Each processing unit B4 internally includes multiple computation modules RLWE, and the input and output of each computation module RLWE are ciphertexts structured as on-ring error learning. This invention does not limit the number of processing units B4 or computation modules RLWE. In one embodiment, each processing unit B4 has the same hardware structure and the same number of computation modules RLWE, which can lead to better performance and has many advantages in hardware design and implementation, such as simpler hardware implementation, better workload balance, and higher cost / energy efficiency. In one embodiment, each processing unit B4 internally has a cache to temporarily store the input and output of the computation modules RLWE; however, if the cache capacity is insufficient, the calculation results need to be stored back to memory B1.

[0044] Processing unit B4 decomposes the ciphertext into multiple tasks and executes multiple operations according to a schedule to produce intermediate or final results with a structure of on-ring error learning. In one embodiment, these operations, in the order of execution, are: Gadget Decomposition for generating multiple tasks, Fast Fourier Transform (FFT), Inverse Fast Fourier Transform (IFFT), and multiply-add operations using a key on multiple intermediate results. Note that the input and output of these operations are all based on the ciphertext with a structure of on-ring error learning, have the same input size (the dimension of on-ring error learning), and utilize multiple computational modules RLWE.

[0045] In one embodiment, the controller B2, the task scheduler B3, and all processing units B4 can be implemented as an FPGA, ASIC, SOC, arithmetic logic unit (ALU), digital signal processor, microcomputer, programmable logic unit, or a combination of the above examples.

[0046] Bus B5 is electrically connected to memory B1, controller B2, task scheduler B3, and all processing units B4. Bus B5 is used to transmit ciphertext, second instructions, intermediate results, and final results. In one embodiment, bus B5 can be a system-on-a-chip bus that supports communication between modules of the fully homomorphic encrypted calculator B.

[0047] Figure 2 This is a data flow diagram of bootstrapping operation according to an embodiment of the present invention, using... Figure 1 The fully homomorphic encryption calculator B shown accelerates computation. Before bootstrapping begins, the user can predetermine homomorphic parameters such as the basis, modulus, or number of task decompositions based on the application scope of the fully homomorphic encryption. Furthermore, the ciphertext, in algebraic form of two polynomials, is transferred to memory B1.

[0048] like Figure 2 As shown, the bootstrapping operation will run for N rounds, with each round proceeding as follows: Component decomposition decomposes the ciphertext into multiple structures based on the basis, serving as a task for learning errors on the rings. The number of tasks is related to the numerical setting of the basis. Figure 2 In this example, there are two tasks, handled by processing units 1 and 2 respectively. The Fast Fourier Transform converts all polynomials in each task from coefficient representation to point-value representation to produce multiple intermediate results. These intermediate results are multiplied and added together with the key, and the output is returned to the coefficient representation through the Inverse Fast Fourier Transform. If the Nth round has not been executed, the intermediate results are added back to the previous ciphertext. If the last round has been executed, the final result is output.

[0049] As mentioned earlier, task scheduler B3 monitors the operation of candidate units. Specifically, task scheduler B3's scheduling must ensure that candidate units are scheduled according to... Figure 2 The order shown.

[0050] Figure 3Based on the data flow diagram of bootstrapping computation in existing technologies, existing fully homomorphic encryption calculators distribute the ciphertext and all intermediate results to a single processing unit 1 for operation. Therefore, when the value of the homomorphic parameter increases to the point that a single processing unit 1 cannot handle it, the existing fully homomorphic encryption calculator becomes unusable. An embodiment of the present invention, an accelerated bootstrapping fully homomorphic encryption calculator B, decomposes the ciphertext into multiple tasks, maintaining each task and subsequent intermediate results as ciphertext with a loop error learning structure, and then distributes them to multiple processing units 1 and 2 for processing. Therefore, the present invention is more adaptable to different homomorphic parameters, and can increase the number of processing units to cope with an increase in the number of tasks. From a hardware perspective, compared to existing fully homomorphic encryption calculators, the accelerated bootstrapping fully homomorphic encryption calculator B of the present invention proposes a task scheduler B3 and multiple processing units B4, thereby realizing parallel and independent computation of multiple tasks during the bootstrapping process.

[0051] Figure 4 This is a flowchart illustrating the operation method of an accelerated bootstrapping fully homomorphic encrypted computing system according to an embodiment of the present invention.

[0052] Step S1: Storage device A1 stores the ciphertext learned through on-ring error training. Step S2: Processor A2 generates a first instruction for transmitting the ciphertext. Step S3: Controller B2 receives the first instruction to store the ciphertext in memory B1. In the above process, processor A2 notifies controller B2 to begin data transmission, specifying the starting address and length of the data in storage device A1. Controller B2 then transmits the data from storage device A1 to memory B1 via communication device A3. Besides the ciphertext, the first instruction also transmits the key and homomorphic parameters.

[0053] Step S4: Controller B2 generates a second instruction for bootstrapping based on the ciphertext. Step S5: Task scheduler B3 receives the second instruction to generate multiple tasks and schedule them. Step S6: Processing unit B4 decomposes the ciphertext into multiple tasks and performs multiple operations according to the schedule to produce intermediate or final results of on-loop error learning. In the above process, controller B2 notifies task scheduler B3 of the ciphertext, the starting address and length of the key in memory B1, and the values ​​of all homomorphic parameters. Task scheduler B3 then notifies processing unit B4 of this information to begin bootstrapping operations.

[0054] Please refer to this as well. Figure 1 , Figure 2 and Figure 4Regarding the process of generating intermediate results in step S6, specifically, the task scheduler B3 selects multiple candidate units that are in an idle state from multiple processing units B4, and then assigns the multiple tasks generated in step S5 to these candidate units, while ensuring that each candidate unit performs the following execution order on the assigned tasks: Fast Fourier Transform, Inverse Fast Fourier Transform, and multiplication and addition operations of the key on multiple intermediate results.

[0055] When assigning tasks, the task scheduler B3 prioritizes finding idle processing units B4. If all processing units B4 are busy, it prioritizes finding the processing unit B4 with the most idle computing modules to achieve load balancing. In one embodiment, as... Figure 2 As shown, each task generated by component decomposition will use the same processing unit B4 for all subsequent calculations to improve cache hit rate. If there are enough idle computing modules in a single processing unit B4, the task scheduler B3 can also schedule multiple tasks to run in the same processing unit B4.

[0056] The process after the final result is generated in step S6 includes the following steps: the task scheduler B3 notifies the controller B2 that the multiple operations have been completed; the controller B2 notifies the processor A2 of the starting address and length of the final result in memory B1; the bus transmits the final result to the storage device A1; and the processor A2 notifies the controller B2 that the bootstrapping has been completed.

[0057] In one embodiment, a graphics processing unit (GPU) is used to simulate an accelerated bootstrapping fully homomorphic encryption calculator B according to an embodiment of the present invention. The test environment is as follows: the GPU uses multiple NVIDIA RTX 4090 GPUs (24GB VRAM). The homomorphic encryption library is the open-source OpenFHE, version 1.0.4. The compiler uses default settings and 64-bit integers. Host A is a server, with processor A2 being an AMD Ryzen Threadripper 3970X CPU (32 cores, 64 threads), storage device A1 having 128GB of memory, and the operating system being Ubuntu 22.04.2LTS. As a control group, OpenMP is used on the CPU side to implement parallel computing, with each thread performing one bootstrapping operation.

[0058] The simulation results are shown in Table 1, which lists the execution time of FHEW / TFHE bootstrapping under different configurations. These configurations include those using 1 CPU thread (CPU 1T), 64 CPU threads (CPU 64T), and GPU simulations (including 1 GPU and 8 GPUs).

[0059] The functions listed in Table 1 are all functions supported by FHEW / TFHE in the OpenFHE library. Their internal implementations are all based on bootstrapping and can be considered as extensions of bootstrapping. Among them, EvalFunc, EvalFloor, EvalSign, and EvalDecomp are extensions of functional bootstrapping. The parameter sizes of these functions are much larger than those of general bootstrapping (such as EvalBinGate), so existing fully homomorphic encryption calculators cannot handle such large parameters. In comparison, the fully homomorphic encryption calculator B with accelerated bootstrapping of one embodiment of the present invention can achieve a speedup of 600 to 700 times compared to a single-threaded CPU. With the increase of the number of GPUs (equivalent to the number of calculators), the speedup effect can reach up to thousands of times.

[0060] Table 1, where n is the dimension of the polynomial in the ciphertext structured as Learn with Error (LWE), q is the modulus of the number in the LWE ciphertext, N is the dimension of the polynomial in the RLWE ciphertext, Q is the modulus of the number in the RLWE ciphertext, and B... g The base used for component decomposition.

[0061] Table 1

[0062]

[0063] Figure 5 This demonstrates a comparison of the execution time of the EvalFunc function between a single processing unit and multiple processing units, where the basis B... g It is 227. For example... Figure 5 As shown, when the number of times EvalFunc is executed is different, the execution speed of a single processing unit (prior technology) and a multi-processing unit (the present invention) are different. Among them, the execution speed of the present invention is more than twice as fast as that of the prior technology when the number of times EvalFunc is executed is less than 64.

[0064] Figure 6 This graph illustrates the relationship between the number of times the EvalFunc function is executed and the execution time for multiple processing units, where the base B... g The value is 29. Existing fully homomorphic encryption calculators cannot support such a small base value because a single processing unit cannot handle all the data in the bootstrapping process. In contrast, this invention supports this homomorphic parameter setting by decomposing the ciphertext into multiple tasks. Note that in... Figure 5 and Figure 6 In the relational diagram, only the basis values ​​differ; all other homomorphic parameters are the same (n = 1305, q = 2048, N = 2048, Q = 25).

[0065] In summary, this invention proposes a hardware design based on the ciphertext structure of fully homomorphic encryption, using RLWE ciphertext as the computation unit. This design not only possesses excellent scalability but also offers high flexibility in setting homomorphic parameters. Recently, due to the widespread adoption of bootstrapping, existing fully homomorphic encryption calculators are unable to support increasingly larger homomorphic parameters. In this context, the accelerated bootstrapping fully homomorphic encryption calculator, computing system, and operating method proposed in this invention can significantly improve instruction cycle time.

[0066] While the present invention has been disclosed above with reference to the foregoing embodiments, it is not intended to limit the invention. Any modifications and refinements made without departing from the spirit and scope of the invention are within the scope of patent protection of the present invention. For details regarding the scope of protection defined in the present invention, please refer to the appended claims.

Claims

1. A fully homomorphic encrypted calculator for accelerating bootstrapping, characterized in that, include: One memory is used to store ciphertext with a structure of error learning on the ring; A controller is configured to receive a first instruction to store the ciphertext into the memory and generate a second instruction for bootstrapping based on the ciphertext. A task scheduler is used to receive the second instruction to generate multiple tasks and schedule those tasks. Multiple processing units are configured to decompose the ciphertext into tasks and perform multiple operations according to the schedule to produce an intermediate or final result with a structure of on-ring error learning; and A bus electrically connects the memory, the controller, the task scheduler, and the processing units. The bus is used to transmit the ciphertext, the second instruction, and the final result.

2. The accelerated bootstrapping fully homomorphic encryption calculator according to claim 1, characterized in that, The memory is further used to store a key, and the operations include: component decomposition, fast Fourier transform, inverse fast Fourier transform, and multiply-accumulate operations using the key on the intermediate results.

3. A fully homomorphic encrypted computing system for accelerating bootstrapping, characterized in that, include: A host computer, including: A storage device for storing ciphertext with a structure of on-ring error learning; A processor that generates a first instruction for transmitting the ciphertext; and A communication device electrically connected to the processor and the storage device, and used to transmit the ciphertext; A fully homomorphic encrypted calculator with accelerated bootstrapping, communicating with the host and including: One memory space is allocated to store the ciphertext; A controller is configured to receive the first instruction to store the ciphertext into the memory and generate a second instruction for bootstrapping based on the ciphertext; A task scheduler is used to receive the second instruction to generate multiple tasks and schedule those tasks. Multiple processing units are configured to decompose the ciphertext into the tasks and perform multiple operations according to the schedule to produce an intermediate result or a final result with a structure of on-loop error learning, wherein the storage device is further configured to store the final result; and A bus electrically connects the memory, the controller, the task scheduler, and the processing units. The bus is used to transmit the ciphertext, the second instruction, and the final result.

4. The accelerated bootstrapping fully homomorphic encrypted computing system according to claim 3, characterized in that, The storage device and the memory are further used to store a key, and the operations include: component decomposition for generating the tasks, fast Fourier transform, inverse fast Fourier transform, and multiply-add operations using the key on the intermediate results.

5. The accelerated bootstrapping fully homomorphic encrypted computing system according to claim 4, characterized in that, The storage device further stores a key for decrypting the ciphertext, and the processor further generates the key based on the key and homomorphic parameters.

6. A method for operating a fully homomorphic encrypted computing system to accelerate bootstrapping, characterized in that, include: The ciphertext for on-ring error learning is stored in a storage device; A processor generates a first instruction for transmitting the ciphertext; A controller receives the first instruction to store the ciphertext into memory; The controller generates a second instruction for bootstrapping based on the ciphertext; A task scheduler receives the second instruction to generate multiple tasks and schedule those tasks. as well as The ciphertext is decomposed into tasks by multiple processing units, and multiple operations are performed according to the schedule to produce an intermediate or final result with a structure of error learning on the loop.

7. The method for operating the accelerated bootstrapping fully homomorphic encrypted computing system according to claim 6, characterized in that, It further includes: storing a key in the storage device, wherein the first instruction is further used to store the key in the memory, and the operations include: component decomposition, fast Fourier transform, inverse fast Fourier transform, and multiply-add operation using the key on the intermediate results for generating the tasks.

8. The method for operating the accelerated bootstrapping fully homomorphic encrypted computing system according to claim 7, characterized in that, The first instruction includes the ciphertext and the key at a first starting address and a first length in the storage device, and the second instruction includes the ciphertext and the key at a second starting address and a second length in the memory, as well as multiple homomorphic parameters.

9. The method for operating the accelerated bootstrapping fully homomorphic encrypted computing system according to claim 7, characterized in that, The intermediate results of learning errors on the loop structure, which are generated by these processing units performing these operations according to the schedule, include: Select multiple candidate units that are idle from among these processing units; and These tasks are assigned to these candidate units, and it is ensured that the execution order of each of these candidate units for each of these tasks is: the Fast Fourier Transform, the Inverse Fast Fourier Transform, and the multiply-accumulate operation using the key on these intermediate results.

10. The method for operating the accelerated bootstrapping fully homomorphic encrypted computing system according to claim 6, characterized in that, After the processing units perform the operations according to the schedule to produce the final result of the structure-on-loop error learning, it further includes: The task scheduler notifies the controller that these operations have been completed; The controller informs the processor of the starting address and length of the final result in memory; The final result is transmitted to the storage device via a bus; and The processor notifies the controller that the bootstrapping has been completed.