IDLE sequence automatic switching method and device, electronic equipment and storage medium

Abstract

The invention provides an IDLE sequence automatic switching method and device, electronic equipment and a storage medium, and the method comprises the steps: monitoring the characteristics of an IDLE sequence received by each channel, and outputting an indication signal based on a monitored effective IDLE sequence; wherein the IDLE sequence feature is used for identifying an IDLE sequence type output by an opposite end; monitoring the form of the current port according to the indication signal, and determining an IDLE negotiation result in response to the fact that all channels to which the current port belongs are monitored as effective IDLE sequences; performing IDLE mode configuration and port initialization on the port of the home terminal according to an IDLE negotiation result; wherein the port initialization is based on a received effective IDLE sequence, and after an indication signal is selected, the port initialization enters a discovery state from a search state. According to the method and the device, automatic switching of the IDLE sequence types of the equipment on one side can be realized, and finally link establishment communication is completed by the highest IDLE sequence type currently configured by the double-end equipment.

Description

Technical Field

[0001] This application belongs to the field of high-speed serial communication technology related to the SRIO protocol, and particularly relates to an IDLE sequence automatic switching method, device, electronic device and storage medium. Background Technology

[0002] The IDLE sequence type of existing SRIO devices requires users to manually configure the IDLE mode register of their SRIO ports via the configuration bus. Only when the IDLE sequence types configured on both ends are consistent can the two ends establish a normal communication link. Every time the user disconnects the communication link, resets the SRIO device / port, or switches the IDLE sequence type of one side of the device, the IDLE sequence type of both ends or one side of the device must be reconfigured to restore the link communication state. This may eventually cause problems such as the link being unable to restore the connection state normally. Summary of the Invention

[0003] In view of this, this application aims to propose an automatic IDLE sequence switching method, apparatus, electronic device and storage medium to solve the problem that when two SRIO devices are connected, the two devices cannot establish a connection and communicate normally due to the inconsistent IDLE sequence type configuration of the two devices.

[0004] To achieve the above objectives, the technical solution of this application is implemented as follows: Firstly, this application provides a method for automatic switching of IDLE sequences, including: By monitoring the IDLE sequence characteristics received by each channel, an indication signal is output based on the monitored valid IDLE sequences; wherein, the IDLE sequence characteristics are used to identify the type of IDLE sequence output by the peer. Based on the indication signal, the current port status is monitored, and in response to all channels under the current port being monitored as valid IDLE sequences, the IDLE negotiation result is determined. Based on the IDLE negotiation result, the local port is configured for IDLE mode and initialized; wherein, the port initialization is based on the received valid IDLE sequence and the selection indication signal, after which the search state is changed to the discovery state.

[0005] Secondly, based on the same inventive concept, this application also provides an IDLE sequence automatic switching device for implementing an IDLE sequence automatic switching method as described in the first aspect, including an IDLE sequence parsing module, an IDLE sequence negotiation module, and an IDLE sequence configuration module; The IDLE sequence parsing module is configured with a sequence selection logic unit and several sequence monitoring logic units. The sequence monitoring unit is configured to monitor the IDLE sequence characteristics received by each channel and set the corresponding monitoring flag signal to the sequence selection logic unit. The sequence selection logic unit is configured to output an indication signal based on the detected valid IDLE sequence. The IDLE sequence negotiation module is configured to monitor the current port status according to the indication signal, and in response to all channels under the current port being monitored as valid IDLE sequences, output the IDLE negotiation result to the IDLE sequence configuration module; The IDLE sequence configuration module is configured to configure the IDLE mode configuration register in the port according to the received IDLE negotiation result, so as to perform the IDLE mode switching action of the corresponding port.

[0006] Thirdly, based on the same inventive concept, this application also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method described in the first aspect.

[0007] Fourthly, based on the same inventive concept, this application also provides a non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores computer instructions for causing the computer to perform the method as described in the first aspect.

[0008] Compared with the prior art, the IDLE sequence automatic switching method, apparatus, electronic device and storage medium described in this application have the following advantages: The automatic IDLE sequence switching method described in this application solves the problem that when two SRIO devices are connected, the two devices cannot establish a connection and communicate normally due to inconsistent IDLE sequence type configurations. The method described in this application can realize the automatic switching of the IDLE sequence type of one device, and finally complete the connection and communication with the highest IDLE sequence type currently configured by both devices. Attached Figure Description

[0009] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a flowchart of an automatic IDLE sequence switching method according to an embodiment of this application; Figure 2 This is a flowchart illustrating the port initialization logic in an embodiment of this application. Figure 3This is a schematic diagram of data stream transmission for an IDLE sequence automatic switching device according to an embodiment of this application; Figure 4 This is a schematic diagram of the hardware structure of the electronic device described in an embodiment of this application. Detailed Implementation

[0010] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0011] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," and similar terms used in the embodiments of this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are only used to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0012] As described in the background section, the SRIO protocol needs to continuously send IDLE sequences to the peer device when not transmitting valid data to maintain normal connection establishment. Versions gen1 and gen2 each propose one IDLE sequence type: IDLE1 in gen1 and IDLE2 in gen2. These two IDLE sequence structures differ; if the IDLE sequence types configured on both devices are inconsistent, normal connection establishment and communication will fail. Therefore, this embodiment proposes an automatic IDLE sequence switching method, which can automatically switch the IDLE sequence type on one side of the device and ultimately complete the connection establishment and communication using the highest IDLE sequence type currently configured on both devices.

[0013] The embodiments of this application are described in detail below with reference to the accompanying drawings.

[0014] Please see Figure 1 As shown, this embodiment provides a method for automatic switching of IDLE sequences, which specifically includes the following steps: Step S101: Monitor the IDLE sequence characteristics received by each channel and output an indication signal based on the monitored valid IDLE sequence; wherein, the IDLE sequence characteristics are used to identify the type of IDLE sequence output by the peer.

[0015] Specifically, in this embodiment, this step involves automatically parsing and identifying the type of IDLE sequence sent by the peer device on the link by monitoring the IDLE sequence characteristics received by each channel. This embodiment uses IDLE1 and IDLE2 sequences as examples for explanation as follows: Furthermore, if any IDLE sequence is detected, the IDLE1 sequence is determined by detecting the special code pattern sequence after 8b / 10b encoding: K→R→R→R→A, and the IDLE2 sequence is determined by detecting the CS_MARKER code pattern sequence after 8b / 10b encoding. This determines the type of IDLE sequence output by the peer device.

[0016] When a valid IDLE1 sequence is received in one of the channels and the synchronization lock signal of that channel remains set, it indicates that the local end has received a valid IDLE1 sequence from the peer end. At this time, the IDLE1 switching indicator of that channel is set, indicating that the local end is about to switch to the IDLE1 sequence. Otherwise, the local end will keep the output IDLE2 sequence unchanged.

[0017] It should be noted that the default state on this end is IDLE2 sequence, and IDLE will only switch downwards (i.e., switch from IDLE2 sequence to IDLE1 sequence), otherwise the IDLE2 sequence will remain unchanged.

[0018] In addition, this embodiment also provides a special case: when the IDLE auto-negotiation function is enabled, the IDLE sequence type sent before the channel synchronization lock indicator goes high is the IDLE2 sequence. When the peer switches from the IDLE1 sequence to the IDLE2 sequence, the channel synchronization lock indicator will be lost. This causes the local end to return to the IDLE2 sequence. After waiting for the channel synchronization lock indicator to be reset, the local end will remain in the IDLE2 sequence when it detects the IDLE2 sequence sent by the peer. This completes the process of negotiating from IDLE1 to IDLE2 sequence.

[0019] Step S102: Monitor the current port status according to the indication signal. If all channels under the current port are monitored as valid IDLE sequences, the IDLE negotiation result is determined.

[0020] Specifically, in this embodiment, this step involves identifying the shape (width) of each port. Once all channels within a port have detected the same valid IDLE sequence, a switching action is performed, thus avoiding the error caused by offset between channels.

[0021] Furthermore, after detecting that the IDLE1 switching indicator signal is set, the current port configuration is monitored (the channel within the current port is detected to prevent channel offset, which would cause time differences in the effective IDLE1 sequence detected by each channel under multi-channel port configuration). When all channels under the current port are detected to have effective IDLE sequences, the IDLE negotiation result is output.

[0022] This embodiment adopts an automatic IDLE negotiation and switching method, which enables users to perform an adaptive switching of IDLE mode without being aware of the other end's IDLE mode and without needing to configure their own IDLE mode. The chain establishment action can be completed automatically without the user needing to configure anything related to IDLE mode.

[0023] Step S103: Perform IDLE mode configuration and port initialization on the local port according to the IDLE negotiation result; wherein, the port initialization is based on the received valid IDLE sequence and the selection of the indication signal, and then enters the discovery state from the search state.

[0024] Specifically, in this embodiment, this step involves automatically switching and rewriting the IDLE mode based on the output IDLE negotiation result.

[0025] Furthermore, after obtaining the IDLE negotiation result, it is configured into the IDLE mode configuration register within the port to complete the switching action of the local port to IDLE mode; After configuring the IDLE negotiation result and waiting for a delay of 3 clock cycles (allowing time for IDLE sequence configuration switching to complete processing), the IDLE selection indicator signal is set, indicating that the local end has received a valid IDLE sequence and the channel lock indicator signal for receiving the IDLE sequence has been set. At this time, the IDLE sequence selection completion indicator signal of the port is set and the port is initialized. The port initialization state can change from the search state to the discovery state and continue to complete the subsequent port initialization process.

[0026] like Figure 2 As shown, the entire IDLE automatic switching action occurs during the search state of the SRIO port initialization process. Only after the port selects IDLE mode can the port initialization process proceed to the next step. Only after the port initialization process reaches the initialization state can the two-end devices perform subsequent normal connection establishment and communication.

[0027] In addition, this embodiment adds an IDLE rewrite register to each SRIO port (supporting independent configuration between ports) to provide users with a forced rewrite configuration method. When the user configures the register, the IDLE mode of the corresponding port can be forcibly rewritten, overriding the IDLE sequence negotiation result.

[0028] This embodiment uses a register configuration method, which allows users to manually override the port IDLE mode as needed, providing high configuration flexibility.

[0029] In some implementations, the method further includes setting a dual-end channel synchronization lock signal to enable the dual ends to send IDLE sequences to each other before the IDLE sequence characteristics received by each channel are measured.

[0030] Specifically, in this embodiment, the dual-end channel synchronization lock setting is a preparatory stage for implementing the method, that is, configuring and enabling the IDLE automatic switching switch, and the local device waits for the channel synchronization lock signal to be set. Only when the dual-end channels complete the synchronization lock will the two ends start sending IDLE sequences to each other.

[0031] It should be noted that the above description describes some embodiments of this application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in a different order than that shown in the above embodiments and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0032] Based on the same inventive concept, corresponding to the methods of any of the above embodiments, the embodiments of this application also provide an IDLE sequence automatic switching device.

[0033] like Figure 3 As shown, the IDLE sequence automatic switching device is used to implement an IDLE sequence automatic switching method as described above, including an IDLE sequence parsing module, an IDLE sequence negotiation module, and an IDLE sequence configuration module; The IDLE sequence parsing module is configured with a sequence selection logic unit and several sequence monitoring logic units. The sequence monitoring unit is configured to monitor the IDLE sequence characteristics received by each channel and set the corresponding monitoring flag signal to the sequence selection logic unit. The sequence selection logic unit is configured to output an indication signal based on the detected valid IDLE sequence. The IDLE sequence negotiation module is configured to monitor the current port status based on the indication signal, and in response to all channels under the current port being monitored as valid IDLE sequences, output the IDLE negotiation result to the IDLE sequence configuration module; The IDLE sequence configuration module is configured to configure the IDLE mode configuration register in the port according to the received IDLE negotiation result, so as to perform the IDLE mode switching action of the corresponding port.

[0034] Specifically, in this embodiment, the IDLE1 / 2 monitoring logic units inside the IDLE sequence parsing module begin to automatically monitor the received data for IDLE. If any IDLE sequence is detected, the corresponding monitoring flag signal is set and output to the IDLE1 / 2 sequence selection logic unit. The IDLE1 sequence is determined by detecting the special code pattern sequence after 8b / 10b encoding: K→R→R→R→A, and the IDLE2 sequence is determined by detecting the CS_MARKER code pattern sequence after 8b / 10b encoding. When a channel receives a valid IDLE1 sequence and the channel's synchronization lock signal remains set, it indicates that the local end has received a valid IDLE1 sequence from the peer end. At this time, the IDLE1 switching indicator of the channel is set, indicating that the local end is about to switch to the IDLE1 sequence. Otherwise, the local end will keep the output IDLE2 sequence unchanged (IDLE will only switch downwards, otherwise it will remain unchanged as IDLE2). After detecting that the IDLE1 switching indication signal is set, the current port configuration is monitored (the channel within the current port is detected to prevent channel offset, which would cause time differences in the effective IDLE1 sequence detected by each channel under multi-channel port configuration). When all channels under the current port are detected to have effective IDLE sequences, the IDLE sequence negotiation logic module outputs the IDLE negotiation result to the IDLE sequence configuration module. After obtaining the IDLE negotiation result, the IDLE sequence configuration module configures it into the IDLE mode configuration register within the port to complete the switching action of the IDLE mode of this port. After configuring the IDLE negotiation result, delay for 3 clock cycles (allowing time for IDLE sequence configuration switching to complete processing), the IDLE1 / 2 sequence selection logic unit sets the IDLE selection indicator signal, indicating that the local end has received a valid IDLE sequence and the channel lock indicator signal for receiving the IDLE sequence has been set. At this time, the IDLE sequence selection unit of the port is set, and the IDLE sequence selection completion indicator signal is output to the port initialization logic unit. When the port initialization logic unit receives the IDLE sequence selection completion indication signal, the port initialization state can change from the search state to the discovery state and continue to complete the subsequent port initialization process.

[0035] Within the IDLE sequence configuration module, this embodiment also adds an IDLE rewrite register to each SRIO port to provide users with a forced rewrite configuration method. When the user configures the register, the IDLE mode of the corresponding port can be forcibly rewritten, overriding the IDLE sequence negotiation result.

[0036] For ease of description, the above apparatus is described in terms of its functions, divided into various modules. Of course, in implementing the embodiments of this application, the functions of each module can be implemented in one or more software and / or hardware.

[0037] The apparatus of the above embodiments is used to implement the corresponding method in any of the foregoing embodiments and has the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0038] Based on the same inventive concept, corresponding to the methods of any of the above embodiments, embodiments of this application also provide an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the methods described in any of the above embodiments.

[0039] Figure 4 This embodiment illustrates a more specific hardware structure of an electronic device, which may include a processor 1010, a memory 1020, an input / output interface 1030, a communication interface 1040, and a bus 1050. The processor 1010, memory 1020, input / output interface 1030, and communication interface 1040 are interconnected internally via the bus 1050.

[0040] The processor 1010 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this specification.

[0041] The memory 1020 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 1020 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented by software or firmware, the relevant program code is stored in the memory 1020 and is called and executed by the processor 1010.

[0042] The input / output interface 1030 is used to connect input / output modules to realize information input and output. The input / output modules can be configured as components in the device (not shown in the figure) or externally connected to the device to provide corresponding functions. Input devices may include keyboards, mice, touch screens, microphones, various sensors, etc., and output devices may include displays, speakers, vibrators, indicator lights, etc.

[0043] The communication interface 1040 is used to connect a communication module (not shown in the figure) to enable communication between this device and other devices. The communication module can communicate via wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0044] Bus 1050 includes a pathway for transmitting information between various components of the device, such as processor 1010, memory 1020, input / output interface 1030, and communication interface 1040.

[0045] It should be noted that although the above-described device only shows the processor 1010, memory 1020, input / output interface 1030, communication interface 1040, and bus 1050, in specific implementations, the device may also include other components necessary for normal operation. Furthermore, those skilled in the art will understand that the above-described device may only include the components necessary for implementing the embodiments of this specification, and not necessarily all the components shown in the figures.

[0046] The electronic devices described above are used to implement the corresponding methods in any of the foregoing embodiments and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0047] Based on the same inventive concept, corresponding to the methods of any of the above embodiments, this application also provides a non-transitory computer-readable storage medium that stores computer instructions for causing the computer to perform the methods described in any of the above embodiments.

[0048] The computer-readable medium of this embodiment includes permanent and non-permanent, removable and non-removable media, and information storage can be implemented by any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device.

[0049] The computer instructions stored in the storage medium of the above embodiments are used to cause the computer to perform the methods described in any of the above embodiments, and have the beneficial effects of the corresponding method embodiments, which will not be repeated here.

[0050] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of this application (including the claims) is limited to these examples; within the framework of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of the embodiments of this application as described above, which are not provided in the details for the sake of brevity.

[0051] Although this application has been described in conjunction with specific embodiments thereof, many substitutions, modifications, and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may be used with the embodiments discussed.

[0052] The embodiments of this application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the embodiments of this application should be included within the protection scope of this application.

Claims

1. A method for automatic switching of IDLE sequences, characterized in that, include: By monitoring the IDLE sequence characteristics received by each channel, an indication signal is output based on the monitored valid IDLE sequences; wherein, the IDLE sequence characteristics are used to identify the type of IDLE sequence output by the peer. Based on the indication signal, the current port status is monitored, and in response to all channels under the current port being monitored as valid IDLE sequences, the IDLE negotiation result is determined. Based on the IDLE negotiation result, the local port is configured for IDLE mode and initialized; wherein, the port initialization is based on the received valid IDLE sequence and the selection indication signal, after which the search state is changed to the discovery state.

2. The method according to claim 1, characterized in that: It also includes setting the dual-end channel synchronization lock signal before the IDLE sequence characteristics received by each channel are tested, so that the two ends can send IDLE sequences to each other.

3. The method according to claim 1, characterized in that: The IDLE sequence includes an IDLE1 sequence and an IDLE2 sequence; wherein, the IDLE1 sequence determines the IDLE sequence type output by the peer by detecting a special code pattern sequence after a predetermined encoding, and the IDLE2 sequence determines the IDLE sequence type output by the peer by detecting a CS_MARKER code pattern sequence after a predetermined encoding.

4. The method according to claim 3, characterized in that: In response to receiving a valid IDLE1 sequence and the corresponding channel's synchronization lock signal remaining in the set state, the IDLE1 switching indication signal of the channel is set to indicate that the local port will switch to the IDLE1 sequence; otherwise, the local port will keep the IDLE2 sequence unchanged.

5. The method according to claim 1, characterized in that: Configure the IDLE configuration register according to the determined IDLE negotiation result to complete the switching action of the port IDLE mode; It also includes manually rewriting the port IDLE mode and transmitting the IDLE rewriting result to the IDLE configuration register.

6. An automatic IDLE sequence switching device, used to implement the automatic IDLE sequence switching method as described in any one of claims 1 to 5, characterized in that: It includes the IDLE sequence parsing module, the IDLE sequence negotiation module, and the IDLE sequence configuration module; The IDLE sequence parsing module is configured with a sequence selection logic unit and several sequence monitoring logic units. The sequence monitoring unit is configured to monitor the IDLE sequence characteristics received by each channel and set the corresponding monitoring flag signal to the sequence selection logic unit. The sequence selection logic unit is configured to output an indication signal based on the detected valid IDLE sequence. The IDLE sequence negotiation module is configured to monitor the current port status according to the indication signal, and in response to all channels under the current port being monitored as valid IDLE sequences, output the IDLE negotiation result to the IDLE sequence configuration module; The IDLE sequence configuration module is configured to configure the IDLE mode configuration register in the port according to the received IDLE negotiation result, so as to perform the IDLE mode switching action of the corresponding port.

7. The IDLE sequence automatic switching device according to claim 6, characterized in that: The IDLE sequence configuration module is also configured with an IDLE rewrite register, which is used to forcibly rewrite the IDLE rewrite result of the corresponding port and transmit the IDLE rewrite result to the IDLE configuration register.

8. The IDLE sequence automatic switching device according to claim 6, characterized in that: It also includes a port initialization module, which is configured to enter the discovery state from the search state after receiving a valid IDLE sequence and selecting an indication signal, thereby completing the port initialization.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, implements the method as claimed in any one of claims 1-5.

10. A non-transitory computer-readable storage medium, characterized in that, in, The non-transitory computer-readable storage medium stores computer instructions for causing a computer to perform the method described in any one of claims 1-5.

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