Television video noise reduction and sharpening integrated processing system based on FPGA

The integrated TV video noise reduction and sharpening processing system based on FPGA integrates feature extraction, noise reduction and sharpening modules to achieve adaptive processing, which solves the problems of high system complexity and low efficiency in the existing technology and improves video quality and real-time performance.

CN121664940APending Publication Date: 2026-03-13HUIZHOU SOLA INTELLIGENT TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-17
Publication Date
2026-03-13

AI Technical Summary

Technical Problem

Existing television video processing systems suffer from high system complexity, low efficiency, and inability to coordinate optimization when noise reduction and sharpening are processed separately. Furthermore, a single method is insufficient to preserve image detail information while removing noise.

Method used

An integrated TV video noise reduction and sharpening processing system based on FPGA is adopted, which integrates a feature extraction module, a noise reduction module, a sharpening module, and a collaborative optimization module. By analyzing the video content and noise situation through feature extraction, the noise reduction and sharpening parameters are adaptively adjusted to achieve collaborative optimization of noise reduction and sharpening.

Benefits of technology

It improves the speed and real-time performance of video processing, reduces processing latency, enhances image sharpness, avoids blurring and ringing effects, and significantly improves video quality.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a television video denoising and sharpening integrated processing system based on an FPGA, and relates to the technical field of video processing. A television video denoising and sharpening integrated processing system based on an FPGA (Field Programmable Gate Array) comprises a video input interface used for receiving a television video signal; the FPGA chip is connected with the video input interface, and a feature extraction module, a noise reduction module, a sharpening module, a collaborative optimization module and a data caching module are integrated in the FPGA chip; and the video output interface is connected with the FPGA chip and is used for outputting the processed video signal. According to the invention, the noise reduction and sharpening functions are integrally processed, the links of data transmission and processing are reduced, the parallel processing capability of the FPGA is fully utilized, and the video processing speed is greatly improved.
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Description

Technical Field

[0001] This invention relates to the field of video processing technology, and in particular to an integrated processing system for TV video noise reduction and sharpening based on FPGA. Background Technology

[0002] In today's television video processing field, improving video quality has always been a crucial industry goal. With the continuous development of high-definition and ultra-high-definition video technologies, viewers have higher expectations for the clarity, detail, and realism of television images. However, actual video signals are inevitably subject to various noise interferences during acquisition, transmission, and processing, such as salt-and-pepper noise and Gaussian noise. These noises can cause problems like graininess and blurriness in the image, severely impacting the viewer's experience.

[0003] Currently, existing video noise reduction techniques mainly include two methods: spatial domain filtering and frequency domain filtering. Spatial domain filtering methods, such as mean filtering and median filtering, remove noise by calculating the noise of pixels and their neighborhoods. However, these methods often lead to the loss of edge and detail information in the image, making the picture blurry. Frequency domain filtering methods, such as Fourier transform filtering, can effectively suppress noise in the frequency domain, but they have high computational complexity and poor real-time performance, making them difficult to meet the requirements of real-time television video processing.

[0004] On the other hand, to enhance the clarity and sharpness of video images, existing sharpening techniques mainly employ methods such as the Laplacian operator and gradient operator. These methods improve image sharpness by enhancing edge and detail information. However, sharpening also has some problems; for example, over-sharpening can lead to ringing effects and amplified noise, further degrading video quality.

[0005] Furthermore, existing video processing systems typically handle noise reduction and sharpening separately. This not only increases system complexity and cost but also leads to low processing efficiency. Because separate processing requires multiple transmissions and processing of the video signal, it increases data processing latency and impacts real-time performance. Moreover, separate processing makes it difficult to achieve coordinated optimization of noise reduction and sharpening effects, and it cannot adaptively adjust based on the specific content and noise levels of the video, thus failing to achieve optimal video processing results.

[0006] In summary, existing television video processing technologies have many shortcomings in noise reduction and sharpening. On the one hand, a single noise reduction or sharpening method is difficult to retain image details while removing noise, and is prone to side effects; on the other hand, systems that handle noise reduction and sharpening separately suffer from high complexity, low efficiency, and inability to coordinate optimization. Summary of the Invention

[0007] The purpose of this invention is to at least solve one of the technical problems existing in the prior art, and to provide an integrated processing system for TV video noise reduction and sharpening based on FPGA, so as to solve the problems mentioned in the background art.

[0008] To achieve the above objectives, the present invention provides the following technical solution: an integrated TV video noise reduction and sharpening processing system based on FPGA, comprising: Video input interface, used to receive television video signals; An FPGA chip is connected to the video input interface. The FPGA chip integrates a feature extraction module, a noise reduction module, a sharpening module, a collaborative optimization module, and a data caching module. A video output interface is connected to the FPGA chip and is used to output the processed video signal. The feature extraction module is connected to the video input interface and is used to extract features from the input television video signal, analyzing the video content and noise levels. The noise reduction module is connected to the feature extraction module and performs noise reduction processing on the video signal based on the output of the feature extraction module. The sharpening module is connected to the noise reduction module and performs sharpening processing on the noise-reduced video signal. The collaborative optimization module is connected to both the noise reduction module and the sharpening module and is used to coordinate the work of the noise reduction module and the sharpening module, adjusting the noise reduction and sharpening parameters in real time according to the overall video quality and processing effect. The data caching module is connected to the feature extraction module, the noise reduction module, the sharpening module, and the collaborative optimization module and is used to cache intermediate data during the processing. The video input interface, the feature extraction module, the noise reduction module, the sharpening module, and the video output interface are connected sequentially to form the main path of video processing.

[0009] Preferably, the feature extraction module includes a brightness analysis unit, a contrast analysis unit, an edge detection unit, and a texture analysis unit; the brightness analysis unit is used to analyze the brightness distribution of the video signal and determine the overall brightness level of the video; the contrast analysis unit is used to calculate the contrast of the video signal and evaluate the clarity of the video; the edge detection unit is used to detect the edge information of the video image and identify the contour of the image; the texture analysis unit is used to analyze the texture features of the video image and determine the complexity of the image; the brightness analysis unit, contrast analysis unit, edge detection unit, and texture analysis unit are all connected to the video input interface and output the analysis results to the noise reduction module, sharpening module, and collaborative optimization module, respectively.

[0010] Preferably, the noise reduction module includes a noise type determination unit, an adaptive filtering unit, and a noise reduction parameter adjustment unit; the noise type determination unit is connected to the feature extraction module and determines the noise type in the video signal, such as salt-and-pepper noise or Gaussian noise, based on the output of the feature extraction module; the adaptive filtering unit is connected to the noise type determination unit and selects an appropriate filtering method for noise reduction based on the noise type; the noise reduction parameter adjustment unit is connected to the collaborative optimization module and adjusts the filtering parameters of the adaptive filtering unit according to the instructions of the collaborative optimization module; the noise type determination unit and the adaptive filtering unit are connected sequentially, and the output of the adaptive filtering unit is connected to the sharpening module.

[0011] Preferably, the sharpening module includes an edge enhancement unit, a sharpening intensity adjustment unit, and a sharpening effect evaluation unit; the edge enhancement unit is connected to the noise reduction module and performs edge enhancement processing on the noise-reduced video signal to improve image sharpness; the sharpening intensity adjustment unit is connected to the collaborative optimization module and adjusts the sharpening intensity of the edge enhancement unit according to the instructions of the collaborative optimization module; the sharpening effect evaluation unit is connected to the edge enhancement unit, evaluates the sharpened video signal, determines whether the sharpening effect is appropriate, and feeds back the evaluation result to the collaborative optimization module; the edge enhancement unit and the sharpening effect evaluation unit are connected in sequence, and the input end of the edge enhancement unit is connected to the noise reduction module, and the output end is connected to the video output interface.

[0012] Preferably, the collaborative optimization module includes a data fusion unit, a parameter decision unit, and a control command generation unit; the data fusion unit is connected to the feature extraction module, the noise reduction module, and the sharpening module respectively, receives various data output by the feature extraction module, the noise reduction module, and the sharpening module, and performs fusion processing; the parameter decision unit is connected to the data fusion unit, and determines the optimal noise reduction and sharpening parameters based on the fused data; the control command generation unit is connected to the parameter decision unit, and generates control commands based on the determined parameters, which are then sent to the noise reduction module and the sharpening module respectively; the data fusion unit, the parameter decision unit, and the control command generation unit are connected in sequence.

[0013] Preferably, the data caching module includes a multi-level caching unit, comprising a first-level cache, a second-level cache, and a third-level cache. The first-level cache is connected to the feature extraction module and is used to cache the raw feature data output by the feature extraction module. The second-level cache is connected to the noise reduction module and the sharpening module and is used to cache intermediate data during the noise reduction and sharpening processes. The third-level cache is connected to the collaborative optimization module and is used to cache the decision data and control instructions generated by the collaborative optimization module. The first-level cache, the second-level cache, and the third-level cache are connected through a data transmission channel to achieve fast data transmission and sharing.

[0014] Preferably, the video input interface adopts a high-speed serial interface, such as an HDMI interface or a DisplayPort interface, for quickly receiving television video signals; the video output interface adopts an interface type that matches the video input interface to ensure that the processed video signal can be accurately output to the television display device; both the video input interface and the video output interface are connected to the corresponding pins of the FPGA chip to realize data input and output.

[0015] Preferably, the FPGA chip adopts a reconfigurable architecture design, allowing users to reconfigure the logic circuits within the FPGA chip and adjust the noise reduction and sharpening processing algorithms and parameters according to different video processing needs; the configuration interface of the FPGA chip is connected to an external configuration device, through which the FPGA chip is programmed and configured.

[0016] Preferably, the system further includes a power management module, which is connected to the FPGA chip, video input interface, and video output interface to provide a stable power supply for the entire system. The power management module includes a power conversion unit and a power monitoring unit. The power conversion unit converts the externally input power into power of different voltage levels required by the system. The power monitoring unit monitors the power status of the system in real time and issues an alarm signal in a timely manner when the power is abnormal.

[0017] Compared with the prior art, the beneficial effects of the present invention are: This invention integrates noise reduction and sharpening functions, reducing data transmission and processing steps, fully utilizing the parallel processing capabilities of FPGAs, and significantly improving video processing speed. Compared to traditional separate processing methods, it can process more video data in real time, reducing processing latency and improving video real-time performance. Through adaptive noise reduction and sharpening algorithms, the system can adjust in real time according to the specific content and noise level of the video, preserving image details and enhancing image sharpness while removing noise. This avoids problems such as blurring and ringing effects found in traditional methods, significantly improving video quality. The integrated processing architecture allows for synergistic optimization of noise reduction and sharpening effects. The synergistic optimization module dynamically adjusts the noise reduction and sharpening parameters based on the overall video quality and processing effect, achieving optimal coordination between the two for better video processing results. Attached Figure Description

[0018] The present invention will be further described below with reference to the accompanying drawings and embodiments: Figure 1 This is a schematic diagram of the system flow of the present invention; Detailed Implementation

[0019] This section will describe in detail specific embodiments of the present invention. Preferred embodiments of the present invention are shown in the accompanying drawings. The purpose of the drawings is to supplement the textual description with graphics, so that people can intuitively and vividly understand each technical feature and overall technical solution of the present invention, but they should not be construed as limiting the scope of protection of the present invention.

[0020] Please see Figure 1 This invention provides a technical solution: an integrated TV video noise reduction and sharpening processing system based on FPGA, comprising: Video input interface, used to receive television video signals; An FPGA chip is connected to the video input interface. The FPGA chip integrates a feature extraction module, a noise reduction module, a sharpening module, a collaborative optimization module, and a data caching module. A video output interface is connected to the FPGA chip and is used to output the processed video signal. The feature extraction module is connected to the video input interface and is used to extract features from the input television video signal, analyzing the video content and noise levels. The noise reduction module is connected to the feature extraction module and performs noise reduction processing on the video signal based on the output of the feature extraction module. The sharpening module is connected to the noise reduction module and performs sharpening processing on the noise-reduced video signal. The collaborative optimization module is connected to both the noise reduction module and the sharpening module and is used to coordinate the work of the noise reduction module and the sharpening module, adjusting the noise reduction and sharpening parameters in real time according to the overall video quality and processing effect. The data caching module is connected to the feature extraction module, the noise reduction module, the sharpening module, and the collaborative optimization module and is used to cache intermediate data during the processing. The video input interface, the feature extraction module, the noise reduction module, the sharpening module, and the video output interface are connected sequentially to form the main path of video processing.

[0021] The feature extraction module includes a brightness analysis unit, a contrast analysis unit, an edge detection unit, and a texture analysis unit. The brightness analysis unit analyzes the brightness distribution of the video signal to determine the overall brightness level of the video. The contrast analysis unit calculates the contrast of the video signal to evaluate the video's clarity. The edge detection unit detects edge information in the video image and identifies the image's contours. The texture analysis unit analyzes the texture features of the video image to determine the image's complexity. The brightness analysis unit, contrast analysis unit, edge detection unit, and texture analysis unit are all connected to the video input interface and output the analysis results to the noise reduction module, sharpening module, and collaborative optimization module, respectively.

[0022] The noise reduction module includes a noise type determination unit, an adaptive filtering unit, and a noise reduction parameter adjustment unit. The noise type determination unit is connected to the feature extraction module and determines the noise type in the video signal, such as salt-and-pepper noise or Gaussian noise, based on the output of the feature extraction module. The adaptive filtering unit is connected to the noise type determination unit and selects an appropriate filtering method for noise reduction based on the noise type. The noise reduction parameter adjustment unit is connected to the collaborative optimization module and adjusts the filtering parameters of the adaptive filtering unit according to the instructions of the collaborative optimization module. The noise type determination unit and the adaptive filtering unit are connected sequentially, and the output of the adaptive filtering unit is connected to the sharpening module.

[0023] The sharpening module includes an edge enhancement unit, a sharpening intensity adjustment unit, and a sharpening effect evaluation unit. The edge enhancement unit is connected to the noise reduction module and performs edge enhancement processing on the noise-reduced video signal to improve image sharpness. The sharpening intensity adjustment unit is connected to the collaborative optimization module and adjusts the sharpening intensity of the edge enhancement unit according to the instructions of the collaborative optimization module. The sharpening effect evaluation unit is connected to the edge enhancement unit and evaluates the sharpened video signal to determine whether the sharpening effect is appropriate, and feeds back the evaluation result to the collaborative optimization module. The edge enhancement unit and the sharpening effect evaluation unit are connected in sequence, and the input end of the edge enhancement unit is connected to the noise reduction module, and the output end is connected to the video output interface.

[0024] The collaborative optimization module includes a data fusion unit, a parameter decision unit, and a control command generation unit. The data fusion unit is connected to the feature extraction module, the noise reduction module, and the sharpening module, respectively, and receives various data output from these modules, performing fusion processing. The parameter decision unit is connected to the data fusion unit and determines the optimal noise reduction and sharpening parameters based on the fused data. The control command generation unit is connected to the parameter decision unit and generates control commands based on the determined parameters, which are then sent to the noise reduction module and the sharpening module, respectively. The data fusion unit, the parameter decision unit, and the control command generation unit are connected sequentially.

[0025] The data caching module includes a multi-level caching unit, comprising a first-level cache, a second-level cache, and a third-level cache. The first-level cache is connected to the feature extraction module and is used to cache the raw feature data output by the feature extraction module. The second-level cache is connected to the noise reduction module and the sharpening module and is used to cache intermediate data during the noise reduction and sharpening processes. The third-level cache is connected to the collaborative optimization module and is used to cache the decision data and control instructions generated by the collaborative optimization module. The first-level cache, the second-level cache, and the third-level cache are connected through a data transmission channel to achieve fast data transmission and sharing.

[0026] The video input interface uses a high-speed serial interface, such as an HDMI interface or a DisplayPort interface, for quickly receiving television video signals; the video output interface uses an interface type that matches the video input interface to ensure that the processed video signal can be accurately output to the television display device; both the video input interface and the video output interface are connected to the corresponding pins of the FPGA chip to realize data input and output.

[0027] The FPGA chip adopts a reconfigurable architecture design, allowing users to reconfigure the logic circuits within the FPGA chip and adjust the noise reduction and sharpening processing algorithms and parameters according to different video processing needs. The configuration interface of the FPGA chip is connected to an external configuration device, which can be used to program and configure the FPGA chip.

[0028] The system also includes a power management module, which is connected to the FPGA chip, video input interface, and video output interface to provide a stable power supply for the entire system. The power management module includes a power conversion unit and a power monitoring unit. The power conversion unit converts the externally input power into power of different voltage levels required by the system. The power monitoring unit monitors the power status of the system in real time and issues an alarm signal in a timely manner when the power is abnormal.

[0029] Video input: The television video signal is input into the FPGA system through the interface.

[0030] Feature extraction: Extract features from the input video signal to analyze the video content and noise levels.

[0031] Adaptive processing: Based on the results of feature extraction, the noise reduction and sharpening parameters are adaptively adjusted, and the video signal is processed for noise reduction and sharpening.

[0032] Collaborative optimization: The collaborative optimization module evaluates and adjusts the results of noise reduction and sharpening to ensure optimal processing results.

[0033] Video output: The processed video signal is output to the TV display device through the interface.

[0034] This invention leverages the powerful parallel processing capabilities of FPGAs (Field-Programmable Gate Arrays) to integrate noise reduction and sharpening functions into a single system. FPGAs, with their reconfigurability and high-speed parallel computing capabilities, can process large amounts of video data in real time. The system first analyzes the input television video signal and automatically adjusts the noise reduction and sharpening parameters based on the video content and noise levels, achieving adaptive processing.

[0035] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention.

Claims

1. An integrated TV video noise reduction and sharpening processing system based on FPGA, characterized in that, include: Video input interface, used to receive television video signals; An FPGA chip is connected to the video input interface. The FPGA chip integrates a feature extraction module, a noise reduction module, a sharpening module, a collaborative optimization module, and a data caching module. A video output interface is connected to the FPGA chip and is used to output the processed video signal. The feature extraction module is connected to the video input interface and is used to extract features from the input television video signal. The noise reduction module is connected to the feature extraction module and performs noise reduction processing on the video signal. The sharpening module is connected to the noise reduction module and performs sharpening processing on the noise-reduced video signal. The collaborative optimization module is connected to both the noise reduction module and the sharpening module and is used to coordinate the work of the noise reduction module and the sharpening module. The data caching module is connected to the feature extraction module, the noise reduction module, the sharpening module and the collaborative optimization module. The video input interface, the feature extraction module, the noise reduction module, the sharpening module and the video output interface are connected in sequence to form the main path of video processing.

2. The FPGA-based integrated TV video noise reduction and sharpening processing system according to claim 1, characterized in that, The feature extraction module includes a brightness analysis unit, a contrast analysis unit, an edge detection unit, and a texture analysis unit. The brightness analysis unit analyzes the brightness distribution of the video signal to determine the overall brightness level of the video. The contrast analysis unit calculates the contrast of the video signal to evaluate the video's clarity. The edge detection unit detects edge information in the video image and identifies the image's contours. The texture analysis unit analyzes the texture features of the video image to determine the image's complexity. The brightness analysis unit, contrast analysis unit, edge detection unit, and texture analysis unit are all connected to the video input interface and output the analysis results to the noise reduction module, sharpening module, and collaborative optimization module, respectively.

3. The FPGA-based integrated TV video noise reduction and sharpening processing system according to claim 2, characterized in that, The noise reduction module includes a noise type determination unit, an adaptive filtering unit, and a noise reduction parameter adjustment unit. The noise type determination unit is connected to the feature extraction module and determines the noise type in the video signal based on the output of the feature extraction module. The adaptive filtering unit is connected to the noise type determination unit and selects an appropriate filtering method for noise reduction based on the noise type. The noise reduction parameter adjustment unit is connected to the collaborative optimization module and adjusts the filtering parameters of the adaptive filtering unit according to the instructions of the collaborative optimization module. The noise type determination unit and the adaptive filtering unit are connected in sequence, and the output of the adaptive filtering unit is connected to the sharpening module.

4. The FPGA-based integrated TV video noise reduction and sharpening processing system according to claim 3, characterized in that, The sharpening module includes an edge enhancement unit, a sharpening intensity adjustment unit, and a sharpening effect evaluation unit. The edge enhancement unit is connected to the noise reduction module and performs edge enhancement processing on the noise-reduced video signal to improve image sharpness. The sharpening intensity adjustment unit is connected to the collaborative optimization module and adjusts the sharpening intensity of the edge enhancement unit according to the instructions of the collaborative optimization module. The sharpening effect evaluation unit is connected to the edge enhancement unit and evaluates the sharpened video signal to determine whether the sharpening effect is appropriate, and feeds back the evaluation result to the collaborative optimization module. The edge enhancement unit and the sharpening effect evaluation unit are connected in sequence, and the input end of the edge enhancement unit is connected to the noise reduction module, and the output end is connected to the video output interface.

5. The FPGA-based integrated TV video noise reduction and sharpening processing system according to claim 4, characterized in that, The collaborative optimization module includes a data fusion unit, a parameter decision unit, and a control command generation unit. The data fusion unit is connected to the feature extraction module, the noise reduction module, and the sharpening module, respectively, and receives various data output from these modules, performing fusion processing. The parameter decision unit is connected to the data fusion unit and determines the optimal noise reduction and sharpening parameters based on the fused data. The control command generation unit is connected to the parameter decision unit and generates control commands based on the determined parameters, which are then sent to the noise reduction module and the sharpening module, respectively. The data fusion unit, the parameter decision unit, and the control command generation unit are connected sequentially.

6. The FPGA-based integrated TV video noise reduction and sharpening processing system according to claim 5, characterized in that, The data caching module includes a multi-level caching unit, comprising a first-level cache, a second-level cache, and a third-level cache. The first-level cache is connected to the feature extraction module and is used to cache the raw feature data output by the feature extraction module. The second-level cache is connected to the noise reduction module and the sharpening module and is used to cache intermediate data during the noise reduction and sharpening processes. The third-level cache is connected to the collaborative optimization module and is used to cache the decision data and control instructions generated by the collaborative optimization module. The first-level cache, the second-level cache, and the third-level cache are connected through a data transmission channel to achieve fast data transmission and sharing.

7. The FPGA-based integrated TV video noise reduction and sharpening processing system according to claim 6, characterized in that, The video input interface adopts a high-speed serial interface for quickly receiving television video signals. The video output interface adopts an interface type that matches the video input interface to ensure that the processed video signal can be accurately output to the television display device. Both the video input interface and the video output interface are connected to the corresponding pins of the FPGA chip to realize data input and output.

8. The FPGA-based integrated TV video noise reduction and sharpening processing system according to claim 7, characterized in that, The FPGA chip adopts a reconfigurable architecture design, allowing users to reconfigure the logic circuits within the FPGA chip and adjust the noise reduction and sharpening processing algorithms and parameters according to different video processing needs. The configuration interface of the FPGA chip is connected to an external configuration device, which can be used to program and configure the FPGA chip.

9. The FPGA-based integrated TV video noise reduction and sharpening processing system according to claim 8, characterized in that, The system also includes a power management module, which is connected to the FPGA chip, video input interface and video output interface to provide a stable power supply for the entire system. The power management module includes a power conversion unit and a power monitoring unit. The power conversion unit converts the externally input power into power of different voltage levels required by the system. The power monitoring unit monitors the power status of the system in real time and issues an alarm signal in a timely manner when the power is abnormal.